diff options
| author | Jacob Harvey <jlharvey@us.ibm.com> | 2017-10-04 13:43:53 -0500 |
|---|---|---|
| committer | Christian R. Geddes <crgeddes@us.ibm.com> | 2017-10-11 17:47:31 -0400 |
| commit | 2628cfebb2de50f813b005522997d7ad066b8b37 (patch) | |
| tree | 59a2235817930884a01c9637acf104eb5bb3b2c6 /src/import/chips/p9/procedures/hwp/memory/lib | |
| parent | 80c8c5b65300eb574472a5dea1afe3d8596bb329 (diff) | |
| download | talos-hostboot-2628cfebb2de50f813b005522997d7ad066b8b37.tar.gz talos-hostboot-2628cfebb2de50f813b005522997d7ad066b8b37.zip | |
Move around recording bad bits to prevent reconfig
Moved updating ATTR_DQ_BITMAP to mss_draminit_training.
When the attribute is updated, a reconfig loop is sent.
We want to skip the reconfig loop in training advance,
since training advance should do no harm
Change-Id: I948ac39f692006f5e734d33dee1a18b91106e82f
CQ: SW404569
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/47168
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/47178
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/memory/lib')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/memory/lib/phy/ddr_phy.C | 5 |
1 files changed, 0 insertions, 5 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/phy/ddr_phy.C b/src/import/chips/p9/procedures/hwp/memory/lib/phy/ddr_phy.C index e1e63fec5..315e80144 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/phy/ddr_phy.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/phy/ddr_phy.C @@ -773,11 +773,6 @@ fapi2::ReturnCode find_and_log_cal_errors(const fapi2::Target<fapi2::TARGET_TYPE i_rp, (l_rc == fapi2::FAPI2_RC_SUCCESS) ? "Yes" : "no"); - // Let's update the attribute with the failing DQ bits since we had a training error - // The only fail we get here is a scom error, so we should error out - // Hostboot will write the info to SPD and Cronus will write it to the attribute - FAPI_TRY( mss::dp16::record_bad_bits(i_target) ); - // Let's add the error to our vector for later processing (if it didn't affect too many DQ bits) if (l_rc != fapi2::FAPI2_RC_SUCCESS) { |
