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author | Jacob Harvey <jlharvey@us.ibm.com> | 2017-03-21 13:20:38 -0500 |
---|---|---|
committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2017-04-07 14:29:02 -0400 |
commit | 99d2594a86ddc328816ffd189a72f948b99d6bb7 (patch) | |
tree | cd6ed7e4737052df1182017fdd3dc2d620c4065f /src/import/chips/p9/procedures/hwp/memory/lib | |
parent | ecc3ff1845dfebcc43aca14b76011e4e0563cc94 (diff) | |
download | talos-hostboot-99d2594a86ddc328816ffd189a72f948b99d6bb7.tar.gz talos-hostboot-99d2594a86ddc328816ffd189a72f948b99d6bb7.zip |
L3 procedure work for p9_mss_draminit_training
Change-Id: Ice87b45b6bb6fe7d8bb1dacb07cee54252fcda5a
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38316
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Brian R. Silver <bsilver@us.ibm.com>
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38323
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/memory/lib')
6 files changed, 228 insertions, 91 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/ccs/ccs.H b/src/import/chips/p9/procedures/hwp/memory/lib/ccs/ccs.H index 5eb230e3f..4aad57ffb 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/ccs/ccs.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/ccs/ccs.H @@ -30,7 +30,7 @@ // *HWP HWP Owner: Brian Silver <bsilver@us.ibm.com> // *HWP HWP Backup: Andre Marin <aamarin@us.ibm.com> // *HWP Team: Memory -// *HWP Level: 1 +// *HWP Level: 3 // *HWP Consumed by: HB:FSP #ifndef _MSS_CCS_H_ @@ -50,18 +50,19 @@ constexpr uint64_t CKE_HIGH = 0b1111; // I have a dream that the CCS engine code can be shared among controllers. So, I drive the // engine from a set of traits. This might be folly. Allow me to dream. BRS - +/// +/// @class ccsTraits +/// @brief Nimbus CCS Engine traits +/// template< fapi2::TargetType T > class ccsTraits; -// Centaur CCS Engine traits template<> class ccsTraits<fapi2::TARGET_TYPE_MEMBUF_CHIP> { public: }; -// Nimbus CCS Engine traits template<> class ccsTraits<fapi2::TARGET_TYPE_MCBIST> { @@ -187,7 +188,13 @@ enum STAT_HUNG = 0x0ull, }; -// A ccs instruction is data (array 0) and some control information (array 1) + +/// +/// @class instruction_t +/// @brief Class for ccs instructions +/// @tparam T fapi2::TargetType representing the target of the CCS instructions +/// @note A ccs instruction is data (array 0) and some control information (array 1)cc +/// template< fapi2::TargetType T, typename TT = ccsTraits<T> > class instruction_t { diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/rank.C b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/rank.C index 1512f4c0c..427cc284c 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/rank.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/rank.C @@ -30,7 +30,7 @@ // *HWP HWP Owner: Brian Silver <bsilver@us.ibm.com> // *HWP HWP Backup: Andre Marin <aamarin@us.ibm.com> // *HWP Team: Memory -// *HWP Level: 2 +// *HWP Level: 3 // *HWP Consumed by: FSP:HB #include <fapi2.H> diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/rank.H b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/rank.H index 4259adfa6..4a3700f54 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/rank.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/rank.H @@ -30,7 +30,7 @@ // *HWP HWP Owner: Brian Silver <bsilver@us.ibm.com> // *HWP HWP Backup: Andre Marin <aamarin@us.ibm.com> // *HWP Team: Memory -// *HWP Level: 2 +// *HWP Level: 3 // *HWP Consumed by: HB:FSP #ifndef _MSS_RANK_H_ @@ -43,6 +43,7 @@ #include <generic/memory/lib/utils/scom.H> #include <lib/utils/num.H> #include <lib/utils/count_dimm.H> +#include <lib/shared/mss_const.H> namespace mss { @@ -69,6 +70,19 @@ enum }; /// +/// @brief set of enums used for ffdc return codes +/// +enum rank_functions +{ + RANK_PAIR_TO_PHY = 0, + RANK_PAIR_FROM_PHY = 1, + SET_RANKS_IN_PAIR = 2, + GET_RANKS_IN_PAIR = 3, + GET_RANK_FIELD = 4, + GET_PAIR_VALID = 5, + SET_RANK_FIELD = 6, +}; +/// /// @class rankPairTraits /// @brief a collection of traits associated with rank pairs /// @tparam T fapi2::TargetType representing the PHY @@ -429,29 +443,42 @@ inline uint64_t map_rank_ordinal_from_phy( const fapi2::Target<fapi2::TARGET_TYP /// /// @brief Convert rank indexes in a rank_pair reg value from MC perspective to PHY perspective /// @tparam T fapi2 Target Type the type of the MC target +/// @param[in] i_target the fapi2 target of the MCA /// @param[in] i_count the number of DIMM to be considered /// @param[in] i_rp_reg value of RANK_PAIR register /// @param[in, out] io_data the register value with mapped rank indexes +/// @return FAPI2_RC_SUCCESS iff all is ok /// template< fapi2::TargetType T > -inline void map_rank_pair_to_phy( const size_t i_count, - const fapi2::buffer<uint64_t>& i_rp_reg_value, - fapi2::buffer<uint64_t>& io_data ); +inline fapi2::ReturnCode map_rank_pair_to_phy( const fapi2::Target<T>& i_target, + const size_t i_count, + const fapi2::buffer<uint64_t>& i_rp_reg_value, + fapi2::buffer<uint64_t>& io_data ); + /// /// @brief Convert rank indexes in a rank_pair reg value from MC perspective to PHY perspective -/// Specialization for TARGET_TYPE_MCA +/// @param[in] i_target the fapi2 target of the MCA /// @param[in] i_count the number of DIMM to be considered /// @param[in] i_rp_reg value of RANK_PAIR register /// @param[in, out] io_data the register value with mapped rank indexes +/// @return FAPI2_RC_SUCCESS iff all is ok /// template<> -inline void map_rank_pair_to_phy<fapi2::TARGET_TYPE_MCA>( const size_t i_count, +inline fapi2::ReturnCode map_rank_pair_to_phy( const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, + const size_t i_count, const fapi2::buffer<uint64_t>& i_rp_reg_value, fapi2::buffer<uint64_t>& io_data ) { uint64_t l_rank = 0; + FAPI_ASSERT(i_count != 0, + fapi2::MSS_NO_DIMM_FOR_MAPPING() + .set_MCA_TARGET(i_target) + .set_FUNCTION(RANK_PAIR_TO_PHY), + "%s Tried to map rank pairs on a port without any DIMMs", + mss::c_str(i_target)); + // copy over so we get the valid bits io_data = i_rp_reg_value; @@ -474,6 +501,10 @@ inline void map_rank_pair_to_phy<fapi2::TARGET_TYPE_MCA>( const size_t i_count, l_rank = map_rank_ordinal_to_phy<fapi2::TARGET_TYPE_MCA>(i_count, l_rank); io_data.insertFromRight<ODD_SECONDARY_RANK, RANK_LEN>(l_rank); } + + return fapi2::FAPI2_RC_SUCCESS; +fapi_try_exit: + return fapi2::current_err; } /// @@ -481,12 +512,13 @@ inline void map_rank_pair_to_phy<fapi2::TARGET_TYPE_MCA>( const size_t i_count, /// @param[in] i_target the fapi2 target of the MCA /// @param[in] i_rp_reg value of RANK_PAIR register /// @param[in, out] io_data the register value with mapped rank indexes +/// @return FAPI2_RC_SUCCESS iff all is ok /// -inline void map_rank_pair_to_phy( const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, - const fapi2::buffer<uint64_t>& i_rp_reg_value, - fapi2::buffer<uint64_t>& io_data ) +inline fapi2::ReturnCode map_rank_pair_to_phy( const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, + const fapi2::buffer<uint64_t>& i_rp_reg_value, + fapi2::buffer<uint64_t>& io_data ) { - map_rank_pair_to_phy<fapi2::TARGET_TYPE_MCA>(count_dimm(i_target), i_rp_reg_value, io_data); + return map_rank_pair_to_phy(i_target, count_dimm(i_target), i_rp_reg_value, io_data); } /// @@ -494,41 +526,55 @@ inline void map_rank_pair_to_phy( const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i /// @param[in] i_target the fapi2 target of the MCA /// @param[in] i_rp_reg value of RANK_PAIR register /// @param[in, out] io_data the register value with mapped rank indexes +/// @return FAPI2_RC_SUCCESS iff all is ok /// -inline void map_rank_pair_to_phy( const fapi2::Target<fapi2::TARGET_TYPE_MBA>& i_target, - const fapi2::buffer<uint64_t>& i_rp_reg_value, - fapi2::buffer<uint64_t>& io_data ) +inline fapi2::ReturnCode map_rank_pair_to_phy( const fapi2::Target<fapi2::TARGET_TYPE_MBA>& i_target, + const fapi2::buffer<uint64_t>& i_rp_reg_value, + fapi2::buffer<uint64_t>& io_data ) { // NOOP for Centaur io_data = i_rp_reg_value; + return fapi2::FAPI2_RC_SUCCESS; } /// /// @brief Convert rank indexes in a rank_pair reg value from PHY perspective to MC perspective /// @tparam T fapi2 Target Type the type of the MC target +/// @param[in] i_target the fapi2 target of the MCA /// @param[in] i_count the number of DIMM to be considered /// @param[in] i_rp_reg value of RANK_PAIR register /// @param[in, out] io_data the register value with mapped rank indexes +/// @return FAPI2_RC_SUCCESS iff all is ok /// template< fapi2::TargetType T > -inline void map_rank_pair_from_phy( const size_t i_count, - const fapi2::buffer<uint64_t>& i_rp_reg_value, - fapi2::buffer<uint64_t>& io_data ); +inline fapi2::ReturnCode map_rank_pair_from_phy( const fapi2::Target<T>& i_target, + const size_t i_count, + const fapi2::buffer<uint64_t>& i_rp_reg_value, + fapi2::buffer<uint64_t>& io_data ); /// /// @brief Convert rank indexes in a rank_pair reg value from PHY perspective to MC perspective /// Specialization for TARGET_TYPE_MCA +/// @param[in] i_target the fapi2 target of the MCA /// @param[in] i_count the number of DIMM to be considered /// @param[in] i_rp_reg value of RANK_PAIR register /// @param[in, out] io_data the register value with mapped rank indexes +/// @return FAPI2_RC_SUCCESS iff all is ok /// template<> -inline void map_rank_pair_from_phy<fapi2::TARGET_TYPE_MCA>( const size_t i_count, +inline fapi2::ReturnCode map_rank_pair_from_phy( const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, + const size_t i_count, const fapi2::buffer<uint64_t>& i_rp_reg_value, fapi2::buffer<uint64_t>& io_data ) { uint64_t l_rank = 0; + FAPI_ASSERT(i_count != 0, + fapi2::MSS_NO_DIMM_FOR_MAPPING() + .set_FUNCTION(RANK_PAIR_FROM_PHY) + .set_MCA_TARGET(i_target), + "Tried to map rank pairs on a port without any DIMMs"); + // copy over so we get the valid bits io_data = i_rp_reg_value; @@ -551,6 +597,10 @@ inline void map_rank_pair_from_phy<fapi2::TARGET_TYPE_MCA>( const size_t i_count l_rank = map_rank_ordinal_from_phy<fapi2::TARGET_TYPE_MCA>(i_count, l_rank); io_data.insertFromRight<ODD_SECONDARY_RANK, RANK_LEN>(l_rank); } + + return fapi2::FAPI2_RC_SUCCESS; +fapi_try_exit: + return fapi2::current_err; } /// @@ -558,12 +608,13 @@ inline void map_rank_pair_from_phy<fapi2::TARGET_TYPE_MCA>( const size_t i_count /// @param[in] i_target the fapi2 target of the MCA /// @param[in] i_rp_reg value of RANK_PAIR register /// @param[in, out] io_data the register value with mapped rank indexes +/// @return FAPI2_RC_SUCCESS iff all is ok /// -inline void map_rank_pair_from_phy( const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, - const fapi2::buffer<uint64_t>& i_rp_reg_value, - fapi2::buffer<uint64_t>& io_data ) +inline fapi2::ReturnCode map_rank_pair_from_phy( const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, + const fapi2::buffer<uint64_t>& i_rp_reg_value, + fapi2::buffer<uint64_t>& io_data ) { - map_rank_pair_from_phy<fapi2::TARGET_TYPE_MCA>(count_dimm(i_target), i_rp_reg_value, io_data); + return map_rank_pair_from_phy(i_target, count_dimm(i_target), i_rp_reg_value, io_data); } /// @@ -571,13 +622,15 @@ inline void map_rank_pair_from_phy( const fapi2::Target<fapi2::TARGET_TYPE_MCA>& /// @param[in] i_target the fapi2 target of the MCA /// @param[in] i_rp_reg value of RANK_PAIR register /// @param[in, out] io_data the register value with mapped rank indexes +/// @return FAPI2_RC_SUCCESS iff all is ok /// -inline void map_rank_pair_from_phy( const fapi2::Target<fapi2::TARGET_TYPE_MBA>& i_target, - const fapi2::buffer<uint64_t>& i_rp_reg_value, - fapi2::buffer<uint64_t>& io_data ) +inline fapi2::ReturnCode map_rank_pair_from_phy( const fapi2::Target<fapi2::TARGET_TYPE_MBA>& i_target, + const fapi2::buffer<uint64_t>& i_rp_reg_value, + fapi2::buffer<uint64_t>& io_data ) { // NOOP for Centaur io_data = i_rp_reg_value; + return fapi2::FAPI2_RC_SUCCESS; } /// @@ -688,7 +741,7 @@ inline fapi2::ReturnCode read_rank_pair_reg( const fapi2::Target<T>& i_target, f static_assert((N < TT::NUM_RANK_PAIR_REGS), "Rank pair register index failed range check"); FAPI_TRY( mss::getScom(i_target, TT::RANK_PAIR_REGS[N], l_buf) ); FAPI_INF("read_rank_pair_reg: 0x%016lx", l_buf); - map_rank_pair_from_phy(i_target, l_buf, o_data); + FAPI_TRY( map_rank_pair_from_phy(i_target, l_buf, o_data) ); fapi_try_exit: return fapi2::current_err; } @@ -708,7 +761,7 @@ inline fapi2::ReturnCode write_rank_pair_reg( const fapi2::Target<T>& i_target, { fapi2::buffer<uint64_t> l_buf; static_assert((N < TT::NUM_RANK_PAIR_REGS), "Rank pair register index failed range check"); - map_rank_pair_to_phy(i_target, i_data, l_buf); + FAPI_TRY( map_rank_pair_to_phy(i_target, i_data, l_buf) ); FAPI_TRY( mss::putScom(i_target, TT::RANK_PAIR_REGS[N], l_buf) ); FAPI_INF("write_rank_pair_reg: 0x%016lx", l_buf); fapi_try_exit: @@ -787,7 +840,7 @@ fapi_try_exit: /// @brief set_rank_field /// @tparam RP rank pair (group) index /// @tparam R rank index in pair (PRIMARY, SECONDARY, etc) -/// @tparam T fapi2 Target Type defaults to TARGET_TYPE_MCA +/// @tparam T fapi2 Target Type /// @tparam TT traits type defaults to rankPairTraits<T, RP> /// @param[in, out] io_data the register value /// @param[in] i_value rank number @@ -808,8 +861,9 @@ inline void set_rank_field( fapi2::buffer<uint64_t>& io_data, const uint64_t i_v /// /// @brief set_rank_field /// @tparam RP rank pair (group) index -/// @tparam T fapi2 Target Type defaults to TARGET_TYPE_MCA +/// @tparam T fapi2 Target Type /// @tparam TT traits type defaults to rankPairTraits<T, RP> +/// @param[in] i_target the fapi2 target of the mc /// @param[in, out] io_data the register value /// @param[i] i_rank rank index in pair (PRIMARY, SECONDARY, etc) /// @param[in] i_value rank number @@ -817,8 +871,9 @@ inline void set_rank_field( fapi2::buffer<uint64_t>& io_data, const uint64_t i_v /// @note When configured for a protocol that only supports a single rank system, the rankpair 0 primary /// rank must be set to 0 /// -template< uint64_t RP, fapi2::TargetType T = fapi2::TARGET_TYPE_MCA, typename TT = rankPairTraits<T, RP> > -inline fapi2::ReturnCode set_rank_field( fapi2::buffer<uint64_t>& io_data, +template< uint64_t RP, fapi2::TargetType T, typename TT = rankPairTraits<T, RP> > +inline fapi2::ReturnCode set_rank_field( const fapi2::Target<T>& i_target, + fapi2::buffer<uint64_t>& io_data, const uint64_t i_rank, const uint64_t i_value ) { @@ -841,15 +896,25 @@ inline fapi2::ReturnCode set_rank_field( fapi2::buffer<uint64_t>& io_data, return fapi2::FAPI2_RC_SUCCESS; default: - return fapi2::FAPI2_RC_INVALID_PARAMETER; + FAPI_ASSERT( false, + fapi2::MSS_INVALID_RANK() + .set_RANK(i_rank) + .set_MCA_TARGET(i_target) + .set_FUNCTION(SET_RANK_FIELD), + "%s Invalid rank (%d) in set_rank_field", + mss::c_str(i_target), + i_rank); } -} + return fapi2::FAPI2_RC_SUCCESS; +fapi_try_exit: + return fapi2::current_err; +} /// /// @brief get_rank_field /// @tparam RP rank pair (group) index /// @tparam R rank index in pair (PRIMARY, SECONDARY, etc) -/// @tparam T fapi2 Target Type defaults to TARGET_TYPE_MCA +/// @tparam T fapi2 Target Type /// @tparam TT traits type defaults to rankPairTraits<T, RP> /// @param[in] i_data the register value /// @param[out] o_value rank number @@ -866,15 +931,17 @@ inline void get_rank_field( const fapi2::buffer<uint64_t>& i_data, uint64_t& o_v /// /// @brief get_rank_field /// @tparam RP rank pair (group) index -/// @tparam T fapi2 Target Type defaults to TARGET_TYPE_MCA +/// @tparam T fapi2 Target Type /// @tparam TT traits type defaults to rankPairTraits<T, RP> +/// @param[in] i_target the fapi2 target of the mc /// @param[in] i_data the register value /// @param[i] i_rank rank index in pair (PRIMARY, SECONDARY, etc) /// @param[out] o_value rank number /// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok /// -template< uint64_t RP, fapi2::TargetType T = fapi2::TARGET_TYPE_MCA, typename TT = rankPairTraits<T, RP> > -inline fapi2::ReturnCode get_rank_field( fapi2::buffer<uint64_t>& i_data, +template< uint64_t RP, fapi2::TargetType T, typename TT = rankPairTraits<T, RP> > +inline fapi2::ReturnCode get_rank_field( const fapi2::Target<T>& i_target, + fapi2::buffer<uint64_t>& i_data, const uint64_t i_rank, uint64_t& o_value ) { @@ -897,8 +964,19 @@ inline fapi2::ReturnCode get_rank_field( fapi2::buffer<uint64_t>& i_data, return fapi2::FAPI2_RC_SUCCESS; default: - return fapi2::FAPI2_RC_INVALID_PARAMETER; + FAPI_ASSERT( false, + fapi2::MSS_INVALID_RANK() + .set_RANK(i_rank) + .set_MCA_TARGET(i_target) + .set_FUNCTION(GET_RANK_FIELD), + "%s Invalid rank (%d) in get_ranks_in_pair", + mss::c_str(i_target), + i_rank); } + + return fapi2::FAPI2_RC_SUCCESS; +fapi_try_exit: + return fapi2::current_err; } /// @@ -923,16 +1001,17 @@ inline void set_pair_valid( fapi2::buffer<uint64_t>& io_data, const mss::states /// /// @brief set_pair_valid /// @tparam RP rank pair (group) index -/// @tparam T fapi2 Target Type defaults to TARGET_TYPE_MCA +/// @tparam T fapi2 Target /// @tparam TT traits type defaults to rankPairTraits<T, RP> +/// @param[in] i_target the fapi2 target of the mc /// @param[in, out] io_data the register value /// @param[in] i_rank rank index in pair (PRIMARY, SECONDARY, etc) /// @param[in] i_state mss::YES or mss::NO - desired state -/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok /// @note Indicates value in the RANK_PAIR field is valid /// -template< uint64_t RP, fapi2::TargetType T = fapi2::TARGET_TYPE_MCA, typename TT = rankPairTraits<T, RP> > -inline fapi2::ReturnCode set_pair_valid( fapi2::buffer<uint64_t>& io_data, +template< uint64_t RP, fapi2::TargetType T, typename TT = rankPairTraits<T, RP> > +inline fapi2::ReturnCode set_pair_valid( const fapi2::Target<T>& i_target, + fapi2::buffer<uint64_t>& io_data, const uint64_t i_rank, const mss::states i_state ) { @@ -955,8 +1034,20 @@ inline fapi2::ReturnCode set_pair_valid( fapi2::buffer<uint64_t>& io_data, return fapi2::FAPI2_RC_SUCCESS; default: - return fapi2::FAPI2_RC_INVALID_PARAMETER; + FAPI_ASSERT( false, + fapi2::MSS_INVALID_RANK() + .set_RANK(i_rank) + .set_MCA_TARGET(i_target) + .set_FUNCTION(GET_RANKS_IN_PAIR), + "%s Invalid rank (%d) in get_ranks_in_pair", + mss::c_str(i_target), + i_rank); + } + + return fapi2::FAPI2_RC_SUCCESS; +fapi_try_exit: + return fapi2::current_err; } /// @@ -981,16 +1072,18 @@ inline void get_pair_valid( const fapi2::buffer<uint64_t>& i_data, mss::states& /// /// @brief get_pair_valid /// @tparam RP rank pair (group) index -/// @tparam T fapi2 Target Type defaults to TARGET_TYPE_MCA +/// @tparam T fapi2 Target Type /// @tparam TT traits type defaults to rankPairTraits<T, RP> +/// @param[in] i_target the fapi2 target of the mc /// @param[in] i_data the register value /// @param[in] i_rank rank index in pair (PRIMARY, SECONDARY, etc) /// @param[out] o_state mss::YES or mss::NO - representing the state of the field /// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok /// @note Indicates value in the RANK_PAIR field is valid /// -template< uint64_t RP, fapi2::TargetType T = fapi2::TARGET_TYPE_MCA, typename TT = rankPairTraits<T, RP> > -inline fapi2::ReturnCode get_pair_valid( fapi2::buffer<uint64_t>& i_data, +template< uint64_t RP, fapi2::TargetType T, typename TT = rankPairTraits<T, RP> > +inline fapi2::ReturnCode get_pair_valid( const fapi2::Target<T> i_target, + fapi2::buffer<uint64_t>& i_data, const uint64_t i_rank, mss::states& o_state ) { @@ -1013,8 +1106,19 @@ inline fapi2::ReturnCode get_pair_valid( fapi2::buffer<uint64_t>& i_data, return fapi2::FAPI2_RC_SUCCESS; default: - return fapi2::FAPI2_RC_INVALID_PARAMETER; + FAPI_ASSERT( false, + fapi2::MSS_INVALID_RANK() + .set_RANK(i_rank) + .set_MCA_TARGET(i_target) + .set_FUNCTION(GET_PAIR_VALID), + "%s Invalid rank (%d) passed into get get_pair_valid", + mss::c_str(i_target), + i_rank); } + + return fapi2::FAPI2_RC_SUCCESS; +fapi_try_exit: + return fapi2::current_err; } /// @@ -1031,18 +1135,19 @@ template< uint64_t RP, fapi2::TargetType T, typename TT = rankPairTraits<T, RP> fapi2::ReturnCode set_ranks_in_pair( const fapi2::Target<T>& i_target, const std::vector<uint64_t> i_ranks ) { - // make sure i_ranks has all four ranks - if (i_ranks.size() != TT::NUM_RANKS_IN_PAIR) - { - FAPI_ERR("rank vector incorrect size"); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - // Read the rank pair register(s) fapi2::buffer<uint64_t> l_reg; std::vector<fapi2::buffer<uint64_t>> l_data; uint64_t l_ordinal = 0; + FAPI_ASSERT( i_ranks.size() == TT::NUM_RANKS_IN_PAIR, + fapi2::MSS_INVALID_RANK_VECTOR_PASSED_IN() + .set_RANK_SIZE(i_ranks.size()) + .set_MCA_TARGET(i_target) + .set_FUNCTION(SET_RANKS_IN_PAIR), + "%s Invalid vector of ranks passed in ", + mss::c_str(i_target)); + // Use the reg API here so we get the PHY to MC rank conversion FAPI_TRY( (mss::rank::read_rank_pair_reg< RP, 0 >(i_target, l_reg)) ); l_data.push_back(l_reg); @@ -1054,11 +1159,11 @@ fapi2::ReturnCode set_ranks_in_pair( const fapi2::Target<T>& i_target, { if (l_rank == NO_RANK) { - FAPI_TRY( set_pair_valid<RP>(l_data.at(TT::RANK_PAIR_FIELD_MAP[l_ordinal]), l_ordinal, mss::NO) ); + FAPI_TRY( set_pair_valid<RP>(i_target, l_data.at(TT::RANK_PAIR_FIELD_MAP[l_ordinal]), l_ordinal, mss::NO) ); } else { - FAPI_TRY( set_rank_field<RP>(l_data.at(TT::RANK_PAIR_FIELD_MAP[l_ordinal]), l_ordinal, l_rank) ); + FAPI_TRY( set_rank_field<RP>(i_target, l_data.at(TT::RANK_PAIR_FIELD_MAP[l_ordinal]), l_ordinal, l_rank) ); } ++l_ordinal; @@ -1069,7 +1174,6 @@ fapi2::ReturnCode set_ranks_in_pair( const fapi2::Target<T>& i_target, FAPI_TRY( (mss::rank::write_rank_pair_reg< RP, 1 >(i_target, l_data[1])) ); return fapi2::FAPI2_RC_SUCCESS; - fapi_try_exit: return fapi2::current_err; } @@ -1103,9 +1207,20 @@ fapi2::ReturnCode get_ranks_in_pair( const fapi2::Target<T>& i_target, // Get data for (uint64_t l_ordinal = 0; l_ordinal < TT::NUM_RANKS_IN_PAIR; ++l_ordinal) { + // Check to make sure rank is vlaid + FAPI_ASSERT( l_ordinal < MAX_RANK_PER_DIMM, + fapi2::MSS_INVALID_RANK() + .set_RANK(l_ordinal) + .set_MCA_TARGET(i_target) + .set_FUNCTION(GET_RANKS_IN_PAIR), + "%s Invalid rank (%d) in set_ranks_in_pair", + mss::c_str(i_target), + l_ordinal); + + mss::states l_state = mss::NO; - FAPI_TRY( get_pair_valid<RP>(l_data.at(TT::RANK_PAIR_FIELD_MAP[l_ordinal]), l_ordinal, l_state) ); + FAPI_TRY( get_pair_valid<RP>(i_target, l_data.at(TT::RANK_PAIR_FIELD_MAP[l_ordinal]), l_ordinal, l_state) ); if (l_state == mss::NO) { @@ -1114,13 +1229,11 @@ fapi2::ReturnCode get_ranks_in_pair( const fapi2::Target<T>& i_target, else { uint64_t l_rank = 0; - FAPI_TRY( get_rank_field<RP>(l_data.at(TT::RANK_PAIR_FIELD_MAP[l_ordinal]), l_ordinal, l_rank) ); + FAPI_TRY( get_rank_field<RP>(i_target, l_data.at(TT::RANK_PAIR_FIELD_MAP[l_ordinal]), l_ordinal, l_rank) ); o_ranks.push_back(l_rank); } } - return fapi2::FAPI2_RC_SUCCESS; - fapi_try_exit: return fapi2::current_err; } @@ -1184,7 +1297,6 @@ fapi2::ReturnCode is_mirrored( const fapi2::Target<T>& i_target, o_mirrored = true; } - return fapi2::FAPI2_RC_SUCCESS; fapi_try_exit: return fapi2::current_err; } @@ -1222,11 +1334,19 @@ inline fapi2::ReturnCode get_ranks_in_pair( const fapi2::Target<T>& i_target, // Error case default: - FAPI_ERR("Invalid number of rankpairs entered. num: %lu max: %lu", i_rp, MAX_PRIMARY_RANKS_PER_PORT); - FAPI_TRY(fapi2::FAPI2_RC_INVALID_PARAMETER); + FAPI_ASSERT( false, + fapi2::MSS_INVALID_RANK_PAIR() + .set_RANK_PAIR(i_rp) + .set_MCA_TARGET(i_target) + .set_FUNCTION(GET_RANKS_IN_PAIR), + "%s Invalid rank pair (%d) in get_ranks_in_pair", + mss::c_str(i_target), + i_rp); + break; } + return fapi2::FAPI2_RC_SUCCESS; fapi_try_exit: return fapi2::current_err; } diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/fir/unmask.C b/src/import/chips/p9/procedures/hwp/memory/lib/fir/unmask.C index 90d68471e..ca057116f 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/fir/unmask.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/fir/unmask.C @@ -30,7 +30,7 @@ // *HWP HWP Owner: Brian Silver <bsilver@us.ibm.com> // *HWP HWP Backup: Marc Gollub <gollub@us.ibm.com> // *HWP Team: Memory -// *HWP Level: 2 +// *HWP Level: 3 // *HWP Consumed by: FSP:HB #include <fapi2.H> diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/fir/unmask.H b/src/import/chips/p9/procedures/hwp/memory/lib/fir/unmask.H index fceb24ab8..116c479e6 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/fir/unmask.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/fir/unmask.H @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2016 */ +/* Contributors Listed Below - COPYRIGHT 2016,2017 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -30,7 +30,7 @@ // *HWP HWP Owner: Brian Silver <bsilver@us.ibm.com> // *HWP HWP Backup: Marc Gollub <gollub@us.ibm.com> // *HWP Team: Memory -// *HWP Level: 2 +// *HWP Level: 3 // *HWP Consumed by: FSP:HB #ifndef _MSS_UNMASK_FIR_H_ diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/phy/ddr_phy.C b/src/import/chips/p9/procedures/hwp/memory/lib/phy/ddr_phy.C index 99884dc66..4c20c1b33 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/phy/ddr_phy.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/phy/ddr_phy.C @@ -30,7 +30,7 @@ // *HWP HWP Owner: Brian Silver <bsilver@us.ibm.com> // *HWP HWP Backup: Andre Marin <aamarin@us.ibm.com> // *HWP Team: Memory -// *HWP Level: 2 +// *HWP Level: 3 // *HWP Consumed by: FSP:HB #include <vector> @@ -84,7 +84,7 @@ fapi2::ReturnCode change_resetn( const fapi2::Target<TARGET_TYPE_MCBIST>& i_targ FAPI_INF("Change reset to %s PHY: %s", (i_state == HIGH ? "high" : "low"), mss::c_str(p)); FAPI_TRY( mss::getScom(p, MCA_MBA_CAL0Q, l_data) ); - i_state == HIGH ? l_data.setBit<MCA_MBA_CAL0Q_RESET_RECOVER>() : l_data.clearBit<MCA_MBA_CAL0Q_RESET_RECOVER>(); + l_data.writeBit<MCA_MBA_CAL0Q_RESET_RECOVER>(i_state == HIGH); FAPI_TRY( mss::putScom(p, MCA_MBA_CAL0Q, l_data) ); } @@ -107,7 +107,7 @@ fapi2::ReturnCode enable_zctl( const fapi2::Target<TARGET_TYPE_MCBIST>& i_target constexpr uint64_t l_zcal_status_reg = pcTraits<TARGET_TYPE_MCA>::PC_DLL_ZCAL_CAL_STATUS_REG; uint8_t l_sim = 0; - FAPI_TRY( mss::is_simulation( l_sim) ); + FAPI_TRY( mss::is_simulation(l_sim) ); if (l_sim) { @@ -304,7 +304,7 @@ fapi2::ReturnCode check_bang_bang_lock( const fapi2::Target<fapi2::TARGET_TYPE_M MCA_DDRPHY_DP16_SYSCLK_PR_VALUE_P0_4, }; - FAPI_TRY( mss::is_simulation( l_sim) ); + FAPI_TRY( mss::is_simulation(l_sim) ); // There's nothing going on in sim ... if (l_sim) @@ -323,7 +323,8 @@ fapi2::ReturnCode check_bang_bang_lock( const fapi2::Target<fapi2::TARGET_TYPE_M FAPI_INF("checking %s MCA_DDRPHY_ADR_SYSCLK_PR_VALUE_RO_P0_ADR32S0 0x%016x", mss::c_str(p), MCA_DDRPHY_ADR_SYSCLK_PR_VALUE_RO_P0_ADR32S0); - FAPI_ASSERT( + FAPI_ASSERT + ( mss::poll(p, MCA_DDRPHY_ADR_SYSCLK_PR_VALUE_RO_P0_ADR32S0, poll_parameters(), [&l_read](const size_t poll_remaining, const fapi2::buffer<uint64_t>& stat_reg) -> bool { @@ -340,7 +341,8 @@ fapi2::ReturnCode check_bang_bang_lock( const fapi2::Target<fapi2::TARGET_TYPE_M FAPI_INF("checking %s MCA_DDRPHY_ADR_SYSCLK_PR_VALUE_RO_P0_ADR32S1 0x%016x", mss::c_str(p), MCA_DDRPHY_ADR_SYSCLK_PR_VALUE_RO_P0_ADR32S1); - FAPI_ASSERT( + FAPI_ASSERT + ( mss::poll(p, MCA_DDRPHY_ADR_SYSCLK_PR_VALUE_RO_P0_ADR32S1, poll_parameters(), [&l_read](const size_t poll_remaining, const fapi2::buffer<uint64_t>& stat_reg) -> bool { @@ -364,7 +366,8 @@ fapi2::ReturnCode check_bang_bang_lock( const fapi2::Target<fapi2::TARGET_TYPE_M FAPI_INF("checking %s MCA_DDRPHY_DP16_SYSCLK_PR_VALUE_P0_0_01_BB_LOCK0 0x%016x", mss::c_str(p), l_read); - FAPI_ASSERT( + FAPI_ASSERT + ( mss::poll(p, r, poll_parameters(), [&l_read](const size_t poll_remaining, const fapi2::buffer<uint64_t>& stat_reg) -> bool { @@ -372,7 +375,6 @@ fapi2::ReturnCode check_bang_bang_lock( const fapi2::Target<fapi2::TARGET_TYPE_M l_read = stat_reg; return stat_reg.getBit<MCA_DDRPHY_DP16_SYSCLK_PR_VALUE_P0_0_01_BB_LOCK0>() == mss::ON; }), - fapi2::MSS_DP16_BANG_BANG_FAILED_TO_LOCK().set_MCA_IN_ERROR(p).set_ROTATOR(0), "DP16 failed bb lock. rotator %d register 0x%016lx 0x%016lx", 0, r, l_read ); @@ -384,7 +386,8 @@ fapi2::ReturnCode check_bang_bang_lock( const fapi2::Target<fapi2::TARGET_TYPE_M if (r != MCA_DDRPHY_DP16_SYSCLK_PR_VALUE_P0_4) { - FAPI_ASSERT( + FAPI_ASSERT + ( mss::poll(p, r, poll_parameters(), [&l_read](const size_t poll_remaining, const fapi2::buffer<uint64_t>& stat_reg) -> bool { @@ -392,7 +395,6 @@ fapi2::ReturnCode check_bang_bang_lock( const fapi2::Target<fapi2::TARGET_TYPE_M l_read = stat_reg; return stat_reg.getBit<MCA_DDRPHY_DP16_SYSCLK_PR_VALUE_P0_0_01_BB_LOCK1>() == mss::ON; }), - fapi2::MSS_DP16_BANG_BANG_FAILED_TO_LOCK().set_MCA_IN_ERROR(p).set_ROTATOR(1), "DP16 failed bb lock. rotator %d register 0x%016lx 0x%016lx", 1, r, l_read ); @@ -421,17 +423,26 @@ fapi2::ReturnCode rank_pair_primary_to_dimm( const fapi2::Target<TARGET_TYPE_MCA // Sanity check the rank pair FAPI_INF("%s rank pair: %d", mss::c_str(i_target), i_rp); - fapi2::Assert(i_rp < MAX_RANK_PER_DIMM); + FAPI_ASSERT( i_rp < MAX_RANK_PER_DIMM, + fapi2::MSS_INVALID_RANK_PAIR() + .set_RANK_PAIR(i_rp) + .set_MCA_TARGET(i_target) + .set_FUNCTION(GET_RANKS_IN_PAIR), + "%s Invalid rank pair (%d) in get_ranks_in_pair", + mss::c_str(i_target), + i_rp); // Get the rp's primary rank, and figure out which DIMM it's on FAPI_TRY( mss::rank::get_ranks_in_pair(i_target, i_rp, l_ranks_in_rp) ); // Make sure we have a valid rank - if (l_ranks_in_rp[0] == NO_RANK) - { - FAPI_ERR("%s No primary rank in rank pair %d", mss::c_str(i_target), i_rp); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } + FAPI_ASSERT( l_ranks_in_rp[0] != NO_RANK, + fapi2::MSS_NO_PRIMARY_RANK_FOUND_RP() + .set_RANK_PAIR(i_rp) + .set_MCA_TARGET(i_target), + "%s No primary rank in rank pair %d", + mss::c_str(i_target), + i_rp); FAPI_TRY( mss::rank::get_dimm_target_from_rank(i_target, l_ranks_in_rp[0], o_dimm) ); @@ -860,7 +871,6 @@ fapi2::ReturnCode setup_cal_config( const fapi2::Target<fapi2::TARGET_TYPE_MCA>& // Configures WR VREF config register to run 1D (write centering only) or 2D (write centering + VREF) calibration { - std::vector<fapi2::buffer<uint64_t>> l_vref_config; FAPI_TRY( mss::scom_suckah(i_target, mss::dp16Traits<fapi2::TARGET_TYPE_MCA>::WR_VREF_CONFIG0_REG, l_vref_config) ); @@ -893,10 +903,10 @@ fapi2::ReturnCode setup_cal_config( const fapi2::Target<fapi2::TARGET_TYPE_MCA>& l_vrefdq_train_value_override) ); // Latches the VREF's - FAPI_TRY( mss::ddr4::latch_wr_vref_commands_by_rank_pair( i_target, + FAPI_TRY( mss::ddr4::latch_wr_vref_commands_by_rank_pair(i_target, l_rp, l_vrefdq_train_range_override, - l_vrefdq_train_value_override ) ); + l_vrefdq_train_value_override) ); } // Note: This rank encoding isn't used if the cal is initiated from the CCS engine |