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| author | Stephen Glancy <sglancy@us.ibm.com> | 2018-09-04 10:57:35 -0500 |
|---|---|---|
| committer | Christian R. Geddes <crgeddes@us.ibm.com> | 2018-09-19 17:21:05 -0500 |
| commit | 4f8cfb6e9c07076261fac4b58105bd6863f6c13f (patch) | |
| tree | bd3133e372feeedfd117aa16c23030cf190d0ca1 /src/import/chips/p9/procedures/hwp/memory/lib/shared/mss_const.H | |
| parent | 8247477571339e0cba2d06d0701378e029628806 (diff) | |
| download | talos-hostboot-4f8cfb6e9c07076261fac4b58105bd6863f6c13f.tar.gz talos-hostboot-4f8cfb6e9c07076261fac4b58105bd6863f6c13f.zip | |
Moves sync code to generic folder
Change-Id: I440cdb0ea105a6dbdcd0ac26696308e55d56f88b
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/65786
Dev-Ready: STEPHEN GLANCY <sglancy@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/66323
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/memory/lib/shared/mss_const.H')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/memory/lib/shared/mss_const.H | 9 |
1 files changed, 0 insertions, 9 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/shared/mss_const.H b/src/import/chips/p9/procedures/hwp/memory/lib/shared/mss_const.H index 04c84f68c..8238a888c 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/shared/mss_const.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/shared/mss_const.H @@ -69,7 +69,6 @@ enum sizes MAX_DRAMS_X4 = MAX_DQ_BITS / BITS_PER_NIBBLE, ///< For x4's there are 18 DRAM for 72 bits NUM_MRW_FREQS = 4, ///< Used for ATTR_MSS_MRW_SUPPORTED_FREQ - NUM_MAX_FREQS = 5, ///< Used for ATTR_MAX_ALLOWED_DIMM_FREQ MARK_STORE_COUNT = 8, ///< Elements in a VPD mark/store array @@ -195,14 +194,6 @@ enum ffdc_function_codes // WR VREF functions DRAM_TO_RP_REG = 101, - // mss_freq functions - FREQ_SCOREBOARD_REMOVE_FREQS_ABOVE_LIMIT = 110, - FREQ_SCOREBOARD_REMOVE_FREQS_ABOVE_LIMIT_VECTOR = 111, - FREQ_SCOREBOARD_REMOVE_FREQS_NOT_ON_LIST = 112, - FREQ_SCOREBOARD_MAX_SUPPORTED_FREQ = 113, - FREQ_SCOREBOARD_SUPPORTED_FREQS = 114, - LIMIT_FREQ_BY_VPD = 115, - // eff_dimm.C PRIMARY_STACK_TYPE = 116, }; |
