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author | Jacob Harvey <jlharvey@us.ibm.com> | 2017-07-13 15:06:13 -0500 |
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committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2017-07-26 10:29:10 -0400 |
commit | fd029f5afa54473a055a9b938d53da2e556b5a75 (patch) | |
tree | 87215911f0c9d138c74abe760334dd20a5864856 /src/import/chips/p9/procedures/hwp/memory/lib/phy | |
parent | 135d297bcee4f80451c3fd5e4061f1010fe4f6d6 (diff) | |
download | talos-hostboot-fd029f5afa54473a055a9b938d53da2e556b5a75.tar.gz talos-hostboot-fd029f5afa54473a055a9b938d53da2e556b5a75.zip |
L3 draminit and mss_lib
Change-Id: If5cae63291864da0b87d6a1e82407da9358d62d2
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43121
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43278
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/memory/lib/phy')
-rw-r--r-- | src/import/chips/p9/procedures/hwp/memory/lib/phy/apb.C | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/phy/apb.C b/src/import/chips/p9/procedures/hwp/memory/lib/phy/apb.C index 4fc25aa76..eaf787bbc 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/phy/apb.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/phy/apb.C @@ -62,11 +62,11 @@ fapi2::ReturnCode fir_check(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_targe FAPI_TRY( read_error_status0(i_target, l_data) ); FAPI_ASSERT( l_data.getBit<TT::INVALID_ADDRESS>() == false, - fapi2::MSS_APB_INVALID_ADDRESS().set_PORT_POSITION(mss::fapi_pos(i_target)).set_TARGET_IN_ERROR(i_target), + fapi2::MSS_APB_INVALID_ADDRESS().set_PORT_POSITION(mss::fapi_pos(i_target)).set_MCA_TARGET(i_target), "APB interface is reporting an invalid address on %s", mss::c_str(i_target) ); FAPI_ASSERT( l_data.getBit<TT::WRITE_PARITY_ERR>() == false, - fapi2::MSS_APB_WR_PAR_ERR().set_PORT_POSITION(mss::fapi_pos(i_target)).set_TARGET_IN_ERROR(i_target), + fapi2::MSS_APB_WR_PAR_ERR().set_PORT_POSITION(mss::fapi_pos(i_target)).set_MCA_TARGET(i_target), "APB interface is reporting a read/write parity error on %s", mss::c_str(i_target) ); } @@ -76,28 +76,28 @@ fapi2::ReturnCode fir_check(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_targe FAPI_TRY( read_fir_err0(i_target, l_data) ); FAPI_ASSERT( l_data.getBit<TT::FATAL_FSM>() == false, - fapi2::MSS_FATAL_FSM_PHYTOP().set_PORT_POSITION(mss::fapi_pos(i_target)).set_TARGET_IN_ERROR(i_target), + fapi2::MSS_FATAL_FSM_PHYTOP().set_PORT_POSITION(mss::fapi_pos(i_target)).set_MCA_TARGET(i_target), "APB interface is reporting a fatal FSM error in PHYTOP %s", mss::c_str(i_target) ); FAPI_ASSERT( l_data.getBit<TT::FATAL_PARITY>() == false, - fapi2::MSS_FATAL_PARITY_PHYTOP().set_PORT_POSITION(mss::fapi_pos(i_target)).set_TARGET_IN_ERROR(i_target), + fapi2::MSS_FATAL_PARITY_PHYTOP().set_PORT_POSITION(mss::fapi_pos(i_target)).set_MCA_TARGET(i_target), "APB interface is reporting a fatal parity error in PHYTOP %s", mss::c_str(i_target) ); FAPI_ASSERT( l_data.getBit<TT::FSM>() == false, - fapi2::MSS_FSM_PHYTOP().set_PORT_POSITION(mss::fapi_pos(i_target)).set_TARGET_IN_ERROR(i_target), + fapi2::MSS_FSM_PHYTOP().set_PORT_POSITION(mss::fapi_pos(i_target)).set_MCA_TARGET(i_target), "APB interface is reporting a recoverable FSM error in PHYTOP %s", mss::c_str(i_target) ); FAPI_ASSERT( l_data.getBit<TT::PARITY>() == false, - fapi2::MSS_PARITY_PHYTOP().set_PORT_POSITION(mss::fapi_pos(i_target)).set_TARGET_IN_ERROR(i_target), + fapi2::MSS_PARITY_PHYTOP().set_PORT_POSITION(mss::fapi_pos(i_target)).set_MCA_TARGET(i_target), "APB interface is reporting a recoverable parity error in PHYTOP %s", mss::c_str(i_target) ); FAPI_ASSERT( l_data.getBit<TT::FATAL_ADR52_MASTER>() == false, - fapi2::MSS_FATAL_ADR52_MASTER().set_PORT_POSITION(mss::fapi_pos(i_target)).set_TARGET_IN_ERROR(i_target), + fapi2::MSS_FATAL_ADR52_MASTER().set_PORT_POSITION(mss::fapi_pos(i_target)).set_MCA_TARGET(i_target), "APB interface is reporting a fatal register parity error in ADR52 master side logic %s", mss::c_str(i_target) ); FAPI_ASSERT( l_data.getBit<TT::FATAL_ADR52_SLAVE>() == false, - fapi2::MSS_FATAL_ADR52_SLAVE().set_PORT_POSITION(mss::fapi_pos(i_target)).set_TARGET_IN_ERROR(i_target), + fapi2::MSS_FATAL_ADR52_SLAVE().set_PORT_POSITION(mss::fapi_pos(i_target)).set_MCA_TARGET(i_target), "APB interface is reporting a fatal register parity error in ADR52 slave side logic %s", mss::c_str(i_target) ); @@ -106,7 +106,7 @@ fapi2::ReturnCode fir_check(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_targe fapi2::MSS_FSM_DP16() .set_PORT_POSITION(mss::fapi_pos(i_target)) .set_DP16_POSITION(l_dp16) - .set_TARGET_IN_ERROR(i_target), + .set_MCA_TARGET(i_target), "APB interface is reporting a recoverable FSM state checker error in DP16 %s 0x%x", mss::c_str(i_target), l_dp16 ); } |