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authorBen Gass <bgass@us.ibm.com>2017-10-06 13:55:17 -0500
committerChristian R. Geddes <crgeddes@us.ibm.com>2017-10-11 17:45:21 -0400
commite48610de4c600f13f2b3eb8742e9788627332f07 (patch)
tree4d3586044ea7c8e456f1dd934e32772c5eeaa1ef /src/import/chips/p9/procedures/hwp/memory/lib/phy
parent06780e295b6d6db10c4342e238ae39a926e4a397 (diff)
downloadtalos-hostboot-e48610de4c600f13f2b3eb8742e9788627332f07.tar.gz
talos-hostboot-e48610de4c600f13f2b3eb8742e9788627332f07.zip
Set DD2_BLUE_EXTEND_RANGE to 0 for simulation
Doesn't need to be in OP910 since this is a sim fix So skipping must-fix process Change-Id: Ice371800060aab5f4656d0d4389d97add36b8890 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48071 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com> Reviewed-by: JACOB L. HARVEY <jlharvey@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48124 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/memory/lib/phy')
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/lib/phy/dp16.C11
1 files changed, 10 insertions, 1 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/phy/dp16.C b/src/import/chips/p9/procedures/hwp/memory/lib/phy/dp16.C
index 871c36fba..e41461bb1 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/phy/dp16.C
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/phy/dp16.C
@@ -2467,11 +2467,17 @@ fapi2::ReturnCode reset_drift_limits( const fapi2::Target<TARGET_TYPE_MCA>& i_ta
{
// traits definition
typedef dp16Traits<TARGET_TYPE_MCA> TT;
+ uint8_t l_sim = 0;
fapi2::buffer<uint64_t> l_data;
uint64_t l_freq = 0;
+
blue_waterfall_range l_value = blue_waterfall_range::ONE_TO_FOUR;
+ const auto l_mcbist = mss::find_target<TARGET_TYPE_MCBIST>(i_target);
+
+ FAPI_TRY( mss::is_simulation( l_sim) );
+
if (mss::chip_ec_nimbus_lt_2_0(i_target))
{
// This regfield doesn't exist on DD1, so nothing to do here
@@ -2480,7 +2486,6 @@ fapi2::ReturnCode reset_drift_limits( const fapi2::Target<TARGET_TYPE_MCA>& i_ta
}
// Get the frequency attribute
- const auto l_mcbist = mss::find_target<TARGET_TYPE_MCBIST>(i_target);
FAPI_TRY(mss::freq(l_mcbist, l_freq));
// Set the blue waterfall range according to the frequency value as follows:
@@ -2489,6 +2494,10 @@ fapi2::ReturnCode reset_drift_limits( const fapi2::Target<TARGET_TYPE_MCA>& i_ta
l_value = ((l_freq == fapi2::ENUM_ATTR_MSS_FREQ_MT2666) || (l_freq == fapi2::ENUM_ATTR_MSS_FREQ_MT2400)) ?
blue_waterfall_range::TWO_TO_FIVE :
blue_waterfall_range::ONE_TO_FOUR;
+
+ //From John Bialas : the value is good for hardware, but not so much in sim, in sim they should be 0s - bgass - 10/6/2017
+ l_value = (l_sim == 1) ? blue_waterfall_range::ZERO_TO_THREE : l_value;
+
FAPI_INF("%s Initializing RDCLK extended range to 0x%01x", c_str(i_target), l_value);
// Loops through all DP's and sets the register values
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