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author | Andre Marin <aamarin@us.ibm.com> | 2017-07-12 09:42:23 -0500 |
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committer | William G. Hoffa <wghoffa@us.ibm.com> | 2017-07-25 23:51:21 -0400 |
commit | 74fe23130c9e94b6d72de3cb3a5aec3a8858ce91 (patch) | |
tree | a3f8ca0edcc0b14b052439d75669a97701efd3b4 /src/import/chips/p9/procedures/hwp/memory/lib/phy | |
parent | 8179bdadd03ebf36890dee3dad647d53d1272c1a (diff) | |
download | talos-hostboot-74fe23130c9e94b6d72de3cb3a5aec3a8858ce91.tar.gz talos-hostboot-74fe23130c9e94b6d72de3cb3a5aec3a8858ce91.zip |
Remove reset_dll from scominit, enable delay line tap points
reset_dll API was found to be redundant to what already
exists in the initfile per John Bialas. Removed if
from scominit. Also included initfile changes that
John made by enabling delay line tap points
Change-Id: Ide517e8dced5176d508dcb352e041e09da206a09
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43018
Reviewed-by: JACOB L. HARVEY <jlharvey@us.ibm.com>
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Reviewed-by: Matt K. Light <mklight@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43235
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/memory/lib/phy')
-rw-r--r-- | src/import/chips/p9/procedures/hwp/memory/lib/phy/ddr_phy.C | 3 | ||||
-rw-r--r-- | src/import/chips/p9/procedures/hwp/memory/lib/phy/dp16.C | 32 |
2 files changed, 0 insertions, 35 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/phy/ddr_phy.C b/src/import/chips/p9/procedures/hwp/memory/lib/phy/ddr_phy.C index 81f7f3f2b..66da61305 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/phy/ddr_phy.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/phy/ddr_phy.C @@ -778,9 +778,6 @@ fapi2::ReturnCode phy_scominit(const fapi2::Target<TARGET_TYPE_MCBIST>& i_target FAPI_TRY( mss::dp16::reset_bad_bits(p) ); #endif - // New for Nimbus reset the DLL - FAPI_TRY( mss::dp16::reset_dll(p) ); - FAPI_TRY( mss::rank::get_rank_pairs(p, l_pairs) ); // Section 5.2.4.8 DP16 Write Clock Enable & Clock Selection on page 301 diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/phy/dp16.C b/src/import/chips/p9/procedures/hwp/memory/lib/phy/dp16.C index 5258d87b0..39135d317 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/phy/dp16.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/phy/dp16.C @@ -1533,38 +1533,6 @@ fapi_try_exit: } /// -/// @brief Reset all of the DLL registers - Nimbus only -/// @param[in] i_target an MCA -/// @return FAPI2_RC_SUCCESs iff ok -/// -fapi2::ReturnCode reset_dll( const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target ) -{ - typedef dp16Traits<TARGET_TYPE_MCA> TT; - - // For DD1.0 we have some workarounds. We send the magic - // number in to the work around and it fixes it up as needed. - uint64_t l_vreg_cnrtl = mss::workarounds::dp16::vreg_control0(i_target, 0x6740); - - // Magic numbers are from the PHY team (see the ddry phy initfile, too.) They are, in fact, - // magic numbers ... - - // TK How about a little broadcast action here? BRS - FAPI_TRY( mss::scom_blastah(i_target, TT::DLL_CNFG_REG, 0x0060) ); - FAPI_TRY( mss::scom_blastah(i_target, TT::DLL_CNTRL_REG, 0x8100) ); - FAPI_TRY( mss::scom_blastah(i_target, TT::DLL_DAC_LOWER_REG, 0x8000) ); - FAPI_TRY( mss::scom_blastah(i_target, TT::DLL_DAC_UPPER_REG, 0xffe0) ); - FAPI_TRY( mss::scom_blastah(i_target, TT::DLL_SLAVE_LOWER_REG, 0x8000) ); - FAPI_TRY( mss::scom_blastah(i_target, TT::DLL_SLAVE_UPPER_REG, 0xffe0) ); - FAPI_TRY( mss::scom_blastah(i_target, TT::DLL_EXTRA_REG, 0x2020) ); - FAPI_TRY( mss::scom_blastah(i_target, TT::DLL_VREG_CNTRL_REG, l_vreg_cnrtl) ); - FAPI_TRY( mss::scom_blastah(i_target, TT::DLL_SW_CNTRL_REG, 0x0800) ); - FAPI_TRY( mss::scom_blastah(i_target, TT::DLL_VREG_COARSE_REG, 0x0402) ); - -fapi_try_exit: - return fapi2::current_err; -} - -/// /// @brief Configure Read VREF Registers /// @param[in] i_target a MCA target /// @return FAPI2_RC_SUCCESs iff ok |