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| author | Jacob Harvey <jlharvey@us.ibm.com> | 2017-06-07 17:08:52 -0500 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2017-06-25 13:18:50 -0400 |
| commit | 48715fb712512944aae0bd4154defab65d30dc12 (patch) | |
| tree | 3224a3249b813161f6493178578e63c08538568c /src/import/chips/p9/procedures/hwp/memory/lib/phy | |
| parent | 5fd4a6a86be690ca464915ee60dbdd634a2d15cf (diff) | |
| download | talos-hostboot-48715fb712512944aae0bd4154defab65d30dc12.tar.gz talos-hostboot-48715fb712512944aae0bd4154defab65d30dc12.zip | |
Turn off A17 if not needed
Change-Id: I3b4b31e537586339f90ffd48b60ed93bfb531fea
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41848
Dev-Ready: JACOB L. HARVEY <jlharvey@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41944
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/memory/lib/phy')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/memory/lib/phy/seq.C | 1 | ||||
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/memory/lib/phy/seq.H | 19 |
2 files changed, 15 insertions, 5 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/phy/seq.C b/src/import/chips/p9/procedures/hwp/memory/lib/phy/seq.C index 53702bb9a..03387e173 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/phy/seq.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/phy/seq.C @@ -83,7 +83,6 @@ uint64_t exp_helper( const uint64_t i_value ) return l_first_bit + (uint64_t(1 << l_first_bit) < i_value ? 1 : 0); } - /// /// @brief reset SEQ_TIMING0 /// @param[in] i_target fapi2 target of the port diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/phy/seq.H b/src/import/chips/p9/procedures/hwp/memory/lib/phy/seq.H index 20c275f62..c62c79108 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/phy/seq.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/phy/seq.H @@ -41,6 +41,7 @@ #include <p9_mc_scom_addresses_fld.H> #include <mss_attribute_accessors_manual.H> #include <generic/memory/lib/utils/scom.H> +#include <lib/dimm/ddr4/mrs_load_ddr4.H> namespace mss { @@ -107,10 +108,13 @@ class seqTraits<fapi2::TARGET_TYPE_MCA> TODTLON_OFF_CYCLES = MCA_DDRPHY_SEQ_MEM_TIMING_PARAM2_P0_TODTLON_OFF_CYCLES, TODTLON_OFF_CYCLES_LEN = MCA_DDRPHY_SEQ_MEM_TIMING_PARAM2_P0_TODTLON_OFF_CYCLES_LEN, + PAR_A17 = MCA_DDRPHY_SEQ_CONFIG0_P0_PAR_17_MASK, DELAYED_PARITY = MCA_DDRPHY_SEQ_CONFIG0_P0_DELAYED_PAR, TWO_N_MODE = MCA_DDRPHY_SEQ_CONFIG0_P0_TWO_CYCLE_ADDR_EN, - }; + A17_IS_USED = 0b0, + A17_IS_NOT_USED = 0b1, + }; }; namespace seq @@ -400,12 +404,20 @@ fapi_try_exit: /// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok /// template< fapi2::TargetType T, typename TT = seqTraits<T> > -inline fapi2::ReturnCode reset_config0( const fapi2::Target<T>& i_target ) +fapi2::ReturnCode reset_config0( const fapi2::Target<T>& i_target ) { fapi2::buffer<uint64_t> l_data; - l_data.writeBit<TT::TWO_N_MODE>(mss::two_n_mode_helper(i_target)); + // Let's figure out if the A17 bit is on/ needed for parity calculations + bool l_a17 = false; + FAPI_TRY( is_a17_needed( i_target, l_a17) ); + + { + const auto l_encoding = l_a17 ? TT::A17_IS_USED : TT::A17_IS_NOT_USED; + l_data.writeBit<TT::PAR_A17>( l_encoding ); + } + l_data.writeBit<TT::TWO_N_MODE>(mss::two_n_mode_helper(i_target)); // DDR4 needs delayed partiy TK for DDR5/DDR3 ... l_data.setBit<TT::DELAYED_PARITY>(); FAPI_TRY( write_config0(i_target, l_data), "%s failed to reset seq_config0 register via write", mss::c_str(i_target) ); @@ -424,7 +436,6 @@ fapi_try_exit: template< fapi2::TargetType T, typename TT = seqTraits<T> > fapi2::ReturnCode reset_timing0( const fapi2::Target<T>& i_target ); - /// /// @brief reset SEQ_TIMING1 /// @tparam T fapi2 Target Type - derived |
