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| author | Stephen Glancy <sglancy@us.ibm.com> | 2017-06-08 14:25:58 -0500 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2017-06-13 12:20:18 -0400 |
| commit | 3e6b198841e23320fce9fc7af129ac537a852221 (patch) | |
| tree | 9c3c18ab88d58dd3e5b6eacef602e7149c059565 /src/import/chips/p9/procedures/hwp/memory/lib/phy | |
| parent | c3e473a9069d8d3554cdcad6886fffaebc26b205 (diff) | |
| download | talos-hostboot-3e6b198841e23320fce9fc7af129ac537a852221.tar.gz talos-hostboot-3e6b198841e23320fce9fc7af129ac537a852221.zip | |
Fixes DQS align workaround formatting
Change-Id: Ie3cd04df238b45d958ddb7c2b729091cacd9f539
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41559
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41561
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/memory/lib/phy')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/memory/lib/phy/dp16.C | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/phy/dp16.C b/src/import/chips/p9/procedures/hwp/memory/lib/phy/dp16.C index cfa8f6257..de39c6eab 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/phy/dp16.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/phy/dp16.C @@ -2218,7 +2218,7 @@ fapi_try_exit: /// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if bad bits can be repaired /// fapi2::ReturnCode process_bad_bits( const fapi2::Target<TARGET_TYPE_MCA>& i_target, - const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_dimm, + const fapi2::Target<TARGET_TYPE_DIMM>& i_dimm, const uint64_t i_rp ) { typedef dp16Traits<TARGET_TYPE_MCA> TT; |
