diff options
| author | Brian Silver <bsilver@us.ibm.com> | 2016-06-28 08:16:08 -0500 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2016-07-13 14:21:44 -0400 |
| commit | 3e93039cb39045960d20306da94a20a4885cf67f (patch) | |
| tree | 00239c5cbf33a130e26aa52bff9dc39a72a00e9a /src/import/chips/p9/procedures/hwp/memory/lib/phy/ddr_phy.H | |
| parent | f6f43282388298e9e2f6398b40c7fecbc99c62ff (diff) | |
| download | talos-hostboot-3e93039cb39045960d20306da94a20a4885cf67f.tar.gz talos-hostboot-3e93039cb39045960d20306da94a20a4885cf67f.zip | |
Add ZCNTL enable in phy reset
Verified on model 55
Update unit test to do the correct things sim or not
Change-Id: I31d41088b5fa650367c02c7aaffa36cc43293b53
Depends-On: I4a76f74f8b7401af15ba1ae0b1823f61ad2ec050
RTC: 156842
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/26352
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Reviewed-by: JACOB L. HARVEY <jlharvey@us.ibm.com>
Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/26368
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/memory/lib/phy/ddr_phy.H')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/memory/lib/phy/ddr_phy.H | 23 |
1 files changed, 2 insertions, 21 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/phy/ddr_phy.H b/src/import/chips/p9/procedures/hwp/memory/lib/phy/ddr_phy.H index 6b9010976..1d7cff95b 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/phy/ddr_phy.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/phy/ddr_phy.H @@ -33,25 +33,6 @@ #include <fapi2.H> #include <lib/mss_attribute_accessors.H> -// Helper macro to condense the checking for PLL lock -#define CHECK_PLL( __target, __register, __buffer, __mask ) \ - FAPI_TRY(mss::getScom( __target, __register, __buffer)); \ - if ((__buffer & __mask) != __mask) \ - { \ - FAPI_INF("PLL 0x%lx failed to lock 0x%lx", __register, __buffer); \ - done_polling = false; \ - continue; \ - } - -// Helper macro to condense the checking for PLL lock -#define FFDC_PLL( __target, __register, __buffer, __mask, __ffdc_object ) \ - FAPI_ASSERT( ((__buffer & __mask) == __mask), \ - __ffdc_object.set_EXPECTED_STATUS(__mask) \ - .set_ACTUAL_STATUS(__buffer) \ - .set_REGISTER(__register) \ - .set_MCBIST_IN_ERROR(__target), \ - "PLL 0x%llx failed to lock 0x%llx", __register, __buffer); - namespace mss { @@ -71,11 +52,11 @@ fapi2::ReturnCode phy_scominit(const fapi2::Target<fapi2::TARGET_TYPE_MCBIST>& i fapi2::ReturnCode change_resetn( const fapi2::Target<fapi2::TARGET_TYPE_MCBIST>& i_target, states i_state ); /// -/// @brief perform the zctl toggle process +/// @brief perform the zctl enable process /// @param[in] i_target the mcbist for the reset recover /// @return FAPI2_RC_SUCCESS iff ok /// -fapi2::ReturnCode toggle_zctl( const fapi2::Target<fapi2::TARGET_TYPE_MCBIST>& i_target ); +fapi2::ReturnCode enable_zctl( const fapi2::Target<fapi2::TARGET_TYPE_MCBIST>& i_target ); /// @brief Change mclk low /// @param[in] i_target mcbist target |
