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| author | Alvin Wang <wangat@tw.ibm.com> | 2019-04-01 04:53:40 -0500 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2019-05-11 09:21:00 -0500 |
| commit | 18527d404f0f7487b8ac06f64a8d48e1523a39b0 (patch) | |
| tree | 00bb49fb8ae17b40ca6566e283be89ef5354789f /src/import/chips/p9/procedures/hwp/memory/lib/mcbist/mcbist_traits.H | |
| parent | 431fd07bcd5f5e17b73c7e82c71be351b0e333f0 (diff) | |
| download | talos-hostboot-18527d404f0f7487b8ac06f64a8d48e1523a39b0.tar.gz talos-hostboot-18527d404f0f7487b8ac06f64a8d48e1523a39b0.zip | |
Move the mcbist lab library to generic folder
Change-Id: I8fd2d1d1c48e08d4f34aecde34803a9126ac6b4d
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/75283
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/75292
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/memory/lib/mcbist/mcbist_traits.H')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/memory/lib/mcbist/mcbist_traits.H | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/mcbist/mcbist_traits.H b/src/import/chips/p9/procedures/hwp/memory/lib/mcbist/mcbist_traits.H index 89206597e..e1cf84dfd 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/mcbist/mcbist_traits.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/mcbist/mcbist_traits.H @@ -87,6 +87,14 @@ class mcbistTraits<mss::mc_type::NIMBUS, fapi2::TARGET_TYPE_MCBIST> // LARGEST_ADDRESS static constexpr uint64_t LARGEST_ADDRESS = ~0 >> mss::mcbist::address::MAGIC_PAD; + // Size + static constexpr size_t PORTS_PER_MCBIST = 4; + static constexpr size_t MAX_DQ_BITS = 72; + static constexpr size_t MAX_DQ_NIBBLES = MAX_DQ_BITS / + BITS_PER_NIBBLE; ///< For ISDIMMs are 18 DQ nibbles for DQ 72 bits + static constexpr size_t MAX_DRAMS_X8 = MAX_DQ_BITS / BITS_PER_BYTE; ///< For x8's there are 9 DRAM for 72 bits + static constexpr size_t MAX_DRAMS_X4 = MAX_DQ_BITS / BITS_PER_NIBBLE; ///< For x4's there are 18 DRAM for 72 bits + /// MCBIST "memory registers" - config for subtests. static constexpr uint64_t MCBMR0_REG = MCBIST_MCBMR0Q; static constexpr uint64_t MCBMR1_REG = MCBIST_MCBMR1Q; @@ -414,8 +422,21 @@ class mcbistTraits<mss::mc_type::NIMBUS, fapi2::TARGET_TYPE_MCBIST> MCB_WAT_DEBUG_ATTN = MCBIST_MCBISTFIRQ_WAT_DEBUG_ATTN, MCB_PROGRAM_COMPLETE_MASK = MCB_PROGRAM_COMPLETE, MCB_WAT_DEBUG_ATTN_MASK = MCB_WAT_DEBUG_ATTN, + + //XLT address valid offset + XLT0_SLOT1_D_VALUE = MCS_PORT13_MCP0XLT0_SLOT1_D_VALUE, + XLT0_SLOT0_M1_VALID = MCS_PORT13_MCP0XLT0_SLOT0_M1_VALID, + XLT0_SLOT0_M0_VALID = MCS_PORT13_MCP0XLT0_SLOT0_M0_VALID, + XLT0_SLOT0_S2_VALID = MCS_PORT13_MCP0XLT0_SLOT0_S2_VALID, + XLT0_SLOT0_S1_VALID = MCS_PORT13_MCP0XLT0_SLOT0_S1_VALID, + XLT0_SLOT0_S0_VALID = MCS_PORT13_MCP0XLT0_SLOT0_S0_VALID, + XLT0_SLOT0_ROW17_VALID = MCS_PORT02_MCP0XLT0_SLOT0_ROW17_VALID, + XLT0_SLOT0_ROW16_VALID = MCS_PORT02_MCP0XLT0_SLOT0_ROW16_VALID, + XLT0_SLOT0_ROW15_VALID = MCS_PORT02_MCP0XLT0_SLOT0_ROW15_VALID, + }; + }; @@ -433,6 +454,11 @@ class mcbistTraits<mss::mc_type::NIMBUS, fapi2::TARGET_TYPE_MCA> static constexpr uint64_t RMW_WRT_BUF_DATA_REG = MCA_AADR; static constexpr uint64_t RMW_WRT_BUF_ECC_REG = MCA_AAER; + // XLT registers + static constexpr uint64_t XLTATE0 = MCA_MBA_MCP0XLT0; + static constexpr uint64_t XLTATE1 = MCA_MBA_MCP0XLT1; + static constexpr uint64_t XLTATE2 = MCA_MBA_MCP0XLT2; + enum { // Register field constants @@ -445,6 +471,9 @@ class mcbistTraits<mss::mc_type::NIMBUS, fapi2::TARGET_TYPE_MCA> RMW_WRT_AUTOINC = MCA_WREITE_AACR_AUTOINC, RMW_WRT_ECCGEN = MCA_WREITE_AACR_ECCGEN, + XLTATE_SLOT0_VALID = MCS_PORT02_MCP0XLT0_SLOT0_VALID, + XLTATE_SLOT1_VALID = MCS_PORT02_MCP0XLT0_SLOT1_VALID, + // Constants used for field settings SELECT_RMW_BUFFER = 0, SELECT_WRT_BUFFER = 1, |
