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| author | Brian Silver <bsilver@us.ibm.com> | 2016-04-05 14:43:41 -0500 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2016-04-25 13:45:00 -0400 |
| commit | 84245de79e62f285cd4bd3201dcf8ec8c92d1f42 (patch) | |
| tree | 6b8e5de5183fd98f90875631798d1c68bcfae3a8 /src/import/chips/p9/procedures/hwp/memory/lib/mcbist/mcbist.C | |
| parent | 6d41c4bef52f59d6363d813d6b2b3b8a0d4f828c (diff) | |
| download | talos-hostboot-84245de79e62f285cd4bd3201dcf8ec8c92d1f42.tar.gz talos-hostboot-84245de79e62f285cd4bd3201dcf8ec8c92d1f42.zip | |
Add L2 p9_mss_scrub
Change inversion so in sim we run with inversion off
Change address counting mode to be disabled by default
Remove ATTR_MCBIST attributes
Change-Id: I233851de5186e053df0b5a4b25eee42763b35755
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22914
Tested-by: Jenkins Server
Tested-by: Hostboot CI
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Reviewed-by: JACOB L. HARVEY <jlharvey@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22917
Tested-by: FSP CI Jenkins
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/memory/lib/mcbist/mcbist.C')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/memory/lib/mcbist/mcbist.C | 18 |
1 files changed, 17 insertions, 1 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/mcbist/mcbist.C b/src/import/chips/p9/procedures/hwp/memory/lib/mcbist/mcbist.C index ba8a672cc..5eaabc21e 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/mcbist/mcbist.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/mcbist/mcbist.C @@ -39,6 +39,15 @@ namespace mss namespace mcbist { +const std::pair<uint64_t, uint64_t> mcbistTraits<fapi2::TARGET_TYPE_MCBIST>::address_pairs[] = +{ + { START_ADDRESS_0, END_ADDRESS_0 }, + { START_ADDRESS_1, END_ADDRESS_1 }, + { START_ADDRESS_2, END_ADDRESS_2 }, + { START_ADDRESS_3, END_ADDRESS_3 }, +}; + + /// /// @brief Load a set of MCBIST subtests in to the MCBIST registers /// @tparam T, the fapi2::TargetType - derived @@ -140,6 +149,12 @@ fapi2::ReturnCode execute( const fapi2::Target<TARGET_TYPE_MCBIST>& i_target, fapi2::buffer<uint64_t> l_status; + // A small vector of addresses to poll during the polling loop + static const std::vector<mss::poll_probe<fapi2::TARGET_TYPE_MCBIST>> l_probes = + { + {i_target, "mcbist current address", MCBIST_MCBMCATQ}, + }; + // Slam the subtests in to the mcbist registers FAPI_TRY( load_mcbmr(i_target, i_program) ); @@ -169,7 +184,8 @@ fapi2::ReturnCode execute( const fapi2::Target<TARGET_TYPE_MCBIST>& i_target, FAPI_DBG("mcbist statq 0x%llx, remaining: %d", stat_reg, poll_remaining); l_status = stat_reg; return l_status.getBit<TT::MCBIST_IN_PROGRESS>() != 1; - }); + }, + l_probes); // Check to see if we're still in progress - meaning we timed out. FAPI_ASSERT((l_status & l_in_progress) != l_in_progress, |
