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| author | Stephen Glancy <sglancy@us.ibm.com> | 2018-03-05 15:06:26 -0600 |
|---|---|---|
| committer | Daniel M Crowell <dcrowell@us.ibm.com> | 2019-08-20 08:38:58 -0500 |
| commit | 4f1f71a4714c845c3ba12b13ec7c3e42918fcb6c (patch) | |
| tree | 056f7a1b91c673064dd9af82da2f432e5d20fba1 /src/import/chips/p9/procedures/hwp/memory/lib/mc | |
| parent | a87142ef61562fe484f8000d803ccae4603bbb91 (diff) | |
| download | talos-hostboot-4f1f71a4714c845c3ba12b13ec7c3e42918fcb6c.tar.gz talos-hostboot-4f1f71a4714c845c3ba12b13ec7c3e42918fcb6c.zip | |
Adds power control access functions for NVDIMM
Change-Id: I268804b4260b0754f16e4a5d7288e684f9f14d2b
Original-Change-Id: Id72258da03e1e54a6edf2995a50dd25b3ede9a14
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55061
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/82435
Reviewed-by: Daniel M Crowell <dcrowell@us.ibm.com>
Tested-by: Daniel M Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/memory/lib/mc')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/memory/lib/mc/mc.C | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/mc/mc.C b/src/import/chips/p9/procedures/hwp/memory/lib/mc/mc.C index 86915080f..2a3d38ae9 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/mc/mc.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/mc/mc.C @@ -89,7 +89,7 @@ fapi2::ReturnCode set_pwr_cntrl_reg(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& fapi2::buffer<uint64_t> l_data; FAPI_TRY(mrw_power_control_requested(l_pwr_cntrl), "Error in set_pwr_cntrl_reg"); - FAPI_TRY(mss::getScom(i_target, MCA_MBARPC0Q, l_data), "Error in set_pwr_cntrl_reg"); + FAPI_TRY(read_mbarpc0(i_target, l_data)); l_data.insertFromRight<TT::CFG_MIN_MAX_DOMAINS, TT::CFG_MIN_MAX_DOMAINS_LEN>(MAXALL_MINALL); @@ -117,7 +117,7 @@ fapi2::ReturnCode set_pwr_cntrl_reg(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& l_data.insertFromRight<TT::MIN_DOMAIN_REDUCTION_TIME, TT::MIN_DOMAIN_REDUCTION_TIME_LEN> (MIN_DOMAIN_REDUCTION_TIME); - FAPI_TRY(mss::putScom(i_target, MCA_MBARPC0Q, l_data), "Error in set_pwr_cntrl_reg" ); + FAPI_TRY(write_mbarpc0(i_target, l_data)); return fapi2::FAPI2_RC_SUCCESS; fapi_try_exit: @@ -138,7 +138,7 @@ fapi2::ReturnCode set_str_reg(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_tar fapi2::buffer<uint64_t> l_data; FAPI_TRY(mrw_power_control_requested(l_str_enable), "Error in set_pwr_cntrl_reg"); - FAPI_TRY(mss::getScom(i_target, MCA_MBASTR0Q, l_data), "Error in set_pwr_cntrl_reg"); + FAPI_TRY(read_mbastr0(i_target, l_data)); //Write bit if STR should be enabled switch (l_str_enable) @@ -162,7 +162,7 @@ fapi2::ReturnCode set_str_reg(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_tar l_data.insertFromRight<TT::ENTER_STR_TIME_POS, TT::ENTER_STR_TIME_LEN>(ENTER_STR_TIME); - FAPI_TRY(mss::putScom(i_target, MCA_MBASTR0Q, l_data), "Error in set_str_reg" ); + FAPI_TRY(write_mbastr0(i_target, l_data)); return fapi2::FAPI2_RC_SUCCESS; fapi_try_exit: |
