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| author | Louis Stermole <stermole@us.ibm.com> | 2016-09-14 13:04:13 -0500 |
|---|---|---|
| committer | Christian R. Geddes <crgeddes@us.ibm.com> | 2016-09-20 10:39:23 -0400 |
| commit | 50c1a970cfdc69dd6dc77c1b1c50d44190b8e55d (patch) | |
| tree | 4e21d9634fcd8a88c4495b41b19e22e082202008 /src/import/chips/p9/procedures/hwp/memory/lib/mc/port.C | |
| parent | 5dcf85e218314925e56cc133eeaec1c70ca687db (diff) | |
| download | talos-hostboot-50c1a970cfdc69dd6dc77c1b1c50d44190b8e55d.tar.gz talos-hostboot-50c1a970cfdc69dd6dc77c1b1c50d44190b8e55d.zip | |
Changes related to PHY register review, Round 3
Add workaround for DQSCLK_OFFSET based on Centaur experience
Remove setting of EN_RESET_WR_DELAY_WL
Modify setting of ADR/DP16 DLL Vreg control in initfiles and DLL reset
Change-Id: I6a0a4272f18d3ba534e1f3858520bbdb9259edc4
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29760
Reviewed-by: Brian R. Silver <bsilver@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: JACOB L. HARVEY <jlharvey@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29763
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/memory/lib/mc/port.C')
0 files changed, 0 insertions, 0 deletions
