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| author | Jacob Harvey <jlharvey@us.ibm.com> | 2017-01-23 13:22:54 -0600 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2017-02-10 12:38:06 -0500 |
| commit | b164f1e081a6c7f13403f84da1143005d55cb9a5 (patch) | |
| tree | 15eed6e77e263e885590d9d9bafc44ea64a90a8d /src/import/chips/p9/procedures/hwp/memory/lib/dimm | |
| parent | 298daeba406ef3c72b340f59552c618db7c3ff93 (diff) | |
| download | talos-hostboot-b164f1e081a6c7f13403f84da1143005d55cb9a5.tar.gz talos-hostboot-b164f1e081a6c7f13403f84da1143005d55cb9a5.zip | |
Disabling temp_refresh_mode
Change-Id: I159152a545947116232b627054fc522bbedc588f
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35266
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Brian R. Silver <bsilver@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Reviewed-by: Matt K. Light <mklight@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35275
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/memory/lib/dimm')
3 files changed, 3 insertions, 33 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/mrs04.C b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/mrs04.C index 0f8db6088..41c66ba20 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/mrs04.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/mrs04.C @@ -57,7 +57,7 @@ namespace ddr4 mrs04_data::mrs04_data( const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, fapi2::ReturnCode& o_rc ): iv_max_pd_mode(fapi2::ENUM_ATTR_EFF_MAX_POWERDOWN_MODE_DISABLE), iv_temp_refresh_range(fapi2::ENUM_ATTR_MSS_MRW_TEMP_REFRESH_RANGE_NORMAL), - iv_temp_ref_mode(fapi2::ENUM_ATTR_EFF_TEMP_REFRESH_MODE_DISABLE), + iv_temp_ref_mode(fapi2::ENUM_ATTR_MSS_MRW_TEMP_REFRESH_MODE_DISABLE), iv_vref_mon(fapi2::ENUM_ATTR_EFF_INTERNAL_VREF_MONITOR_DISABLE), iv_cs_cmd_latency(fapi2::ENUM_ATTR_EFF_CS_CMD_LATENCY_DISABLE), iv_ref_abort(fapi2::ENUM_ATTR_EFF_SELF_REF_ABORT_DISABLE), @@ -68,7 +68,7 @@ mrs04_data::mrs04_data( const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, { FAPI_TRY( mss::eff_max_powerdown_mode(i_target, iv_max_pd_mode) ); FAPI_TRY( mss::mrw_temp_refresh_range(iv_temp_refresh_range) ); - FAPI_TRY( mss::eff_temp_refresh_mode(i_target, iv_temp_ref_mode) ); + FAPI_TRY( mss::mrw_temp_refresh_mode(iv_temp_ref_mode) ); FAPI_TRY( mss::eff_internal_vref_monitor(i_target, iv_vref_mon) ); FAPI_TRY( mss::eff_cs_cmd_latency(i_target, iv_cs_cmd_latency) ); FAPI_TRY( mss::eff_self_ref_abort(i_target, iv_ref_abort) ); @@ -84,6 +84,7 @@ mrs04_data::mrs04_data( const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, iv_cs_cmd_latency, iv_ref_abort, iv_rd_pre_train_mode, iv_rd_preamble, iv_wr_preamble, iv_ppr); + //Let's make sure the temp_refresh_mode attribute is valid, even though it's mrw, gotta double check spec o_rc = fapi2::FAPI2_RC_SUCCESS; return; diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.C b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.C index 5c6fc24e9..25e746ab2 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.C @@ -458,31 +458,6 @@ fapi_try_exit: } /// -/// @brief Determines & sets effective config for temperature controlled refresh mode -/// @return fapi2::FAPI2_RC_SUCCESS if okay -/// @note from DDR4 Spec (79-4B) 4.9.4 page 48 -/// -fapi2::ReturnCode eff_dimm::temp_refresh_mode() -{ - uint8_t l_mcs_attrs [mss::PORTS_PER_MCS] = {}; - - FAPI_TRY(mss::eff_temp_refresh_mode (iv_mcs, &l_mcs_attrs[0])); - - // If fine refresh mode is normal, enable temperature control refresh mode - // Otherwise disable the temperature control refresh - l_mcs_attrs[iv_port_index] = (iv_refresh_mode == fapi2::ENUM_ATTR_MSS_MRW_FINE_REFRESH_MODE_NORMAL) ? - fapi2::ENUM_ATTR_EFF_TEMP_REFRESH_MODE_ENABLE : - fapi2::ENUM_ATTR_EFF_TEMP_REFRESH_MODE_DISABLE; - FAPI_INF("%s: temperature control refresh mode is %d", mss::c_str(iv_dimm), l_mcs_attrs[iv_port_index]); - FAPI_TRY( FAPI_ATTR_SET( fapi2::ATTR_EFF_TEMP_REFRESH_MODE, iv_mcs, l_mcs_attrs ) ); - -fapi_try_exit: - return fapi2::current_err; -}; - - - -/// /// @brief Determines & sets effective config for refresh interval time (tREFI) /// @return fapi2::FAPI2_RC_SUCCESS if okay /// diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.H b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.H index 63abcb320..44cafdbee 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.H @@ -152,12 +152,6 @@ class eff_dimm fapi2::ReturnCode hybrid_memory_type(); /// - /// @brief Determines & sets effective config for temperature controlled refresh mode - /// @return fapi2::FAPI2_RC_SUCCESS if okay - /// - fapi2::ReturnCode temp_refresh_mode(); - - /// /// @brief Determines & sets effective config for refresh interval time (tREFI) /// @return fapi2::FAPI2_RC_SUCCESS if okay /// |
