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| author | Stephen Glancy <sglancy@us.ibm.com> | 2018-08-17 14:42:26 -0500 |
|---|---|---|
| committer | Christian R. Geddes <crgeddes@us.ibm.com> | 2018-09-18 10:43:41 -0500 |
| commit | 444aeb467542541afb6aa8072037c8ddc74ab10c (patch) | |
| tree | 1c4ca88630d0c69709cb16c4da3fd98d1d69f610 /src/import/chips/p9/procedures/hwp/memory/lib/dimm | |
| parent | 4f35730b3dbecc04c63c2cd6a269eba2bc19fe33 (diff) | |
| download | talos-hostboot-444aeb467542541afb6aa8072037c8ddc74ab10c.tar.gz talos-hostboot-444aeb467542541afb6aa8072037c8ddc74ab10c.zip | |
Adds skeleton code for LRDIMM
Change-Id: I3f55896a48347fff7152c3a2a68cf8fab4fa0689
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/64813
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/64967
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/memory/lib/dimm')
6 files changed, 14 insertions, 3 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/bcw_load_ddr4.C b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/bcw_load_ddr4.C index d1e8edc48..cf7cd850e 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/bcw_load_ddr4.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/bcw_load_ddr4.C @@ -55,6 +55,8 @@ using fapi2::FAPI2_RC_SUCCESS; namespace mss { +// TK:LRDIMM Update and/or verify bcw load + /// /// @brief Perform the bcw_load_ddr4 operations /// @param[in] i_target a DIMM target diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/bcw_load_ddr4.H b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/bcw_load_ddr4.H index 1ff2d9e10..7e68d32d0 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/bcw_load_ddr4.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/bcw_load_ddr4.H @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2015,2017 */ +/* Contributors Listed Below - COPYRIGHT 2015,2018 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -43,6 +43,7 @@ namespace mss { +// TK:LRDIMM Update and/or bcw load /// /// @brief Perform the bcw_load_ddr4 operations /// @param[in] i_target a DIMM target diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/data_buffer_ddr4.H b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/data_buffer_ddr4.H index 1d4dadea1..638122ea6 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/data_buffer_ddr4.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/data_buffer_ddr4.H @@ -47,6 +47,12 @@ namespace mss { +// TK:LRDIMM Verify this functionality and data (looked good to me, but more eyes are better - SPG) +// TK:LRDIMM Create automatic function space selector code +// The idea behind this is +// 1) function space 0 is the default +// 2) we want to be able to say "here's a bunch of buffer control words, hit the appropriate function space before each is needed) +// Will greatly simplify code enum nibble : size_t { diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.C b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.C index 8446c6838..c6ac6db5a 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.C @@ -4513,6 +4513,7 @@ fapi_try_exit: return fapi2::current_err; } +// TK:LRDIMM Update and/or verify all bc## steps below /// /// @brief Determines & sets effective config for DIMM BC00 /// @return fapi2::FAPI2_RC_SUCCESS if okay diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/rank.C b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/rank.C index f2edb7873..4540b3d65 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/rank.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/rank.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2015,2017 */ +/* Contributors Listed Below - COPYRIGHT 2015,2018 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -43,7 +43,7 @@ using fapi2::FAPI2_RC_INVALID_PARAMETER; namespace mss { - +// TK:LRDIMM Update the rank code + pairings to take into account LRDIMM (1 primary rank per LR + secondary to quaternary per LR) aka 4 rank DIMM's // Definition of the Nimbus PHY rank_pair0 config registers const std::vector< uint64_t > rankPairTraits<TARGET_TYPE_MCA, 0>::RANK_PAIR_REGS = { diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/rank.H b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/rank.H index 62fc63bdf..30fbbb09f 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/rank.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/rank.H @@ -48,6 +48,7 @@ namespace mss { +// TK:LRDIMM Update the rank code + pairings to take into account LRDIMM (1 primary rank per LR + secondary to quaternary per LR) aka 4 rank DIMM's enum { |
