Ignore refresh overrun fir NVDIMM during post-restore sequence

While CCS is running (ccs_addr_sel_mux=1) mainline refreshes could get
queued up and later released 1 cycle apart, causing the refresh overrun
fir. Mask this error during post-restore sequence so it doesn't get called
out later.

Change-Id: Iac0f998bfcc807d6f5fa2e6a57ec07a7afa5cc60
CQ:SW462190
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/75692
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/75696
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>

1 files changed, 11 insertions, 3 deletions

diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/nvdimm_utils.C b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/nvdimm_utils.C
index b35c5084f..869e18f25 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/nvdimm_utils.C
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/nvdimm_utils.C
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2018                             */
+/* Contributors Listed Below - COPYRIGHT 2018,2019                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -70,7 +70,6 @@ namespace mss
 namespace nvdimm
 {
 
-
 ///
 /// @brief Wrapper to read MAINT_ADDR_MODE_EN
 /// Specialization for TARGET_TYPE_MCA
@@ -593,6 +592,7 @@ template<>
 fapi2::ReturnCode post_restore_transition( const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target )
 {
     mss::states l_maint_addr_enabled = mss::states::LOW;
+    mss::states l_refresh_overrun_mask = mss::states::OFF;
     const bool NVDIMM_WORKAROUND = true;
 
     FAPI_TRY(get_maint_addr_mode_en(i_target, l_maint_addr_enabled));
@@ -604,6 +604,10 @@ fapi2::ReturnCode post_restore_transition( const fapi2::Target<fapi2::TARGET_TYP
         FAPI_TRY(change_maint_addr_mode_en(i_target, mss::states::LOW));
     }
 
+    // Save the current mask value and mask the refresh overrun error
+    FAPI_TRY(get_refresh_overrun_mask(i_target, l_refresh_overrun_mask));
+    FAPI_TRY(change_refresh_overrun_mask(i_target, mss::states::ON));
+
     // Restore the rcd
     FAPI_TRY( rcd_restore( i_target ) );
 
@@ -619,9 +623,13 @@ fapi2::ReturnCode post_restore_transition( const fapi2::Target<fapi2::TARGET_TYP
     // Latch in the rank averaged vref value
     FAPI_TRY(wr_vref_latch(i_target));
 
-    //Restore main_addr_mode_en to previous setting
+    // Restore main_addr_mode_en to previous setting
     FAPI_TRY(change_maint_addr_mode_en(i_target, l_maint_addr_enabled));
 
+    // Restore the refresh overrun mask to previous and clear the fir
+    FAPI_TRY(clear_refresh_overrun_fir(i_target));
+    FAPI_TRY(change_refresh_overrun_mask(i_target, l_refresh_overrun_mask));
+
 fapi_try_exit:
     return fapi2::current_err;
 }