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author | Jacob Harvey <jlharvey@us.ibm.com> | 2017-07-13 15:06:13 -0500 |
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committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2017-07-26 10:29:10 -0400 |
commit | fd029f5afa54473a055a9b938d53da2e556b5a75 (patch) | |
tree | 87215911f0c9d138c74abe760334dd20a5864856 /src/import/chips/p9/procedures/hwp/memory/lib/dimm/bcw_load_ddr4.H | |
parent | 135d297bcee4f80451c3fd5e4061f1010fe4f6d6 (diff) | |
download | talos-hostboot-fd029f5afa54473a055a9b938d53da2e556b5a75.tar.gz talos-hostboot-fd029f5afa54473a055a9b938d53da2e556b5a75.zip |
L3 draminit and mss_lib
Change-Id: If5cae63291864da0b87d6a1e82407da9358d62d2
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43121
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43278
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/memory/lib/dimm/bcw_load_ddr4.H')
-rw-r--r-- | src/import/chips/p9/procedures/hwp/memory/lib/dimm/bcw_load_ddr4.H | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/bcw_load_ddr4.H b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/bcw_load_ddr4.H index 526588d97..1ff2d9e10 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/bcw_load_ddr4.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/bcw_load_ddr4.H @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2015,2016 */ +/* Contributors Listed Below - COPYRIGHT 2015,2017 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -28,9 +28,9 @@ /// @brief Code to support bcw_load_ddr4 /// // *HWP HWP Owner: Andre Marin <aamarin@us.ibm.com> -// *HWP HWP Backup: Brian Silver <bsilver@us.ibm.com> +// *HWP HWP Backup: Jacob Harvey <jlharvey@us.ibm.com> // *HWP Team: Memory -// *HWP Level: 2 +// *HWP Level: 3 // *HWP Consumed by: HB:FSP #ifndef _MSS_BCW_LOAD_DDR4_H_ @@ -44,7 +44,7 @@ namespace mss { /// -/// @brief Perform the bcw_load_ddr4 operations - TARGET_TYPE_DIMM specialization +/// @brief Perform the bcw_load_ddr4 operations /// @param[in] i_target a DIMM target /// @param[in,out] io_inst a vector of CCS instructions we should add to /// @return FAPI2_RC_SUCCESS if and only if ok |