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| author | Tsung Yeung <tyeung@us.ibm.com> | 2018-01-16 18:08:25 -0500 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2018-02-24 21:30:45 -0500 |
| commit | 1d2a738923414693d7c567479c5f85f436b1c416 (patch) | |
| tree | c4e5906f4502e8a15348a0d2dca1b2f687bc02d2 /src/import/chips/p9/procedures/hwp/memory/lib/ccs/ccs.C | |
| parent | b5c57afe40a8667b2cfc5c0aae235132812490ed (diff) | |
| download | talos-hostboot-1d2a738923414693d7c567479c5f85f436b1c416.tar.gz talos-hostboot-1d2a738923414693d7c567479c5f85f436b1c416.zip | |
Adds self time refresh entry and exit helper functions
For NVDIMM, self time refresh entry and exit are needed
for the NVDIMM data restore functionality. This commit
adds in helper functions for SRE/SRX for NVDIMM
Change-Id: I3fb522f0baf6cc6a6cafb41c220be50ce1875ba3
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54261
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/memory/lib/ccs/ccs.C')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/memory/lib/ccs/ccs.C | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/ccs/ccs.C b/src/import/chips/p9/procedures/hwp/memory/lib/ccs/ccs.C index 669048513..aa5de6be6 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/ccs/ccs.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/ccs/ccs.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2015,2017 */ +/* Contributors Listed Below - COPYRIGHT 2015,2018 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -249,6 +249,9 @@ fapi2::ReturnCode execute( const fapi2::Target<TARGET_TYPE_MCBIST>& i_target, FAPI_INF("executing ccs instructions (%d:%d, %d) for %s", i_program.iv_instructions.size(), l_inst_count, i_program.iv_poll.iv_initial_delay, mss::c_str(i_target)); + // Sets up the CKE values to be latched for the final CCS command + l_des.arr0.insertFromRight<TT::ARR0_DDR_CKE, TT::ARR0_DDR_CKE_LEN>(i_program.iv_final_cke_value); + // Insert a DES as our last instruction. DES is idle state anyway and having this // here as an instruction forces the CCS engine to wait the delay specified in // the last instruction in this array (which it otherwise doesn't do.) |
