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| author | Chris Steffen <cwsteffen@us.ibm.com> | 2017-05-04 09:04:35 -0500 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2017-05-07 22:09:54 -0400 |
| commit | a8e64238dc37cec4df58dbb507b7a7b1ef4bb80e (patch) | |
| tree | 88c8b6413d0f799db1377c48c9e5f75844cf36e9 /src/import/chips/p9/procedures/hwp/io | |
| parent | d0c2ed576770ca6ac8ea77bee118fecc72614451 (diff) | |
| download | talos-hostboot-a8e64238dc37cec4df58dbb507b7a7b1ef4bb80e.tar.gz talos-hostboot-a8e64238dc37cec4df58dbb507b7a7b1ef4bb80e.zip | |
IO Xbus Scominit Reset Fix
- Added delay between rx and tx resets
- The bits are self-resetting, so I removed the second scom to
zero the bits out.
CQ: SW386987
Change-Id: I164ec397595a667ec10265954b88ba67fa747318
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40072
Reviewed-by: Joachim Fenkes <fenkes@de.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40087
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/io')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/io/p9_io_xbus_scominit.C | 16 |
1 files changed, 6 insertions, 10 deletions
diff --git a/src/import/chips/p9/procedures/hwp/io/p9_io_xbus_scominit.C b/src/import/chips/p9/procedures/hwp/io/p9_io_xbus_scominit.C index 971f48fad..690b9f272 100644 --- a/src/import/chips/p9/procedures/hwp/io/p9_io_xbus_scominit.C +++ b/src/import/chips/p9/procedures/hwp/io/p9_io_xbus_scominit.C @@ -139,27 +139,23 @@ fapi2::ReturnCode p9_io_xbus_scominit( // on writeback FAPI_TRY( io::rmw( EDIP_RX_IORESET, i_target, i_group, LANE_00, 1 ), "I/O Xbus Scominit: Primary Set Reset Hard Failed." ); - FAPI_TRY( io::rmw( EDIP_TX_IORESET, i_target, i_group, LANE_00, 1 ), - "I/O Xbus Scominit: Primary Set Reset Hard Failed." ); FAPI_TRY( io::rmw( EDIP_RX_IORESET, i_connected_target, i_group, LANE_00, 1 ), "I/O Xbus Scominit: Connected Set Reset Hard Failed." ); - FAPI_TRY( io::rmw( EDIP_TX_IORESET, i_connected_target, i_group, LANE_00, 1 ), - "I/O Xbus Scominit: Primary Set Reset Hard Failed." ); // Calculated HW Delay needed based on counter size and clock speed. // 50us -- Based on Counter Size, 40us minimum // 1 Million sim cycles -- Based on sim learning FAPI_TRY( fapi2::delay( 50000, 1000000 ) ); - FAPI_TRY( io::rmw( EDIP_RX_IORESET, i_target, i_group, LANE_00, 0 ), - "I/O Xbus Scominit: Primary Set Reset Hard Failed." ); - FAPI_TRY( io::rmw( EDIP_TX_IORESET, i_target, i_group, LANE_00, 0 ), + FAPI_TRY( io::rmw( EDIP_TX_IORESET, i_target, i_group, LANE_00, 1 ), "I/O Xbus Scominit: Primary Set Reset Hard Failed." ); - FAPI_TRY( io::rmw( EDIP_RX_IORESET, i_connected_target, i_group, LANE_00, 0 ), + FAPI_TRY( io::rmw( EDIP_TX_IORESET, i_connected_target, i_group, LANE_00, 1 ), "I/O Xbus Scominit: Connected Set Reset Hard Failed." ); - FAPI_TRY( io::rmw( EDIP_TX_IORESET, i_connected_target, i_group, LANE_00, 0 ), - "I/O Xbus Scominit: Primary Set Reset Hard Failed." ); + // Calculated HW Delay needed based on counter size and clock speed. + // 50us -- Based on Counter Size, 40us minimum + // 1 Million sim cycles -- Based on sim learning + FAPI_TRY( fapi2::delay( 50000, 1000000 ) ); // Set rx master/slave attribute prior to calling the scominit procedures. // The scominit procedure will reference the attribute to set the register field. |
