summaryrefslogtreecommitdiffstats
path: root/src/import/chips/p9/procedures/hwp/initfiles/p9n_mca_scom.C
diff options
context:
space:
mode:
authorStephen Glancy <sglancy@us.ibm.com>2019-03-19 15:59:25 -0400
committerChristian R. Geddes <crgeddes@us.ibm.com>2019-04-15 09:36:16 -0500
commit4cfa805d328b0168e7874b025bf7133fd355121e (patch)
treebdb32ec2b51b883d158b735f5047fdd4231c14f5 /src/import/chips/p9/procedures/hwp/initfiles/p9n_mca_scom.C
parent06f75dffe7d2ad2bb6bd93e3ef45c6e99b3312a8 (diff)
downloadtalos-hostboot-4cfa805d328b0168e7874b025bf7133fd355121e.tar.gz
talos-hostboot-4cfa805d328b0168e7874b025bf7133fd355121e.zip
Fixes MC addressing for 4R/quad-encoded chip select
Change-Id: I490dbedf530115639d92da0702e45383d3b76227 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/74679 Reviewed-by: Louis Stermole <stermole@us.ibm.com> Reviewed-by: Mark Pizzutillo <mark.pizzutillo@ibm.com> Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/74697 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/initfiles/p9n_mca_scom.C')
-rw-r--r--src/import/chips/p9/procedures/hwp/initfiles/p9n_mca_scom.C33
1 files changed, 29 insertions, 4 deletions
diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9n_mca_scom.C b/src/import/chips/p9/procedures/hwp/initfiles/p9n_mca_scom.C
index 7098a92fe..ce08da173 100644
--- a/src/import/chips/p9/procedures/hwp/initfiles/p9n_mca_scom.C
+++ b/src/import/chips/p9/procedures/hwp/initfiles/p9n_mca_scom.C
@@ -180,6 +180,8 @@ fapi2::ReturnCode p9n_mca_scom(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& TGT0
FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_MSS_MRW_DRAM_2N_MODE, TGT3, l_TGT3_ATTR_MSS_MRW_DRAM_2N_MODE));
fapi2::ATTR_MSS_VPD_MR_MC_2N_MODE_AUTOSET_Type l_TGT2_ATTR_MSS_VPD_MR_MC_2N_MODE_AUTOSET;
FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_MSS_VPD_MR_MC_2N_MODE_AUTOSET, TGT2, l_TGT2_ATTR_MSS_VPD_MR_MC_2N_MODE_AUTOSET));
+ uint64_t l_def_MASTER_RANKS_DIMM0 = l_TGT2_ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM[l_def_PORT_INDEX][literal_0];
+ uint64_t l_def_MASTER_RANKS_DIMM1 = l_TGT2_ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM[l_def_PORT_INDEX][literal_1];
uint64_t l_def_SLOT1_DENOMINATOR = ((l_TGT2_ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM[l_def_PORT_INDEX][literal_1] ==
literal_0x0) | l_TGT2_ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM[l_def_PORT_INDEX][literal_1]);
uint64_t l_def_SLOT1_DRAM_STACK_HEIGHT = (l_TGT2_ATTR_EFF_NUM_RANKS_PER_DIMM[l_def_PORT_INDEX][literal_1] /
@@ -659,14 +661,18 @@ fapi2::ReturnCode p9n_mca_scom(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& TGT0
l_scom_buffer.insert<6, 3, 61, uint64_t>(literal_0b010 );
l_scom_buffer.insert<9, 3, 61, uint64_t>(literal_0b110 );
- if ((l_def_SLOT0_DRAM_STACK_HEIGHT == literal_8))
+ if (((l_def_SLOT0_DRAM_STACK_HEIGHT == literal_8) && (l_def_MASTER_RANKS_DIMM0 != literal_4)))
{
l_scom_buffer.insert<12, 3, 61, uint64_t>(literal_0b001 );
}
- else if ((l_def_SLOT0_DRAM_STACK_HEIGHT != literal_8))
+ else if (((l_def_SLOT0_DRAM_STACK_HEIGHT != literal_8) && (l_def_MASTER_RANKS_DIMM0 != literal_4)))
{
l_scom_buffer.insert<12, 3, 61, uint64_t>(literal_0b000 );
}
+ else if ((l_def_MASTER_RANKS_DIMM0 == literal_4))
+ {
+ l_scom_buffer.insert<12, 3, 61, uint64_t>(literal_0b100 );
+ }
if ((l_def_SLOT0_DRAM_STACK_HEIGHT == literal_8))
{
@@ -700,14 +706,18 @@ fapi2::ReturnCode p9n_mca_scom(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& TGT0
l_scom_buffer.insert<30, 3, 61, uint64_t>(literal_0b010 );
l_scom_buffer.insert<33, 3, 61, uint64_t>(literal_0b110 );
- if ((l_def_SLOT1_DRAM_STACK_HEIGHT == literal_8))
+ if (((l_def_SLOT1_DRAM_STACK_HEIGHT == literal_8) && (l_def_MASTER_RANKS_DIMM1 != literal_4)))
{
l_scom_buffer.insert<36, 3, 61, uint64_t>(literal_0b001 );
}
- else if ((l_def_SLOT1_DRAM_STACK_HEIGHT != literal_8))
+ else if (((l_def_SLOT1_DRAM_STACK_HEIGHT != literal_8) && (l_def_MASTER_RANKS_DIMM1 != literal_4)))
{
l_scom_buffer.insert<36, 3, 61, uint64_t>(literal_0b000 );
}
+ else if ((l_def_MASTER_RANKS_DIMM1 == literal_4))
+ {
+ l_scom_buffer.insert<36, 3, 61, uint64_t>(literal_0b100 );
+ }
if ((l_def_SLOT1_DRAM_STACK_HEIGHT == literal_8))
{
@@ -884,6 +894,21 @@ fapi2::ReturnCode p9n_mca_scom(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& TGT0
{
FAPI_TRY(fapi2::getScom( TGT0, 0x7010934ull, l_scom_buffer ));
+ if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) || ((l_chip_id == 0x5) && (l_chip_ec == 0x21)) || ((l_chip_id == 0x5)
+ && (l_chip_ec == 0x22)) || ((l_chip_id == 0x5) && (l_chip_ec == 0x23)) )
+ {
+ if ((l_def_MASTER_RANKS_DIMM0 == literal_4))
+ {
+ constexpr auto l_MCP_PORT0_SRQ_PC_MBARPC0Q_CFG_QUAD_RANK_ENC_ON = 0x1;
+ l_scom_buffer.insert<21, 1, 63, uint64_t>(l_MCP_PORT0_SRQ_PC_MBARPC0Q_CFG_QUAD_RANK_ENC_ON );
+ }
+ else if ((l_def_MASTER_RANKS_DIMM0 != literal_4))
+ {
+ constexpr auto l_MCP_PORT0_SRQ_PC_MBARPC0Q_CFG_QUAD_RANK_ENC_OFF = 0x0;
+ l_scom_buffer.insert<21, 1, 63, uint64_t>(l_MCP_PORT0_SRQ_PC_MBARPC0Q_CFG_QUAD_RANK_ENC_OFF );
+ }
+ }
+
if ((l_def_MSS_FREQ_EQ_1866 == literal_1))
{
l_scom_buffer.insert<16, 5, 59, uint64_t>(literal_5 );
OpenPOWER on IntegriCloud