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author | Joe McGill <jmcgill@us.ibm.com> | 2016-09-02 12:24:03 -0500 |
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committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2016-09-16 16:38:46 -0400 |
commit | 96c0ccd8a64f6a8463c24da675579fdcc9bf5d55 (patch) | |
tree | 80fdc275265d5b7a3dd4246628a11b7565eccae6 /src/import/chips/p9/procedures/hwp/initfiles/p9_npu_scom.C | |
parent | 72a5c98dd1622229e6a03591a5b1c347a3914564 (diff) | |
download | talos-hostboot-96c0ccd8a64f6a8463c24da675579fdcc9bf5d55.tar.gz talos-hostboot-96c0ccd8a64f6a8463c24da675579fdcc9bf5d55.zip |
FIR updates
p9.cme.scan.initfile
add CME LFIR settings
add EQ pervasive LFIR/XFIR settings
p9.npu.scom.initfile
update NPU_0/NPU_1 LFIR settings
p9.psi.scom.initfile
add PSI LFIR settings
p9_sbe_scominit
add LPC LFIR settings
update placeholder for pervasive LFIR/XFIR settings
(for Nest/XBUS/MC/OBUS/PCIE)
p9_sbe_tp_chiplet_init3
update TP pervasive LFIR settings
p9_pcie_config
fix bug affecting PHBBAR programming (causing invalid BAR matches)
p9_pcie_scominit
update PEC LFIR settings
p9_setup_bars_defs
update MCD LFIR settings
Change-Id: I8aaf7f40e96cde2fbd6e44fd0451e0add6584b77
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29197
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29232
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/initfiles/p9_npu_scom.C')
-rw-r--r-- | src/import/chips/p9/procedures/hwp/initfiles/p9_npu_scom.C | 40 |
1 files changed, 33 insertions, 7 deletions
diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9_npu_scom.C b/src/import/chips/p9/procedures/hwp/initfiles/p9_npu_scom.C index a193ddfe5..5da7c0653 100644 --- a/src/import/chips/p9/procedures/hwp/initfiles/p9_npu_scom.C +++ b/src/import/chips/p9/procedures/hwp/initfiles/p9_npu_scom.C @@ -34,8 +34,12 @@ constexpr auto literal_3 = 3; constexpr auto literal_1 = 1; constexpr auto literal_0 = 0; constexpr auto literal_0x0 = 0x0; -constexpr auto literal_0x1111111111111111 = 0x1111111111111111; -constexpr auto literal_0x0000000000000000 = 0x0000000000000000; +constexpr auto literal_0x009A48180F01FFFF = 0x009A48180F01FFFF; +constexpr auto literal_0x7F60B04500AE0000 = 0x7F60B04500AE0000; +constexpr auto literal_0xFF65B04700FE0000 = 0xFF65B04700FE0000; +constexpr auto literal_0x5550F40000000003 = 0x5550F40000000003; +constexpr auto literal_0xAAA70A5DF0000000 = 0xAAA70A5DF0000000; +constexpr auto literal_0xAAAF0BFFF0000000 = 0xAAAF0BFFF0000000; fapi2::ReturnCode p9_npu_scom(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& TGT0, const fapi2::Target<fapi2::TARGET_TYPE_SYSTEM>& TGT1) @@ -201,7 +205,7 @@ fapi2::ReturnCode p9_npu_scom(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& } { - l_scom_buffer.insert<uint64_t> (literal_0x1111111111111111, 0, 64, 0 ); + l_scom_buffer.insert<uint64_t> (literal_0x009A48180F01FFFF, 0, 64, 0 ); } l_rc = fapi2::putScom(TGT0, 0x5011403ull, l_scom_buffer); @@ -223,7 +227,7 @@ fapi2::ReturnCode p9_npu_scom(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& } { - l_scom_buffer.insert<uint64_t> (literal_0x0000000000000000, 0, 64, 0 ); + l_scom_buffer.insert<uint64_t> (literal_0x7F60B04500AE0000, 0, 64, 0 ); } l_rc = fapi2::putScom(TGT0, 0x5011406ull, l_scom_buffer); @@ -245,7 +249,7 @@ fapi2::ReturnCode p9_npu_scom(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& } { - l_scom_buffer.insert<uint64_t> (literal_0x0000000000000000, 0, 64, 0 ); + l_scom_buffer.insert<uint64_t> (literal_0xFF65B04700FE0000, 0, 64, 0 ); } l_rc = fapi2::putScom(TGT0, 0x5011407ull, l_scom_buffer); @@ -258,6 +262,28 @@ fapi2::ReturnCode p9_npu_scom(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& } { + l_rc = fapi2::getScom( TGT0, 0x5011443ull, l_scom_buffer ); + + if (l_rc) + { + FAPI_ERR("ERROR executing: getScom (0x5011443ull)"); + break; + } + + { + l_scom_buffer.insert<uint64_t> (literal_0x5550F40000000003, 0, 64, 0 ); + } + + l_rc = fapi2::putScom(TGT0, 0x5011443ull, l_scom_buffer); + + if (l_rc) + { + FAPI_ERR("ERROR executing: putScom (0x5011443ull)"); + break; + } + } + + { l_rc = fapi2::getScom( TGT0, 0x5011446ull, l_scom_buffer ); if (l_rc) @@ -267,7 +293,7 @@ fapi2::ReturnCode p9_npu_scom(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& } { - l_scom_buffer.insert<uint64_t> (literal_0x0000000000000000, 0, 64, 0 ); + l_scom_buffer.insert<uint64_t> (literal_0xAAA70A5DF0000000, 0, 64, 0 ); } l_rc = fapi2::putScom(TGT0, 0x5011446ull, l_scom_buffer); @@ -289,7 +315,7 @@ fapi2::ReturnCode p9_npu_scom(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& } { - l_scom_buffer.insert<uint64_t> (literal_0x0000000000000000, 0, 64, 0 ); + l_scom_buffer.insert<uint64_t> (literal_0xAAAF0BFFF0000000, 0, 64, 0 ); } l_rc = fapi2::putScom(TGT0, 0x5011447ull, l_scom_buffer); |