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| author | Ben Gass <bgass@us.ibm.com> | 2018-10-24 13:10:06 -0500 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2018-10-31 22:22:56 -0500 |
| commit | 5e1f534a38ba19e043a2eec005d9c5f7a92d61ba (patch) | |
| tree | 673c2f820ce53d0e9c59740d4ef076dda7023c83 /src/import/chips/p9/common | |
| parent | de2d12b23dff680e97a4aa38bbd57fffbf1d39ab (diff) | |
| download | talos-hostboot-5e1f534a38ba19e043a2eec005d9c5f7a92d61ba.tar.gz talos-hostboot-5e1f534a38ba19e043a2eec005d9c5f7a92d61ba.zip | |
Adjust MI/MCC p9a scom translation for PB scoms
Change-Id: I3680ec9a15e3e82f6cbb6e3a485ecf49e5b77ac1
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/67955
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Brent Wieman <bwieman@us.ibm.com>
Reviewed-by: Benjamin Gass <bgass@us.ibm.com>
Dev-Ready: Benjamin Gass <bgass@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/67966
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/common')
| -rw-r--r-- | src/import/chips/p9/common/scominfo/p9_scominfo.C | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/src/import/chips/p9/common/scominfo/p9_scominfo.C b/src/import/chips/p9/common/scominfo/p9_scominfo.C index 84295515d..a00dee19d 100644 --- a/src/import/chips/p9/common/scominfo/p9_scominfo.C +++ b/src/import/chips/p9/common/scominfo/p9_scominfo.C @@ -648,7 +648,7 @@ extern "C" uint32_t p9_scominfo_xlate_mi(bool& o_chipUnitRelated, std::vector<p9_chipUnitPairing_t>& o_chipUnitPairing, - p9_scom_addr& i_scom, const p9ChipUnits_t mcc_dmi, const uint32_t i_mode) + p9_scom_addr& i_scom, const p9ChipUnits_t mcc_dmi, const int i_low0, const int i_low1, const uint32_t i_mode) { uint8_t l_chiplet_id = i_scom.get_chiplet_id(); uint8_t l_port = i_scom.get_port(); @@ -675,8 +675,8 @@ extern "C" //DMI5 03 02 0 0x3X (X <= 0xB) //DMI6 03 02 2 0x2X (X <= 0xB) //DMI7 03 02 2 0x3X (X <= 0xB) - if ((0x20 <= l_sat_offset && l_sat_offset <= 0x2B) || - (0x30 <= l_sat_offset && l_sat_offset <= 0x3B)) + if ((i_low0 <= l_sat_offset && l_sat_offset <= 0x2B) || + (i_low1 <= l_sat_offset && l_sat_offset <= 0x3B)) { uint8_t l_off_nib0 = (l_sat_offset >> 4); o_chipUnitRelated = true; @@ -901,7 +901,7 @@ extern "C" else if (i_mode == P9C_DD1_SI_MODE || i_mode == P9C_DD2_SI_MODE) { //==== CUMULUS MC/MI/DMI================================================================================== - rc = p9_scominfo_xlate_mi(o_chipUnitRelated, o_chipUnitPairing, l_scom, PU_DMI_CHIPUNIT, i_mode); + rc = p9_scominfo_xlate_mi(o_chipUnitRelated, o_chipUnitPairing, l_scom, PU_DMI_CHIPUNIT, 0x20, 0x30, i_mode); if (rc) { @@ -1086,7 +1086,7 @@ extern "C" else { //==== AXONE MC/MI/OMIC/OMI ============================================================================ - rc = p9_scominfo_xlate_mi(o_chipUnitRelated, o_chipUnitPairing, l_scom, PU_MCC_CHIPUNIT, i_mode); + rc = p9_scominfo_xlate_mi(o_chipUnitRelated, o_chipUnitPairing, l_scom, PU_MCC_CHIPUNIT, 0x23, 0x33, i_mode); if (rc) { |
