diff options
| author | Ben Gass <bgass@us.ibm.com> | 2016-01-13 15:01:40 -0600 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2016-03-28 22:31:46 -0400 |
| commit | 4fd8df83e4e4f6e256848e14ba566733078b6b48 (patch) | |
| tree | e25dd8edd91660a7a4f2d709eb92358a98ce037d /src/import/chips/p9/common/include/p9_xbus_scom_addresses_fld.H | |
| parent | bca68a00e509cdbb0bcdc81d249bc8b22eaba237 (diff) | |
| download | talos-hostboot-4fd8df83e4e4f6e256848e14ba566733078b6b48.tar.gz talos-hostboot-4fd8df83e4e4f6e256848e14ba566733078b6b48.zip | |
New scom addresses const headers for chip 9031
Fixes for mcbist
Fixes for obus
Reviewed figtree issues
Reviewed address translation
Change-Id: Ie2968cda3008c4a58fd8554c7b51cb204e266f95
Original-Change-Id: I68a21eb34c3ef5061c5d64099f108471acf96c5e
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/23283
Tested-by: Jenkins Server
Reviewed-by: Craig C. Hamilton <cchamilt@us.ibm.com>
Reviewed-by: Brian Silver <bsilver@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22554
Tested-by: FSP CI Jenkins
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/common/include/p9_xbus_scom_addresses_fld.H')
| -rw-r--r-- | src/import/chips/p9/common/include/p9_xbus_scom_addresses_fld.H | 268 |
1 files changed, 228 insertions, 40 deletions
diff --git a/src/import/chips/p9/common/include/p9_xbus_scom_addresses_fld.H b/src/import/chips/p9/common/include/p9_xbus_scom_addresses_fld.H index 5defef7dd..72d415c7f 100644 --- a/src/import/chips/p9/common/include/p9_xbus_scom_addresses_fld.H +++ b/src/import/chips/p9/common/include/p9_xbus_scom_addresses_fld.H @@ -7,7 +7,7 @@ /* */ /* EKB Project */ /* */ -/* COPYRIGHT 2015 */ +/* COPYRIGHT 2015,2016 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -65,10 +65,14 @@ REG64_FLD( XBUS_ATOMIC_LOCK_MASK_LATCH_REG_MASK_LEN , 16 , SH_UN //WARNING NO FIELDS FOUND FOR: DBG_INST1_COND_REG_2 +//WARNING NO FIELDS FOUND FOR: DBG_INST1_COND_REG_3 + //WARNING NO FIELDS FOUND FOR: DBG_INST2_COND_REG_1 //WARNING NO FIELDS FOUND FOR: DBG_INST2_COND_REG_2 +//WARNING NO FIELDS FOUND FOR: DBG_INST2_COND_REG_3 + //WARNING NO FIELDS FOUND FOR: DBG_MODE_REG //WARNING NO FIELDS FOUND FOR: DBG_TRACE_MODE_REG_2 @@ -77,38 +81,215 @@ REG64_FLD( XBUS_ATOMIC_LOCK_MASK_LATCH_REG_MASK_LEN , 16 , SH_UN //WARNING NO FIELDS FOUND FOR: DBG_TRACE_REG_1 -REG64_FLD( XBUS_DEBUG_STATUS_REG_LOCAL_TRACE_RUN_IN , 0 , SH_UNT_XBUS_1 , SH_ACS_SCOM , - SH_FLD_LOCAL_TRACE_RUN_IN ); -REG64_FLD( XBUS_DEBUG_STATUS_REG_TRACE_STATE_LAT , 1 , SH_UNT_XBUS_1 , SH_ACS_SCOM , - SH_FLD_TRACE_STATE_LAT ); -REG64_FLD( XBUS_DEBUG_STATUS_REG_TRACE_STATE_LAT_LEN , 2 , SH_UNT_XBUS_1 , SH_ACS_SCOM , - SH_FLD_TRACE_STATE_LAT_LEN ); -REG64_FLD( XBUS_DEBUG_STATUS_REG_TRACE_FREEZE , 3 , SH_UNT_XBUS_1 , SH_ACS_SCOM , - SH_FLD_TRACE_FREEZE ); -REG64_FLD( XBUS_DEBUG_STATUS_REG_COND3_STATE_LT , 4 , SH_UNT_XBUS_1 , SH_ACS_SCOM , - SH_FLD_COND3_STATE_LT ); -REG64_FLD( XBUS_DEBUG_STATUS_REG_COND3_STATE_LT_LEN , 2 , SH_UNT_XBUS_1 , SH_ACS_SCOM , - SH_FLD_COND3_STATE_LT_LEN ); -REG64_FLD( XBUS_DEBUG_STATUS_REG_COND5_STATE_LT , 6 , SH_UNT_XBUS_1 , SH_ACS_SCOM , - SH_FLD_COND5_STATE_LT ); -REG64_FLD( XBUS_DEBUG_STATUS_REG_COND5_STATE_LT_LEN , 2 , SH_UNT_XBUS_1 , SH_ACS_SCOM , - SH_FLD_COND5_STATE_LT_LEN ); -REG64_FLD( XBUS_DEBUG_STATUS_REG_HISTORY_CONDITION0_LT , 8 , SH_UNT_XBUS_1 , SH_ACS_SCOM , - SH_FLD_HISTORY_CONDITION0_LT ); -REG64_FLD( XBUS_DEBUG_STATUS_REG_HISTORY_CONDITION1_LT , 9 , SH_UNT_XBUS_1 , SH_ACS_SCOM , - SH_FLD_HISTORY_CONDITION1_LT ); -REG64_FLD( XBUS_DEBUG_STATUS_REG_HISTORY_COND2_3_EVENT , 10 , SH_UNT_XBUS_1 , SH_ACS_SCOM , - SH_FLD_HISTORY_COND2_3_EVENT ); -REG64_FLD( XBUS_DEBUG_STATUS_REG_HISTORY_COND2_TIMEOUT , 11 , SH_UNT_XBUS_1 , SH_ACS_SCOM , - SH_FLD_HISTORY_COND2_TIMEOUT ); -REG64_FLD( XBUS_DEBUG_STATUS_REG_HISTORY_COND4_5_EVENT , 12 , SH_UNT_XBUS_1 , SH_ACS_SCOM , - SH_FLD_HISTORY_COND4_5_EVENT ); -REG64_FLD( XBUS_DEBUG_STATUS_REG_HISTORY_COND4_TIMEOUT , 13 , SH_UNT_XBUS_1 , SH_ACS_SCOM , - SH_FLD_HISTORY_COND4_TIMEOUT ); -REG64_FLD( XBUS_DEBUG_STATUS_REG_RESERVED_TCDBG_LT , 14 , SH_UNT_XBUS_1 , SH_ACS_SCOM , - SH_FLD_RESERVED_TCDBG_LT ); -REG64_FLD( XBUS_DEBUG_STATUS_REG_RESERVED_TCDBG_LT_LEN , 2 , SH_UNT_XBUS_1 , SH_ACS_SCOM , - SH_FLD_RESERVED_TCDBG_LT_LEN ); +REG64_FLD( XBUS_LL0_IOEL_FIR_ACTION0_REG_ACTION0 , 0 , SH_UNT_XBUS_1 , SH_ACS_SCOM_RW , + SH_FLD_ACTION0 ); +REG64_FLD( XBUS_LL0_IOEL_FIR_ACTION0_REG_ACTION0_LEN , 64 , SH_UNT_XBUS_1 , SH_ACS_SCOM_RW , + SH_FLD_ACTION0_LEN ); + +REG64_FLD( XBUS_LL0_IOEL_FIR_ACTION1_REG_ACTION1 , 0 , SH_UNT_XBUS_1 , SH_ACS_SCOM_RW , + SH_FLD_ACTION1 ); +REG64_FLD( XBUS_LL0_IOEL_FIR_ACTION1_REG_ACTION1_LEN , 64 , SH_UNT_XBUS_1 , SH_ACS_SCOM_RW , + SH_FLD_ACTION1_LEN ); + +REG64_FLD( XBUS_LL0_IOEL_FIR_MASK_REG_LINK0_TRAINED , 0 , SH_UNT_XBUS_1 , SH_ACS_SCOM_RW , + SH_FLD_LINK0_TRAINED ); +REG64_FLD( XBUS_LL0_IOEL_FIR_MASK_REG_LINK1_TRAINED , 1 , SH_UNT_XBUS_1 , SH_ACS_SCOM_RW , + SH_FLD_LINK1_TRAINED ); +REG64_FLD( XBUS_LL0_IOEL_FIR_MASK_REG_LINK0_REPLAY_THRESHOLD , 4 , SH_UNT_XBUS_1 , SH_ACS_SCOM_RW , + SH_FLD_LINK0_REPLAY_THRESHOLD ); +REG64_FLD( XBUS_LL0_IOEL_FIR_MASK_REG_LINK1_REPLAY_THRESHOLD , 5 , SH_UNT_XBUS_1 , SH_ACS_SCOM_RW , + SH_FLD_LINK1_REPLAY_THRESHOLD ); +REG64_FLD( XBUS_LL0_IOEL_FIR_MASK_REG_LINK0_CRC_ERROR , 6 , SH_UNT_XBUS_1 , SH_ACS_SCOM_RW , + SH_FLD_LINK0_CRC_ERROR ); +REG64_FLD( XBUS_LL0_IOEL_FIR_MASK_REG_LINK1_CRC_ERROR , 7 , SH_UNT_XBUS_1 , SH_ACS_SCOM_RW , + SH_FLD_LINK1_CRC_ERROR ); +REG64_FLD( XBUS_LL0_IOEL_FIR_MASK_REG_LINK0_NAK_RECEIVED , 8 , SH_UNT_XBUS_1 , SH_ACS_SCOM_RW , + SH_FLD_LINK0_NAK_RECEIVED ); +REG64_FLD( XBUS_LL0_IOEL_FIR_MASK_REG_LINK1_NAK_RECEIVED , 9 , SH_UNT_XBUS_1 , SH_ACS_SCOM_RW , + SH_FLD_LINK1_NAK_RECEIVED ); +REG64_FLD( XBUS_LL0_IOEL_FIR_MASK_REG_LINK0_REPLAY_BUFFER_FULL , 10 , SH_UNT_XBUS_1 , SH_ACS_SCOM_RW , + SH_FLD_LINK0_REPLAY_BUFFER_FULL ); +REG64_FLD( XBUS_LL0_IOEL_FIR_MASK_REG_LINK1_REPLAY_BUFFER_FULL , 11 , SH_UNT_XBUS_1 , SH_ACS_SCOM_RW , + SH_FLD_LINK1_REPLAY_BUFFER_FULL ); +REG64_FLD( XBUS_LL0_IOEL_FIR_MASK_REG_LINK0_SL_ECC_THRESHOLD , 12 , SH_UNT_XBUS_1 , SH_ACS_SCOM_RW , + SH_FLD_LINK0_SL_ECC_THRESHOLD ); +REG64_FLD( XBUS_LL0_IOEL_FIR_MASK_REG_LINK1_SL_ECC_THRESHOLD , 13 , SH_UNT_XBUS_1 , SH_ACS_SCOM_RW , + SH_FLD_LINK1_SL_ECC_THRESHOLD ); +REG64_FLD( XBUS_LL0_IOEL_FIR_MASK_REG_LINK0_SL_ECC_CORRECTABLE , 14 , SH_UNT_XBUS_1 , SH_ACS_SCOM_RW , + SH_FLD_LINK0_SL_ECC_CORRECTABLE ); +REG64_FLD( XBUS_LL0_IOEL_FIR_MASK_REG_LINK1_SL_ECC_CORRECTABLE , 15 , SH_UNT_XBUS_1 , SH_ACS_SCOM_RW , + SH_FLD_LINK1_SL_ECC_CORRECTABLE ); +REG64_FLD( XBUS_LL0_IOEL_FIR_MASK_REG_LINK0_SL_ECC_UE , 16 , SH_UNT_XBUS_1 , SH_ACS_SCOM_RW , + SH_FLD_LINK0_SL_ECC_UE ); +REG64_FLD( XBUS_LL0_IOEL_FIR_MASK_REG_LINK1_SL_ECC_UE , 17 , SH_UNT_XBUS_1 , SH_ACS_SCOM_RW , + SH_FLD_LINK1_SL_ECC_UE ); +REG64_FLD( XBUS_LL0_IOEL_FIR_MASK_REG_LINK0_TCOMPLETE_BAD , 40 , SH_UNT_XBUS_1 , SH_ACS_SCOM_RW , + SH_FLD_LINK0_TCOMPLETE_BAD ); +REG64_FLD( XBUS_LL0_IOEL_FIR_MASK_REG_LINK1_TCOMPLETE_BAD , 41 , SH_UNT_XBUS_1 , SH_ACS_SCOM_RW , + SH_FLD_LINK1_TCOMPLETE_BAD ); +REG64_FLD( XBUS_LL0_IOEL_FIR_MASK_REG_LINK0_SPARE_DONE , 44 , SH_UNT_XBUS_1 , SH_ACS_SCOM_RW , + SH_FLD_LINK0_SPARE_DONE ); +REG64_FLD( XBUS_LL0_IOEL_FIR_MASK_REG_LINK1_SPARE_DONE , 45 , SH_UNT_XBUS_1 , SH_ACS_SCOM_RW , + SH_FLD_LINK1_SPARE_DONE ); +REG64_FLD( XBUS_LL0_IOEL_FIR_MASK_REG_LINK0_TOO_MANY_CRC_ERRORS , 46 , SH_UNT_XBUS_1 , SH_ACS_SCOM_RW , + SH_FLD_LINK0_TOO_MANY_CRC_ERRORS ); +REG64_FLD( XBUS_LL0_IOEL_FIR_MASK_REG_LINK1_TOO_MANY_CRC_ERRORS , 47 , SH_UNT_XBUS_1 , SH_ACS_SCOM_RW , + SH_FLD_LINK1_TOO_MANY_CRC_ERRORS ); +REG64_FLD( XBUS_LL0_IOEL_FIR_MASK_REG_PSAVE_INVALID_STATE , 51 , SH_UNT_XBUS_1 , SH_ACS_SCOM_RW , + SH_FLD_PSAVE_INVALID_STATE ); +REG64_FLD( XBUS_LL0_IOEL_FIR_MASK_REG_LINK0_CORRECTABLE_ARRAY_ERROR , 52 , SH_UNT_XBUS_1 , SH_ACS_SCOM_RW , + SH_FLD_LINK0_CORRECTABLE_ARRAY_ERROR ); +REG64_FLD( XBUS_LL0_IOEL_FIR_MASK_REG_LINK1_CORRECTABLE_ARRAY_ERROR , 53 , SH_UNT_XBUS_1 , SH_ACS_SCOM_RW , + SH_FLD_LINK1_CORRECTABLE_ARRAY_ERROR ); +REG64_FLD( XBUS_LL0_IOEL_FIR_MASK_REG_LINK0_UNCORRECTABLE_ARRAY_ERROR , 54 , SH_UNT_XBUS_1 , SH_ACS_SCOM_RW , + SH_FLD_LINK0_UNCORRECTABLE_ARRAY_ERROR ); +REG64_FLD( XBUS_LL0_IOEL_FIR_MASK_REG_LINK1_UNCORRECTABLE_ARRAY_ERROR , 55 , SH_UNT_XBUS_1 , SH_ACS_SCOM_RW , + SH_FLD_LINK1_UNCORRECTABLE_ARRAY_ERROR ); +REG64_FLD( XBUS_LL0_IOEL_FIR_MASK_REG_LINK0_TRAINING_FAILED , 56 , SH_UNT_XBUS_1 , SH_ACS_SCOM_RW , + SH_FLD_LINK0_TRAINING_FAILED ); +REG64_FLD( XBUS_LL0_IOEL_FIR_MASK_REG_LINK1_TRAINING_FAILED , 57 , SH_UNT_XBUS_1 , SH_ACS_SCOM_RW , + SH_FLD_LINK1_TRAINING_FAILED ); +REG64_FLD( XBUS_LL0_IOEL_FIR_MASK_REG_LINK0_UNRECOVERABLE_ERROR , 58 , SH_UNT_XBUS_1 , SH_ACS_SCOM_RW , + SH_FLD_LINK0_UNRECOVERABLE_ERROR ); +REG64_FLD( XBUS_LL0_IOEL_FIR_MASK_REG_LINK1_UNRECOVERABLE_ERROR , 59 , SH_UNT_XBUS_1 , SH_ACS_SCOM_RW , + SH_FLD_LINK1_UNRECOVERABLE_ERROR ); +REG64_FLD( XBUS_LL0_IOEL_FIR_MASK_REG_LINK0_INTERNAL_ERROR , 60 , SH_UNT_XBUS_1 , SH_ACS_SCOM_RW , + SH_FLD_LINK0_INTERNAL_ERROR ); +REG64_FLD( XBUS_LL0_IOEL_FIR_MASK_REG_LINK1_INTERNAL_ERROR , 61 , SH_UNT_XBUS_1 , SH_ACS_SCOM_RW , + SH_FLD_LINK1_INTERNAL_ERROR ); +REG64_FLD( XBUS_LL0_IOEL_FIR_MASK_REG_SCOM_ERR_DUP , 62 , SH_UNT_XBUS_1 , SH_ACS_SCOM_RW , + SH_FLD_SCOM_ERR_DUP ); +REG64_FLD( XBUS_LL0_IOEL_FIR_MASK_REG_SCOM_ERR , 63 , SH_UNT_XBUS_1 , SH_ACS_SCOM_RW , + SH_FLD_SCOM_ERR ); + +REG64_FLD( XBUS_LL0_IOEL_FIR_REG_LINK0_TRAINED , 0 , SH_UNT_XBUS_1 , SH_ACS_SCOM_RW , + SH_FLD_LINK0_TRAINED ); +REG64_FLD( XBUS_LL0_IOEL_FIR_REG_LINK1_TRAINED , 1 , SH_UNT_XBUS_1 , SH_ACS_SCOM_RW , + SH_FLD_LINK1_TRAINED ); +REG64_FLD( XBUS_LL0_IOEL_FIR_REG_LINK0_REPLAY_THRESHOLD , 4 , SH_UNT_XBUS_1 , SH_ACS_SCOM_RW , + SH_FLD_LINK0_REPLAY_THRESHOLD ); +REG64_FLD( XBUS_LL0_IOEL_FIR_REG_LINK1_REPLAY_THRESHOLD , 5 , SH_UNT_XBUS_1 , SH_ACS_SCOM_RW , + SH_FLD_LINK1_REPLAY_THRESHOLD ); +REG64_FLD( XBUS_LL0_IOEL_FIR_REG_LINK0_CRC_ERROR , 6 , SH_UNT_XBUS_1 , SH_ACS_SCOM_RW , + SH_FLD_LINK0_CRC_ERROR ); +REG64_FLD( XBUS_LL0_IOEL_FIR_REG_LINK1_CRC_ERROR , 7 , SH_UNT_XBUS_1 , SH_ACS_SCOM_RW , + SH_FLD_LINK1_CRC_ERROR ); +REG64_FLD( XBUS_LL0_IOEL_FIR_REG_LINK0_NAK_RECEIVED , 8 , SH_UNT_XBUS_1 , SH_ACS_SCOM_RW , + SH_FLD_LINK0_NAK_RECEIVED ); +REG64_FLD( XBUS_LL0_IOEL_FIR_REG_LINK1_NAK_RECEIVED , 9 , SH_UNT_XBUS_1 , SH_ACS_SCOM_RW , + SH_FLD_LINK1_NAK_RECEIVED ); +REG64_FLD( XBUS_LL0_IOEL_FIR_REG_LINK0_REPLAY_BUFFER_FULL , 10 , SH_UNT_XBUS_1 , SH_ACS_SCOM_RW , + SH_FLD_LINK0_REPLAY_BUFFER_FULL ); +REG64_FLD( XBUS_LL0_IOEL_FIR_REG_LINK1_REPLAY_BUFFER_FULL , 11 , SH_UNT_XBUS_1 , SH_ACS_SCOM_RW , + SH_FLD_LINK1_REPLAY_BUFFER_FULL ); +REG64_FLD( XBUS_LL0_IOEL_FIR_REG_LINK0_SL_ECC_THRESHOLD , 12 , SH_UNT_XBUS_1 , SH_ACS_SCOM_RW , + SH_FLD_LINK0_SL_ECC_THRESHOLD ); +REG64_FLD( XBUS_LL0_IOEL_FIR_REG_LINK1_SL_ECC_THRESHOLD , 13 , SH_UNT_XBUS_1 , SH_ACS_SCOM_RW , + SH_FLD_LINK1_SL_ECC_THRESHOLD ); +REG64_FLD( XBUS_LL0_IOEL_FIR_REG_LINK0_SL_ECC_CORRECTABLE , 14 , SH_UNT_XBUS_1 , SH_ACS_SCOM_RW , + SH_FLD_LINK0_SL_ECC_CORRECTABLE ); +REG64_FLD( XBUS_LL0_IOEL_FIR_REG_LINK1_SL_ECC_CORRECTABLE , 15 , SH_UNT_XBUS_1 , SH_ACS_SCOM_RW , + SH_FLD_LINK1_SL_ECC_CORRECTABLE ); +REG64_FLD( XBUS_LL0_IOEL_FIR_REG_LINK0_SL_ECC_UE , 16 , SH_UNT_XBUS_1 , SH_ACS_SCOM_RW , + SH_FLD_LINK0_SL_ECC_UE ); +REG64_FLD( XBUS_LL0_IOEL_FIR_REG_LINK1_SL_ECC_UE , 17 , SH_UNT_XBUS_1 , SH_ACS_SCOM_RW , + SH_FLD_LINK1_SL_ECC_UE ); +REG64_FLD( XBUS_LL0_IOEL_FIR_REG_LINK0_TCOMPLETE_BAD , 40 , SH_UNT_XBUS_1 , SH_ACS_SCOM_RW , + SH_FLD_LINK0_TCOMPLETE_BAD ); +REG64_FLD( XBUS_LL0_IOEL_FIR_REG_LINK1_TCOMPLETE_BAD , 41 , SH_UNT_XBUS_1 , SH_ACS_SCOM_RW , + SH_FLD_LINK1_TCOMPLETE_BAD ); +REG64_FLD( XBUS_LL0_IOEL_FIR_REG_LINK0_SPARE_DONE , 44 , SH_UNT_XBUS_1 , SH_ACS_SCOM_RW , + SH_FLD_LINK0_SPARE_DONE ); +REG64_FLD( XBUS_LL0_IOEL_FIR_REG_LINK1_SPARE_DONE , 45 , SH_UNT_XBUS_1 , SH_ACS_SCOM_RW , + SH_FLD_LINK1_SPARE_DONE ); +REG64_FLD( XBUS_LL0_IOEL_FIR_REG_LINK0_TOO_MANY_CRC_ERRORS , 46 , SH_UNT_XBUS_1 , SH_ACS_SCOM_RW , + SH_FLD_LINK0_TOO_MANY_CRC_ERRORS ); +REG64_FLD( XBUS_LL0_IOEL_FIR_REG_LINK1_TOO_MANY_CRC_ERRORS , 47 , SH_UNT_XBUS_1 , SH_ACS_SCOM_RW , + SH_FLD_LINK1_TOO_MANY_CRC_ERRORS ); +REG64_FLD( XBUS_LL0_IOEL_FIR_REG_PSAVE_INVALID_STATE , 51 , SH_UNT_XBUS_1 , SH_ACS_SCOM_RW , + SH_FLD_PSAVE_INVALID_STATE ); +REG64_FLD( XBUS_LL0_IOEL_FIR_REG_LINK0_CORRECTABLE_ARRAY_ERROR , 52 , SH_UNT_XBUS_1 , SH_ACS_SCOM_RW , + SH_FLD_LINK0_CORRECTABLE_ARRAY_ERROR ); +REG64_FLD( XBUS_LL0_IOEL_FIR_REG_LINK1_CORRECTABLE_ARRAY_ERROR , 53 , SH_UNT_XBUS_1 , SH_ACS_SCOM_RW , + SH_FLD_LINK1_CORRECTABLE_ARRAY_ERROR ); +REG64_FLD( XBUS_LL0_IOEL_FIR_REG_LINK0_UNCORRECTABLE_ARRAY_ERROR , 54 , SH_UNT_XBUS_1 , SH_ACS_SCOM_RW , + SH_FLD_LINK0_UNCORRECTABLE_ARRAY_ERROR ); +REG64_FLD( XBUS_LL0_IOEL_FIR_REG_LINK1_UNCORRECTABLE_ARRAY_ERROR , 55 , SH_UNT_XBUS_1 , SH_ACS_SCOM_RW , + SH_FLD_LINK1_UNCORRECTABLE_ARRAY_ERROR ); +REG64_FLD( XBUS_LL0_IOEL_FIR_REG_LINK0_TRAINING_FAILED , 56 , SH_UNT_XBUS_1 , SH_ACS_SCOM_RW , + SH_FLD_LINK0_TRAINING_FAILED ); +REG64_FLD( XBUS_LL0_IOEL_FIR_REG_LINK1_TRAINING_FAILED , 57 , SH_UNT_XBUS_1 , SH_ACS_SCOM_RW , + SH_FLD_LINK1_TRAINING_FAILED ); +REG64_FLD( XBUS_LL0_IOEL_FIR_REG_LINK0_UNRECOVERABLE_ERROR , 58 , SH_UNT_XBUS_1 , SH_ACS_SCOM_RW , + SH_FLD_LINK0_UNRECOVERABLE_ERROR ); +REG64_FLD( XBUS_LL0_IOEL_FIR_REG_LINK1_UNRECOVERABLE_ERROR , 59 , SH_UNT_XBUS_1 , SH_ACS_SCOM_RW , + SH_FLD_LINK1_UNRECOVERABLE_ERROR ); +REG64_FLD( XBUS_LL0_IOEL_FIR_REG_LINK0_INTERNAL_ERROR , 60 , SH_UNT_XBUS_1 , SH_ACS_SCOM_RW , + SH_FLD_LINK0_INTERNAL_ERROR ); +REG64_FLD( XBUS_LL0_IOEL_FIR_REG_LINK1_INTERNAL_ERROR , 61 , SH_UNT_XBUS_1 , SH_ACS_SCOM_RW , + SH_FLD_LINK1_INTERNAL_ERROR ); +REG64_FLD( XBUS_LL0_IOEL_FIR_REG_SCOM_ERR_DUP , 62 , SH_UNT_XBUS_1 , SH_ACS_SCOM_RW , + SH_FLD_SCOM_ERR_DUP ); +REG64_FLD( XBUS_LL0_IOEL_FIR_REG_SCOM_ERR , 63 , SH_UNT_XBUS_1 , SH_ACS_SCOM_RW , + SH_FLD_SCOM_ERR ); + +REG64_FLD( XBUS_LL0_IOEL_LINK0_ERROR_STATUS_RESET_KEEPER , 0 , SH_UNT_XBUS_1 , SH_ACS_SCOM , + SH_FLD_RESET_KEEPER ); +REG64_FLD( XBUS_LL0_IOEL_LINK0_ERROR_STATUS_CE , 1 , SH_UNT_XBUS_1 , SH_ACS_SCOM , + SH_FLD_CE ); +REG64_FLD( XBUS_LL0_IOEL_LINK0_ERROR_STATUS_CE_LEN , 3 , SH_UNT_XBUS_1 , SH_ACS_SCOM , + SH_FLD_CE_LEN ); +REG64_FLD( XBUS_LL0_IOEL_LINK0_ERROR_STATUS_UE , 8 , SH_UNT_XBUS_1 , SH_ACS_SCOM , + SH_FLD_UE ); +REG64_FLD( XBUS_LL0_IOEL_LINK0_ERROR_STATUS_UE_LEN , 2 , SH_UNT_XBUS_1 , SH_ACS_SCOM , + SH_FLD_UE_LEN ); +REG64_FLD( XBUS_LL0_IOEL_LINK0_ERROR_STATUS_TRAIN , 16 , SH_UNT_XBUS_1 , SH_ACS_SCOM , + SH_FLD_TRAIN ); +REG64_FLD( XBUS_LL0_IOEL_LINK0_ERROR_STATUS_TRAIN_LEN , 2 , SH_UNT_XBUS_1 , SH_ACS_SCOM , + SH_FLD_TRAIN_LEN ); +REG64_FLD( XBUS_LL0_IOEL_LINK0_ERROR_STATUS_UNRECOV , 24 , SH_UNT_XBUS_1 , SH_ACS_SCOM , + SH_FLD_UNRECOV ); +REG64_FLD( XBUS_LL0_IOEL_LINK0_ERROR_STATUS_UNRECOV_LEN , 11 , SH_UNT_XBUS_1 , SH_ACS_SCOM , + SH_FLD_UNRECOV_LEN ); +REG64_FLD( XBUS_LL0_IOEL_LINK0_ERROR_STATUS_INTERNAL , 44 , SH_UNT_XBUS_1 , SH_ACS_SCOM , + SH_FLD_INTERNAL ); +REG64_FLD( XBUS_LL0_IOEL_LINK0_ERROR_STATUS_INTERNAL_LEN , 18 , SH_UNT_XBUS_1 , SH_ACS_SCOM , + SH_FLD_INTERNAL_LEN ); + +REG64_FLD( XBUS_LL0_IOEL_LINK1_ERROR_STATUS_RESET_KEEPER , 0 , SH_UNT_XBUS_1 , SH_ACS_SCOM , + SH_FLD_RESET_KEEPER ); +REG64_FLD( XBUS_LL0_IOEL_LINK1_ERROR_STATUS_CE , 1 , SH_UNT_XBUS_1 , SH_ACS_SCOM , + SH_FLD_CE ); +REG64_FLD( XBUS_LL0_IOEL_LINK1_ERROR_STATUS_CE_LEN , 3 , SH_UNT_XBUS_1 , SH_ACS_SCOM , + SH_FLD_CE_LEN ); +REG64_FLD( XBUS_LL0_IOEL_LINK1_ERROR_STATUS_UE , 8 , SH_UNT_XBUS_1 , SH_ACS_SCOM , + SH_FLD_UE ); +REG64_FLD( XBUS_LL0_IOEL_LINK1_ERROR_STATUS_UE_LEN , 2 , SH_UNT_XBUS_1 , SH_ACS_SCOM , + SH_FLD_UE_LEN ); +REG64_FLD( XBUS_LL0_IOEL_LINK1_ERROR_STATUS_TRAIN , 16 , SH_UNT_XBUS_1 , SH_ACS_SCOM , + SH_FLD_TRAIN ); +REG64_FLD( XBUS_LL0_IOEL_LINK1_ERROR_STATUS_TRAIN_LEN , 2 , SH_UNT_XBUS_1 , SH_ACS_SCOM , + SH_FLD_TRAIN_LEN ); +REG64_FLD( XBUS_LL0_IOEL_LINK1_ERROR_STATUS_UNRECOV , 24 , SH_UNT_XBUS_1 , SH_ACS_SCOM , + SH_FLD_UNRECOV ); +REG64_FLD( XBUS_LL0_IOEL_LINK1_ERROR_STATUS_UNRECOV_LEN , 11 , SH_UNT_XBUS_1 , SH_ACS_SCOM , + SH_FLD_UNRECOV_LEN ); +REG64_FLD( XBUS_LL0_IOEL_LINK1_ERROR_STATUS_INTERNAL , 44 , SH_UNT_XBUS_1 , SH_ACS_SCOM , + SH_FLD_INTERNAL ); +REG64_FLD( XBUS_LL0_IOEL_LINK1_ERROR_STATUS_INTERNAL_LEN , 18 , SH_UNT_XBUS_1 , SH_ACS_SCOM , + SH_FLD_INTERNAL_LEN ); + +//WARNING NO FIELDS FOUND FOR: LL1_IOEL_FIR_ACTION0_REG + +//WARNING NO FIELDS FOUND FOR: LL1_IOEL_FIR_ACTION1_REG + +//WARNING NO FIELDS FOUND FOR: LL1_IOEL_FIR_MASK_REG + +//WARNING NO FIELDS FOUND FOR: LL1_IOEL_FIR_REG + +//WARNING NO FIELDS FOUND FOR: LL1_IOEL_LINK0_ERROR_STATUS + +//WARNING NO FIELDS FOUND FOR: LL1_IOEL_LINK1_ERROR_STATUS REG64_FLD( XBUS_PSCOM_ERROR_MASK_PCB_WDATA_PARITY , 0 , SH_UNT_XBUS_1 , SH_ACS_SCOM , SH_FLD_PCB_WDATA_PARITY ); @@ -1766,6 +1947,8 @@ REG64_FLD( XBUS_RING_FENCE_MASK_LATCH_REG_ENABLE_LEN , 16 , SH_UN //WARNING NO FIELDS FOUND FOR: RX0_RX_DATASM_STAT12_EO_PG +//WARNING NO FIELDS FOUND FOR: RX0_RX_DATASM_STAT13_E_PG + //WARNING NO FIELDS FOUND FOR: RX0_RX_DATASM_STAT1_EO_PG //WARNING NO FIELDS FOUND FOR: RX0_RX_DATASM_STAT2_EO_PG @@ -1802,6 +1985,10 @@ REG64_FLD( XBUS_RING_FENCE_MASK_LATCH_REG_ENABLE_LEN , 16 , SH_UN //WARNING NO FIELDS FOUND FOR: RX0_RX_GLBSM_CNTL1_EO_PG +//WARNING NO FIELDS FOUND FOR: RX0_RX_GLBSM_CNTL2_EO_PG + +//WARNING NO FIELDS FOUND FOR: RX0_RX_GLBSM_CNTL3_EO_PG + //WARNING NO FIELDS FOUND FOR: RX0_RX_GLBSM_SPARE_MODE_PG //WARNING NO FIELDS FOUND FOR: RX0_RX_GLBSM_STAT10_E_PG @@ -1822,7 +2009,7 @@ REG64_FLD( XBUS_RING_FENCE_MASK_LATCH_REG_ENABLE_LEN , 16 , SH_UN //WARNING NO FIELDS FOUND FOR: RX0_RX_GLBSM_STAT4_E_PG -//WARNING NO FIELDS FOUND FOR: RX0_RX_GLBSM_STAT6_E_PG +//WARNING NO FIELDS FOUND FOR: RX0_RX_GLBSM_STAT5_EO_PG //WARNING NO FIELDS FOUND FOR: RX0_RX_GLBSM_STAT7_E_PG @@ -3546,6 +3733,8 @@ REG64_FLD( XBUS_RING_FENCE_MASK_LATCH_REG_ENABLE_LEN , 16 , SH_UN //WARNING NO FIELDS FOUND FOR: RX1_RX_DATASM_STAT12_EO_PG +//WARNING NO FIELDS FOUND FOR: RX1_RX_DATASM_STAT13_E_PG + //WARNING NO FIELDS FOUND FOR: RX1_RX_DATASM_STAT1_EO_PG //WARNING NO FIELDS FOUND FOR: RX1_RX_DATASM_STAT2_EO_PG @@ -3582,6 +3771,10 @@ REG64_FLD( XBUS_RING_FENCE_MASK_LATCH_REG_ENABLE_LEN , 16 , SH_UN //WARNING NO FIELDS FOUND FOR: RX1_RX_GLBSM_CNTL1_EO_PG +//WARNING NO FIELDS FOUND FOR: RX1_RX_GLBSM_CNTL2_EO_PG + +//WARNING NO FIELDS FOUND FOR: RX1_RX_GLBSM_CNTL3_EO_PG + //WARNING NO FIELDS FOUND FOR: RX1_RX_GLBSM_SPARE_MODE_PG //WARNING NO FIELDS FOUND FOR: RX1_RX_GLBSM_STAT10_E_PG @@ -3602,7 +3795,7 @@ REG64_FLD( XBUS_RING_FENCE_MASK_LATCH_REG_ENABLE_LEN , 16 , SH_UN //WARNING NO FIELDS FOUND FOR: RX1_RX_GLBSM_STAT4_E_PG -//WARNING NO FIELDS FOUND FOR: RX1_RX_GLBSM_STAT6_E_PG +//WARNING NO FIELDS FOUND FOR: RX1_RX_GLBSM_STAT5_EO_PG //WARNING NO FIELDS FOUND FOR: RX1_RX_GLBSM_STAT7_E_PG @@ -3818,11 +4011,6 @@ REG64_FLD( XBUS_RING_FENCE_MASK_LATCH_REG_ENABLE_LEN , 16 , SH_UN //WARNING NO FIELDS FOUND FOR: SCOM_MODE_PB -REG64_FLD( XBUS_SECURE_PIB_MASTER_ID_REG_MASTERS , 0 , SH_UNT_XBUS_1 , SH_ACS_SCOM , - SH_FLD_MASTERS ); -REG64_FLD( XBUS_SECURE_PIB_MASTER_ID_REG_MASTERS_LEN , 16 , SH_UNT_XBUS_1 , SH_ACS_SCOM , - SH_FLD_MASTERS_LEN ); - //WARNING NO FIELDS FOUND FOR: SPARE_MODE_PB //WARNING NO FIELDS FOUND FOR: TCXB_TRA0_TR0_TRACE_HI_DATA_REG |
