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authorClaus Michael Olsen <cmolsen@us.ibm.com>2018-05-14 17:51:09 -0500
committerDaniel M. Crowell <dcrowell@us.ibm.com>2018-10-14 13:05:32 -0500
commit52b76be222254e59959db984606c09dae854270b (patch)
treea009b9fbeca0437d3552844bfd55f64147d4a0e1 /src/import/chips/common
parent62feee748b72ef5f7cb1032964dab2b0686cd916 (diff)
downloadtalos-hostboot-52b76be222254e59959db984606c09dae854270b.tar.gz
talos-hostboot-52b76be222254e59959db984606c09dae854270b.zip
P10 prep: Infrastructure (IS) ring Id metadata and API changes
Gerrit intent: - Applicable for P9 merge (co-req NOT required) - Co-req not req'd for any tests Includes the following changes: - Accommodates initCompiler's needs for additional ring Id APIs to retrieve IS's key ring identifiers, ringId and ringClass, and to align with our enumerated chipId - Elimination of redundancy in and reorg of IS's ring Id lists: RingProperties, GenRingIdList (gone) and ChipletData. - GenRingIdList has been removed. - Expand RingProperties to also include scanScomAddr and ringClass. - Member of ring and chiplet properties structs have been renamed in consistent camel style (no longer using "iv_" anywhere). - Note that with "infrastructure (IS)" we here mean the core infrastructure codes that directly interact with and affect the image. Key_Cronus_Test=XIP_REGRESS Change-Id: I7e92af04edd10c0994718e476f6e7b77c5d124d6 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/59087 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/common')
-rw-r--r--src/import/chips/common/utils/imageProcs/common_ringId.C820
-rw-r--r--src/import/chips/common/utils/imageProcs/common_ringId.H327
2 files changed, 909 insertions, 238 deletions
diff --git a/src/import/chips/common/utils/imageProcs/common_ringId.C b/src/import/chips/common/utils/imageProcs/common_ringId.C
index c568468f8..d52c92072 100644
--- a/src/import/chips/common/utils/imageProcs/common_ringId.C
+++ b/src/import/chips/common/utils/imageProcs/common_ringId.C
@@ -34,6 +34,7 @@ namespace CEN_RID
};
#include <p9_infrastruct_help.H>
+
// These strings must adhere precisely to the enum of PpeType.
const char* ppeTypeName[] = { "SBE",
"CME",
@@ -75,7 +76,7 @@ static int get_ipl_ring_path_param( RingVariant_t i_ringVariant, char*& o_ringPa
if (o_ringPath == NULL)
{
- MY_ERR("get_ipl_ring_path_param(): IPL env parm for ringVariant=0x%x not set.\n",
+ MY_ERR("get_ipl_ring_path_param(): IPL env parm for ringVariant=%d not set\n",
i_ringVariant);
return INFRASTRUCT_RC_ENV_ERROR;
}
@@ -118,7 +119,7 @@ static int get_runtime_ring_path_param( RingVariant_t i_ringVariant, char*& o_ri
if (o_ringPath == NULL)
{
- MY_ERR("get_runtime_ring_path_param(): RUNTIME env parm for ringVariant=0x%x not set.\n",
+ MY_ERR("get_runtime_ring_path_param(): RUNTIME env parm for ringVariant(=%d) not set\n",
i_ringVariant);
return INFRASTRUCT_RC_ENV_ERROR;
}
@@ -154,8 +155,7 @@ int ringid_get_raw_ring_file_path( uint32_t i_magic,
}
else
{
- MY_ERR("Invalid ringVariant(=%d) for TOR magic=0x%08x\n",
- i_ringVariant, i_magic);
+ MY_ERR("Invalid ringVariant(=%d) for TOR magic=0x%08x\n", i_ringVariant, i_magic);
rc = TOR_INVALID_VARIANT;
}
@@ -186,8 +186,7 @@ int ringid_get_raw_ring_file_path( uint32_t i_magic,
}
else
{
- MY_ERR("Invalid ringVariant(=%d) for TOR magic=0x%08x\n",
- i_ringVariant, i_magic);
+ MY_ERR("Invalid ringVariant(=%d) for TOR magic=0x%08x\n", i_ringVariant, i_magic);
rc = TOR_INVALID_VARIANT;
}
@@ -208,8 +207,7 @@ int ringid_get_raw_ring_file_path( uint32_t i_magic,
}
else
{
- MY_ERR("Invalid ringVariant(=%d) for TOR magic=0x%08x\n",
- i_ringVariant, i_magic);
+ MY_ERR("Invalid ringVariant(=%d) for TOR magic=0x%08x\n", i_ringVariant, i_magic);
rc = TOR_INVALID_VARIANT;
}
@@ -228,7 +226,7 @@ int ringid_get_raw_ring_file_path( uint32_t i_magic,
}
else
{
- MY_ERR("Unsupported value of TOR magic(=0x%X)\n", i_magic);
+ MY_ERR("Unsupported value of TOR magic(=0x%08x)\n", i_magic);
rc = TOR_INVALID_MAGIC_NUMBER;
}
@@ -241,27 +239,26 @@ int ringid_get_raw_ring_file_path( uint32_t i_magic,
#endif // End of ifndef __HOSTBOOT_MODULE
-int ringid_get_noof_ring_ids( ChipType_t i_chipType,
- RingId_t* o_numRingIds)
+int ringid_get_num_ring_ids( ChipId_t i_chipId,
+ RingId_t* o_numRingIds )
{
int rc = INFRASTRUCT_RC_SUCCESS;
- switch (i_chipType)
+ switch (i_chipId)
{
- case CT_P9N:
- case CT_P9C:
- case CT_P9A:
+ case CID_P9N:
+ case CID_P9C:
+ case CID_P9A:
*o_numRingIds = P9_RID::NUM_RING_IDS;
break;
- case CT_CEN:
+ case CID_CEN:
*o_numRingIds = CEN_RID::NUM_RING_IDS;
break;
default:
- MY_ERR("ringid_get_noof_ring_ids(): Unsupported chipType (=%d) supplied",
- i_chipType);
- rc = TOR_INVALID_CHIPTYPE;
+ MY_ERR("ringid_get_num_ring_ids(): Unsupported chipId(=%d) supplied\n", i_chipId);
+ rc = TOR_INVALID_CHIP_ID;
break;
}
@@ -269,116 +266,108 @@ int ringid_get_noof_ring_ids( ChipType_t i_chipType,
}
-int ringid_get_ring_list( ChipType_t i_chipType,
- RingId_t i_ringId,
- GenRingIdList** o_ringIdList)
+int ringid_get_num_chiplets( ChipId_t i_chipId,
+ uint32_t i_torMagic,
+ uint8_t* o_numChiplets )
{
- int rc = INFRASTRUCT_RC_SUCCESS;
-
- switch (i_chipType)
+ switch (i_chipId)
{
- case CT_P9N:
- case CT_P9C:
- case CT_P9A:
- *o_ringIdList = P9_RID::_ringid_get_ring_list(i_ringId);
- break;
-
- case CT_CEN:
- *o_ringIdList = CEN_RID::_ringid_get_ring_list(i_ringId);
- break;
-
- default:
- MY_ERR("ringid_get_ring_list(): Unsupported chipType (=%d) supplied",
- i_chipType);
- rc = TOR_INVALID_CHIPTYPE;
- break;
- }
-
- return rc;
-}
-
-
-int ringid_get_noof_chiplets( ChipType_t i_chipType,
- uint32_t i_torMagic,
- uint8_t* o_numChiplets )
-{
- switch (i_chipType)
- {
- case CT_P9N:
- case CT_P9C:
- case CT_P9A:
+ case CID_P9N:
+ case CID_P9C:
+ case CID_P9A:
if ( i_torMagic == TOR_MAGIC_SBE ||
i_torMagic == TOR_MAGIC_OVRD ||
i_torMagic == TOR_MAGIC_OVLY )
{
- *o_numChiplets = P9_RID::SBE_NOOF_CHIPLETS;
+ *o_numChiplets = P9_RID::SBE_NUM_CHIPLETS;
}
else if ( i_torMagic == TOR_MAGIC_CME )
{
- *o_numChiplets = P9_RID::CME_NOOF_CHIPLETS;
+ *o_numChiplets = P9_RID::CME_NUM_CHIPLETS;
}
else if ( i_torMagic == TOR_MAGIC_SGPE )
{
- *o_numChiplets = P9_RID::SGPE_NOOF_CHIPLETS;
+ *o_numChiplets = P9_RID::SGPE_NUM_CHIPLETS;
}
else
{
- MY_ERR("Invalid torMagic (=0x%08x) for chipType (=CT_P9x=%d)\n", i_torMagic, i_chipType);
+ MY_ERR("ringid_get_num_chiplets(): Invalid torMagic(=0x%08x) for chipId(=CID_P9x=%d)\n", i_torMagic, i_chipId);
return TOR_INVALID_MAGIC_NUMBER;
}
break;
- case CT_CEN:
+ case CID_CEN:
if ( i_torMagic == TOR_MAGIC_CEN ||
i_torMagic == TOR_MAGIC_OVRD )
{
- *o_numChiplets = CEN_RID::CEN_NOOF_CHIPLETS;
+ *o_numChiplets = CEN_RID::CEN_NUM_CHIPLETS;
}
else
{
- MY_ERR("Invalid torMagic (=0x%08x) for chipType (=CT_CEN)\n", i_torMagic);
+ MY_ERR("Invalid torMagic(=0x%08x) for chipId(=CID_CEN)\n", i_torMagic);
return TOR_INVALID_MAGIC_NUMBER;
}
break;
default:
- MY_ERR("Invalid chipType (=0x%02x)\n", i_chipType);
- return TOR_INVALID_CHIPTYPE;
+ MY_ERR("Invalid chipId(=%d)\n", i_chipId);
+ return TOR_INVALID_CHIP_ID;
}
return TOR_SUCCESS;
}
-int ringid_get_properties( ChipType_t i_chipType,
- uint32_t i_torMagic,
- uint8_t i_torVersion,
- ChipletType_t i_chipletType,
- ChipletData_t** o_chipletData,
- GenRingIdList** o_ringIdListCommon,
- GenRingIdList** o_ringIdListInstance,
- RingVariantOrder** o_ringVariantOrder,
- RingProperties_t** o_ringProps,
- uint8_t* o_numVariants )
+int ringid_get_ringProps( ChipId_t i_chipId,
+ RingProperties_t** o_ringProps )
+{
+ int rc = INFRASTRUCT_RC_SUCCESS;
+
+ switch (i_chipId)
+ {
+ case CID_P9N:
+ case CID_P9C:
+ case CID_P9A:
+ *o_ringProps = (RingProperties_t*)&P9_RID::RING_PROPERTIES;
+ break;
+
+ case CID_CEN:
+ *o_ringProps = (RingProperties_t*)&CEN_RID::RING_PROPERTIES;
+ break;
+
+ default:
+ MY_ERR("ringid_get_ringProps(): Unsupported chipId (=%d) supplied\n", i_chipId);
+ rc = TOR_INVALID_CHIP_ID;
+ break;
+ }
+
+ return rc;
+}
+
+
+int ringid_get_chipletProps( ChipId_t i_chipId,
+ uint32_t i_torMagic,
+ uint8_t i_torVersion,
+ ChipletType_t i_chipletType,
+ ChipletData_t** o_chipletData,
+ uint8_t* o_numVariants )
{
- switch (i_chipType)
+ switch (i_chipId)
{
- case CT_P9N:
- case CT_P9C:
- case CT_P9A:
+ case CID_P9N:
+ case CID_P9C:
+ case CID_P9A:
if ( i_torMagic == TOR_MAGIC_SBE ||
i_torMagic == TOR_MAGIC_OVRD ||
i_torMagic == TOR_MAGIC_OVLY )
{
P9_RID::ringid_get_chiplet_properties(
i_chipletType,
- o_chipletData,
- o_ringIdListCommon,
- o_ringIdListInstance,
- o_ringVariantOrder,
- o_numVariants);
+ o_chipletData);
+
+ *o_numVariants = (*o_chipletData)->numCommonRingVariants;
if ( i_torVersion < 7 &&
(i_chipletType == P9_RID::EQ_TYPE || i_chipletType == P9_RID::EC_TYPE) )
@@ -395,10 +384,7 @@ int ringid_get_properties( ChipType_t i_chipType,
else if ( i_torMagic == TOR_MAGIC_CME )
{
*o_chipletData = (ChipletData_t*)&P9_RID::EC::g_chipletData;
- *o_ringIdListCommon = (GenRingIdList*)P9_RID::EC::RING_ID_LIST_COMMON;
- *o_ringIdListInstance = (GenRingIdList*)P9_RID::EC::RING_ID_LIST_INSTANCE;
- *o_ringVariantOrder = (RingVariantOrder*)P9_RID::EC::RING_VARIANT_ORDER;
- *o_numVariants = P9_RID::EC::g_chipletData.iv_num_common_ring_variants;
+ *o_numVariants = (*o_chipletData)->numCommonRingVariants;
if (i_torVersion < 7)
{
@@ -408,10 +394,7 @@ int ringid_get_properties( ChipType_t i_chipType,
else if ( i_torMagic == TOR_MAGIC_SGPE )
{
*o_chipletData = (ChipletData_t*)&P9_RID::EQ::g_chipletData;
- *o_ringIdListCommon = (GenRingIdList*)P9_RID::EQ::RING_ID_LIST_COMMON;
- *o_ringIdListInstance = (GenRingIdList*)P9_RID::EQ::RING_ID_LIST_INSTANCE;
- *o_ringVariantOrder = (RingVariantOrder*)P9_RID::EQ::RING_VARIANT_ORDER;
- *o_numVariants = P9_RID::EQ::g_chipletData.iv_num_common_ring_variants;
+ *o_numVariants = (*o_chipletData)->numCommonRingVariants;
if (i_torVersion < 7)
{
@@ -420,25 +403,21 @@ int ringid_get_properties( ChipType_t i_chipType,
}
else
{
- MY_ERR("Invalid torMagic (=0x%08x) for chipType=CT_P9x=%d\n", i_torMagic, i_chipType);
+ MY_ERR("Invalid torMagic(=0x%08x) for chipId=CID_P9x=%d\n", i_torMagic, i_chipId);
return TOR_INVALID_MAGIC_NUMBER;
}
- *o_ringProps = (RingProperties_t*)P9_RID::RING_PROPERTIES;
-
break;
- case CT_CEN:
+ case CID_CEN:
if ( i_torMagic == TOR_MAGIC_CEN ||
i_torMagic == TOR_MAGIC_OVRD )
{
CEN_RID::ringid_get_chiplet_properties(
i_chipletType,
- o_chipletData,
- o_ringIdListCommon,
- o_ringIdListInstance,
- o_ringVariantOrder,
- o_numVariants);
+ o_chipletData);
+
+ *o_numVariants = (*o_chipletData)->numCommonRingVariants;
if ( i_torMagic == TOR_MAGIC_OVRD)
{
@@ -447,19 +426,650 @@ int ringid_get_properties( ChipType_t i_chipType,
}
else
{
- MY_ERR("Invalid torMagic (=0x%08x) for chipType=CT_CEN\n", i_torMagic);
+ MY_ERR("Invalid torMagic(=0x%08x) for chipId=CID_CEN\n", i_torMagic);
return TOR_INVALID_MAGIC_NUMBER;
}
- *o_ringProps = (RingProperties_t*)CEN_RID::RING_PROPERTIES;
-
break;
default:
- MY_ERR("Invalid chipType (=0x%02x)\n", i_chipType);
- return TOR_INVALID_CHIPTYPE;
+ MY_ERR("Invalid chipId(=%d)\n", i_chipId);
+ return TOR_INVALID_CHIP_ID;
}
return TOR_SUCCESS;
}
+
+
+int ringid_get_scanScomAddr( ChipId_t i_chipId,
+ RingId_t i_ringId,
+ uint32_t* o_scanScomAddr )
+{
+ int rc = INFRASTRUCT_RC_SUCCESS;
+ uint32_t l_scanScomAddr = UNDEFINED_SCOM_ADDR;
+
+ switch (i_chipId)
+ {
+ case CID_P9N:
+ case CID_P9C:
+ case CID_P9A:
+ if (i_ringId >= P9_RID::NUM_RING_IDS)
+ {
+ MY_ERR("ringid_get_scanScomAddr(): ringId(=0x%x) >= NUM_RING_IDS(=0x%x) not"
+ " allowed\n",
+ i_ringId, P9_RID::NUM_RING_IDS);
+ rc = TOR_INVALID_RING_ID;
+ break;
+ }
+
+ l_scanScomAddr = P9_RID::RING_PROPERTIES[i_ringId].scanScomAddr;
+ break;
+
+ case CID_CEN:
+ if (i_ringId >= CEN_RID::NUM_RING_IDS)
+ {
+ MY_ERR("ringid_get_scanScomAddr(): ringId(=0x%x) >= NUM_RING_IDS(=0x%x) not"
+ " allowed\n",
+ i_ringId, CEN_RID::NUM_RING_IDS);
+ rc = TOR_INVALID_RING_ID;
+ break;
+ }
+
+ l_scanScomAddr = CEN_RID::RING_PROPERTIES[i_ringId].scanScomAddr;
+ break;
+
+ default:
+ MY_ERR("ringid_get_scanScomAddr(): Unsupported chipId (=%d) supplied\n", i_chipId);
+ rc = TOR_INVALID_CHIP_ID;
+ break;
+ }
+
+ *o_scanScomAddr = l_scanScomAddr;
+
+ return rc;
+}
+
+
+int ringid_get_ringClass( ChipId_t i_chipId,
+ RingId_t i_ringId,
+ RingClass_t* o_ringClass )
+{
+ int rc = INFRASTRUCT_RC_SUCCESS;
+ RingClass_t l_ringClass = UNDEFINED_RING_CLASS;
+
+ switch (i_chipId)
+ {
+ case CID_P9N:
+ case CID_P9C:
+ case CID_P9A:
+ if (i_ringId >= P9_RID::NUM_RING_IDS)
+ {
+ MY_ERR("ringid_get_ringClass(): ringId(=0x%x) >= NUM_RING_IDS(=0x%x) not allowed\n",
+ i_ringId, P9_RID::NUM_RING_IDS);
+ rc = TOR_INVALID_RING_ID;
+ break;
+ }
+
+ l_ringClass = P9_RID::RING_PROPERTIES[i_ringId].ringClass;
+ break;
+
+ case CID_CEN:
+ if (i_ringId >= CEN_RID::NUM_RING_IDS)
+ {
+ MY_ERR("ringid_get_ringClass(): ringId(=0x%x) >= NUM_RING_IDS(=0x%x) not allowed\n",
+ i_ringId, CEN_RID::NUM_RING_IDS);
+ rc = TOR_INVALID_RING_ID;
+ break;
+ }
+
+ l_ringClass = CEN_RID::RING_PROPERTIES[i_ringId].ringClass;
+ break;
+
+ default:
+ MY_ERR("ringid_get_ringClass(): Unsupported chipId (=%d) supplied\n", i_chipId);
+ rc = TOR_INVALID_CHIP_ID;
+ break;
+ }
+
+ *o_ringClass = l_ringClass;
+
+ return rc;
+}
+
+
+int ringid_check_ringId( ChipId_t i_chipId,
+ RingId_t i_ringId )
+{
+ int rc = INFRASTRUCT_RC_SUCCESS;
+
+ switch (i_chipId)
+ {
+ case CID_P9N:
+ case CID_P9C:
+ case CID_P9A:
+ if ( i_ringId >= P9_RID::NUM_RING_IDS && i_ringId != UNDEFINED_RING_ID )
+ {
+ MY_ERR("ringid_check_ringId(): ringId(=0x%x) >= NUM_RING_IDS(=0x%x) not allowed\n",
+ i_ringId, P9_RID::NUM_RING_IDS);
+ rc = TOR_INVALID_RING_ID;
+ break;
+ }
+
+ break;
+
+ case CID_CEN:
+ if ( i_ringId >= CEN_RID::NUM_RING_IDS && i_ringId != UNDEFINED_RING_ID )
+ {
+ MY_ERR("ringid_check_ringId(): ringId(=0x%x) >= NUM_RING_IDS(=0x%x) not allowed\n",
+ i_ringId, CEN_RID::NUM_RING_IDS);
+ rc = TOR_INVALID_RING_ID;
+ break;
+ }
+
+ break;
+
+ default:
+ MY_ERR("ringid_check_ringId(): Unsupported chipId (=%d) supplied\n", i_chipId);
+ rc = TOR_INVALID_CHIP_ID;
+ break;
+ }
+
+ return rc;
+}
+
+
+int ringid_get_chipletIndex( ChipId_t i_chipId,
+ uint32_t i_torMagic,
+ ChipletType_t i_chipletType,
+ ChipletType_t* o_chipletIndex )
+{
+ int rc = INFRASTRUCT_RC_SUCCESS;
+
+ switch (i_chipId)
+ {
+ case CID_P9N:
+ case CID_P9C:
+ case CID_P9A:
+ if ( i_torMagic == TOR_MAGIC_SBE ||
+ i_torMagic == TOR_MAGIC_OVRD ||
+ i_torMagic == TOR_MAGIC_OVLY )
+ {
+ if ( i_chipletType < P9_RID::SBE_NUM_CHIPLETS )
+ {
+ *o_chipletIndex = i_chipletType;
+ }
+ else
+ {
+ rc = TOR_INVALID_CHIPLET_TYPE;
+ }
+ }
+ else if ( i_torMagic == TOR_MAGIC_CME )
+ {
+ if ( i_chipletType == P9_RID::EC_TYPE )
+ {
+ *o_chipletIndex = 0;
+ }
+ else
+ {
+ rc = TOR_INVALID_CHIPLET_TYPE;
+ }
+ }
+ else if ( i_torMagic == TOR_MAGIC_SGPE )
+ {
+ if ( i_chipletType == P9_RID::EQ_TYPE )
+ {
+ *o_chipletIndex = 0;
+ }
+ else
+ {
+ rc = TOR_INVALID_CHIPLET_TYPE;
+ }
+ }
+ else
+ {
+ MY_ERR("Invalid torMagic(=0x%08x) for chipId=CID_P9x=%d\n", i_torMagic, i_chipId);
+ return TOR_INVALID_MAGIC_NUMBER;
+ }
+
+ break;
+
+ case CID_CEN:
+ if ( i_torMagic == TOR_MAGIC_CEN ||
+ i_torMagic == TOR_MAGIC_OVRD )
+ {
+ if ( i_chipletType < CEN_RID::CEN_NUM_CHIPLETS )
+ {
+ *o_chipletIndex = i_chipletType;
+ }
+ else
+ {
+ rc = TOR_INVALID_CHIPLET_TYPE;
+ }
+ }
+ else
+ {
+ MY_ERR("Invalid torMagic(=0x%08x) for chipId=CID_CEN\n", i_torMagic);
+ return TOR_INVALID_MAGIC_NUMBER;
+ }
+
+ break;
+
+ default:
+ MY_ERR("ringid_get_chipletIndex(): Unsupported chipId (=%d) supplied\n", i_chipId);
+ rc = TOR_INVALID_CHIP_ID;
+ break;
+ }
+
+ return rc;
+}
+
+
+#if !defined(__PPE__) && !defined(NO_STD_LIB_IN_PPE) && !defined(__HOSTBOOT_MODULE) && !defined(FIPSODE)
+
+// The following defines are needed by the initCompiler and so it's practical to use C++
+// features.
+
+// ** Important **
+// If updates are made to the below three maps, corresponding updates to the two
+// maps in ./tools/ifCompiler/initCompiler/initCompiler.y may also have to be made.
+// @TODO: RTC192378
+// For P10 we should have just the two maps from initCompiler.y. And they should
+// be located in central place like ./chips/common/utils/imageProcs/infrastructure.
+
+// Mapping from our [InfraStructure's} chipId to the chipType name
+std::map <ChipId_t, std::string> chipIdIsMap
+{
+ { UNDEFINED_CHIP_ID, "" },
+ { (ChipId_t)CID_CEN, "cen" },
+ { (ChipId_t)CID_P9N, "p9n" },
+ { (ChipId_t)CID_P9C, "p9c" },
+ { (ChipId_t)CID_P9A, "p9a" }
+};
+
+// Mapping from chipType name to our [InfraStructure's} chipId (revers of above map)
+std::map <std::string, ChipId_t> chipTypeIsMap
+{
+ { "", UNDEFINED_CHIP_ID },
+ { "cen", (ChipId_t)CID_CEN },
+ { "p9n", (ChipId_t)CID_P9N },
+ { "p9c", (ChipId_t)CID_P9C },
+ { "p9a", (ChipId_t)CID_P9A }
+};
+
+// Mapping from InitCompiler's chipId to InfraStructure's chipId
+std::map <uint8_t, ChipId_t> chipIdIcToIsMap
+{
+ { 0x0, UNDEFINED_CHIP_ID },
+ { 0x3, (ChipId_t)CID_CEN },
+ { 0x5, (ChipId_t)CID_P9N },
+ { 0x6, (ChipId_t)CID_P9C },
+ { 0x7, (ChipId_t)CID_P9A }
+};
+
+int ringidGetRootRingId( ChipId_t i_chipId,
+ uint32_t i_scanScomAddr,
+ RingId_t& o_ringId,
+ bool i_bTest )
+{
+ int rc = INFRASTRUCT_RC_SUCCESS;
+ RingProperties_t* ringProps = NULL;
+ RingId_t numRingIds = UNDEFINED_RING_ID;
+ RingId_t iRingId = UNDEFINED_RING_ID; // ringId loop counter
+ RingId_t l_ringId = UNDEFINED_RING_ID;
+ bool bFound = false;
+
+ switch (i_chipId)
+ {
+ case CID_P9N:
+ case CID_P9C:
+ case CID_P9A:
+ ringProps = (RingProperties_t*)&P9_RID::RING_PROPERTIES;
+ numRingIds = P9_RID::NUM_RING_IDS;
+ break;
+
+ case CID_CEN:
+ ringProps = (RingProperties_t*)&CEN_RID::RING_PROPERTIES;
+ numRingIds = CEN_RID::NUM_RING_IDS;
+ break;
+
+ default:
+ MY_ERR("ringidGetRootRingId(): Unsupported chipId (=%d) supplied\n", i_chipId);
+ rc = TOR_INVALID_CHIP_ID;
+ break;
+ }
+
+ if (!rc)
+ {
+ for ( iRingId = 0; iRingId < numRingIds; iRingId++ )
+ {
+ if ( ringProps[iRingId].scanScomAddr == i_scanScomAddr )
+ {
+ if ( ringProps[iRingId].ringClass & RCLS_ROOT_RING )
+ {
+ if (bFound)
+ {
+ MY_ERR("ringidGetRootRingId(): Two rings w/same addr cannot both be"
+ " ROOT_RING. Fix RING_PROPERTIES list for chipId=%d at ringId=0x%x"
+ " and ringId=0x%x\n",
+ i_chipId, l_ringId, iRingId);
+ rc = INFRASTRUCT_RC_CODE_BUG;
+ l_ringId = UNDEFINED_RING_ID;
+ break;
+ }
+ else
+ {
+ l_ringId = iRingId;
+ bFound = true;
+
+ if (!i_bTest)
+ {
+ // Stop testing and break out of ringId loop
+ break;
+ }
+
+ // Continue testing to see if duplicate root rings found
+ }
+ }
+ }
+ }
+ }
+
+ if (!rc && !bFound)
+ {
+ MY_DBG("ringidGetRootRingId(): Did not find match for scanScomAddr=0x%08x for chipId=%d."
+ " (Note, l_ringId=0x%x better be equal to UNDEFINED_RING_ID=0x%x)\n",
+ i_scanScomAddr, i_chipId, l_ringId, UNDEFINED_RING_ID);
+ rc = TOR_SCOM_ADDR_NOT_FOUND;
+ }
+
+ o_ringId = l_ringId;
+
+ return rc;
+}
+
+
+int ringidGetRingId1( ChipId_t i_chipId,
+ std::string i_ringName,
+ RingId_t& o_ringId,
+ bool i_bTest )
+{
+ int rc = INFRASTRUCT_RC_SUCCESS;
+ RingProperties_t* ringProps = NULL;
+ RingId_t numRingIds = UNDEFINED_RING_ID;
+ RingId_t iRingId = UNDEFINED_RING_ID; // ringId loop counter
+ RingId_t l_ringId = UNDEFINED_RING_ID;
+ bool bFound = false;
+
+ switch (i_chipId)
+ {
+ case CID_P9N:
+ case CID_P9C:
+ case CID_P9A:
+ ringProps = (RingProperties_t*)&P9_RID::RING_PROPERTIES;
+ numRingIds = P9_RID::NUM_RING_IDS;
+ break;
+
+ case CID_CEN:
+ ringProps = (RingProperties_t*)&CEN_RID::RING_PROPERTIES;
+ numRingIds = CEN_RID::NUM_RING_IDS;
+ break;
+
+ default:
+ MY_ERR("ringidGetRingId1(): Unsupported chipId (=%d) supplied\n", i_chipId);
+ rc = TOR_INVALID_CHIP_ID;
+ break;
+ }
+
+ if (!rc)
+ {
+ for ( iRingId = 0; iRingId < numRingIds; iRingId++ )
+ {
+ if ( !(i_ringName.compare(ringProps[iRingId].ringName)) )
+ {
+ if (bFound)
+ {
+ MY_ERR("ringidGetRingId1(): Two rings cannot have the same ringName=%s. Fix"
+ " RING_PROPERTIES list for chipId=%d at ringId=0x%x and ringId=0x%x\n",
+ i_ringName.c_str(), i_chipId, l_ringId, iRingId);
+ rc = INFRASTRUCT_RC_CODE_BUG;
+ l_ringId = UNDEFINED_RING_ID;
+ break;
+ }
+ else
+ {
+ l_ringId = iRingId;
+ bFound = true;
+
+ if (!i_bTest)
+ {
+ // Stop testing and break our of ringId loop
+ break;
+ }
+
+ // Continue testing to see if duplicate ringNames found
+ }
+ }
+ }
+ }
+
+ if (!rc && !bFound)
+ {
+ MY_DBG("ringidGetRingId1(): Did not find match to ringName=%s for chipId=%d."
+ " (Note, l_ringId=0x%x better be equal to UNDEFINED_RING_ID=0x%x)\n",
+ i_ringName.c_str(), i_chipId, l_ringId, UNDEFINED_RING_ID);
+ rc = TOR_RING_NAME_NOT_FOUND;
+ }
+
+ o_ringId = l_ringId;
+
+ return rc;
+}
+
+
+int ringidGetRingId2( ChipId_t i_chipId,
+ uint32_t i_torMagic,
+ ChipletType_t i_chipletType, // Ignored if only one chiplet in torMagic
+ uint8_t i_idxRing, // The effective ring index within chiplet's
+ // common or instance ring section
+ MyBool_t i_bInstCase,
+ RingId_t& o_ringId,
+ bool i_bTest )
+{
+ int rc = INFRASTRUCT_RC_SUCCESS;
+ ChipletType_t l_chipletType = UNDEFINED_CHIPLET_TYPE;
+ RingProperties_t* ringProps = NULL;
+ RingId_t numRingIds = UNDEFINED_RING_ID;
+ RingId_t iRingId = UNDEFINED_RING_ID; // ringId loop counter
+ RingId_t l_ringId = UNDEFINED_RING_ID;
+ uint8_t l_idxRing = INVALID_RING_OFFSET;
+ bool bFound = false;
+ bool bOverlap = false;
+
+ // First, select the main ring list we need (P9's or Centaur's). And while we're at it,
+ // convert input chipletType, which can be ignored for ring sections (i.e. torMagic)
+ // with only one chiplet, to a valid chipletType
+ switch (i_chipId)
+ {
+ case CID_P9N:
+ case CID_P9C:
+ case CID_P9A:
+ ringProps = (RingProperties_t*)&P9_RID::RING_PROPERTIES;
+ numRingIds = P9_RID::NUM_RING_IDS;
+
+ if ( i_torMagic == TOR_MAGIC_SBE ||
+ i_torMagic == TOR_MAGIC_OVRD ||
+ i_torMagic == TOR_MAGIC_OVLY )
+ {
+ l_chipletType = i_chipletType;
+ }
+ else if ( i_torMagic == TOR_MAGIC_CME )
+ {
+ l_chipletType = P9_RID::EC_TYPE;
+ }
+ else if ( i_torMagic == TOR_MAGIC_SGPE )
+ {
+ l_chipletType = P9_RID::EQ_TYPE;
+ }
+ else
+ {
+ MY_ERR("Invalid torMagic(=0x%08x) for chipId=CID_P9x=%d\n", i_torMagic, i_chipId);
+ return TOR_INVALID_MAGIC_NUMBER;
+ }
+
+ break;
+
+ case CID_CEN:
+ ringProps = (RingProperties_t*)&CEN_RID::RING_PROPERTIES;
+ numRingIds = CEN_RID::NUM_RING_IDS;
+
+ if ( i_torMagic == TOR_MAGIC_CEN ||
+ i_torMagic == TOR_MAGIC_OVRD )
+ {
+ l_chipletType = CEN_RID::CEN_TYPE;
+ }
+ else
+ {
+ MY_ERR("Invalid torMagic(=0x%08x) for chipId=CID_CEN\n", i_torMagic);
+ return TOR_INVALID_MAGIC_NUMBER;
+ }
+
+ break;
+
+ default:
+ MY_ERR("ringidGetRingId2(): Unsupported chipId (=%d) supplied\n", i_chipId);
+ rc = TOR_INVALID_CHIP_ID;
+ break;
+ }
+
+ // Second, convert effective input ring index (which has no instance marker) to the
+ // common/instance specific index
+ l_idxRing = i_bInstCase ?
+ i_idxRing | INSTANCE_RING_MARK :
+ i_idxRing;
+
+ if (!rc)
+ {
+ for ( iRingId = 0; iRingId < numRingIds; iRingId++ )
+ {
+ if ( ringProps[iRingId].chipletType == l_chipletType &&
+ ringProps[iRingId].idxRing == l_idxRing )
+ {
+ if (bFound)
+ {
+ // Allow ring index overlap between a root and a non-root ring
+ // and let the non-root (i.e., the bucket ring) "win"
+ if ( !bOverlap &&
+ ( (ringProps[iRingId].ringClass & RCLS_ROOT_RING) !=
+ (ringProps[l_ringId].ringClass & RCLS_ROOT_RING) ) )
+ {
+ if ( (ringProps[iRingId].ringClass & RCLS_ROOT_RING) != RCLS_ROOT_RING )
+ {
+ l_ringId = iRingId;
+ }
+ else
+ {
+ // Keep l_ringId as is since it must already be the non-root ring
+ }
+
+ bOverlap = true; // Indicate we found an overlap match
+
+ if (!i_bTest)
+ {
+ // Stop testing and break our of ringId loop
+ break;
+ }
+ }
+ else
+ {
+ MY_ERR("ringidGetRingId2(): Two root, or two non-root, rings within a"
+ " chiplet (chipletType=%d) cannot have the same ring index"
+ " (idxRing=%d, bInst=%d). Fix RING_PROPERTIES list for chipId=%d"
+ " at ringId=0x%x and ringId=0x%x\n",
+ l_chipletType, i_idxRing, i_bInstCase, i_chipId, l_ringId, iRingId);
+ rc = INFRASTRUCT_RC_CODE_BUG;
+ l_ringId = UNDEFINED_RING_ID;
+ break;
+ }
+ }
+ else
+ {
+ l_ringId = iRingId;
+ bFound = true; // Indicate we found a first match
+
+ // Continue searching for ring index overlap due to bucket ring or code bug
+ }
+ }
+ }
+ }
+
+ if (!rc && !bFound)
+ {
+ MY_ERR("ringidGetRingId2(): Could not find a match for (chipId,chipletType,idxRing,bInst) ="
+ " (%d, %d, %d, %d). Fix RING_PROPERTIES list for chipId=%d (Note, l_ringId=0x%x"
+ " better be equal to UNDEFINED_RING_ID=0x%x)\n",
+ i_chipId, l_chipletType, i_idxRing, i_bInstCase,
+ i_chipId, l_ringId, UNDEFINED_RING_ID);
+ rc = INFRASTRUCT_RC_CODE_BUG;
+ }
+
+ o_ringId = l_ringId;
+
+ return rc;
+}
+
+
+int ringidGetRingName( ChipId_t i_chipId,
+ RingId_t i_ringId,
+ std::string& o_ringName )
+{
+ int rc = INFRASTRUCT_RC_SUCCESS;
+ std::string l_ringName;
+
+ switch (i_chipId)
+ {
+ case CID_P9N:
+ case CID_P9C:
+ case CID_P9A:
+ if (i_ringId >= P9_RID::NUM_RING_IDS)
+ {
+ MY_ERR("ringidGetRingName(): ringId(=0x%x) >= NUM_RING_IDS(=0x%x) not allowed\n",
+ i_ringId, P9_RID::NUM_RING_IDS);
+ rc = TOR_INVALID_RING_ID;
+ break;
+ }
+
+ l_ringName = (std::string)P9_RID::RING_PROPERTIES[i_ringId].ringName;
+ break;
+
+ case CID_CEN:
+ if (i_ringId >= CEN_RID::NUM_RING_IDS)
+ {
+ MY_ERR("ringidGetRingName(): ringId(=0x%x) >= NUM_RING_IDS(=0x%x) not allowed\n",
+ i_ringId, CEN_RID::NUM_RING_IDS);
+ rc = TOR_INVALID_RING_ID;
+ break;
+ }
+
+ l_ringName = (std::string)CEN_RID::RING_PROPERTIES[i_ringId].ringName;
+ break;
+
+ default:
+ MY_ERR("ringidGetRingName(): Unsupported chipId (=%d) supplied\n", i_chipId);
+ rc = TOR_INVALID_CHIP_ID;
+ break;
+ }
+
+ o_ringName = l_ringName;
+
+ return rc;
+}
+
+int ringidGetRingClass( ChipId_t i_chipId,
+ RingId_t i_ringId,
+ RingClass_t& o_ringClass )
+{
+ return (ringid_get_ringClass(i_chipId, i_ringId, &o_ringClass));
+}
+
+#endif // __PPE__ && NO_STD_LIB_IN_PPE
diff --git a/src/import/chips/common/utils/imageProcs/common_ringId.H b/src/import/chips/common/utils/imageProcs/common_ringId.H
index bef223357..de23bea0a 100644
--- a/src/import/chips/common/utils/imageProcs/common_ringId.H
+++ b/src/import/chips/common/utils/imageProcs/common_ringId.H
@@ -42,21 +42,24 @@
// INFRASTRUCT TEAM. (These defs affect packing assumptions
// of ring structures that go into the image ringSections.)
typedef uint16_t RingId_t; // Type for RingID enum
-typedef uint8_t ChipletType_t; // Type for CHIPLET_TYPE enum
-typedef uint8_t PpeType_t; // Type for PpeType
-typedef uint8_t ChipType_t; // Type for ChipType enum
+typedef uint16_t RingClass_t; // Type for RingClass enum vectors used in non-SBE
+typedef uint8_t ChipletType_t; // Type for Chiplets enum
+typedef uint8_t PpeType_t; // Type for PpeType enum
+typedef uint8_t ChipId_t; // Type for ChipId enum
typedef uint8_t RingType_t; // Type for RingType enum
typedef uint8_t RingVariant_t; // Type for RingVariant enum
typedef uint8_t RingBlockType_t; // Type for RingBlockType enum, e.g. GET_SINGLE_RING
typedef uint32_t TorCpltOffset_t; // Type for offset value to chiplet's CMN or INST section
typedef uint8_t MyBool_t; // false:0, true:1, undefined:UNDEFINED_BOOLEAN
-#define UNDEFINED_RING_ID (RingId_t)0xffff
-#define UNDEFINED_CHIPLET_TYPE (ChipletType_t)0xff
-#define UNDEFINED_PPE_TYPE (PpeType_t)0xff
-#define UNDEFINED_CHIP_TYPE (ChipType_t)0xff
-#define INVALID_RING_TYPE (RingType_t)0xff
-#define UNDEFINED_RING_VARIANT (RingVariant_t)0xff
+#define UNDEFINED_RING_ID (RingId_t)0xffff
+#define UNDEFINED_SCOM_ADDR (uint32_t)0xffffffff
+#define UNDEFINED_RING_CLASS (RingClass_t)0xffff
+#define UNDEFINED_CHIPLET_TYPE (ChipletType_t)0xff
+#define UNDEFINED_PPE_TYPE (PpeType_t)0xff
+#define UNDEFINED_CHIP_ID (ChipId_t)0xff
+#define INVALID_RING_TYPE (RingType_t)0xff
+#define UNDEFINED_RING_VARIANT (RingVariant_t)0xff
#define UNDEFINED_RING_BLOCK_TYPE (RingBlockType_t)0xff;
#define UNDEFINED_DD_LEVEL (uint8_t)0xff
@@ -82,12 +85,12 @@ typedef uint8_t MyBool_t; // false:0, true:1, undefined:UNDEFINED_BOOL
//
typedef struct
{
- uint32_t magic; // =TOR_MAGIC_xyz
- uint8_t version; // =TOR version
- ChipType_t chipType; // Value from ChipType enum
- uint8_t ddLevel; // Actual DD level of ringSection
- uint8_t undefined;
- uint32_t size; // Size of ringSection.
+ uint32_t magic; // =TOR_MAGIC_xyz
+ uint8_t version; // =TOR_VERSION
+ ChipId_t chipId; // Value from ChipId enum
+ uint8_t ddLevel; // Actual DD level of ringSection
+ uint8_t undefined;
+ uint32_t size; // Size of ringSection.
} TorHeader_t;
//
@@ -145,57 +148,39 @@ enum TorMagicNum
//
// Chip types and List to represent p9n, p9c, p9a, cen (centaur)
//
-enum ChipType
+enum ChipId
{
- CT_P9N,
- CT_P9C,
- CT_P9A,
- CT_CEN,
- NUM_CHIP_TYPES
+ CID_P9N,
+ CID_P9C,
+ CID_P9A,
+ CID_CEN,
+ NUM_CHIP_IDS = 4
};
-typedef struct
-{
- const char* name;
- ChipType_t type;
-} ChipTypeList_t;
-
-static const ChipTypeList_t CHIP_TYPE_LIST[] =
-{
- {"p9n", CT_P9N},
- {"p9c", CT_P9C},
- {"p9a", CT_P9A},
- {"cen", CT_CEN},
-};
-
-
-//
-// Ring related data structs and types
-//
-typedef enum RingClass
-{
- EKB_RING,
- EKB_FSM_RING,
- EKB_STUMPED_RING,
- EKB_CMSK_RING,
- EKB_NONFLUSH_RING,
- VPD_RING,
- CEN_RING,
- NUM_RING_CLASSES
-} RingClass_t;
-
//
-// General Ring ID list structure
+// Ring classes
+// - Specified whether root ring: ROOT (only applied in RING_PROPERTIES list)
+// - Specifies origination repo: EKB or MVPD
+// - Specifies chip ID: P9 or Centaur
+// - Specifies MVPD subclass: #G or #R
+// - Specifies flush status assumption: Flushed or non-flushed (prev scanned)
+// - Specifies various special ring classes: FSM, OVLY, STUMPED, CMSK
//
-typedef struct
+enum RingClass
{
- const char* ringName;
- RingId_t ringId;
- uint8_t instanceIdMin;
- uint8_t instanceIdMax;
- RingClass_t ringClass;
- uint32_t scanScomAddress;
-} GenRingIdList;
+ RCLS_ROOT_RING = 0b0000000000000001, // ENGD root ring marker bit
+ RCLS_FLUSH_RING = 0b0000000000000010, // Flush-scan marker bit
+ RCLS_NONFLUSH_RING = 0b0000000000000100, // Nonflush-scan marker bit
+ RCLS_EKB_FLUSH_RING = 0b0000000000001010, // EKB P9 ring. Flush-scanned
+ RCLS_EKB_NONFLUSH_RING = 0b0000000000001100, // EKB P9 ring. Nonflush-scanned
+ RCLS_MVPD_PDG_RING = 0b0000000000010010, // MVPD #G P9 ring. Flush-scanned
+ RCLS_MVPD_PDR_RING = 0b0000000000100010, // MVPD #R P9 ring. Flush-scanned
+ RCLS_EKB_CEN_RING = 0b0000000001000010, // EKB Cen ring. Flush-scanned
+ RCLS_EKB_FSM_RING = 0b0000000010000110, // EKB P9 ring for eq_ana_bndy. Mixed-scanned
+ RCLS_EKB_OVLY_RING = 0b0000000100010010, // EKB P9 ovly for MVPD GPTR ring. Flush-scanned
+ RCLS_EKB_STUMPED_RING = 0b0000001000000010, // EKB P9 CMSK stump ring. Flush-scanned
+ RCLS_EKB_CMSK_RING = 0b0000010000000010, // EKB P9 CMSK ring. Flush-scanned
+};
// PPE types supported.
// - This enum also reflects the order with which they appear in the HW image's .rings section.
@@ -223,16 +208,6 @@ enum RingVariant
NUM_RING_VARIANTS = 0x07,
};
-extern const char* ppeTypeName[];
-extern const char* ringVariantName[];
-
-// Variant order for Common rings
-typedef struct
-{
- RingVariant_t variant[NUM_RING_VARIANTS];
-} RingVariantOrder;
-
-
// Ring types supported.
// - This enum also reflects the order with which they appear in various images' .rings section.
// - Do NOT make changes to the values or order of this enum.
@@ -250,44 +225,53 @@ enum RingBlockType
PUT_SINGLE_RING = 0x02
};
-typedef struct
-{
- // Chiplet ID of the first instance of the Chiplet
- uint8_t iv_base_chiplet_number;
-
- // Number of common rings for the Chiplet
- uint8_t iv_num_common_rings;
+extern const char* ppeTypeName[];
+extern const char* ringVariantName[];
- // Number of instance rings for the Chiplet (w/different ringId values)
- uint8_t iv_num_instance_rings;
- // Number of instance rings for the Chiplet (w/different ringId values
- // AND different scanAddress values)
- uint8_t iv_num_instance_rings_scan_addrs;
+//
+// Main ring properties structure
+// - This structure is the basis for the RING_PROPERTIES list (further below) which, through the
+// enumerated ringId index, associates (ringId, ringName, scanScomAddr, torOffset, chipletType)
+// - For PPE we omit the ringName and scanScomAddr to save space in the SBE h-code.
+//
+typedef struct
+{
+#ifndef __PPE__
+ char ringName[MAX_RING_NAME_LENGTH];
+ uint32_t scanScomAddr;
+#endif
+ uint8_t idxRing;
+ ChipletType_t chipletType;
+#ifndef __PPE__
+ RingClass_t ringClass;
+#endif
+} RingProperties_t;
- // Number of variants for common rings (instance rings only have BASE variant)
- uint8_t iv_num_common_ring_variants;
+//
+// Main chiplet properties structure
+//
+typedef struct
+{
+ // This is the instance ID range of the chiplet.
+ uint8_t chipletBaseId; // This is also the chiplet base ID for the COMMON rings in the chiplet
+ uint8_t numChipletInstances; // Num of chiplet instances
+ uint8_t numCommonRings; // Num of common rings
+ uint8_t numInstanceRings; // Num of instance rings (w/different ringId values)
+ uint8_t numInstanceRingsScanAddr; // Num of instance rings for (w/diff ringId && diff scanAddrs)
+ uint8_t numCommonRingVariants; // Num of Common rings variants. Only one for Instance rings
+ RingVariant_t ringVariantOrder[NUM_RING_VARIANTS]; // Order of ring variants in ring section
} ChipletData_t;
// This is used to Set (Mark) the left-most bit
#define INSTANCE_RING_MARK (uint8_t)0x80
//
-// This is used to Set (Mark) the left-most bit
+// This is used to Clear the left-most bit
#define INSTANCE_RING_MASK (uint8_t)0x7F
// This is used to mark an invalid ring in the ring properties list
#define INVALID_RING_OFFSET (uint8_t)0xFF
-// This structure is needed for mapping a RingID to it's corresponding name.
-// The names will be used by the build scripts when generating the TOR.
-typedef struct
-{
- uint8_t iv_torOffSet;
-#ifndef __PPE__
- char iv_name[MAX_RING_NAME_LENGTH];
-#endif
- ChipletType_t iv_type;
-} RingProperties_t;
//
@@ -307,28 +291,32 @@ typedef struct
#define TOR_CODE_BUG INFRASTRUCT_RC_CODE_BUG
#define TOR_USER_ERROR INFRASTRUCT_RC_USER_ERROR
#define TOR_INVALID_MAGIC_NUMBER INFRASTRUCT_RC_NOOF_CODES + 1
-#define TOR_INVALID_CHIPTYPE INFRASTRUCT_RC_NOOF_CODES + 3
-#define TOR_INVALID_CHIPLET INFRASTRUCT_RC_NOOF_CODES + 4
+#define TOR_INVALID_CHIP_ID INFRASTRUCT_RC_NOOF_CODES + 3
+#define TOR_INVALID_CHIPLET_TYPE INFRASTRUCT_RC_NOOF_CODES + 4
#define TOR_INVALID_VARIANT INFRASTRUCT_RC_NOOF_CODES + 5
#define TOR_INVALID_RING_ID INFRASTRUCT_RC_NOOF_CODES + 6
#define TOR_INVALID_INSTANCE_ID INFRASTRUCT_RC_NOOF_CODES + 7
#define TOR_INVALID_RING_BLOCK_TYPE INFRASTRUCT_RC_NOOF_CODES + 8
#define TOR_UNSUPPORTED_RING_SECTION INFRASTRUCT_RC_NOOF_CODES + 9
-#define TOR_RING_NOT_FOUND INFRASTRUCT_RC_NOOF_CODES + 10
-#define TOR_AMBIGUOUS_API_PARMS INFRASTRUCT_RC_NOOF_CODES + 11
-#define TOR_SECTION_NOT_FOUND INFRASTRUCT_RC_NOOF_CODES + 12
-#define TOR_DD_LEVEL_NOT_FOUND INFRASTRUCT_RC_NOOF_CODES + 13
-#define TOR_OP_BUFFER_INVALID INFRASTRUCT_RC_NOOF_CODES + 14
-#define TOR_OP_BUFFER_SIZE_EXCEEDED INFRASTRUCT_RC_NOOF_CODES + 15
-#define TOR_IMAGE_DOES_NOT_SUPPORT_CME INFRASTRUCT_RC_NOOF_CODES + 16
-#define TOR_IMAGE_DOES_NOT_SUPPORT_SGPE INFRASTRUCT_RC_NOOF_CODES + 17
-#define TOR_IMAGE_DOES_NOT_SUPPORT_DD_LEVEL INFRASTRUCT_RC_NOOF_CODES + 18
-#define TOR_IMAGE_DOES_NOT_SUPPORT_PPE_LEVEL INFRASTRUCT_RC_NOOF_CODES + 19
-#define TOR_RING_AVAILABLE_IN_RINGSECTION INFRASTRUCT_RC_NOOF_CODES + 20
-#define TOR_BUFFER_TOO_SMALL INFRASTRUCT_RC_NOOF_CODES + 21
-#define TOR_TOO_MANY_DD_LEVELS INFRASTRUCT_RC_NOOF_CODES + 22
-#define TOR_OFFSET_TOO_BIG INFRASTRUCT_RC_NOOF_CODES + 23
-#define TOR_NO_RINGS_FOR_VARIANT INFRASTRUCT_RC_NOOF_CODES + 24
+#define TOR_RING_NOT_FOUND INFRASTRUCT_RC_NOOF_CODES + 10 // to be phased out
+#define TOR_RING_IS_EMPTY INFRASTRUCT_RC_NOOF_CODES + 10 // non-fatal replace
+#define TOR_RING_IS_POPULATED INFRASTRUCT_RC_NOOF_CODES + 11
+#define TOR_RING_HAS_NO_TOR_SLOT INFRASTRUCT_RC_NOOF_CODES + 12 // fatal replace
+#define TOR_AMBIGUOUS_API_PARMS INFRASTRUCT_RC_NOOF_CODES + 13
+#define TOR_SECTION_NOT_FOUND INFRASTRUCT_RC_NOOF_CODES + 14
+#define TOR_DD_LEVEL_NOT_FOUND INFRASTRUCT_RC_NOOF_CODES + 15
+#define TOR_OP_BUFFER_INVALID INFRASTRUCT_RC_NOOF_CODES + 16
+#define TOR_OP_BUFFER_SIZE_EXCEEDED INFRASTRUCT_RC_NOOF_CODES + 17
+#define TOR_IMAGE_DOES_NOT_SUPPORT_CME INFRASTRUCT_RC_NOOF_CODES + 18
+#define TOR_IMAGE_DOES_NOT_SUPPORT_SGPE INFRASTRUCT_RC_NOOF_CODES + 19
+#define TOR_IMAGE_DOES_NOT_SUPPORT_DD_LEVEL INFRASTRUCT_RC_NOOF_CODES + 20
+#define TOR_IMAGE_DOES_NOT_SUPPORT_PPE_LEVEL INFRASTRUCT_RC_NOOF_CODES + 21
+#define TOR_BUFFER_TOO_SMALL INFRASTRUCT_RC_NOOF_CODES + 22
+#define TOR_TOO_MANY_DD_LEVELS INFRASTRUCT_RC_NOOF_CODES + 23
+#define TOR_OFFSET_TOO_BIG INFRASTRUCT_RC_NOOF_CODES + 24
+#define TOR_NO_RINGS_FOR_VARIANT INFRASTRUCT_RC_NOOF_CODES + 25
+#define TOR_SCOM_ADDR_NOT_FOUND INFRASTRUCT_RC_NOOF_CODES + 26
+#define TOR_RING_NAME_NOT_FOUND INFRASTRUCT_RC_NOOF_CODES + 27
#ifndef __HOSTBOOT_MODULE // Only needed by ring_apply in EKB
int ringid_get_raw_ring_file_path( uint32_t i_magic,
@@ -336,27 +324,100 @@ int ringid_get_raw_ring_file_path( uint32_t i_magic,
char* io_directory );
#endif
-int ringid_get_noof_ring_ids( ChipType_t i_chipType,
- RingId_t* o_numRingIds);
-
-int ringid_get_noof_chiplets( ChipType_t i_chipType,
- uint32_t i_torMagic,
- uint8_t* o_numChiplets );
-
-int ringid_get_ring_list( ChipType_t i_chipType,
- RingId_t i_ringId,
- GenRingIdList** o_ringIdList);
-
-int ringid_get_properties( ChipType_t i_chipType,
- uint32_t i_torMagic,
- uint8_t i_torVersion,
- ChipletType_t i_chipletType,
- ChipletData_t** o_chipletData,
- GenRingIdList** o_ringIdListCommon,
- GenRingIdList** o_ringIdListInstance,
- RingVariantOrder** o_ringVariantOrder,
- RingProperties_t** o_ringProps,
- uint8_t* o_numVariants);
+// This function returns the main ring properties list associated w/the chip ID.
+int ringid_get_ringProps( ChipId_t i_chipId,
+ RingProperties_t** o_ringProps );
+
+int ringid_get_chipletProps( ChipId_t i_chipId,
+ uint32_t i_torMagic,
+ uint8_t i_torVersion,
+ ChipletType_t i_chipletType, // Ignored if one chiplet in torMagic
+ ChipletData_t** o_chipletData,
+ uint8_t* o_numVariants);
+
+int ringid_get_num_ring_ids( ChipId_t i_chipId,
+ RingId_t* o_numRingIds);
+
+int ringid_get_num_chiplets( ChipId_t i_chipId,
+ uint32_t i_torMagic,
+ uint8_t* o_numChiplets );
+
+// This function returns the scanScomAddr associated with the ringId.
+int ringid_get_scanScomAddr( ChipId_t i_chipId,
+ RingId_t i_ringId,
+ uint32_t* o_scanScomAddr );
+
+// This fumction returns the ringClass associated with the ringId.
+int ringid_get_ringClass( ChipId_t i_chipId,
+ RingId_t i_ringId,
+ RingClass_t* o_ringClass );
+
+// Check for valid chip ID and ring ID.
+int ringid_check_ringId( ChipId_t i_chipId,
+ RingId_t i_ringId );
+
+// Check and resolve the effective chipletType's index in a given TOR magic ring section
+int ringid_get_chipletIndex( ChipId_t i_chipId,
+ uint32_t i_torMagic,
+ ChipletType_t i_chipletType,
+ ChipletType_t* o_chipletIndex );
+
+#if !defined(__PPE__) && !defined(NO_STD_LIB_IN_PPE) && !defined(__HOSTBOOT_MODULE) && !defined(FIPSODE)
+
+// The following prototypes are needed by the initCompiler and so it's practical to use C++
+// features.
+
+#include <map>
+#include <string>
+
+extern std::map <ChipId_t, std::string> chipIdIsMap;
+extern std::map <std::string, ChipId_t> chipTypeIsMap;
+extern std::map <uint8_t, ChipId_t> chipIdIcToIsMap;
+
+// This function returns the root ringId of a given scanScomAddr.
+// Notes:
+// - The "root" ringId is the ringId which has a ringName identical to that associated with the
+// scanScomAddr in the engineering data (engd).
+// - In IS's ring list, we can have multiple ringId for the same scanScomAddr since a ring may have
+// multiple variations of itself, e.g. due to different frequency, filter or FSM settings, and
+// which are identified through an "_bucket" extension on their ringName. All those rings,
+// however, are non-ROOT_RINGs.
+// - If the fully "qualified" unique ringId is required, then use ringidGetRingId1() and supply
+// the ringName instead of the scanScomAddr.
+//
+int ringidGetRootRingId( ChipId_t i_chipId,
+ uint32_t i_scanScomAddr,
+ RingId_t& o_ringId,
+ bool i_bTest = false );
+
+// This function returns the ringId associated with the ringName.
+int ringidGetRingId1( ChipId_t i_chipId,
+ std::string i_ringName,
+ RingId_t& o_ringId,
+ bool i_bTest = false );
+
+// This function returns the ringId associated with the effective ring index within a chiplet.
+// (Note that "effective" means the index is void of the instance marker bit.)
+int ringidGetRingId2( ChipId_t i_chipId,
+ uint32_t i_torMagic,
+ ChipletType_t i_chipletType, // Ignored if only one chiplet in torMagic
+ uint8_t i_idxRing, // The eEffective ring index within chiplet's
+ // common or instance ring section
+ MyBool_t i_bInstCase, // =0 common ring, =1 instance ring
+ RingId_t& o_ringId,
+ bool i_bTest = false );
+
+// This function returns the ringName associated with the ringId.
+int ringidGetRingName( ChipId_t i_chipId,
+ RingId_t i_ringId,
+ std::string& o_ringName );
+
+// This fumction returns the ringClass associated with the ringId.
+int ringidGetRingClass( ChipId_t i_chipId,
+ RingId_t i_ringId,
+ RingClass_t& o_ringClass );
+
+#endif // __PPE__ && NO_STD_LIB_IN_PPE
#endif // _COMMON_RINGID_H_
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