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| author | Louis Stermole <stermole@us.ibm.com> | 2018-08-15 12:08:38 -0500 |
|---|---|---|
| committer | Christian R. Geddes <crgeddes@us.ibm.com> | 2018-08-27 11:55:55 -0500 |
| commit | a84a3f3af197b668cee1e2a821e0e7c973362ec2 (patch) | |
| tree | 0f57931f368e9e80b4f58d4d7b354afdd46545e2 /src/import/chips/centaur | |
| parent | 00d9a1bc226bf8b04ca1f4dad6bb794dabbc0c2e (diff) | |
| download | talos-hostboot-a84a3f3af197b668cee1e2a821e0e7c973362ec2.tar.gz talos-hostboot-a84a3f3af197b668cee1e2a821e0e7c973362ec2.zip | |
Add option to increase VREF step in p9c characterization shmoo
Change-Id: If252482e4d98e784a65ae3f92dd256d21d55f2a2
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/64581
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Reviewed-by: FEIHONG YAN <fyan@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/64592
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Diffstat (limited to 'src/import/chips/centaur')
| -rw-r--r-- | src/import/chips/centaur/procedures/xml/attribute_info/memory_attributes.xml | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/src/import/chips/centaur/procedures/xml/attribute_info/memory_attributes.xml b/src/import/chips/centaur/procedures/xml/attribute_info/memory_attributes.xml index fd29a6d63..308eb5e74 100644 --- a/src/import/chips/centaur/procedures/xml/attribute_info/memory_attributes.xml +++ b/src/import/chips/centaur/procedures/xml/attribute_info/memory_attributes.xml @@ -1705,6 +1705,16 @@ firmware notes: none</description> </attribute> <attribute> + <id>ATTR_CEN_EFF_SCHMOO_VREF_STEP</id> + <targetType>TARGET_TYPE_MBA</targetType> + <description>Specifies the step size in register ticks for WR_VREF and RD_VREF shmoos.</description> + <valueType>uint8</valueType> + <writeable/> + <odmVisable/> + <odmChangeable/> +</attribute> + +<attribute> <id>ATTR_CEN_EFF_SCHMOO_WR_EYE_MIN_MARGIN</id> <targetType>TARGET_TYPE_MBA</targetType> <description>Specifies the shmoo minimum margin to use during draminit_train_adv. Used to signal possible SI issues in memory.</description> |
