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authorStephen Glancy <sglancy@us.ibm.com>2019-04-16 13:55:28 -0400
committerChristian R. Geddes <crgeddes@us.ibm.com>2019-04-23 09:42:55 -0500
commit51a8aa7ccf8b191d6c3c9a058b1870ce8ec6555a (patch)
tree022d900019acb9f9b8eb71c3d6ecf6e5c9fce4c9 /src/import/chips/centaur
parent4b56cf2d5156b6eacf2e0656cdde2c727bf2b3cc (diff)
downloadtalos-hostboot-51a8aa7ccf8b191d6c3c9a058b1870ce8ec6555a.tar.gz
talos-hostboot-51a8aa7ccf8b191d6c3c9a058b1870ce8ec6555a.zip
Fixes centaur plug rules to force balanced MBA configs
Change-Id: Iee7e7e01b0d5e985837e991914c3815c05ed071a CQ:SW460240 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/76030 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Reviewed-by: Louis Stermole <stermole@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/76136 Reviewed-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Tested-by: Christian R. Geddes <crgeddes@us.ibm.com>
Diffstat (limited to 'src/import/chips/centaur')
-rw-r--r--src/import/chips/centaur/procedures/hwp/memory/lib/shared/dimmConsts.H1
-rw-r--r--src/import/chips/centaur/procedures/hwp/memory/p9c_cen_plug_rules.H372
-rw-r--r--src/import/chips/centaur/procedures/hwp/memory/p9c_mss_eff_config.C6
-rw-r--r--src/import/chips/centaur/procedures/hwp/memory/p9c_mss_eff_config.H3
-rw-r--r--src/import/chips/centaur/procedures/xml/error_info/p9c_memory_mss_eff_config_errors.xml104
5 files changed, 438 insertions, 48 deletions
diff --git a/src/import/chips/centaur/procedures/hwp/memory/lib/shared/dimmConsts.H b/src/import/chips/centaur/procedures/hwp/memory/lib/shared/dimmConsts.H
index 03f1b2a51..ac18feba6 100644
--- a/src/import/chips/centaur/procedures/hwp/memory/lib/shared/dimmConsts.H
+++ b/src/import/chips/centaur/procedures/hwp/memory/lib/shared/dimmConsts.H
@@ -40,6 +40,7 @@ enum consts : size_t
{
MAX_PORTS_PER_MBA = 2, ///< Maximum number of ports on an MBA
MAX_DIMM_PER_PORT = 2, ///< Maximum number of DIMMs attached to an MBA PORT
+ MAX_DIMM_PER_MBA = MAX_DIMM_PER_PORT * MAX_PORTS_PER_MBA, ///< Maximum number of DIMMs attached to an MBA
MAX_MBA_PER_CEN = 2, ///< Maximum number of MBAs on a membuf
MAX_PORTS_PER_CEN = 4, ///< Maximum number of ports on a centaur
MAX_RANKS_PER_DIMM = 4, ///< Maximum number of ranks on a DIMM
diff --git a/src/import/chips/centaur/procedures/hwp/memory/p9c_cen_plug_rules.H b/src/import/chips/centaur/procedures/hwp/memory/p9c_cen_plug_rules.H
index 956d3e0bb..c7c22f158 100644
--- a/src/import/chips/centaur/procedures/hwp/memory/p9c_cen_plug_rules.H
+++ b/src/import/chips/centaur/procedures/hwp/memory/p9c_cen_plug_rules.H
@@ -22,3 +22,375 @@
/* permissions and limitations under the License. */
/* */
/* IBM_PROLOG_END_TAG */
+/// @file p9c_cen_plug_ruiles.H
+/// @brief Takes in spd and configures effective attrs
+///
+/// *HWP HWP Owner: Stephen Glancy <sglancy@us.ibm.com>
+/// *HWP HWP Backup: Louis Stermole <stermole@us.ibm.com>
+/// *HWP Team: Memory
+/// *HWP Level: 2
+/// *HWP Consumed by: HB
+
+#ifndef P9C_CEN_PLUG_RULES_H_
+#define P9C_CEN_PLUG_RULES_H_
+
+//------------------------------------------------------------------------------
+// My Includes
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+// Includes
+//------------------------------------------------------------------------------
+#include <fapi2.H>
+#include <dimmConsts.H>
+#include <generic/memory/lib/utils/c_str.H>
+
+namespace mss
+{
+namespace cen
+{
+
+///
+/// @Brief Enumeration for the attributes to check
+///
+enum attr
+{
+ ROWS = 0,
+ COLS = 1,
+ DENSITY = 2,
+ WIDTH = 3,
+ MASTER_RANKS = 4,
+ NUM_RANKS = 5,
+
+ // Dispatcher parameters
+ START = ROWS,
+ END = NUM_RANKS + 1,
+};
+
+///
+/// @brief Traits class for each attribute
+/// @tparam attribute traits
+///
+template<attr A>
+class attr_traits
+{};
+
+///
+/// @brief Traits class for each attribute - ROWS specialization
+///
+template<>
+class attr_traits<attr::ROWS>
+{
+ public:
+ static constexpr bool IS_DIMM_TYPE = false;
+ static constexpr const char* STR = "ROWS";
+
+ ///
+ /// @brief attribute getter helper
+ /// @param[in] i_target MBA target
+ /// @param[out] o_data data from the attr
+ /// @return fapi2::ReturnCode
+ ///
+ static fapi2::ReturnCode getter(const fapi2::Target<fapi2::TARGET_TYPE_MBA>& i_target, uint8_t& o_data)
+ {
+ return FAPI_ATTR_GET(fapi2::ATTR_CEN_EFF_DRAM_ROWS, i_target, o_data);
+ }
+};
+
+///
+/// @brief Traits class for each attribute - COLS specialization
+///
+template<>
+class attr_traits<attr::COLS>
+{
+ public:
+ static constexpr bool IS_DIMM_TYPE = false;
+ static constexpr const char* STR = "COLS";
+
+ ///
+ /// @brief attribute getter helper
+ /// @param[in] i_target MBA target
+ /// @param[out] o_data data from the attr
+ /// @return fapi2::ReturnCode
+ ///
+ static fapi2::ReturnCode getter(const fapi2::Target<fapi2::TARGET_TYPE_MBA>& i_target, uint8_t& o_data)
+ {
+ return FAPI_ATTR_GET(fapi2::ATTR_CEN_EFF_DRAM_COLS, i_target, o_data);
+ }
+};
+
+///
+/// @brief Traits class for each attribute - DENSITY specialization
+///
+template<>
+class attr_traits<attr::DENSITY>
+{
+ public:
+ static constexpr bool IS_DIMM_TYPE = false;
+ static constexpr const char* STR = "DENSITY";
+
+ ///
+ /// @brief attribute getter helper
+ /// @param[in] i_target MBA target
+ /// @param[out] o_data data from the attr
+ /// @return fapi2::ReturnCode
+ ///
+ static fapi2::ReturnCode getter(const fapi2::Target<fapi2::TARGET_TYPE_MBA>& i_target, uint8_t& o_data)
+ {
+ return FAPI_ATTR_GET(fapi2::ATTR_CEN_EFF_DRAM_DENSITY, i_target, o_data);
+ }
+};
+
+///
+/// @brief Traits class for each attribute - WIDTH specialization
+///
+template<>
+class attr_traits<attr::WIDTH>
+{
+ public:
+ static constexpr bool IS_DIMM_TYPE = false;
+ static constexpr const char* STR = "WIDTH";
+
+ ///
+ /// @brief attribute getter helper
+ /// @param[in] i_target MBA target
+ /// @param[out] o_data data from the attr
+ /// @return fapi2::ReturnCode
+ ///
+ static fapi2::ReturnCode getter(const fapi2::Target<fapi2::TARGET_TYPE_MBA>& i_target, uint8_t& o_data)
+ {
+ return FAPI_ATTR_GET(fapi2::ATTR_CEN_EFF_DRAM_WIDTH, i_target, o_data);
+ }
+};
+
+///
+/// @brief Traits class for each attribute - MASTER_RANKS specialization
+///
+template<>
+class attr_traits<attr::MASTER_RANKS>
+{
+ public:
+ static constexpr bool IS_DIMM_TYPE = true;
+ static constexpr const char* STR = "MASTER_RANKS";
+
+ ///
+ /// @brief attribute getter helper
+ /// @param[in] i_target MBA target
+ /// @param[out] o_data data from the attr
+ /// @return fapi2::ReturnCode
+ ///
+ static fapi2::ReturnCode getter(const fapi2::Target<fapi2::TARGET_TYPE_MBA>& i_target,
+ uint8_t (&o_data)[MAX_PORTS_PER_MBA][MAX_DIMM_PER_PORT])
+ {
+ return FAPI_ATTR_GET(fapi2::ATTR_CEN_EFF_NUM_MASTER_RANKS_PER_DIMM, i_target, o_data);
+ }
+};
+
+
+///
+/// @brief Traits class for each attribute - NUM_RANKS specialization
+///
+template<>
+class attr_traits<attr::NUM_RANKS>
+{
+ public:
+ static constexpr bool IS_DIMM_TYPE = true;
+ static constexpr const char* STR = "NUM_RANKS";
+
+ ///
+ /// @brief attribute getter helper
+ /// @param[in] i_target MBA target
+ /// @param[out] o_data data from the attr
+ /// @return fapi2::ReturnCode
+ ///
+ static fapi2::ReturnCode getter(const fapi2::Target<fapi2::TARGET_TYPE_MBA>& i_target,
+ uint8_t (&o_data)[MAX_PORTS_PER_MBA][MAX_DIMM_PER_PORT])
+ {
+ return FAPI_ATTR_GET(fapi2::ATTR_CEN_EFF_NUM_RANKS_PER_DIMM, i_target, o_data);
+ }
+};
+
+///
+/// @brief Checks if a configuration is balanced for all attr
+/// @param[in] i_data the attribute data for a centaur
+/// @return true if the configuration is balanced
+///
+inline bool is_data_equivalent(const std::vector<uint8_t>& i_data)
+{
+ // Default to a balanced config - if we don't have any MBA's on this centaur, that's balanced
+ bool l_balanced = true;
+
+ // Make sure we have real data
+ if(!i_data.empty())
+ {
+ // Find if the data is all the same
+ const auto l_start = i_data[0];
+ const auto l_it = std::find_if(i_data.begin(), i_data.end(), [&l_start]( const uint8_t& i_rhs) -> bool
+ {
+ return l_start != i_rhs;
+ });
+
+ // Data is balanced if all of data is equal (didn't find an unequal piece of data)
+ l_balanced = l_it == i_data.end();
+ }
+
+ return l_balanced;
+}
+
+///
+/// @brief Assembles the attribute into a vector for processing
+/// @tparam attr A attribute on which to operate
+/// @tparam attr_traits TT traits for the associated attribute
+/// @param[in] i_target centaur target on which to operate
+/// @param[in] std::false_type dispatch helper for MBA attribute types
+/// @param[out] o_data vectorized attribute data
+/// @return fapi2::ReturnCode
+///
+template<attr A, typename TT = attr_traits<A>>
+inline fapi2::ReturnCode vectorize_attr_data(const fapi2::Target<fapi2::TARGET_TYPE_MEMBUF_CHIP>& i_target,
+ std::false_type, std::vector<uint8_t>& o_data)
+{
+ o_data.clear();
+
+ // Loops through all MBA
+ for(const auto& l_mba : i_target.getChildren<fapi2::TARGET_TYPE_MBA>())
+ {
+ // Gets the attribute in question
+ uint8_t l_attr_data = 0;
+ FAPI_TRY(TT::getter(l_mba, l_attr_data));
+ o_data.push_back(l_attr_data);
+ FAPI_DBG("%s adding data0x%02x to vector size:%u for attr %u",
+ mss::spd::c_str(l_mba), l_attr_data, o_data.size(), A);
+ }
+
+ return fapi2::FAPI2_RC_SUCCESS;
+fapi_try_exit:
+ return fapi2::current_err;
+}
+
+///
+/// @brief Assembles the attribute into a vector for processing
+/// @tparam attr A attribute on which to operate
+/// @tparam attr_traits TT traits for the associated attribute
+/// @param[in] i_target centaur target on which to operate
+/// @param[in] std::true_type dispatch helper for DIMM attribute types
+/// @param[out] o_data vectorized attribute data
+/// @return fapi2::ReturnCode
+///
+template<attr A, typename TT = attr_traits<A>>
+inline fapi2::ReturnCode vectorize_attr_data(const fapi2::Target<fapi2::TARGET_TYPE_MEMBUF_CHIP>& i_target,
+ std::true_type, std::vector<uint8_t>& o_data)
+{
+ o_data.clear();
+
+ // Loops through all MBA
+ for(const auto& l_mba : i_target.getChildren<fapi2::TARGET_TYPE_MBA>())
+ {
+ // Gets the attribute in question
+ uint8_t l_attr_data[MAX_PORTS_PER_MBA][MAX_DIMM_PER_PORT] = {0};
+ FAPI_TRY(TT::getter(l_mba, l_attr_data));
+
+ // Loops through all DIMM's so we only get valid data
+ for(const auto& l_dimm : l_mba.getChildren<fapi2::TARGET_TYPE_DIMM>())
+ {
+ uint32_t l_dimm_pos = 0;
+ FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_FAPI_POS, l_dimm, l_dimm_pos));
+ {
+ // Converts the DIMM pos into the relative position compared to the MBA
+ const auto l_relative_pos = l_dimm_pos % MAX_DIMM_PER_MBA;
+
+ const auto l_port_index = l_relative_pos / MAX_PORTS_PER_MBA;
+ const auto l_dimm_index = l_relative_pos % MAX_DIMM_PER_PORT;
+ o_data.push_back(l_attr_data[l_port_index][l_dimm_index]);
+ FAPI_DBG("%s adding data0x%02x to vector port%u dimm%u size:%u",
+ mss::spd::c_str(l_mba), l_attr_data[l_port_index][l_dimm_index],
+ l_port_index, l_dimm_index, o_data.size());
+ }
+ }
+
+ }
+
+ return fapi2::FAPI2_RC_SUCCESS;
+fapi_try_exit:
+ return fapi2::current_err;
+}
+
+///
+/// @brief Checks if a configuration for a specific attribute is balanced over both MBA - recursion helper
+/// @tparam attr A the attribute on which to operate
+/// @tparam attr_traits TT traits for the associated attribute
+/// @param[in] i_target centaur target on which to operate
+/// @return fapi2::ReturnCode
+///
+template<attr A, typename TT = attr_traits<A>>
+inline fapi2::ReturnCode check_for_balanced_config_helper(const fapi2::Target<fapi2::TARGET_TYPE_MEMBUF_CHIP>& i_target)
+{
+ // Helper for the FFDC below - FFDC doesnt like constexpr
+ const auto ATTR = A;
+
+ // Vector of attribute data
+ std::vector<uint8_t> l_attr_data;
+
+ // Gets the attribute data
+ FAPI_TRY(vectorize_attr_data<A>(i_target, std::integral_constant<bool, TT::IS_DIMM_TYPE> {},
+ l_attr_data));
+
+ // Assert out if we're not balanced
+ FAPI_ASSERT(is_data_equivalent(l_attr_data),
+ fapi2::CEN_MSS_PLUG_RULES_MBA_MISMATCH()
+ .set_TARGET_CEN(i_target)
+ .set_ATTR(ATTR),
+ "%s has an unbalanced config for %s",
+ mss::c_str(i_target), TT::STR);
+
+ return check_for_balanced_config_helper < static_cast<attr>(A + 1u) > (i_target);
+fapi_try_exit:
+ return fapi2::current_err;
+}
+
+///
+/// @brief Checks if a configuration for a specific attribute is balanced over both MBA - ending specialization
+/// @param[in] i_target centaur target on which to operate
+/// @return fapi2::ReturnCode
+///
+template<>
+inline fapi2::ReturnCode check_for_balanced_config_helper<attr::END>(const
+ fapi2::Target<fapi2::TARGET_TYPE_MEMBUF_CHIP>& i_target)
+{
+ FAPI_INF("%s has a balanced configuration between the MBA's", mss::c_str(i_target));
+ return fapi2::FAPI2_RC_SUCCESS;
+}
+
+///
+/// @brief mss_eff_config_verify_plug_rules(): Verifies plugrules on a per-Centaur basis
+/// @param[in] i_target_mba: the fapi2 target
+/// @return fapi2::ReturnCode
+/// @note We pass in an MBA specifically to see if we're running on MBA23
+/// We only need to run this plug rules test if we have two MBA's
+///
+inline fapi2::ReturnCode mss_eff_config_verify_centaur_plug_rules(const fapi2::Target<fapi2::TARGET_TYPE_MBA>& i_target)
+{
+ const auto& l_cen = i_target.getParent<fapi2::TARGET_TYPE_MEMBUF_CHIP>();
+ uint8_t l_mba_pos = 0;
+
+ // First, check if we're MBA23 - if not, exit sucessfully
+ FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_UNIT_POS, i_target, l_mba_pos));
+
+ if(l_mba_pos % MAX_MBA_PER_CEN == 0)
+ {
+ FAPI_INF("%s is MBA01, exiting succesfully", mss::spd::c_str(i_target));
+ return fapi2::FAPI2_RC_SUCCESS;
+ }
+
+ FAPI_INF("%s is MBA23, checking that MBA01's configuration == MBA23's configuration", mss::spd::c_str(i_target));
+
+ return check_for_balanced_config_helper<attr::START>(l_cen);
+
+fapi_try_exit:
+ return fapi2::current_err;
+}
+
+} // ns
+} // cen
+
+#endif
diff --git a/src/import/chips/centaur/procedures/hwp/memory/p9c_mss_eff_config.C b/src/import/chips/centaur/procedures/hwp/memory/p9c_mss_eff_config.C
index bc137313d..5b4c25277 100644
--- a/src/import/chips/centaur/procedures/hwp/memory/p9c_mss_eff_config.C
+++ b/src/import/chips/centaur/procedures/hwp/memory/p9c_mss_eff_config.C
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2017,2018 */
+/* Contributors Listed Below - COPYRIGHT 2017,2019 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -39,6 +39,7 @@
#include <p9c_mss_eff_config_rank_group.H>
#include <p9c_mss_eff_config_shmoo.H>
#include <generic/memory/lib/utils/c_str.H>
+#include <p9c_cen_plug_rules.H>
//------------------------------------------------------------------------------
// Constants
@@ -2725,6 +2726,9 @@ extern "C"
FAPI_TRY(mss_eff_config_shmoo(i_target_mba));
+ // Checks that both MBA's are configured the same
+ FAPI_TRY(mss::cen::mss_eff_config_verify_centaur_plug_rules(i_target_mba));
+
FAPI_INF("mss_eff_config on %s COMPLETE\n", mss::c_str(i_target_mba));
fapi_try_exit:
diff --git a/src/import/chips/centaur/procedures/hwp/memory/p9c_mss_eff_config.H b/src/import/chips/centaur/procedures/hwp/memory/p9c_mss_eff_config.H
index 1c70a3918..e325b9f8a 100644
--- a/src/import/chips/centaur/procedures/hwp/memory/p9c_mss_eff_config.H
+++ b/src/import/chips/centaur/procedures/hwp/memory/p9c_mss_eff_config.H
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2017 */
+/* Contributors Listed Below - COPYRIGHT 2017,2019 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -45,7 +45,6 @@
#include <dimmConsts.H>
typedef fapi2::ReturnCode (*p9c_mss_eff_config_FP_t)(const fapi2::Target<fapi2::TARGET_TYPE_MBA> i_target_mba);
-
///
/// @brief struct mss_eff_config_data
/// @brief holds the the variables used in many function calls
diff --git a/src/import/chips/centaur/procedures/xml/error_info/p9c_memory_mss_eff_config_errors.xml b/src/import/chips/centaur/procedures/xml/error_info/p9c_memory_mss_eff_config_errors.xml
index a42bc0062..ce516875c 100644
--- a/src/import/chips/centaur/procedures/xml/error_info/p9c_memory_mss_eff_config_errors.xml
+++ b/src/import/chips/centaur/procedures/xml/error_info/p9c_memory_mss_eff_config_errors.xml
@@ -5,7 +5,7 @@
<!-- -->
<!-- OpenPOWER HostBoot Project -->
<!-- -->
-<!-- Contributors Listed Below - COPYRIGHT 2017,2018 -->
+<!-- Contributors Listed Below - COPYRIGHT 2017,2019 -->
<!-- [+] International Business Machines Corp. -->
<!-- -->
<!-- -->
@@ -226,10 +226,10 @@
<description>Plug rule violation, one position is empty but other are present
</description>
<FFDC>TARGET_MBA</FFDC>
- <ffdc>CUR_DIMM_SPD_VALID_U8ARRAY_0_0</ffdc>
- <ffdc>CUR_DIMM_SPD_VALID_U8ARRAY_0_1</ffdc>
- <ffdc>CUR_DIMM_SPD_VALID_U8ARRAY_1_0</ffdc>
- <ffdc>CUR_DIMM_SPD_VALID_U8ARRAY_1_1</ffdc>
+ <ffdc>CUR_DIMM_SPD_VALID_U8ARRAY_0_0</ffdc>
+ <ffdc>CUR_DIMM_SPD_VALID_U8ARRAY_0_1</ffdc>
+ <ffdc>CUR_DIMM_SPD_VALID_U8ARRAY_1_0</ffdc>
+ <ffdc>CUR_DIMM_SPD_VALID_U8ARRAY_1_1</ffdc>
<callout>
<procedure>MEMORY_PLUGGING_ERROR</procedure>
<priority>HIGH</priority>
@@ -257,10 +257,10 @@
<description>Plug rule violation, sides do not match
</description>
<FFDC>TARGET_MBA</FFDC>
- <ffdc>CUR_DIMM_SPD_VALID_U8ARRAY_0_0</ffdc>
- <ffdc>CUR_DIMM_SPD_VALID_U8ARRAY_0_1</ffdc>
- <ffdc>CUR_DIMM_SPD_VALID_U8ARRAY_1_0</ffdc>
- <ffdc>CUR_DIMM_SPD_VALID_U8ARRAY_1_1</ffdc>
+ <ffdc>CUR_DIMM_SPD_VALID_U8ARRAY_0_0</ffdc>
+ <ffdc>CUR_DIMM_SPD_VALID_U8ARRAY_0_1</ffdc>
+ <ffdc>CUR_DIMM_SPD_VALID_U8ARRAY_1_0</ffdc>
+ <ffdc>CUR_DIMM_SPD_VALID_U8ARRAY_1_1</ffdc>
<callout>
<procedure>MEMORY_PLUGGING_ERROR</procedure>
@@ -290,10 +290,10 @@
<description>Plug rule violation, top and bottom do not match
</description>
<FFDC>TARGET_MBA</FFDC>
- <ffdc>CUR_DIMM_SPD_VALID_U8ARRAY_0_0</ffdc>
- <ffdc>CUR_DIMM_SPD_VALID_U8ARRAY_0_1</ffdc>
- <ffdc>CUR_DIMM_SPD_VALID_U8ARRAY_1_0</ffdc>
- <ffdc>CUR_DIMM_SPD_VALID_U8ARRAY_1_1</ffdc>
+ <ffdc>CUR_DIMM_SPD_VALID_U8ARRAY_0_0</ffdc>
+ <ffdc>CUR_DIMM_SPD_VALID_U8ARRAY_0_1</ffdc>
+ <ffdc>CUR_DIMM_SPD_VALID_U8ARRAY_1_0</ffdc>
+ <ffdc>CUR_DIMM_SPD_VALID_U8ARRAY_1_1</ffdc>
<callout>
<procedure>MEMORY_PLUGGING_ERROR</procedure>
@@ -322,10 +322,10 @@
<description>Incompatable DRAM generation
</description>
<FFDC>TARGET_MBA</FFDC>
- <ffdc>DRAM_DEVICE_TYPE_0_0</ffdc>
- <ffdc>DRAM_DEVICE_TYPE_0_1</ffdc>
- <ffdc>DRAM_DEVICE_TYPE_1_0</ffdc>
- <ffdc>DRAM_DEVICE_TYPE_1_1</ffdc>
+ <ffdc>DRAM_DEVICE_TYPE_0_0</ffdc>
+ <ffdc>DRAM_DEVICE_TYPE_0_1</ffdc>
+ <ffdc>DRAM_DEVICE_TYPE_1_0</ffdc>
+ <ffdc>DRAM_DEVICE_TYPE_1_1</ffdc>
<callout>
<procedure>MEMORY_PLUGGING_ERROR</procedure>
@@ -354,10 +354,10 @@
<description>Incompatable DIMM type
</description>
<FFDC>TARGET_MBA</FFDC>
- <ffdc>MODULE_TYPE_0_0</ffdc>
- <ffdc>MODULE_TYPE_0_1</ffdc>
- <ffdc>MODULE_TYPE_1_0</ffdc>
- <ffdc>MODULE_TYPE_1_1</ffdc>
+ <ffdc>MODULE_TYPE_0_0</ffdc>
+ <ffdc>MODULE_TYPE_0_1</ffdc>
+ <ffdc>MODULE_TYPE_1_0</ffdc>
+ <ffdc>MODULE_TYPE_1_1</ffdc>
<callout>
<procedure>MEMORY_PLUGGING_ERROR</procedure>
@@ -386,10 +386,10 @@
<description>Incompatable DIMM ranks
</description>
<FFDC>TARGET_MBA</FFDC>
- <ffdc>NUM_RANKS_0_0</ffdc>
- <ffdc>NUM_RANKS_0_1</ffdc>
- <ffdc>NUM_RANKS_1_0</ffdc>
- <ffdc>NUM_RANKS_1_1</ffdc>
+ <ffdc>NUM_RANKS_0_0</ffdc>
+ <ffdc>NUM_RANKS_0_1</ffdc>
+ <ffdc>NUM_RANKS_1_0</ffdc>
+ <ffdc>NUM_RANKS_1_1</ffdc>
<callout>
<procedure>MEMORY_PLUGGING_ERROR</procedure>
@@ -418,10 +418,10 @@
<description>Incompatable DIMM banks
</description>
<FFDC>TARGET_MBA</FFDC>
- <ffdc>SDRAM_BANKS_0_0</ffdc>
- <ffdc>SDRAM_BANKS_0_1</ffdc>
- <ffdc>SDRAM_BANKS_1_0</ffdc>
- <ffdc>SDRAM_BANKS_1_1</ffdc>
+ <ffdc>SDRAM_BANKS_0_0</ffdc>
+ <ffdc>SDRAM_BANKS_0_1</ffdc>
+ <ffdc>SDRAM_BANKS_1_0</ffdc>
+ <ffdc>SDRAM_BANKS_1_1</ffdc>
<callout>
<procedure>MEMORY_PLUGGING_ERROR</procedure>
@@ -450,10 +450,10 @@
<description>Incompatable DIMM rows
</description>
<FFDC>TARGET_MBA</FFDC>
- <ffdc>SDRAM_ROWS_0_0</ffdc>
- <ffdc>SDRAM_ROWS_0_1</ffdc>
- <ffdc>SDRAM_ROWS_1_0</ffdc>
- <ffdc>SDRAM_ROWS_1_1</ffdc>
+ <ffdc>SDRAM_ROWS_0_0</ffdc>
+ <ffdc>SDRAM_ROWS_0_1</ffdc>
+ <ffdc>SDRAM_ROWS_1_0</ffdc>
+ <ffdc>SDRAM_ROWS_1_1</ffdc>
<callout>
<procedure>MEMORY_PLUGGING_ERROR</procedure>
@@ -482,10 +482,10 @@
<description>Incompatable DIMM columns
</description>
<FFDC>TARGET_MBA</FFDC>
- <ffdc>SDRAM_COLS_0_0</ffdc>
- <ffdc>SDRAM_COLS_0_1</ffdc>
- <ffdc>SDRAM_COLS_1_0</ffdc>
- <ffdc>SDRAM_COLS_1_1</ffdc>
+ <ffdc>SDRAM_COLS_0_0</ffdc>
+ <ffdc>SDRAM_COLS_0_1</ffdc>
+ <ffdc>SDRAM_COLS_1_0</ffdc>
+ <ffdc>SDRAM_COLS_1_1</ffdc>
<callout>
<procedure>MEMORY_PLUGGING_ERROR</procedure>
@@ -514,10 +514,10 @@
<description>Incompatable DRAM primary bus width
</description>
<FFDC>TARGET_MBA</FFDC>
- <ffdc>BUS_WIDTH_0_0</ffdc>
- <ffdc>BUS_WIDTH_0_1</ffdc>
- <ffdc>BUS_WIDTH_1_0</ffdc>
- <ffdc>BUS_WIDTH_1_1</ffdc>
+ <ffdc>BUS_WIDTH_0_0</ffdc>
+ <ffdc>BUS_WIDTH_0_1</ffdc>
+ <ffdc>BUS_WIDTH_1_0</ffdc>
+ <ffdc>BUS_WIDTH_1_1</ffdc>
<callout>
<procedure>MEMORY_PLUGGING_ERROR</procedure>
@@ -575,10 +575,10 @@
<description>Incompatable DRAM width
</description>
<FFDC>TARGET_MBA</FFDC>
- <ffdc>DRAM_WIDTH_0_0</ffdc>
- <ffdc>DRAM_WIDTH_0_1</ffdc>
- <ffdc>DRAM_WIDTH_1_0</ffdc>
- <ffdc>DRAM_WIDTH_1_1</ffdc>
+ <ffdc>DRAM_WIDTH_0_0</ffdc>
+ <ffdc>DRAM_WIDTH_0_1</ffdc>
+ <ffdc>DRAM_WIDTH_1_0</ffdc>
+ <ffdc>DRAM_WIDTH_1_1</ffdc>
<callout>
<procedure>MEMORY_PLUGGING_ERROR</procedure>
@@ -1028,5 +1028,19 @@
</hwpError>
+<hwpError>
+ <rc>RC_CEN_MSS_PLUG_RULES_MBA_MISMATCH</rc>
+ <description>Mismatch found between MBA configurations</description>
+ <FFDC>TARGET_CEN</FFDC>
+ <ffdc>ATTR</ffdc>
+ <callout>
+ <target>TARGET_CEN</target>
+ <priority>HIGH</priority>
+ </callout>
+ <deconfigure>
+ <target>TARGET_CEN</target>
+ </deconfigure>
+</hwpError>
+
</hwpErrors>
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