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| author | Luke Mulkey <lwmulkey@us.ibm.com> | 2017-02-02 11:38:38 -0600 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2017-08-04 10:53:14 -0400 |
| commit | 804b176d0af9eeff759fadb9606cbda6f66f486f (patch) | |
| tree | 2d29826571c8fd505ff17b8c81bc0b857a6f1b4e /src/import/chips/centaur | |
| parent | ca890d5faa1045a18d2cfe9b7629df473217cbe7 (diff) | |
| download | talos-hostboot-804b176d0af9eeff759fadb9606cbda6f66f486f.tar.gz talos-hostboot-804b176d0af9eeff759fadb9606cbda6f66f486f.zip | |
Eff_config, volt, freq for p9c
Change-Id: Id12e30011e0feb6302a3021b28f74922781fde4a
Original-Change-Id: I13fe2c0b91c0ae5b1c7ee37445775af566638c40
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35841
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43781
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/centaur')
10 files changed, 2542 insertions, 0 deletions
diff --git a/src/import/chips/centaur/procedures/xml/error_info/p9c_memory_mss_bulk_pwr_throttles_errors.xml b/src/import/chips/centaur/procedures/xml/error_info/p9c_memory_mss_bulk_pwr_throttles_errors.xml new file mode 100644 index 000000000..3c021abe6 --- /dev/null +++ b/src/import/chips/centaur/procedures/xml/error_info/p9c_memory_mss_bulk_pwr_throttles_errors.xml @@ -0,0 +1,56 @@ +<!-- IBM_PROLOG_BEGIN_TAG --> +<!-- This is an automatically generated prolog. --> +<!-- --> +<!-- $Source: src/import/chips/centaur/procedures/xml/error_info/p9c_memory_mss_bulk_pwr_throttles_errors.xml $ --> +<!-- --> +<!-- OpenPOWER HostBoot Project --> +<!-- --> +<!-- Contributors Listed Below - COPYRIGHT 2016,2017 --> +<!-- [+] International Business Machines Corp. --> +<!-- --> +<!-- --> +<!-- Licensed under the Apache License, Version 2.0 (the "License"); --> +<!-- you may not use this file except in compliance with the License. --> +<!-- You may obtain a copy of the License at --> +<!-- --> +<!-- http://www.apache.org/licenses/LICENSE-2.0 --> +<!-- --> +<!-- Unless required by applicable law or agreed to in writing, software --> +<!-- distributed under the License is distributed on an "AS IS" BASIS, --> +<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or --> +<!-- implied. See the License for the specific language governing --> +<!-- permissions and limitations under the License. --> +<!-- --> +<!-- IBM_PROLOG_END_TAG --> +<hwpErrors> +<!-- $Id: memory_mss_bulk_pwr_throttles.xml,v 1.5 2014/06/02 13:11:07 pardeik Exp $ --> +<!-- For file ../../ipl/fapi/mss_bulk_pwr_throttles.C --> +<!-- // *! OWNER NAME : Michael Pardeik Email: pardeik@us.ibm.com --> +<!-- // *! BACKUP NAME : Jacob Sloat Email: jdsloat@us.ibm.com --> + +<!-- Original Source for RC_CEN_MSS_NOT_ENOUGH_AVAILABLE_DIMM_POWER memory_errors.xml --> + <hwpError> + <rc>RC_CEN_MSS_NOT_ENOUGH_AVAILABLE_DIMM_POWER</rc> + <description>Unable to find throttle setting that has DIMM power underneath the limit.</description> + <ffdc>PAIR_POWER</ffdc> + <ffdc>PAIR_WATT_TARGET</ffdc> + <callout> + <childTargets> + <parent>MEM_MBA</parent> + <childType>TARGET_TYPE_DIMM</childType> + </childTargets> + <priority>MEDIUM</priority> + </callout> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + <deconfigure> + <childTargets> + <parent>MEM_MBA</parent> + <childType>TARGET_TYPE_DIMM</childType> + </childTargets> + </deconfigure> +</hwpError> + +</hwpErrors> diff --git a/src/import/chips/centaur/procedures/xml/error_info/p9c_memory_mss_eff_config_errors.xml b/src/import/chips/centaur/procedures/xml/error_info/p9c_memory_mss_eff_config_errors.xml new file mode 100644 index 000000000..3b56e1e29 --- /dev/null +++ b/src/import/chips/centaur/procedures/xml/error_info/p9c_memory_mss_eff_config_errors.xml @@ -0,0 +1,985 @@ +<!-- IBM_PROLOG_BEGIN_TAG --> +<!-- This is an automatically generated prolog. --> +<!-- --> +<!-- $Source: src/import/chips/centaur/procedures/xml/error_info/p9c_memory_mss_eff_config_errors.xml $ --> +<!-- --> +<!-- OpenPOWER HostBoot Project --> +<!-- --> +<!-- Contributors Listed Below - COPYRIGHT 2017 --> +<!-- [+] International Business Machines Corp. --> +<!-- --> +<!-- --> +<!-- Licensed under the Apache License, Version 2.0 (the "License"); --> +<!-- you may not use this file except in compliance with the License. --> +<!-- You may obtain a copy of the License at --> +<!-- --> +<!-- http://www.apache.org/licenses/LICENSE-2.0 --> +<!-- --> +<!-- Unless required by applicable law or agreed to in writing, software --> +<!-- distributed under the License is distributed on an "AS IS" BASIS, --> +<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or --> +<!-- implied. See the License for the specific language governing --> +<!-- permissions and limitations under the License. --> +<!-- --> +<!-- IBM_PROLOG_END_TAG --> + +<!-- --> +<!-- @file p9c_memory_mss_eff_config_errors.xml --> +<!-- @brief Error xml for mss eff config errors--> +<!-- --> +<!-- *HWP HWP Owner: Luke Mulkey <lwmulkey@us.ibm.com> --> +<!-- *HWP HWP Backup: Andre Marin <aamarin@us.ibm.com> --> +<!-- *HWP FW Owner: Bill Hoffa <wghoffa@us.ibm.com> --> +<!-- *HWP Team: Memory --> +<!-- *HWP Level: 1 --> +<!-- *HWP Consumed by: FSP:HB --> +<!-- --> + +<hwpErrors> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_CEN_MSS_EFF_CONFIG_INVALID_DDR4_SPD_TB</rc> + <description>Invalid DDR4 MTB/FTB Timebase received from SPD attribute</description> + <FFDC>TARGET_DIMM</FFDC> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + <callout> + <target>TARGET_DIMM</target> + <priority>LOW</priority> + </callout> + <deconfigure> + <target>TARGET_DIMM</target> + </deconfigure> + </hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_CEN_MSS_EFF_CONFIG_INCOMPATABLE_SPD_DRAM_GEN</rc> + <description>Incompatable SPD DRAM generation</description> + <FFDC>TARGET_DIMM</FFDC> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + <callout> + <target>TARGET_DIMM</target> + <priority>LOW</priority> + </callout> + <deconfigure> + <target>TARGET_DIMM</target> + </deconfigure> + </hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_CEN_MSS_EFF_CONFIG_INVALID_RDIMM_FREQ</rc> + <description>Invalid RDIMM ATTR_MSS_FREQ, freq is higher than 1600Mbps</description> + <FFDC>TARGET_MBA</FFDC> + <ffdc>INVALID_RDIMM_FREQ</ffdc> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + <callout> + <childTargets> + <parent>TARGET_MBA</parent> + <childType>TARGET_TYPE_DIMM</childType> + </childTargets> + <priority>LOW</priority> + </callout> + + <deconfigure> + <childTargets> + <parent>TARGET_MBA</parent> + <childType>TARGET_TYPE_DIMM</childType> + </childTargets> + </deconfigure> + +</hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_CEN_MSS_EFF_CONFIG_INVALID_RDIMM_VOLT</rc> + <description>Invalid RDIMM ATTR_MSS_VOLT, Volt is less than 1.2V</description> + <FFDC>TARGET_MBA</FFDC> + <ffdc>INVALID_RDIMM_VOLT</ffdc> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + <callout> + <childTargets> + <parent>TARGET_MBA</parent> + <childType>TARGET_TYPE_DIMM</childType> + </childTargets> + <priority>LOW</priority> + </callout> + + <deconfigure> + <childTargets> + <parent>TARGET_MBA</parent> + <childType>TARGET_TYPE_DIMM</childType> + </childTargets> + </deconfigure> + +</hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_CEN_MSS_EFF_CONFIG_INVALID_RDIMM_RCD_IBT</rc> + <description>Invalid RDIMM_RCD_IBT</description> + <FFDC>TARGET_MBA</FFDC> + <ffdc>INVALID_RDIMM_RCD_IBT_U32ARRAY_0_0</ffdc> + <ffdc>INVALID_RDIMM_RCD_IBT_U32ARRAY_0_1</ffdc> + <ffdc>INVALID_RDIMM_RCD_IBT_U32ARRAY_1_0</ffdc> + <ffdc>INVALID_RDIMM_RCD_IBT_U32ARRAY_1_1</ffdc> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + <callout> + <childTargets> + <parent>TARGET_MBA</parent> + <childType>TARGET_TYPE_DIMM</childType> + </childTargets> + <priority>LOW</priority> + </callout> + + <deconfigure> + <childTargets> + <parent>TARGET_MBA</parent> + <childType>TARGET_TYPE_DIMM</childType> + </childTargets> + </deconfigure> + +</hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_CEN_MSS_EFF_CONFIG_INVALID_RDIMM_RCD_OUTPUT_TIMING</rc> + <description>Invalid RDIMM_RCD_OUTPUT_TIMING</description> + <FFDC>TARGET_MBA</FFDC> + <ffdc>INVALID_RDIMM_RCD_OUTPUT_TIMING_U8ARRAY_0_0</ffdc> + <ffdc>INVALID_RDIMM_RCD_OUTPUT_TIMING_U8ARRAY_0_1</ffdc> + <ffdc>INVALID_RDIMM_RCD_OUTPUT_TIMING_U8ARRAY_1_0</ffdc> + <ffdc>INVALID_RDIMM_RCD_OUTPUT_TIMING_U8ARRAY_1_1</ffdc> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + <callout> + <childTargets> + <parent>TARGET_MBA</parent> + <childType>TARGET_TYPE_DIMM</childType> + </childTargets> + <priority>LOW</priority> + </callout> + + <deconfigure> + <childTargets> + <parent>TARGET_MBA</parent> + <childType>TARGET_TYPE_DIMM</childType> + </childTargets> + </deconfigure> + +</hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_CEN_MSS_EFF_CONFIG_LRDIMM_INVALID_EXEC</rc> + <description>Invalid exec of mss_lrdimm_eff_config function in + mss_eff_config </description> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + </hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_CEN_MSS_EFF_CONFIG_INVALID_TERM_EXEC</rc> + <description>Invalid exec of mss_eff_config_termination function in + mss_eff_config </description> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + </hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_CEN_MSS_EFF_CONFIG_DDR4_INVALID_EXEC</rc> + <description>Invalid exec of mss_eff_config_ddr4 function in + mss_eff_config </description> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + </hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_CEN_MSS_EFF_CONFIG_MISMATCH_EMPTY</rc> + <description>Plug rule violation, one position is empty but other are present + </description> + <FFDC>TARGET_MBA</FFDC> + <ffdc>CUR_DIMM_SPD_VALID_U8ARRAY_0_0</ffdc> + <ffdc>CUR_DIMM_SPD_VALID_U8ARRAY_0_1</ffdc> + <ffdc>CUR_DIMM_SPD_VALID_U8ARRAY_1_0</ffdc> + <ffdc>CUR_DIMM_SPD_VALID_U8ARRAY_1_1</ffdc> + <callout> + <procedure>MEMORY_PLUGGING_ERROR</procedure> + <priority>HIGH</priority> + </callout> + <callout> + <childTargets> + <parent>TARGET_MBA</parent> + <childType>TARGET_TYPE_DIMM</childType> + </childTargets> + <priority>HIGH</priority> + </callout> + + <deconfigure> + <childTargets> + <parent>TARGET_MBA</parent> + <childType>TARGET_TYPE_DIMM</childType> + </childTargets> + </deconfigure> + +</hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_CEN_MSS_EFF_CONFIG_MISMATCH_SIDE</rc> + <description>Plug rule violation, sides do not match + </description> + <FFDC>TARGET_MBA</FFDC> + <ffdc>CUR_DIMM_SPD_VALID_U8ARRAY_0_0</ffdc> + <ffdc>CUR_DIMM_SPD_VALID_U8ARRAY_0_1</ffdc> + <ffdc>CUR_DIMM_SPD_VALID_U8ARRAY_1_0</ffdc> + <ffdc>CUR_DIMM_SPD_VALID_U8ARRAY_1_1</ffdc> + + <callout> + <procedure>MEMORY_PLUGGING_ERROR</procedure> + <priority>HIGH</priority> + </callout> + <callout> + <childTargets> + <parent>TARGET_MBA</parent> + <childType>TARGET_TYPE_DIMM</childType> + </childTargets> + <priority>HIGH</priority> + </callout> + + <deconfigure> + <childTargets> + <parent>TARGET_MBA</parent> + <childType>TARGET_TYPE_DIMM</childType> + </childTargets> + </deconfigure> + +</hwpError> + + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_CEN_MSS_EFF_CONFIG_MISMATCH_TOP</rc> + <description>Plug rule violation, top and bottom do not match + </description> + <FFDC>TARGET_MBA</FFDC> + <ffdc>CUR_DIMM_SPD_VALID_U8ARRAY_0_0</ffdc> + <ffdc>CUR_DIMM_SPD_VALID_U8ARRAY_0_1</ffdc> + <ffdc>CUR_DIMM_SPD_VALID_U8ARRAY_1_0</ffdc> + <ffdc>CUR_DIMM_SPD_VALID_U8ARRAY_1_1</ffdc> + + <callout> + <procedure>MEMORY_PLUGGING_ERROR</procedure> + <priority>HIGH</priority> + </callout> + <callout> + <childTargets> + <parent>TARGET_MBA</parent> + <childType>TARGET_TYPE_DIMM</childType> + </childTargets> + <priority>HIGH</priority> + </callout> + + <deconfigure> + <childTargets> + <parent>TARGET_MBA</parent> + <childType>TARGET_TYPE_DIMM</childType> + </childTargets> + </deconfigure> + +</hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_CEN_MSS_EFF_CONFIG_INCOMPATABLE_DRAM_GEN</rc> + <description>Incompatable DRAM generation + </description> + <FFDC>TARGET_MBA</FFDC> + <ffdc>DRAM_DEVICE_TYPE_0_0</ffdc> + <ffdc>DRAM_DEVICE_TYPE_0_1</ffdc> + <ffdc>DRAM_DEVICE_TYPE_1_0</ffdc> + <ffdc>DRAM_DEVICE_TYPE_1_1</ffdc> + + <callout> + <procedure>MEMORY_PLUGGING_ERROR</procedure> + <priority>HIGH</priority> + </callout> + <callout> + <childTargets> + <parent>TARGET_MBA</parent> + <childType>TARGET_TYPE_DIMM</childType> + </childTargets> + <priority>HIGH</priority> + </callout> + + <deconfigure> + <childTargets> + <parent>TARGET_MBA</parent> + <childType>TARGET_TYPE_DIMM</childType> + </childTargets> + </deconfigure> + +</hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_CEN_MSS_EFF_CONFIG_INCOMPATABLE_DIMM_TYPE</rc> + <description>Incompatable DIMM type + </description> + <FFDC>TARGET_MBA</FFDC> + <ffdc>MODULE_TYPE_0_0</ffdc> + <ffdc>MODULE_TYPE_0_1</ffdc> + <ffdc>MODULE_TYPE_1_0</ffdc> + <ffdc>MODULE_TYPE_1_1</ffdc> + + <callout> + <procedure>MEMORY_PLUGGING_ERROR</procedure> + <priority>HIGH</priority> + </callout> + <callout> + <childTargets> + <parent>TARGET_MBA</parent> + <childType>TARGET_TYPE_DIMM</childType> + </childTargets> + <priority>HIGH</priority> + </callout> + + <deconfigure> + <childTargets> + <parent>TARGET_MBA</parent> + <childType>TARGET_TYPE_DIMM</childType> + </childTargets> + </deconfigure> + +</hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_CEN_MSS_EFF_CONFIG_INCOMPATABLE_DIMM_RANKS</rc> + <description>Incompatable DIMM ranks + </description> + <FFDC>TARGET_MBA</FFDC> + <ffdc>NUM_RANKS_0_0</ffdc> + <ffdc>NUM_RANKS_0_1</ffdc> + <ffdc>NUM_RANKS_1_0</ffdc> + <ffdc>NUM_RANKS_1_1</ffdc> + + <callout> + <procedure>MEMORY_PLUGGING_ERROR</procedure> + <priority>HIGH</priority> + </callout> + <callout> + <childTargets> + <parent>TARGET_MBA</parent> + <childType>TARGET_TYPE_DIMM</childType> + </childTargets> + <priority>HIGH</priority> + </callout> + + <deconfigure> + <childTargets> + <parent>TARGET_MBA</parent> + <childType>TARGET_TYPE_DIMM</childType> + </childTargets> + </deconfigure> + +</hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_CEN_MSS_EFF_CONFIG_INCOMPATABLE_DIMM_BANKS</rc> + <description>Incompatable DIMM banks + </description> + <FFDC>TARGET_MBA</FFDC> + <ffdc>SDRAM_BANKS_0_0</ffdc> + <ffdc>SDRAM_BANKS_0_1</ffdc> + <ffdc>SDRAM_BANKS_1_0</ffdc> + <ffdc>SDRAM_BANKS_1_1</ffdc> + + <callout> + <procedure>MEMORY_PLUGGING_ERROR</procedure> + <priority>HIGH</priority> + </callout> + <callout> + <childTargets> + <parent>TARGET_MBA</parent> + <childType>TARGET_TYPE_DIMM</childType> + </childTargets> + <priority>HIGH</priority> + </callout> + + <deconfigure> + <childTargets> + <parent>TARGET_MBA</parent> + <childType>TARGET_TYPE_DIMM</childType> + </childTargets> + </deconfigure> + +</hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_CEN_MSS_EFF_CONFIG_INCOMPATABLE_DIMM_ROWS</rc> + <description>Incompatable DIMM rows + </description> + <FFDC>TARGET_MBA</FFDC> + <ffdc>SDRAM_ROWS_0_0</ffdc> + <ffdc>SDRAM_ROWS_0_1</ffdc> + <ffdc>SDRAM_ROWS_1_0</ffdc> + <ffdc>SDRAM_ROWS_1_1</ffdc> + + <callout> + <procedure>MEMORY_PLUGGING_ERROR</procedure> + <priority>HIGH</priority> + </callout> + <callout> + <childTargets> + <parent>TARGET_MBA</parent> + <childType>TARGET_TYPE_DIMM</childType> + </childTargets> + <priority>HIGH</priority> + </callout> + + <deconfigure> + <childTargets> + <parent>TARGET_MBA</parent> + <childType>TARGET_TYPE_DIMM</childType> + </childTargets> + </deconfigure> + +</hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_CEN_MSS_EFF_CONFIG_INCOMPATABLE_DIMM_COLUMNS</rc> + <description>Incompatable DIMM columns + </description> + <FFDC>TARGET_MBA</FFDC> + <ffdc>SDRAM_COLS_0_0</ffdc> + <ffdc>SDRAM_COLS_0_1</ffdc> + <ffdc>SDRAM_COLS_1_0</ffdc> + <ffdc>SDRAM_COLS_1_1</ffdc> + + <callout> + <procedure>MEMORY_PLUGGING_ERROR</procedure> + <priority>HIGH</priority> + </callout> + <callout> + <childTargets> + <parent>TARGET_MBA</parent> + <childType>TARGET_TYPE_DIMM</childType> + </childTargets> + <priority>HIGH</priority> + </callout> + + <deconfigure> + <childTargets> + <parent>TARGET_MBA</parent> + <childType>TARGET_TYPE_DIMM</childType> + </childTargets> + </deconfigure> + +</hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_CEN_MSS_EFF_CONFIG_INCOMPATABLE_DRAM_BUS_WIDTH</rc> + <description>Incompatable DRAM primary bus width + </description> + <FFDC>TARGET_MBA</FFDC> + <ffdc>BUS_WIDTH_0_0</ffdc> + <ffdc>BUS_WIDTH_0_1</ffdc> + <ffdc>BUS_WIDTH_1_0</ffdc> + <ffdc>BUS_WIDTH_1_1</ffdc> + + <callout> + <procedure>MEMORY_PLUGGING_ERROR</procedure> + <priority>HIGH</priority> + </callout> + <callout> + <childTargets> + <parent>TARGET_MBA</parent> + <childType>TARGET_TYPE_DIMM</childType> + </childTargets> + <priority>HIGH</priority> + </callout> + + <deconfigure> + <childTargets> + <parent>TARGET_MBA</parent> + <childType>TARGET_TYPE_DIMM</childType> + </childTargets> + </deconfigure> + +</hwpError> + + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_CEN_MSS_EFF_CONFIG_UNSUPPORTED_MODULE_MEMORY_BUS_WIDTH</rc> + <description>Unsupported DRAM bus width, only 64bit with ECC extension is allowed + </description> + <ffdc>MODULE_MEMORY_BUS_WIDTH</ffdc> + <FFDC>TARGET_MBA</FFDC> + <callout> + <procedure>CODE</procedure> + <priority>LOW</priority> + </callout> + <callout> + <childTargets> + <parent>TARGET_MBA</parent> + <childType>TARGET_TYPE_DIMM</childType> + </childTargets> + <priority>HIGH</priority> + </callout> + <deconfigure> + <childTargets> + <parent>TARGET_MBA</parent> + <childType>TARGET_TYPE_DIMM</childType> + </childTargets> + </deconfigure> + +</hwpError> + + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_CEN_MSS_EFF_CONFIG_INCOMPATABLE_DRAM_WIDTH</rc> + <description>Incompatable DRAM width + </description> + <FFDC>TARGET_MBA</FFDC> + <ffdc>DRAM_WIDTH_0_0</ffdc> + <ffdc>DRAM_WIDTH_0_1</ffdc> + <ffdc>DRAM_WIDTH_1_0</ffdc> + <ffdc>DRAM_WIDTH_1_1</ffdc> + + <callout> + <procedure>MEMORY_PLUGGING_ERROR</procedure> + <priority>HIGH</priority> + </callout> + <callout> + <childTargets> + <parent>TARGET_MBA</parent> + <childType>TARGET_TYPE_DIMM</childType> + </childTargets> + <priority>HIGH</priority> + </callout> + + <deconfigure> + <childTargets> + <parent>TARGET_MBA</parent> + <childType>TARGET_TYPE_DIMM</childType> + </childTargets> + </deconfigure> + +</hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_CEN_MSS_EFF_CONFIG_DRAM_DEVICE_ERROR</rc> + <description>Unknown DRAM type + </description> + <ffdc>DRAM_DEVICE_TYPE</ffdc> + <FFDC>TARGET_MBA</FFDC> + <callout> + <procedure>CODE</procedure> + <priority>LOW</priority> + </callout> + <callout> + <childTargets> + <parent>TARGET_MBA</parent> + <childType>TARGET_TYPE_DIMM</childType> + </childTargets> + <priority>HIGH</priority> + </callout> + + <deconfigure> + <childTargets> + <parent>TARGET_MBA</parent> + <childType>TARGET_TYPE_DIMM</childType> + </childTargets> + </deconfigure> + +</hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_CEN_MSS_EFF_CONFIG_MOD_TYPE_ERROR</rc> + <description>Unknown DIMM type + </description> + <ffdc>MOD_TYPE</ffdc> + <FFDC>TARGET_MBA</FFDC> + <callout> + <procedure>CODE</procedure> + <priority>LOW</priority> + </callout> + <callout> + <childTargets> + <parent>TARGET_MBA</parent> + <childType>TARGET_TYPE_DIMM</childType> + </childTargets> + <priority>HIGH</priority> + </callout> + + <deconfigure> + <childTargets> + <parent>TARGET_MBA</parent> + <childType>TARGET_TYPE_DIMM</childType> + </childTargets> + </deconfigure> + +</hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_CEN_MSS_EFF_CONFIG_SDRAM_BANK_ERROR</rc> + <description>Unknown DRAM bank + </description> + <ffdc>SDRAM_BANKS</ffdc> + <FFDC>TARGET_MBA</FFDC> + <callout> + <procedure>CODE</procedure> + <priority>LOW</priority> + </callout> + <callout> + <childTargets> + <parent>TARGET_MBA</parent> + <childType>TARGET_TYPE_DIMM</childType> + </childTargets> + <priority>HIGH</priority> + </callout> + <deconfigure> + <childTargets> + <parent>TARGET_MBA</parent> + <childType>TARGET_TYPE_DIMM</childType> + </childTargets> + </deconfigure> + +</hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_CEN_MSS_EFF_CONFIG_SDRAM_ROWS_ERROR</rc> + <description>Unknown DRAM rows + </description> + <ffdc>SDRAM_ROWS</ffdc> + <FFDC>TARGET_MBA</FFDC> + <callout> + <procedure>CODE</procedure> + <priority>LOW</priority> + </callout> + <callout> + <childTargets> + <parent>TARGET_MBA</parent> + <childType>TARGET_TYPE_DIMM</childType> + </childTargets> + <priority>HIGH</priority> + </callout> + <deconfigure> + <childTargets> + <parent>TARGET_MBA</parent> + <childType>TARGET_TYPE_DIMM</childType> + </childTargets> + </deconfigure> + +</hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_CEN_MSS_EFF_CONFIG_SDRAM_COLS_ERROR</rc> + <description>Unknown DRAM cols + </description> + <ffdc>SDRAM_COLS</ffdc> + <FFDC>TARGET_MBA</FFDC> + <callout> + <procedure>CODE</procedure> + <priority>LOW</priority> + </callout> + <callout> + <childTargets> + <parent>TARGET_MBA</parent> + <childType>TARGET_TYPE_DIMM</childType> + </childTargets> + <priority>HIGH</priority> + </callout> + <deconfigure> + <childTargets> + <parent>TARGET_MBA</parent> + <childType>TARGET_TYPE_DIMM</childType> + </childTargets> + </deconfigure> + +</hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_CEN_MSS_EFF_CONFIG_DRAM_WIDTH_16_ERROR</rc> + <description>Unsupported DRAM width x16 + </description> + <ffdc>DRAM_WIDTH</ffdc> + <FFDC>TARGET_MBA</FFDC> + <callout> + <procedure>CODE</procedure> + <priority>LOW</priority> + </callout> + <callout> + <childTargets> + <parent>TARGET_MBA</parent> + <childType>TARGET_TYPE_DIMM</childType> + </childTargets> + <priority>HIGH</priority> + </callout> + <deconfigure> + <childTargets> + <parent>TARGET_MBA</parent> + <childType>TARGET_TYPE_DIMM</childType> + </childTargets> + </deconfigure> + +</hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_CEN_MSS_EFF_CONFIG_DRAM_WIDTH_32_ERROR</rc> + <description>Unsupported DRAM width x32 + </description> + <ffdc>DRAM_WIDTH</ffdc> + <FFDC>TARGET_MBA</FFDC> + <callout> + <procedure>CODE</procedure> + <priority>LOW</priority> + </callout> + <callout> + <childTargets> + <parent>TARGET_MBA</parent> + <childType>TARGET_TYPE_DIMM</childType> + </childTargets> + <priority>HIGH</priority> + </callout> + <deconfigure> + <childTargets> + <parent>TARGET_MBA</parent> + <childType>TARGET_TYPE_DIMM</childType> + </childTargets> + </deconfigure> + +</hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_CEN_MSS_EFF_CONFIG_DRAM_WIDTH_ERROR</rc> + <description>Unknown DRAM width + </description> + <FFDC>DRAM_WIDTH</FFDC> + <FFDC>TARGET_MBA</FFDC> + <callout> + <procedure>CODE</procedure> + <priority>LOW</priority> + </callout> + <callout> + <childTargets> + <parent>TARGET_MBA</parent> + <childType>TARGET_TYPE_DIMM</childType> + </childTargets> + <priority>HIGH</priority> + </callout> + <deconfigure> + <childTargets> + <parent>TARGET_MBA</parent> + <childType>TARGET_TYPE_DIMM</childType> + </childTargets> + </deconfigure> + +</hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_CEN_MSS_EFF_CONFIG_DRAM_DENSITY_ERR</rc> + <description>Unsupported DRAM density + </description> + <ffdc>SDRAM_DENSITY</ffdc> + <FFDC>TARGET_MBA</FFDC> + <callout> + <procedure>CODE</procedure> + <priority>LOW</priority> + </callout> + <callout> + <childTargets> + <parent>TARGET_MBA</parent> + <childType>TARGET_TYPE_DIMM</childType> + </childTargets> + <priority>HIGH</priority> + </callout> + <deconfigure> + <childTargets> + <parent>TARGET_MBA</parent> + <childType>TARGET_TYPE_DIMM</childType> + </childTargets> + </deconfigure> + +</hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_CEN_MSS_EFF_CONFIG_CWL_CALC_ERR</rc> + <description>Error calculating CWL + </description> + <ffdc>CWL_VAL</ffdc> + <FFDC>TARGET_MBA</FFDC> + <callout> + <procedure>CODE</procedure> + <priority>LOW</priority> + </callout> + <callout> + <childTargets> + <parent>TARGET_MBA</parent> + <childType>TARGET_TYPE_DIMM</childType> + </childTargets> + <priority>HIGH</priority> + </callout> + <deconfigure> + <childTargets> + <parent>TARGET_MBA</parent> + <childType>TARGET_TYPE_DIMM</childType> + </childTargets> + </deconfigure> + +</hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_CEN_MSS_EFF_CONFIG_RDIMM_UNSUPPORTED_TYPE</rc> + <description>Currently unsupported IBM_TYPE + </description> + <ffdc>UNSUPPORTED_VAL</ffdc> + <FFDC>TARGET_MBA</FFDC> + <callout> + <procedure>CODE</procedure> + <priority>LOW</priority> + </callout> + <callout> + <childTargets> + <parent>TARGET_MBA</parent> + <childType>TARGET_TYPE_DIMM</childType> + </childTargets> + <priority>HIGH</priority> + </callout> + <deconfigure> + <childTargets> + <parent>TARGET_MBA</parent> + <childType>TARGET_TYPE_DIMM</childType> + </childTargets> + </deconfigure> + +</hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_CEN_MSS_EFF_CONFIG_UDIMM_UNSUPPORTED_TYPE</rc> + <description>Currently unsupported IBM_TYPE + </description> + <ffdc>UNSUPPORTED_VAL</ffdc> + <FFDC>TARGET_MBA</FFDC> + <callout> + <procedure>CODE</procedure> + <priority>LOW</priority> + </callout> + <callout> + <childTargets> + <parent>TARGET_MBA</parent> + <childType>TARGET_TYPE_DIMM</childType> + </childTargets> + <priority>HIGH</priority> + </callout> + <deconfigure> + <childTargets> + <parent>TARGET_MBA</parent> + <childType>TARGET_TYPE_DIMM</childType> + </childTargets> + </deconfigure> + +</hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_CEN_MSS_EFF_CONFIG_DIMM_UNSUPPORTED_TYPE</rc> + <description>Currently unsupported IBM_TYPE + </description> + <ffdc>UNSUPPORTED_VAL</ffdc> + <FFDC>TARGET_MBA</FFDC> + <callout> + <procedure>CODE</procedure> + <priority>LOW</priority> + </callout> + <callout> + <childTargets> + <parent>TARGET_MBA</parent> + <childType>TARGET_TYPE_DIMM</childType> + </childTargets> + <priority>HIGH</priority> + </callout> + <deconfigure> + <childTargets> + <parent>TARGET_MBA</parent> + <childType>TARGET_TYPE_DIMM</childType> + </childTargets> + </deconfigure> + +</hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_CEN_MSS_EFF_CONFIG_MSS_FREQ</rc> + <description>Invalid ATTR_MSS_FREQ + </description> + <FFDC>TARGET_MBA</FFDC> + <ffdc>FREQ_VAL</ffdc> + <callout> + <procedure>CODE</procedure> + <priority>LOW</priority> + </callout> + <callout> + <childTargets> + <parent>TARGET_MBA</parent> + <childType>TARGET_TYPE_DIMM</childType> + </childTargets> + <priority>HIGH</priority> + </callout> + <deconfigure> + <childTargets> + <parent>TARGET_MBA</parent> + <childType>TARGET_TYPE_DIMM</childType> + </childTargets> + </deconfigure> + +</hwpError> + + +</hwpErrors> diff --git a/src/import/chips/centaur/procedures/xml/error_info/p9c_memory_mss_eff_config_rank_group_errors.xml b/src/import/chips/centaur/procedures/xml/error_info/p9c_memory_mss_eff_config_rank_group_errors.xml new file mode 100644 index 000000000..c4dcab3ed --- /dev/null +++ b/src/import/chips/centaur/procedures/xml/error_info/p9c_memory_mss_eff_config_rank_group_errors.xml @@ -0,0 +1,120 @@ +<!-- IBM_PROLOG_BEGIN_TAG --> +<!-- This is an automatically generated prolog. --> +<!-- --> +<!-- $Source: src/import/chips/centaur/procedures/xml/error_info/p9c_memory_mss_eff_config_rank_group_errors.xml $ --> +<!-- --> +<!-- OpenPOWER HostBoot Project --> +<!-- --> +<!-- Contributors Listed Below - COPYRIGHT 2016,2017 --> +<!-- [+] International Business Machines Corp. --> +<!-- --> +<!-- --> +<!-- Licensed under the Apache License, Version 2.0 (the "License"); --> +<!-- you may not use this file except in compliance with the License. --> +<!-- You may obtain a copy of the License at --> +<!-- --> +<!-- http://www.apache.org/licenses/LICENSE-2.0 --> +<!-- --> +<!-- Unless required by applicable law or agreed to in writing, software --> +<!-- distributed under the License is distributed on an "AS IS" BASIS, --> +<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or --> +<!-- implied. See the License for the specific language governing --> +<!-- permissions and limitations under the License. --> +<!-- --> +<!-- IBM_PROLOG_END_TAG --> + +<!-- --> +<!-- @file p9c_memory_mss_eff_config_rank_group_errors.xml --> +<!-- @brief Error xml for mss eff config rank group errors--> +<!-- --> +<!-- *HWP HWP Owner: Luke Mulkey <lwmulkey@us.ibm.com> --> +<!-- *HWP HWP Backup: Andre Marin <aamarin@us.ibm.com> --> +<!-- *HWP FW Owner: Bill Hoffa <wghoffa@us.ibm.com> --> +<!-- *HWP Team: Memory --> +<!-- *HWP Level: 1 --> +<!-- *HWP Consumed by: FSP:HB --> +<!-- --> + +<hwpErrors> +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_CEN_MSS_EFF_CONFIG_RANK_GROUP_NON_MATCH_RANKS</rc> + <description>Plug rule violation in mss_eff_config_rank_group + due to num_ranks_per_dimm not matching.</description> + <FFDC>TARGET_MBA</FFDC> + <callout> + <procedure>MEMORY_PLUGGING_ERROR</procedure> + <priority>HIGH</priority> + </callout> + + <callout> + <childTargets> + <parent>TARGET_MBA</parent> + <childType>TARGET_TYPE_DIMM</childType> + </childTargets> + <priority>MEDIUM</priority> + </callout> + + <deconfigure> + <childTargets> + <parent>TARGET_MBA</parent> + <childType>TARGET_TYPE_DIMM</childType> + </childTargets> + </deconfigure> +</hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_CEN_MSS_EFF_CONFIG_RANK_GROUP_NUM_RANKS_NEQ1</rc> + <description>Plug rule violation in mss_eff_config_rank_group + due to num_ranks_per_dimm not being set correctly.</description> + <FFDC>TARGET_MBA</FFDC> + <callout> + <procedure>MEMORY_PLUGGING_ERROR</procedure> + <priority>HIGH</priority> + </callout> + + <callout> + <childTargets> + <parent>TARGET_MBA</parent> + <childType>TARGET_TYPE_DIMM</childType> + </childTargets> + <priority>MEDIUM</priority> + </callout> + + <deconfigure> + <childTargets> + <parent>TARGET_MBA</parent> + <childType>TARGET_TYPE_DIMM</childType> + </childTargets> + </deconfigure> +</hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_CEN_MSS_EFF_CONFIG_RANK_GROUP_NO_MATCH</rc> + <description>Plug rule violation in mss_eff_config_rank_group + due to no matching case.</description> + <FFDC>TARGET_MBA</FFDC> + <callout> + <procedure>MEMORY_PLUGGING_ERROR</procedure> + <priority>HIGH</priority> + </callout> + + <callout> + <childTargets> + <parent>TARGET_MBA</parent> + <childType>TARGET_TYPE_DIMM</childType> + </childTargets> + <priority>MEDIUM</priority> + </callout> + + <deconfigure> + <childTargets> + <parent>TARGET_MBA</parent> + <childType>TARGET_TYPE_DIMM</childType> + </childTargets> + </deconfigure> +</hwpError> +<!-- *********************************************************************** --> +</hwpErrors> diff --git a/src/import/chips/centaur/procedures/xml/error_info/p9c_memory_mss_eff_config_termination_errors.xml b/src/import/chips/centaur/procedures/xml/error_info/p9c_memory_mss_eff_config_termination_errors.xml new file mode 100644 index 000000000..1e2243ebe --- /dev/null +++ b/src/import/chips/centaur/procedures/xml/error_info/p9c_memory_mss_eff_config_termination_errors.xml @@ -0,0 +1,800 @@ +<!-- IBM_PROLOG_BEGIN_TAG --> +<!-- This is an automatically generated prolog. --> +<!-- --> +<!-- $Source: src/import/chips/centaur/procedures/xml/error_info/p9c_memory_mss_eff_config_termination_errors.xml $ --> +<!-- --> +<!-- OpenPOWER HostBoot Project --> +<!-- --> +<!-- Contributors Listed Below - COPYRIGHT 2016,2017 --> +<!-- [+] International Business Machines Corp. --> +<!-- --> +<!-- --> +<!-- Licensed under the Apache License, Version 2.0 (the "License"); --> +<!-- you may not use this file except in compliance with the License. --> +<!-- You may obtain a copy of the License at --> +<!-- --> +<!-- http://www.apache.org/licenses/LICENSE-2.0 --> +<!-- --> +<!-- Unless required by applicable law or agreed to in writing, software --> +<!-- distributed under the License is distributed on an "AS IS" BASIS, --> +<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or --> +<!-- implied. See the License for the specific language governing --> +<!-- permissions and limitations under the License. --> +<!-- --> +<!-- IBM_PROLOG_END_TAG --> + +<!-- --> +<!-- @file p9c_memory_mss_eff_config_termination_errors.xml --> +<!-- @brief Error xml for mss eff config termination errors--> +<!-- --> +<!-- *HWP HWP Owner: Luke Mulkey <lwmulkey@us.ibm.com> --> +<!-- *HWP HWP Backup: Andre Marin <aamarin@us.ibm.com> --> +<!-- *HWP FW Owner: Bill Hoffa <wghoffa@us.ibm.com> --> +<!-- *HWP Team: Memory --> +<!-- *HWP Level: 1 --> +<!-- *HWP Consumed by: FSP:HB --> +<!-- --> + +<hwpErrors> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_CEN_MSS_EFF_CONFIG_TERMINATION_LRDIMM_REWRITE_INVALID_EXEC</rc> + <description>Invalid exec of LRDIMM function in mss_eff_config_termination + </description> + <FFDC>TARGET_MBA</FFDC> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + </hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_CEN_MSS_EFF_CONFIG_TERMINATION_LRDIMM_TERM_INVALID_EXEC</rc> + <description>Invalid exec of LRDIMM function in mss_eff_config_termination + </description> + <FFDC>TARGET_MBA</FFDC> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + </hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_CEN_MSS_EFF_CONFIG_TERMINATION_LRDIMM_DDR4_TERM_INVALID_EXEC</rc> + <description>Invalid exec of DDR4 LRDIMM function in mss_eff_config_termination + </description> + <FFDC>TARGET_MBA</FFDC> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + </hwpError> +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_CEN_MSS_EFF_CONFIG_TERMINATION_DDR4_TERM_ATTS_INVALID_EXEC</rc> + <description>Invalid exec of DDR4 term attrs function in mss_eff_config_termination + </description> + <FFDC>TARGET_MBA</FFDC> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + </hwpError> +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_CEN_MSS_EFF_CONFIG_TERMINATION_CREATE_DB_DDR4_INVALID_EXEC</rc> + <description>Invalid exec of DDR4 DB function in mss_eff_config_termination + </description> + <FFDC>TARGET_MBA</FFDC> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + </hwpError> +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_CEN_MSS_EFF_CONFIG_TERMINATION_CREATE_RCD_DDR4_INVALID_EXEC</rc> + <description>Invalid exec of DDR4 RCD function in mss_eff_config_termination + </description> + <FFDC>TARGET_MBA</FFDC> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + </hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_CEN_MSS_EFF_CONFIG_TERMINATION_INVALID_FREQ</rc> + <description>Invalid ATTR_MSS_FREQ value + </description> + <FFDC>TARGET_MBA</FFDC> + <FFDC>MSS_FREQ</FFDC> + <callout> + <target>TARGET_MBA</target> + <priority>LOW</priority> + </callout> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + <deconfigure> + <target>TARGET_MBA</target> + </deconfigure> + + </hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_CEN_MSS_EFF_CONFIG_TERMINATION_DIMM_USE_ERROR</rc> + <description>Invalid Dimm SIM this should not have happened + </description> + <FFDC>TARGET_MBA</FFDC> + <FFDC>DIMM_TYPE_U8</FFDC> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + </hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_CEN_MSS_EFF_CONFIG_TERMINATION_INVALID_KG3_FREQ_1333Mbps</rc> + <description>Invalid Dimm Type KG3 FREQ MBA0 where freq is less than equal + 1333Mbps</description> + <FFDC>TARGET_MBA</FFDC> + <FFDC>MSS_FREQ</FFDC> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + <callout> + <target>TARGET_MBA</target> + <priority>LOW</priority> + </callout> + + <deconfigure> + <target>TARGET_MBA</target> + </deconfigure> + +</hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_CEN_MSS_EFF_CONFIG_TERMINATION_INVALID_KG3_FREQ_1600Mbps</rc> + <description>Invalid Dimm Type KG3 FREQ MBA0 where freq is less than equal + 1600Mbps</description> + <FFDC>TARGET_MBA</FFDC> + <FFDC>MSS_FREQ</FFDC> + + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + <callout> + <target>TARGET_MBA</target> + <priority>LOW</priority> + </callout> + + <deconfigure> + <target>TARGET_MBA</target> + </deconfigure> + +</hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_CEN_MSS_EFF_CONFIG_TERMINATION_INVALID_KG3_FREQ_1333Mbps_MBA1</rc> + <description>Invalid Dimm Type KG3 FREQ MBA1 where freq is less than equal + 1333Mbps</description> + <FFDC>TARGET_MBA</FFDC> + <FFDC>MSS_FREQ</FFDC> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + <callout> + <target>TARGET_MBA</target> + <priority>LOW</priority> + </callout> + + <deconfigure> + <target>TARGET_MBA</target> + </deconfigure> + +</hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_CEN_MSS_EFF_CONFIG_TERMINATION_INVALID_KG3_FREQ_1600Mbps_MBA1</rc> + <description>Invalid Dimm Type KG3 FREQ MBA1 where freq is less than equal + 1600Mbps</description> + <FFDC>TARGET_MBA</FFDC> + <FFDC>MSS_FREQ</FFDC> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + <callout> + <target>TARGET_MBA</target> + <priority>LOW</priority> + </callout> + + <deconfigure> + <target>TARGET_MBA</target> + </deconfigure> + +</hwpError> +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_CEN_MSS_EFF_CONFIG_TERMINATION_INVALID_B4_1600Mbps</rc> + <description>Invalid Dimm Type B4 CDIMM 1600 MBA0/1 where freq is less than equal + 1600Mbps</description> + <FFDC>TARGET_MBA</FFDC> + <FFDC>MSS_FREQ</FFDC> + + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + <callout> + <target>TARGET_MBA</target> + <priority>LOW</priority> + </callout> + + <deconfigure> + <target>TARGET_MBA</target> + </deconfigure> + +</hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_CEN_MSS_EFF_CONFIG_TERMINATION_INVALID_UDIMM_1600Mbps_MBA0</rc> + <description>Invalid Dimm Type UDIMM FREQ MBA1 where freq is less than equal + 1600Mbps</description> + <FFDC>TARGET_MBA</FFDC> + <FFDC>MSS_FREQ</FFDC> + + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + <callout> + <target>TARGET_MBA</target> + <priority>LOW</priority> + </callout> + + <deconfigure> + <target>TARGET_MBA</target> + </deconfigure> + +</hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_CEN_MSS_EFF_CONFIG_TERMINATION_INVALID_UDIMM_MBA0</rc> + <description>Invalid Dimm Type UDIMM FREQ MBA0 where freq is greater than + 1600Mbps</description> + <FFDC>TARGET_MBA</FFDC> + <FFDC>MSS_FREQ</FFDC> + + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + <callout> + <target>TARGET_MBA</target> + <priority>LOW</priority> + </callout> + + <deconfigure> + <target>TARGET_MBA</target> + </deconfigure> + +</hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_CEN_MSS_EFF_CONFIG_TERMINATION_INVALID_UDIMM_1600Mbps_MBA1</rc> + <description>Invalid Dimm Type UDIMM FREQ MBA1 where freq is less than equal + 1600Mbps</description> + <FFDC>TARGET_MBA</FFDC> + <FFDC>MSS_FREQ</FFDC> + + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + <callout> + <target>TARGET_MBA</target> + <priority>LOW</priority> + </callout> + + <deconfigure> + <target>TARGET_MBA</target> + </deconfigure> + +</hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_CEN_MSS_EFF_CONFIG_TERMINATION_INVALID_UDIMM_MBA1</rc> + <description>Invalid Dimm Type UDIMM FREQ MBA1 where freq is greater than + 1600Mbps</description> + <FFDC>TARGET_MBA</FFDC> + <FFDC>MSS_FREQ</FFDC> + + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + <callout> + <target>TARGET_MBA</target> + <priority>LOW</priority> + </callout> + + <deconfigure> + <target>TARGET_MBA</target> + </deconfigure> + +</hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_CEN_MSS_EFF_CONFIG_TERMINATION_INVALID_RDIMM_MBA0_1333Mbps</rc> + <description>Invalid Dimm Type RDIMM FREQ MBA0 where freq is less than equal + 1333Mbps</description> + <FFDC>TARGET_MBA</FFDC> + <FFDC>MSS_FREQ</FFDC> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + <callout> + <target>TARGET_MBA</target> + <priority>LOW</priority> + </callout> + + <deconfigure> + <target>TARGET_MBA</target> + </deconfigure> + +</hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_CEN_MSS_EFF_CONFIG_TERMINATION_INVALID_RDIMM_MBA0_1600Mbps</rc> + <description>Invalid Dimm Type RDIMM FREQ MBA0 where freq is less than equal + 1600Mbps</description> + <FFDC>TARGET_MBA</FFDC> + <FFDC>MSS_FREQ</FFDC> + + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + <callout> + <target>TARGET_MBA</target> + <priority>LOW</priority> + </callout> + + <deconfigure> + <target>TARGET_MBA</target> + </deconfigure> + +</hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_CEN_MSS_EFF_CONFIG_TERMINATION_INVALID_RDIMM_MBA1_1066Mbps</rc> + <description>Invalid Dimm Type RDIMM FREQ MBA1 where freq is less than equal + 1066Mbps</description> + <FFDC>TARGET_MBA</FFDC> + <FFDC>MSS_FREQ</FFDC> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + <callout> + <target>TARGET_MBA</target> + <priority>LOW</priority> + </callout> + + <deconfigure> + <target>TARGET_MBA</target> + </deconfigure> + +</hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_CEN_MSS_EFF_CONFIG_TERMINATION_INVALID_RDIMM_MBA1_1333Mbps</rc> + <description>Invalid Dimm Type RDIMM FREQ MBA1 where freq is less than equal + 1333Mbps</description> + <FFDC>TARGET_MBA</FFDC> + <FFDC>MSS_FREQ</FFDC> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + <callout> + <target>TARGET_MBA</target> + <priority>LOW</priority> + </callout> + + <deconfigure> + <target>TARGET_MBA</target> + </deconfigure> + +</hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_CEN_MSS_EFF_CONFIG_TERMINATION_INVALID_RDIMM_MBA1_1600Mbps</rc> + <description>Invalid Dimm Type RDIMM FREQ MBA1 where freq is less than equal + 1600Mbps</description> + <FFDC>TARGET_MBA</FFDC> + <FFDC>MSS_FREQ</FFDC> + + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + <callout> + <target>TARGET_MBA</target> + <priority>LOW</priority> + </callout> + + <deconfigure> + <target>TARGET_MBA</target> + </deconfigure> + +</hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_CEN_MSS_EFF_CONFIG_TERMINATION_INVALID_LRDIMM_MBA1_1333Mbps</rc> + <description>Invalid Dimm Type LRDIMM FREQ MBA1 where freq is less than equal + 1333Mbps</description> + <FFDC>TARGET_MBA</FFDC> + <FFDC>MSS_FREQ</FFDC> + <callout> + <target>TARGET_MBA</target> + <priority>HIGH</priority> + </callout> + + <deconfigure> + <target>TARGET_MBA</target> + </deconfigure> + +</hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_CEN_MSS_EFF_CONFIG_TERMINATION_INVALID_LRDIMM_MBA1_1600Mbps</rc> + <description>Invalid Dimm Type LRDIMM FREQ MBA1 where freq is less than equal + 1600Mbps</description> + <FFDC>TARGET_MBA</FFDC> + <FFDC>MSS_FREQ</FFDC> + + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + <callout> + <target>TARGET_MBA</target> + <priority>LOW</priority> + </callout> + + <deconfigure> + <target>TARGET_MBA</target> + </deconfigure> + +</hwpError> +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_CEN_MSS_EFF_CONFIG_TERMINATION_ERROR_RETRIEVING_DIMMS</rc> + <description>Could Not get termination information for dimm</description> + <FFDC>TARGET_MBA</FFDC> + <FFDC>MSS_FREQ</FFDC> + <FFDC>DIMM_TYPE_U8</FFDC> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + <callout> + <target>TARGET_MBA</target> + <priority>LOW</priority> + </callout> + <deconfigure> + <target>TARGET_MBA</target> + </deconfigure> + +</hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_CEN_MSS_EFF_CONFIG_TERMINATION_SETTING_LRDIMM_TERM_ATTRS</rc> + <description>Termination ATTR Setup LRDIMM</description> + <FFDC>TARGET_MBA</FFDC> + <FFDC>MSS_FREQ</FFDC> + <FFDC>DIMM_TYPE_U8</FFDC> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + <callout> + <target>TARGET_MBA</target> + <priority>LOW</priority> + </callout> + <deconfigure> + <target>TARGET_MBA</target> + </deconfigure> + +</hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_CEN_MSS_EFF_CONFIG_TERMINATION_LRDIMM_ODT_RD</rc> + <description>FAILED ODT Setup LRDIMM</description> + <FFDC>TARGET_MBA</FFDC> + <FFDC>MSS_FREQ</FFDC> + <FFDC>DIMM_TYPE_U8</FFDC> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + <callout> + <target>TARGET_MBA</target> + <priority>LOW</priority> + </callout> + <deconfigure> + <target>TARGET_MBA</target> + </deconfigure> + +</hwpError> +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_CEN_MSS_EFF_CONFIG_TERMINATION_DDR4_RCD</rc> + <description>DDR4 RCD Setup Failed</description> + <FFDC>TARGET_MBA</FFDC> + <FFDC>MSS_FREQ</FFDC> + <FFDC>DIMM_TYPE_U8</FFDC> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + <callout> + <target>TARGET_MBA</target> + <priority>LOW</priority> + </callout> + <deconfigure> + <target>TARGET_MBA</target> + </deconfigure> + +</hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_CEN_MSS_EFF_CONFIG_TERMINATION_INVALID_DIMM_TYPE</rc> + <description>Invalid Dimm Type</description> + <FFDC>TARGET_MBA</FFDC> + <FFDC>MSS_FREQ</FFDC> + <FFDC>DIMM_TYPE_U8</FFDC> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + <callout> + <target>TARGET_MBA</target> + <priority>LOW</priority> + </callout> + <deconfigure> + <target>TARGET_MBA</target> + </deconfigure> + +</hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_CEN_MSS_EFF_CONFIG_TERMINATION_INVALID_RDIMM_FREQ</rc> + <description>Invalid RDIMM ATTR_MSS_FREQ, freq is 1866Mbps </description> + <FFDC>TARGET_MBA</FFDC> + <FFDC>MSS_FREQ</FFDC> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + <callout> + <target>TARGET_MBA</target> + <priority>LOW</priority> + </callout> + + <deconfigure> + <target>TARGET_MBA</target> + </deconfigure> + +</hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_CEN_MSS_EFF_CONFIG_TERMINATION_INVALID_RDIMM_VOLT</rc> + <description>Invalid RDIMM ATTR_MSS_VOLT, Volt is less than 1.2V + </description> + <FFDC>TARGET_MBA</FFDC> + <FFDC>MSS_VOLT</FFDC> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + <callout> + <target>TARGET_MBA</target> + <priority>LOW</priority> + </callout> + + <deconfigure> + <target>TARGET_MBA</target> + </deconfigure> + +</hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_CEN_MSS_EFF_CONFIG_TERMINATION_INVALID_DIMM_RCD_IBT</rc> + <description>Invalid DIMM_RCD_IBT + </description> + <FFDC>TARGET_MBA</FFDC> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + <callout> + <target>TARGET_MBA</target> + <priority>LOW</priority> + </callout> + + <deconfigure> + <target>TARGET_MBA</target> + </deconfigure> + +</hwpError> + + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_CEN_MSS_EFF_CONFIG_TERMINATION_INVALID_DIMM_RCD_MIRROR_MODE</rc> + <description>Invalid DIMM_RCD_MIRROR_MODE + </description> + <FFDC>TARGET_MBA</FFDC> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + <callout> + <target>TARGET_MBA</target> + <priority>LOW</priority> + </callout> + + <deconfigure> + <target>TARGET_MBA</target> + </deconfigure> + +</hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_CEN_MSS_EFF_CONFIG_TERMINATION_INVALID_CARD_TYPE_RLO</rc> + <description>Invalid Card Type RLO Settings + </description> + <FFDC>TARGET_MBA</FFDC> + <FFDC>DIMM_TYPE_U8</FFDC> + <callout> + <target>TARGET_MBA</target> + <priority>LOW</priority> + </callout> + + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + + <deconfigure> + <target>TARGET_MBA</target> + </deconfigure> + +</hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_CEN_MSS_EFF_CONFIG_TERMINATION_INVALID_KG4_FREQ_1333Mbps</rc> + <description>Invalid Dimm Type KG4 FREQ MBA0 where freq is less than equal + 1333Mbps</description> + <FFDC>TARGET_MBA</FFDC> + <FFDC>MSS_FREQ</FFDC> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + <callout> + <target>TARGET_MBA</target> + <priority>LOW</priority> + </callout> + + <deconfigure> + <target>TARGET_MBA</target> + </deconfigure> + +</hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_CEN_MSS_EFF_CONFIG_TERMINATION_INVALID_KG4_FREQ_1600Mbps</rc> + <description>Invalid Dimm Type KG4 FREQ MBA0 where freq is less than equal + 1600Mbps</description> + <FFDC>TARGET_MBA</FFDC> + <FFDC>MSS_FREQ</FFDC> + + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + <callout> + <target>TARGET_MBA</target> + <priority>LOW</priority> + </callout> + + <deconfigure> + <target>TARGET_MBA</target> + </deconfigure> + +</hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_CEN_MSS_EFF_CONFIG_TERMINATION_INVALID_KG4_FREQ_1333Mbps_MBA1</rc> + <description>Invalid Dimm Type KG4 FREQ MBA1 where freq is less than equal + 1333Mbps</description> + <FFDC>TARGET_MBA</FFDC> + <FFDC>MSS_FREQ</FFDC> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + <callout> + <target>TARGET_MBA</target> + <priority>LOW</priority> + </callout> + + <deconfigure> + <target>TARGET_MBA</target> + </deconfigure> + +</hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_CEN_MSS_EFF_CONFIG_TERMINATION_INVALID_KG4_FREQ_1600Mbps_MBA1</rc> + <description>Invalid Dimm Type KG4 FREQ MBA1 where freq is less than equal + 1600Mbps</description> + <FFDC>TARGET_MBA</FFDC> + <FFDC>MSS_FREQ</FFDC> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + <callout> + <target>TARGET_MBA</target> + <priority>LOW</priority> + </callout> + + <deconfigure> + <target>TARGET_MBA</target> + </deconfigure> + +</hwpError> + +</hwpErrors> diff --git a/src/import/chips/centaur/procedures/xml/error_info/p9c_memory_mss_eff_config_thermal_errors.xml b/src/import/chips/centaur/procedures/xml/error_info/p9c_memory_mss_eff_config_thermal_errors.xml new file mode 100644 index 000000000..4cf1c7b29 --- /dev/null +++ b/src/import/chips/centaur/procedures/xml/error_info/p9c_memory_mss_eff_config_thermal_errors.xml @@ -0,0 +1,56 @@ +<!-- IBM_PROLOG_BEGIN_TAG --> +<!-- This is an automatically generated prolog. --> +<!-- --> +<!-- $Source: src/import/chips/centaur/procedures/xml/error_info/p9c_memory_mss_eff_config_thermal_errors.xml $ --> +<!-- --> +<!-- OpenPOWER HostBoot Project --> +<!-- --> +<!-- Contributors Listed Below - COPYRIGHT 2016,2017 --> +<!-- [+] International Business Machines Corp. --> +<!-- --> +<!-- --> +<!-- Licensed under the Apache License, Version 2.0 (the "License"); --> +<!-- you may not use this file except in compliance with the License. --> +<!-- You may obtain a copy of the License at --> +<!-- --> +<!-- http://www.apache.org/licenses/LICENSE-2.0 --> +<!-- --> +<!-- Unless required by applicable law or agreed to in writing, software --> +<!-- distributed under the License is distributed on an "AS IS" BASIS, --> +<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or --> +<!-- implied. See the License for the specific language governing --> +<!-- permissions and limitations under the License. --> +<!-- --> +<!-- IBM_PROLOG_END_TAG --> + +<!-- --> +<!-- @file p9c_memory_mss_eff_config_thermal_errors.xml --> +<!-- @brief Error xml for mss eff config thermal errors--> +<!-- --> +<!-- *HWP HWP Owner: Luke Mulkey <lwmulkey@us.ibm.com> --> +<!-- *HWP HWP Backup: Andre Marin <aamarin@us.ibm.com> --> +<!-- *HWP FW Owner: Bill Hoffa <wghoffa@us.ibm.com> --> +<!-- *HWP Team: Memory --> +<!-- *HWP Level: 1 --> +<!-- *HWP Consumed by: FSP:HB --> +<!-- --> + +<hwpErrors> + <hwpError> + <rc>RC_CEN_MSS_DIMM_POWER_CURVE_DATA_INVALID</rc> + <description>DIMM power curve data is invalid</description> + <ffdc>FFDC_DATA_1</ffdc> + <ffdc>FFDC_DATA_2</ffdc> + <ffdc>FFDC_DATA_3</ffdc> + <ffdc>FFDC_DATA_4</ffdc> + <callout><target>MEM_CHIP</target><priority>HIGH</priority></callout> +</hwpError> + <hwpError> + <rc>RC_CEN_MSS_DIMM_NOT_FOUND_IN_POWER_TABLE</rc> + <description>Unable to find matching entry in DIMM power table</description> + <ffdc>FFDC_DATA_1</ffdc> + <ffdc>FFDC_DATA_2</ffdc> + <ffdc>FFDC_DATA_3</ffdc> + <callout><target>MEM_DIMM</target><priority>HIGH</priority></callout> +</hwpError> +</hwpErrors> diff --git a/src/import/chips/centaur/procedures/xml/error_info/p9c_memory_mss_eff_grouping_errors.xml b/src/import/chips/centaur/procedures/xml/error_info/p9c_memory_mss_eff_grouping_errors.xml new file mode 100644 index 000000000..20fadf6df --- /dev/null +++ b/src/import/chips/centaur/procedures/xml/error_info/p9c_memory_mss_eff_grouping_errors.xml @@ -0,0 +1,186 @@ +<!-- IBM_PROLOG_BEGIN_TAG --> +<!-- This is an automatically generated prolog. --> +<!-- --> +<!-- $Source: src/import/chips/centaur/procedures/xml/error_info/p9c_memory_mss_eff_grouping_errors.xml $ --> +<!-- --> +<!-- OpenPOWER HostBoot Project --> +<!-- --> +<!-- Contributors Listed Below - COPYRIGHT 2013,2017 --> +<!-- [+] International Business Machines Corp. --> +<!-- --> +<!-- --> +<!-- Licensed under the Apache License, Version 2.0 (the "License"); --> +<!-- you may not use this file except in compliance with the License. --> +<!-- You may obtain a copy of the License at --> +<!-- --> +<!-- http://www.apache.org/licenses/LICENSE-2.0 --> +<!-- --> +<!-- Unless required by applicable law or agreed to in writing, software --> +<!-- distributed under the License is distributed on an "AS IS" BASIS, --> +<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or --> +<!-- implied. See the License for the specific language governing --> +<!-- permissions and limitations under the License. --> +<!-- --> +<!-- IBM_PROLOG_END_TAG --> + +<!-- --> +<!-- @file p9c_memory_mss_eff_grouping_errors.xml --> +<!-- @brief Error xml for mss grouping errors--> +<!-- --> +<!-- *HWP HWP Owner: Luke Mulkey <lwmulkey@us.ibm.com> --> +<!-- *HWP HWP Backup: Andre Marin <aamarin@us.ibm.com> --> +<!-- *HWP FW Owner: Bill Hoffa <wghoffa@us.ibm.com> --> +<!-- *HWP Team: Memory --> +<!-- *HWP Level: 1 --> +<!-- *HWP Consumed by: FSP:HB --> +<!-- --> + +<hwpErrors> +<hwpError> + <rc>RC_CEN_MSS_EFF_CONFIG_MIRROR_DISABLED</rc> + <description> + mss_eff_grouping found that mirroring is disabled but mirror placement + policy is selective or flipped. Firmware error + - ATTR_MRW_ENHANCED_GROUPING_NO_MIRRORING is true + - ATTR_MEM_MIRROR_PLACEMENT_POLICY is SELECTIVE or FLIPPED + </description> + <ffdc>MIRROR_PLACEMENT_POLICY</ffdc> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> +</hwpError> + +<hwpError> + <rc>RC_CEN_MSS_EFF_CONFIG_INTERLEAVE_MODE_INVALID_MCS_PER_GROUP</rc> + <description> + mss_eff_grouping found that ATTR_ALL_MCS_IN_INTERLEAVING_GROUP + indicates interleaving mode. but ATTR_MSS_INTERLEAVE_ENABLE does not + contain a valid (>1) MCS per group number + </description> + <ffdc>ALL_MCS_IN_INTERLEAVING_GROUP</ffdc> + <ffdc>MSS_INTERLEAVE_ENABLE</ffdc> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> +</hwpError> + +<hwpError> + <rc>RC_CEN_MSS_EFF_CONFIG_CHECKERBOARD_MODE_INVALID_MCS_PER_GROUP</rc> + <description> + mss_eff_grouping found that ATTR_ALL_MCS_IN_INTERLEAVING_GROUP + indicates checkerboard mode. but ATTR_MSS_INTERLEAVE_ENABLE does not + contain a valid (>=1) MCS per group number + </description> + <ffdc>ALL_MCS_IN_INTERLEAVING_GROUP</ffdc> + <ffdc>MSS_INTERLEAVE_ENABLE</ffdc> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> +</hwpError> + +<hwpError> + <rc>RC_CEN_MSS_EFF_GROUPING_SELCTIVE_MODE_HTM_OCC_BAR</rc> + <description> + mss_eff_grouping found that there is an HTM or OCC Sandbox bar in + selective mode. This is not allowed + - ATTR_MEM_MIRROR_PLACEMENT_POLICY is SELECTIVE + </description> + <ffdc>HTM_BAR_SIZE</ffdc> + <ffdc>OCC_SANDBOX_BAR_SIZE</ffdc> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> +</hwpError> + +<hwpError> + <rc>RC_CEN_MSS_EFF_GROUPING_UNABLE_TO_GROUP_MCS</rc> + <description> + mss_eff_grouping found an MCS that could not be grouped. + This is a memory plugging error. Refer to memory plugging rules. + The attached Memory Buffer Chip is deconfigured as a result + </description> + <callout> + <procedure>MEMORY_PLUGGING_ERROR</procedure> + <priority>HIGH</priority> + </callout> + <callout> + <childTargets> + <parent>MEMBUF</parent> + <childType>TARGET_TYPE_DIMM</childType> + </childTargets> + <priority>LOW</priority> + </callout> + <deconfigure> + <childTargets> + <parent>MEMBUF</parent> + <childType>TARGET_TYPE_DIMM</childType> + </childTargets> + </deconfigure> +</hwpError> + +<hwpError> + <rc>RC_CEN_MSS_EFF_GROUPING_UNABLE_TO_GROUP</rc> + <description> + mss_eff_grouping found that one or more MCS could not be grouped. + Other errors have been logged for each MCS to deconfigure their + associated membuf chip and callout the MEMORY_PLUGGING_ERROR procedure. + </description> + <callout> + <procedure>MEMORY_PLUGGING_ERROR</procedure> + <priority>HIGH</priority> + </callout> +</hwpError> + +<hwpError> + <rc>RC_CEN_MSS_EFF_GROUPING_BASE_ADDRESS_OVERLAPS_MIRROR_ADDRESS</rc> + <description> + mss_eff_grouping found that the base address overlaps with the + mirror base address + </description> + <ffdc>PROC_CHIP</ffdc> + <ffdc>MEM_BASE_ADDR</ffdc> + <ffdc>MIRROR_BASE_ADDR</ffdc> + <ffdc>SIZE_NON_MIRROR</ffdc> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> +</hwpError> + +<hwpError> + <rc>RC_CEN_MSS_EFF_GROUPING_NO_SPACE_FOR_HTM_OCC_BAR</rc> + <description> + mss_eff_grouping found that there is not enough space available for + the HTM and OCC Sandbox bars + </description> + <ffdc>TOTAL_SIZE</ffdc> + <ffdc>HTM_BAR_SIZE</ffdc> + <ffdc>OCC_SANDBOX_BAR_SIZE</ffdc> + <ffdc>MIRROR_PLACEMENT_POLICY</ffdc> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> +</hwpError> + +<hwpError> + <rc>RC_CEN_MSS_EFF_GROUPING_HTM_OCC_BAR_NOT_POSSIBLE</rc> + <description> + mss_eff_grouping found that the HTM and OCC Sandbox bars are not + possible + </description> + <ffdc>TOTAL_SIZE</ffdc> + <ffdc>HTM_BAR_SIZE</ffdc> + <ffdc>OCC_SANDBOX_BAR_SIZE</ffdc> + <ffdc>MIRROR_PLACEMENT_POLICY</ffdc> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> +</hwpError> + +</hwpErrors> diff --git a/src/import/chips/centaur/procedures/xml/error_info/p9c_memory_mss_eff_mb_interleave_errors.xml b/src/import/chips/centaur/procedures/xml/error_info/p9c_memory_mss_eff_mb_interleave_errors.xml new file mode 100644 index 000000000..9dca5e059 --- /dev/null +++ b/src/import/chips/centaur/procedures/xml/error_info/p9c_memory_mss_eff_mb_interleave_errors.xml @@ -0,0 +1,45 @@ +<!-- IBM_PROLOG_BEGIN_TAG --> +<!-- This is an automatically generated prolog. --> +<!-- --> +<!-- $Source: src/import/chips/centaur/procedures/xml/error_info/p9c_memory_mss_eff_mb_interleave_errors.xml $ --> +<!-- --> +<!-- OpenPOWER HostBoot Project --> +<!-- --> +<!-- Contributors Listed Below - COPYRIGHT 2016,2017 --> +<!-- [+] International Business Machines Corp. --> +<!-- --> +<!-- --> +<!-- Licensed under the Apache License, Version 2.0 (the "License"); --> +<!-- you may not use this file except in compliance with the License. --> +<!-- You may obtain a copy of the License at --> +<!-- --> +<!-- http://www.apache.org/licenses/LICENSE-2.0 --> +<!-- --> +<!-- Unless required by applicable law or agreed to in writing, software --> +<!-- distributed under the License is distributed on an "AS IS" BASIS, --> +<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or --> +<!-- implied. See the License for the specific language governing --> +<!-- permissions and limitations under the License. --> +<!-- --> +<!-- IBM_PROLOG_END_TAG --> + +<!-- --> +<!-- @file p9c_memory_mss_eff_mb_interleave_errors.xml --> +<!-- @brief Error xml for mss eff_mb_interleave errors--> +<!-- --> +<!-- *HWP HWP Owner: Luke Mulkey <lwmulkey@us.ibm.com> --> +<!-- *HWP HWP Backup: Andre Marin <aamarin@us.ibm.com> --> +<!-- *HWP FW Owner: Bill Hoffa <wghoffa@us.ibm.com> --> +<!-- *HWP Team: Memory --> +<!-- *HWP Level: 1 --> +<!-- *HWP Consumed by: FSP:HB --> +<!-- --> + +<hwpErrors> +<hwpError> + <rc>RC_CEN_MSS_EFF_MB_INTERLEAVE_PLUG_DECONFIG_DIMM</rc> + <description>This DIMM violated a plugging rules for MBA interleaving.</description> + <deconfigure><target>DIMM</target></deconfigure> + <ffdc>CASE</ffdc> +</hwpError> +</hwpErrors> diff --git a/src/import/chips/centaur/procedures/xml/error_info/p9c_memory_mss_error_support.xml b/src/import/chips/centaur/procedures/xml/error_info/p9c_memory_mss_error_support.xml new file mode 100644 index 000000000..d262074f4 --- /dev/null +++ b/src/import/chips/centaur/procedures/xml/error_info/p9c_memory_mss_error_support.xml @@ -0,0 +1,50 @@ +<!-- IBM_PROLOG_BEGIN_TAG --> +<!-- This is an automatically generated prolog. --> +<!-- --> +<!-- $Source: src/import/chips/centaur/procedures/xml/error_info/p9c_memory_mss_error_support.xml $ --> +<!-- --> +<!-- OpenPOWER HostBoot Project --> +<!-- --> +<!-- Contributors Listed Below - COPYRIGHT 2017 --> +<!-- [+] International Business Machines Corp. --> +<!-- --> +<!-- --> +<!-- Licensed under the Apache License, Version 2.0 (the "License"); --> +<!-- you may not use this file except in compliance with the License. --> +<!-- You may obtain a copy of the License at --> +<!-- --> +<!-- http://www.apache.org/licenses/LICENSE-2.0 --> +<!-- --> +<!-- Unless required by applicable law or agreed to in writing, software --> +<!-- distributed under the License is distributed on an "AS IS" BASIS, --> +<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or --> +<!-- implied. See the License for the specific language governing --> +<!-- permissions and limitations under the License. --> +<!-- --> +<!-- IBM_PROLOG_END_TAG --> +<!-- --> +<!-- @file p9c_memory_mss_error_support_errors.xml --> +<!-- @brief Error xml for mss volt errors--> +<!-- --> +<!-- *HWP HWP Owner: Luke Mulkey <lwmulkey@us.ibm.com> --> +<!-- *HWP HWP Backup: Andre Marin <aamarin@us.ibm.com> --> +<!-- *HWP FW Owner: Bill Hoffa <wghoffa@us.ibm.com> --> +<!-- *HWP Team: Memory --> +<!-- *HWP Level: 1 --> +<!-- *HWP Consumed by: FSP:HB --> +<!-- --> + +<hwpErrors> + <hwpError> + <rc>RC_CEN_MSS_ERROR_SUPPORT_NUM_MBA_ERROR</rc> + <description> + mss_error support did not see 2 present membuf child MBAs returned + </description> + <ffdc>NUM_MBAS</ffdc> + <ffdc>TARGET_MEMBUF</ffdc> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + </hwpError> +</hwpErrors> diff --git a/src/import/chips/centaur/procedures/xml/error_info/p9c_memory_mss_freq_errors.xml b/src/import/chips/centaur/procedures/xml/error_info/p9c_memory_mss_freq_errors.xml new file mode 100644 index 000000000..8a5f1ffc9 --- /dev/null +++ b/src/import/chips/centaur/procedures/xml/error_info/p9c_memory_mss_freq_errors.xml @@ -0,0 +1,123 @@ +<!-- IBM_PROLOG_BEGIN_TAG --> +<!-- This is an automatically generated prolog. --> +<!-- --> +<!-- $Source: src/import/chips/centaur/procedures/xml/error_info/p9c_memory_mss_freq_errors.xml $ --> +<!-- --> +<!-- OpenPOWER HostBoot Project --> +<!-- --> +<!-- Contributors Listed Below - COPYRIGHT 2016,2017 --> +<!-- [+] International Business Machines Corp. --> +<!-- --> +<!-- --> +<!-- Licensed under the Apache License, Version 2.0 (the "License"); --> +<!-- you may not use this file except in compliance with the License. --> +<!-- You may obtain a copy of the License at --> +<!-- --> +<!-- http://www.apache.org/licenses/LICENSE-2.0 --> +<!-- --> +<!-- Unless required by applicable law or agreed to in writing, software --> +<!-- distributed under the License is distributed on an "AS IS" BASIS, --> +<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or --> +<!-- implied. See the License for the specific language governing --> +<!-- permissions and limitations under the License. --> +<!-- --> +<!-- IBM_PROLOG_END_TAG --> + +<!-- --> +<!-- @file p9c_memory_mss_freq_errors.xml --> +<!-- @brief Error xml for mss freq errors--> +<!-- --> +<!-- *HWP HWP Owner: Luke Mulkey <lwmulkey@us.ibm.com> --> +<!-- *HWP HWP Backup: Andre Marin <aamarin@us.ibm.com> --> +<!-- *HWP FW Owner: Bill Hoffa <wghoffa@us.ibm.com> --> +<!-- *HWP Team: Memory --> +<!-- *HWP Level: 1 --> +<!-- *HWP Consumed by: FSP:HB --> +<!-- --> + +<hwpErrors> + <hwpError> + <rc>RC_CEN_MSS_UNSUPPORTED_SPD_DATA_DDR4</rc> + <description>Invalid SPD data returned.</description> + <ffdc>MTB_DDR4</ffdc> + <ffdc>FTB_DDR4</ffdc> + <callout> + <target>DIMM_TARGET</target> + <priority>HIGH</priority> + </callout> + <deconfigure> + <target>DIMM_TARGET</target> + </deconfigure> +</hwpError> + <hwpError> + <rc>RC_CEN_MSS_UNSUPPORTED_SPD_DATA_DDR3</rc> + <description>Invalid SPD data returned.</description> + <ffdc>MTB_DIVIDEND</ffdc> + <ffdc>MTB_DIVISOR</ffdc> + <ffdc>FTB_DIVIDEND</ffdc> + <ffdc>FTB_DIVISOR</ffdc> + <callout> + <target>DIMM_TARGET</target> + <priority>HIGH</priority> + </callout> + <deconfigure> + <target>DIMM_TARGET</target> + </deconfigure> +</hwpError> + <hwpError> + <rc>RC_CEN_MSS_UNSUPPORTED_SPD_DATA_COMMON</rc> + <description>Invalid SPD data returned.</description> + <ffdc>MIN_TCK</ffdc> + <ffdc>MIN_TAA</ffdc> + <callout> + <target>TARGET</target> + <priority>HIGH</priority> + </callout> + <deconfigure> + <target>DIMM_TARGET</target> + </deconfigure> +</hwpError> + <hwpError> + <rc>RC_CEN_MSS_MODULE_TYPE_MIX</rc> + <description>Differing DIMM types in the same configuration.</description> + <ffdc>MODULE_TYPE</ffdc> + <callout> + <target>DIMM_TARGET</target> + <priority>HIGH</priority> + </callout> + <deconfigure> + <target>DIMM_TARGET</target> + </deconfigure> +</hwpError> + <hwpError> + <rc>RC_CEN_MSS_NO_COMMON_SUPPORTED_CL</rc> + <description>Current Configuration has no common supported CL Values.</description> + <ffdc>CL_SUPPORTED</ffdc> + <callout> + <target>DIMM_TARGET</target> + <priority>HIGH</priority> + </callout> + <deconfigure> + <target>DIMM_TARGET</target> + </deconfigure> +</hwpError> + <hwpError> + <rc>RC_CEN_MSS_EXCEED_TAA_MAX_NO_CL</rc> + <description>Exceeded TAA MAX with Lowest frequency. No compatable CL.</description> + <ffdc>CL_SUPPORTED</ffdc> + <callout> + <target>DIMM_TARGET</target> + <priority>HIGH</priority> + </callout> + <deconfigure> + <target>DIMM_TARGET</target> + </deconfigure> +</hwpError> + <hwpError> + <rc>RC_CEN_MSS_UNSUPPORTED_FREQ_CALCULATED</rc> + <description>The frequency calculated with spd data is not supported by the jedec standards.</description> + <ffdc>DIMM_MIN_FREQ</ffdc> +</hwpError> + + +</hwpErrors> diff --git a/src/import/chips/centaur/procedures/xml/error_info/p9c_memory_mss_volt_errors.xml b/src/import/chips/centaur/procedures/xml/error_info/p9c_memory_mss_volt_errors.xml new file mode 100644 index 000000000..8a79eb4f3 --- /dev/null +++ b/src/import/chips/centaur/procedures/xml/error_info/p9c_memory_mss_volt_errors.xml @@ -0,0 +1,121 @@ +<!-- IBM_PROLOG_BEGIN_TAG --> +<!-- This is an automatically generated prolog. --> +<!-- --> +<!-- $Source: src/import/chips/centaur/procedures/xml/error_info/p9c_memory_mss_volt_errors.xml $ --> +<!-- --> +<!-- OpenPOWER HostBoot Project --> +<!-- --> +<!-- Contributors Listed Below - COPYRIGHT 2016,2017 --> +<!-- [+] International Business Machines Corp. --> +<!-- --> +<!-- --> +<!-- Licensed under the Apache License, Version 2.0 (the "License"); --> +<!-- you may not use this file except in compliance with the License. --> +<!-- You may obtain a copy of the License at --> +<!-- --> +<!-- http://www.apache.org/licenses/LICENSE-2.0 --> +<!-- --> +<!-- Unless required by applicable law or agreed to in writing, software --> +<!-- distributed under the License is distributed on an "AS IS" BASIS, --> +<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or --> +<!-- implied. See the License for the specific language governing --> +<!-- permissions and limitations under the License. --> +<!-- --> +<!-- IBM_PROLOG_END_TAG --> + +<!-- --> +<!-- @file p9c_memory_mss_volt_errors.xml --> +<!-- @brief Error xml for mss volt errors--> +<!-- --> +<!-- *HWP HWP Owner: Luke Mulkey <lwmulkey@us.ibm.com> --> +<!-- *HWP HWP Backup: Andre Marin <aamarin@us.ibm.com> --> +<!-- *HWP FW Owner: Bill Hoffa <wghoffa@us.ibm.com> --> +<!-- *HWP Team: Memory --> +<!-- *HWP Level: 1 --> +<!-- *HWP Consumed by: FSP:HB --> +<!-- --> + +<hwpErrors> + <hwpError> + <rc>RC_CEN_MSS_VOLT_UNRECOGNIZED_DRAM_DEVICE_TYPE</rc> + <description>Unsupported DIMM type found. All dimms must be DDR3 or DDR4</description> + <ffdc>DEVICE_TYPE</ffdc> + <callout> + <target>DIMM_TARGET</target> + <priority>HIGH</priority> + </callout> + <deconfigure> + <target>DIMM_TARGET</target> + </deconfigure> + </hwpError> + <hwpError> + <rc>RC_CEN_MSS_VOLT_DDR_TYPE_MIXING_UNSUPPORTED</rc> + <description>Mixing of DDR3 and DDR4 not supported.</description> + <ffdc>DEVICE_TYPE</ffdc> + <callout> + <target>DIMM_DDR4_TARGET</target> + <priority>HIGH</priority> + </callout> + <deconfigure> + <target>DIMM_DDR4_TARGET</target> + </deconfigure> + </hwpError> + <hwpError> + <rc>RC_CEN_MSS_VOLT_DDR_TYPE_REQUIRED_VOLTAGE</rc> + <description>One or more DIMMs do not support required voltage for DDR type.</description> + <ffdc>DIMM_VOLTAGE</ffdc> + <callout> + <target>DIMM_UV_TARGET</target> + <priority>HIGH</priority> + </callout> + <deconfigure> + <target>DIMM_UV_TARGET</target> + </deconfigure> + </hwpError> + <hwpError> + <rc>RC_CEN_MSS_VOLT_DDR_TYPE_COMPLIANT_VOLTAGE</rc> + <description>One or more DIMMs do not support compliant voltage for DDR type.</description> + <ffdc>DIMM_VOLTAGE</ffdc> + <callout> + <target>DIMM_CV_TARGET</target> + <priority>HIGH</priority> + </callout> + <deconfigure> + <target>DIMM_CV_TARGET</target> + </deconfigure> + </hwpError> + +<!-- Original Source for RC_CEN_MSS_VOLT_TOLERATED_VOLTAGE_VIOLATION memory_errors.xml --> + <hwpError> + <rc>RC_CEN_MSS_VOLT_TOLERATED_VOLTAGE_VIOLATION</rc> + <description>One or more DIMMs classified non-functional has a tolerated voltage below selected voltage.</description> + <ffdc>DIMM_VOLTAGE</ffdc> + <!-- Deconfigure DIMM or Centaur --> + <deconfigure> + <target>CHIP_TARGET</target> + </deconfigure> + </hwpError> + + <hwpError> + <rc>RC_CEN_MSS_VOLT_OVERIDE_MIXING</rc> + <description>An override is trying to be applied to only a part of the voltage domain. It needs to be applied to the entire domain.</description> + <ffdc>OVERRIDE_TYPE</ffdc> + <ffdc>OVERRIDE_DOMAIN_TYPE</ffdc> + <callout> + <target>MEMB_TARGET</target> + <priority>HIGH</priority> + </callout> + </hwpError> + + <hwpError> + <rc>RC_CEN_MSS_VOLT_OVERIDE_UKNOWN</rc> + <description>An uknown override is trying to be applied to the voltage domain. It needs to be none, 1.2 or 1.35V. </description> + <ffdc>OVERRIDE_TYPE</ffdc> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + </hwpError> + +</hwpErrors> + |
