diff options
| author | Joe McGill <jmcgill@us.ibm.com> | 2017-08-09 00:30:09 -0500 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2017-08-29 12:31:55 -0400 |
| commit | 358011189860bb4b1c8f122076c9d2453aa97ebb (patch) | |
| tree | 7ba166d9b190dc91515449ab9506fb8986fa487b /src/import/chips/centaur | |
| parent | 3363a36c1d272ab0035be5d9652bf9339c4e7e5e (diff) | |
| download | talos-hostboot-358011189860bb4b1c8f122076c9d2453aa97ebb.tar.gz talos-hostboot-358011189860bb4b1c8f122076c9d2453aa97ebb.zip | |
Cumulus DMI -- apply MSB swap attribute, disable dynamic rpr, recal, sls_rcvy
Change-Id: I6e38b7afe0065b4889979328c075c0888291e24e
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/44394
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Dev-Ready: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: John G. Rell III <jgrell@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/45031
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/centaur')
| -rw-r--r-- | src/import/chips/centaur/procedures/hwp/initfiles/centaur_dmi_scom.C | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/src/import/chips/centaur/procedures/hwp/initfiles/centaur_dmi_scom.C b/src/import/chips/centaur/procedures/hwp/initfiles/centaur_dmi_scom.C index 55ef23129..b9ad5bc67 100644 --- a/src/import/chips/centaur/procedures/hwp/initfiles/centaur_dmi_scom.C +++ b/src/import/chips/centaur/procedures/hwp/initfiles/centaur_dmi_scom.C @@ -75,6 +75,8 @@ fapi2::ReturnCode centaur_dmi_scom(const fapi2::Target<fapi2::TARGET_TYPE_MEMBUF FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_IS_SIMULATION, TGT1, l_TGT1_ATTR_IS_SIMULATION)); uint64_t l_def_IS_HW = (l_TGT1_ATTR_IS_SIMULATION == literal_0); uint64_t l_def_IS_SIM = (l_TGT1_ATTR_IS_SIMULATION == literal_1); + fapi2::ATTR_EI_BUS_TX_MSBSWAP_Type l_TGT0_ATTR_EI_BUS_TX_MSBSWAP; + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_EI_BUS_TX_MSBSWAP, TGT0, l_TGT0_ATTR_EI_BUS_TX_MSBSWAP)); fapi2::buffer<uint64_t> l_scom_buffer; { FAPI_TRY(fapi2::getScom( TGT0, 0x8000b0000201043full, l_scom_buffer )); @@ -590,6 +592,8 @@ fapi2::ReturnCode centaur_dmi_scom(const fapi2::Target<fapi2::TARGET_TYPE_MEMBUF constexpr auto l_DMI_RX_RXCTL_RX_CTL_REGS_RX_DYN_RPR_ERR_CNTR1_DURATION_TAP7 = 0x7; l_scom_buffer.insert<55, 4, 60, uint64_t>(l_DMI_RX_RXCTL_RX_CTL_REGS_RX_DYN_RPR_ERR_CNTR1_DURATION_TAP7 ); l_scom_buffer.insert<61, 3, 61, uint64_t>(literal_0b101 ); + constexpr auto l_DMI_RX_RXCTL_RX_CTL_REGS_RX_DYN_RPR_DISABLE_ON = 0x1; + l_scom_buffer.insert<60, 1, 63, uint64_t>(l_DMI_RX_RXCTL_RX_CTL_REGS_RX_DYN_RPR_DISABLE_ON ); FAPI_TRY(fapi2::putScom(TGT0, 0x8009d8000201043full, l_scom_buffer)); } { @@ -597,6 +601,8 @@ fapi2::ReturnCode centaur_dmi_scom(const fapi2::Target<fapi2::TARGET_TYPE_MEMBUF constexpr auto l_DMI_RX_RXCTL_RX_CTL_REGS_RX_DYN_RECAL_OVERALL_TIMEOUT_SEL_TAP4 = 0x4; l_scom_buffer.insert<48, 3, 61, uint64_t>(l_DMI_RX_RXCTL_RX_CTL_REGS_RX_DYN_RECAL_OVERALL_TIMEOUT_SEL_TAP4 ); + constexpr auto l_DMI_RX_RXCTL_RX_CTL_REGS_RX_DYN_RECAL_SUSPEND_ON = 0x1; + l_scom_buffer.insert<51, 1, 63, uint64_t>(l_DMI_RX_RXCTL_RX_CTL_REGS_RX_DYN_RECAL_SUSPEND_ON ); FAPI_TRY(fapi2::putScom(TGT0, 0x800a18000201043full, l_scom_buffer)); } { @@ -736,6 +742,13 @@ fapi2::ReturnCode centaur_dmi_scom(const fapi2::Target<fapi2::TARGET_TYPE_MEMBUF FAPI_TRY(fapi2::putScom(TGT0, 0x800a80000201043full, l_scom_buffer)); } { + FAPI_TRY(fapi2::getScom( TGT0, 0x800a88000201043full, l_scom_buffer )); + + constexpr auto l_DMI_RX_RXCTL_RX_CTL_REGS_RX_SLS_RCVY_DISABLE_ON = 0x1; + l_scom_buffer.insert<48, 1, 63, uint64_t>(l_DMI_RX_RXCTL_RX_CTL_REGS_RX_SLS_RCVY_DISABLE_ON ); + FAPI_TRY(fapi2::putScom(TGT0, 0x800a88000201043full, l_scom_buffer)); + } + { FAPI_TRY(fapi2::getScom( TGT0, 0x800aa8000201043full, l_scom_buffer )); l_scom_buffer.insert<54, 6, 58, uint64_t>(literal_0b000000 ); @@ -822,6 +835,8 @@ fapi2::ReturnCode centaur_dmi_scom(const fapi2::Target<fapi2::TARGET_TYPE_MEMBUF l_scom_buffer.insert<48, 7, 57, uint64_t>(literal_0b0111111 ); constexpr auto l_DMI_RX_RXCTL_RX_CTL_REGS_RX_DYN_RPR_ERR_CNTR2_DURATION_TAP7 = 0x7; l_scom_buffer.insert<55, 4, 60, uint64_t>(l_DMI_RX_RXCTL_RX_CTL_REGS_RX_DYN_RPR_ERR_CNTR2_DURATION_TAP7 ); + constexpr auto l_DMI_RX_RXCTL_RX_CTL_REGS_RX_DYN_RPR_DISABLE2_ON = 0x1; + l_scom_buffer.insert<60, 1, 63, uint64_t>(l_DMI_RX_RXCTL_RX_CTL_REGS_RX_DYN_RPR_DISABLE2_ON ); FAPI_TRY(fapi2::putScom(TGT0, 0x800ae0000201043full, l_scom_buffer)); } { @@ -2438,6 +2453,13 @@ fapi2::ReturnCode centaur_dmi_scom(const fapi2::Target<fapi2::TARGET_TYPE_MEMBUF FAPI_TRY(fapi2::getScom( TGT0, 0x800c1c000201043full, l_scom_buffer )); l_scom_buffer.insert<48, 5, 59, uint64_t>(literal_0b00010 ); + + if ((l_TGT0_ATTR_EI_BUS_TX_MSBSWAP != fapi2::ENUM_ATTR_EI_BUS_TX_MSBSWAP_NO_SWAP)) + { + constexpr auto l_DMI_TX_TXCTL_TX_CTL_REGS_TX_MSBSWAP_MSBSWAP = 0x1; + l_scom_buffer.insert<53, 1, 63, uint64_t>(l_DMI_TX_TXCTL_TX_CTL_REGS_TX_MSBSWAP_MSBSWAP ); + } + FAPI_TRY(fapi2::putScom(TGT0, 0x800c1c000201043full, l_scom_buffer)); } { |
