apply rings from Centaur HW image

  cen_ringId.CH
  cen_ring_id.h
     add entries to hold multiple PLL rings, 8 in total

  cen_initf.C
  cen_pll_initf.C
  cen_pll_initf_errors.xml
    replace invocation of generated initfile HWP with putRing API calls
    (rings to be scanned gleamed from p8 cen assembly source)

    select correct PLL ring image based on NEST,MEM frequency

  cen_bucketX.txt
    define frequency points for each PLL bucket
    1 = 2000 MHz NEST, 1066 MHz MEM
    2 = 2000 MHz NEST, 1333 MHz MEM
    3 = 2000 MHz NEST, 1600 MHz MEM
    4 = 2000 MHz NEST, 1866 MHz MEM
    5 = 2400 MHz NEST, 1066 MHz MEM
    6 = 2400 MHz NEST, 1333 MHz MEM
    7 = 2400 MHz NEST, 1600 MHz MEM
    8 = 2400 MHz NEST, 1866 MHz MEM

  ipl_base.txt
  ipl_risk.txt
    remove frequency attributes from base attribute files

  scan_procedures.mk
    add rules to generate PLL buckets

Change-Id: I8aee5e82337800ea9afe9a9af12d8d34f6e1e01e
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50475
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: Richard J. Knight <rjknight@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50479
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>

12 files changed, 245 insertions, 226 deletions

diff --git a/src/import/chips/centaur/procedures/hwp/perv/cen_initf.C b/src/import/chips/centaur/procedures/hwp/perv/cen_initf.C
index 0e37ac75b..cd0fb34b1 100644
--- a/src/import/chips/centaur/procedures/hwp/perv/cen_initf.C
+++ b/src/import/chips/centaur/procedures/hwp/perv/cen_initf.C
@@ -44,13 +44,7 @@
 #include <cen_gen_scom_addresses.H>
 #include <cen_gen_scom_addresses_fixes.H>
 #include <centaur_misc_constants.H>
-
-#ifndef __HOSTBOOT_MODULE
-    #include <centaur_mbs_scan.H>
-    #include <centaur_mba_scan.H>
-    #include <centaur_dmi_scan.H>
-    #include <centaur_thermal_scan.H>
-#endif
+#include <cen_ring_id.h>
 
 //------------------------------------------------------------------------------
 // Function definitions
@@ -60,55 +54,36 @@ fapi2::ReturnCode
 cen_initf(const fapi2::Target<fapi2::TARGET_TYPE_MEMBUF_CHIP>& i_target)
 {
     FAPI_DBG("Start");
-
-#ifndef __HOSTBOOT_MODULE
-    fapi2::Target<fapi2::TARGET_TYPE_SYSTEM> FAPI_SYSTEM;
-    fapi2::ReturnCode l_rc;
-
-    // apply initfiles
-    ecmdChipTarget l_ecmd_target;
-    fapiTargetToEcmdTarget(i_target, l_ecmd_target);
-    ecmdEnableRingCache(l_ecmd_target);
-    FAPI_EXEC_HWP(l_rc, centaur_mbs_scan, i_target, FAPI_SYSTEM);
-
-    if (l_rc)
-    {
-        FAPI_ERR("Error from centaur_mbs_scan");
-        fapi2::current_err = l_rc;
-        goto fapi_try_exit;
-    }
-
-    FAPI_EXEC_HWP(l_rc, centaur_mba_scan, i_target);
-
-    if (l_rc)
-    {
-        FAPI_ERR("Error from centaur_mba_scan");
-        fapi2::current_err = l_rc;
-        goto fapi_try_exit;
-    }
-
-    FAPI_EXEC_HWP(l_rc, centaur_dmi_scan, i_target, FAPI_SYSTEM);
-
-    if (l_rc)
-    {
-        FAPI_ERR("Error from centaur_dmi_scan");
-        fapi2::current_err = l_rc;
-        goto fapi_try_exit;
-    }
-
-    FAPI_EXEC_HWP(l_rc, centaur_thermal_scan, i_target, FAPI_SYSTEM);
-
-    if (l_rc)
-    {
-        FAPI_ERR("Error from centaur_thermal_scan");
-        fapi2::current_err = l_rc;
-        goto fapi_try_exit;
-    }
-
-    ecmdDisableRingCache(l_ecmd_target);
+    FAPI_TRY(fapi2::putRing(i_target, tcn_mbs_func),
+             "Error from putRing (tcn_mbs_func)");
+    FAPI_TRY(fapi2::putRing(i_target, tcn_mbs_cmsk),
+             "Error from putRing (tcn_mbs_cmsk)");
+    FAPI_TRY(fapi2::putRing(i_target, tcn_mbi_cmsk),
+             "Error from putRing (tcn_mbi_cmsk)");
+    FAPI_TRY(fapi2::putRing(i_target, tcn_mbi_func),
+             "Error from putRing (tcn_mbi_func)");
+    FAPI_TRY(fapi2::putRing(i_target, tcn_mbi_gptr),
+             "Error from putRing (tcn_mbi_gptr)");
+    FAPI_TRY(fapi2::putRing(i_target, tcn_perv_func),
+             "Error from putRing (tcn_perv_func)");
+    FAPI_TRY(fapi2::putRing(i_target, tcn_dmi_func),
+             "Error from putRing (tcn_dmi_func)");
+    FAPI_TRY(fapi2::putRing(i_target, tcn_refr_func),
+             "Error from putRing (tcn_refr_func)");
+    FAPI_TRY(fapi2::putRing(i_target, tcn_refr_abst),
+             "Error from putRing (tcn_refr_abst)");
+    FAPI_TRY(fapi2::putRing(i_target, tcm_memn_cmsk),
+             "Error from putRing (tcm_memn_cmsk)");
+    FAPI_TRY(fapi2::putRing(i_target, tcm_mems_cmsk),
+             "Error from putRing (tcm_mems_cmsk)");
+    FAPI_TRY(fapi2::putRing(i_target, tcm_memn_func),
+             "Error from putRing (tcm_memn_func)");
+    FAPI_TRY(fapi2::putRing(i_target, tcm_mems_func),
+             "Error from putRing (tcm_mems_func)");
+    FAPI_TRY(fapi2::putRing(i_target, tcm_perv_func),
+             "Error from putRing (tcm_perv_func)");
 
 fapi_try_exit:
-#endif
     FAPI_DBG("End");
     return fapi2::current_err;
 }
diff --git a/src/import/chips/centaur/procedures/hwp/perv/cen_pll_initf.C b/src/import/chips/centaur/procedures/hwp/perv/cen_pll_initf.C
index ff3f30edd..5595eac90 100644
--- a/src/import/chips/centaur/procedures/hwp/perv/cen_pll_initf.C
+++ b/src/import/chips/centaur/procedures/hwp/perv/cen_pll_initf.C
@@ -44,12 +44,7 @@
 #include <cen_gen_scom_addresses.H>
 #include <cen_gen_scom_addresses_fixes.H>
 #include <centaur_misc_constants.H>
-
-#ifndef __HOSTBOOT_MODULE
-    #include <centaur_cleanup_pll_scan.H>
-    #include <centaur_nest_pll_scan.H>
-    #include <centaur_mem_pll_scan.H>
-#endif
+#include <cen_ringId.H>
 
 //------------------------------------------------------------------------------
 // Function definitions
@@ -59,58 +54,90 @@ fapi2::ReturnCode
 cen_pll_initf(const fapi2::Target<fapi2::TARGET_TYPE_MEMBUF_CHIP>& i_target)
 {
     FAPI_DBG("Start");
-    fapi2::buffer<uint64_t> l_clk_region = 0;
-
-#ifndef __HOSTBOOT_MODULE
     fapi2::Target<fapi2::TARGET_TYPE_SYSTEM> FAPI_SYSTEM;
-    fapi2::ReturnCode l_rc;
-    // apply initfiles
-    ecmdChipTarget l_ecmd_target;
-    fapiTargetToEcmdTarget(i_target, l_ecmd_target);
-    ecmdEnableRingCache(l_ecmd_target);
-    FAPI_EXEC_HWP(l_rc, centaur_cleanup_pll_scan, i_target, FAPI_SYSTEM);
-
-    if (l_rc)
+    fapi2::ATTR_CEN_MSS_FREQ_Type l_mem_freq;
+    fapi2::ATTR_FREQ_MCA_MHZ_Type l_nest_freq;
+    RingId_t l_tp_pll_bndy_ring_id;
+
+    // retreive attributes definining NEST/DMI and MEM PLL frequencies
+    FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_FREQ_MCA_MHZ,
+                           FAPI_SYSTEM,
+                           l_nest_freq),
+             "Error from FAPI_ATTR_GET (ATTR_FREQ_MCA_MHZ)");
+    FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CEN_MSS_FREQ,
+                           i_target,
+                           l_mem_freq),
+             "Error from FAPI_ATTR_GET (ATTR_CEN_MSS_FREQ)");
+
+    if ((l_nest_freq == 2000) && (l_mem_freq == 1066))
     {
-        FAPI_ERR("Error from centaur_cleanup_pll_scan");
-        fapi2::current_err = l_rc;
-        goto fapi_try_exit;
+        l_tp_pll_bndy_ring_id = tp_pll_bndy_bucket_1;
     }
-
-    FAPI_EXEC_HWP(l_rc, centaur_mem_pll_scan, i_target, FAPI_SYSTEM);
-
-    if (l_rc)
+    else if ((l_nest_freq == 2000) && (l_mem_freq == 1333))
     {
-        FAPI_ERR("Error from centaur_mem_pll_scan");
-        fapi2::current_err = l_rc;
-        goto fapi_try_exit;
+        l_tp_pll_bndy_ring_id = tp_pll_bndy_bucket_2;
     }
-
-    FAPI_EXEC_HWP(l_rc, centaur_nest_pll_scan, i_target, FAPI_SYSTEM);
-
-    if (l_rc)
+    else if ((l_nest_freq == 2000) && (l_mem_freq == 1600))
     {
-        FAPI_ERR("Error from centaur_nest_pll_scan");
-        fapi2::current_err = l_rc;
-        goto fapi_try_exit;
+        l_tp_pll_bndy_ring_id = tp_pll_bndy_bucket_3;
+    }
+    else if ((l_nest_freq == 2000) && (l_mem_freq == 1866))
+    {
+        l_tp_pll_bndy_ring_id = tp_pll_bndy_bucket_4;
+    }
+    else if ((l_nest_freq == 2400) && (l_mem_freq == 1066))
+    {
+        l_tp_pll_bndy_ring_id = tp_pll_bndy_bucket_5;
+    }
+    else if ((l_nest_freq == 2400) && (l_mem_freq == 1333))
+    {
+        l_tp_pll_bndy_ring_id = tp_pll_bndy_bucket_6;
+    }
+    else if ((l_nest_freq == 2400) && (l_mem_freq == 1600))
+    {
+        l_tp_pll_bndy_ring_id = tp_pll_bndy_bucket_7;
+    }
+    else if ((l_nest_freq == 2400) && (l_mem_freq == 1866))
+    {
+        l_tp_pll_bndy_ring_id = tp_pll_bndy_bucket_8;
+    }
+    else
+    {
+        FAPI_ASSERT(false,
+                    fapi2::CEN_PLL_INITF_UNSUPPORTED_FREQUENCY().
+                    set_TARGET(i_target).
+                    set_NEST_FREQ(l_nest_freq).
+                    set_MEM_FREQ(l_mem_freq),
+                    "Unsupported NEST/MEM frequency combination!");
     }
 
-    ecmdDisableRingCache(l_ecmd_target);
-#endif
-
-    // issue setpulse
-    l_clk_region.setBit<0, 2>();  // CLOCK_CMD = pulse
-    l_clk_region.setBit<4>();     // CLOCK_REGION_PERV
-    l_clk_region.setBit<11>();    // CLOCK_REGION_PLL
-    l_clk_region.setBit<21>();    // SEL_THOLD_NSL
-    FAPI_TRY(fapi2::putScom(i_target, CEN_CLK_REGION_PCB, l_clk_region),
-             "Error from putScom (CEN_CLK_REGION_PCB, setpulse)");
+    // scan init PLL GPTR/FUNC chains
+    FAPI_TRY(fapi2::putRing(i_target, tp_pll_gptr),
+             "Error from putRing (tp_pll_gptr)");
+    FAPI_TRY(fapi2::putRing(i_target, tp_pll_func),
+             "Error from putRing (tp_pll_func)");
 
-    FAPI_TRY(fapi2::delay(0, 10000));
+    // scan init PLL bndy chain
+    FAPI_TRY(fapi2::putRing(i_target, l_tp_pll_bndy_ring_id),
+             "Error from putRing (tp_pll_bndy, 0x%02X)",
+             l_tp_pll_bndy_ring_id);
 
-    l_clk_region.flush<0>();
-    FAPI_TRY(fapi2::putScom(i_target, CEN_CLK_REGION_PCB, l_clk_region),
-             "Error from putScom (CEN_CLK_REGION_PCB, clear)");
+    // issue setpulse
+    {
+        fapi2::buffer<uint64_t> l_clk_region = 0;
+        l_clk_region.setBit<0, 2>();  // CLOCK_CMD = pulse
+        l_clk_region.setBit<4>();     // CLOCK_REGION_PERV
+        l_clk_region.setBit<11>();    // CLOCK_REGION_PLL
+        l_clk_region.setBit<21>();    // SEL_THOLD_NSL
+        FAPI_TRY(fapi2::putScom(i_target, CEN_CLK_REGION_PCB, l_clk_region),
+                 "Error from putScom (CEN_CLK_REGION_PCB, setpulse)");
+
+        FAPI_TRY(fapi2::delay(0, 10000));
+
+        l_clk_region.flush<0>();
+        FAPI_TRY(fapi2::putScom(i_target, CEN_CLK_REGION_PCB, l_clk_region),
+                 "Error from putScom (CEN_CLK_REGION_PCB, clear)");
+    }
 
 fapi_try_exit:
     FAPI_DBG("End");
diff --git a/src/import/chips/centaur/procedures/xml/error_info/cen_chiplet_init_errors.xml b/src/import/chips/centaur/procedures/xml/error_info/cen_chiplet_init_errors.xml
index 479d042d8..c927251e6 100644
--- a/src/import/chips/centaur/procedures/xml/error_info/cen_chiplet_init_errors.xml
+++ b/src/import/chips/centaur/procedures/xml/error_info/cen_chiplet_init_errors.xml
@@ -25,7 +25,6 @@
 <hwpErrors>
   <!-- ******************************************************************** -->
   <hwpError>
-    <sbeError/>
     <rc>RC_CEN_CHIPLET_INIT_HEADER_MISMATCH</rc>
     <description>
       Procedure: cen_chiplet_init
diff --git a/src/import/chips/centaur/procedures/xml/error_info/cen_common_errors.xml b/src/import/chips/centaur/procedures/xml/error_info/cen_common_errors.xml
index ec85598a7..09ee325fe 100644
--- a/src/import/chips/centaur/procedures/xml/error_info/cen_common_errors.xml
+++ b/src/import/chips/centaur/procedures/xml/error_info/cen_common_errors.xml
@@ -25,7 +25,6 @@
 <hwpErrors>
   <!-- ******************************************************************** -->
   <hwpError>
-    <sbeError/>
     <rc>RC_CEN_COMMON_ARRAYINIT_POLL_OPCG_DONE_TIMEOUT</rc>
     <description>
       Routine: cen_arrayinit_module
@@ -35,7 +34,6 @@
   </hwpError>
   <!-- ******************************************************************** -->
   <hwpError>
-    <sbeError/>
     <rc>RC_CEN_COMMON_SCAN0_POLL_OPCG_DONE_TIMEOUT</rc>
     <description>
       Routine: cen_scan0_module
@@ -45,7 +43,6 @@
   </hwpError>
   <!-- ******************************************************************** -->
   <hwpError>
-    <sbeError/>
     <rc>RC_CEN_COMMON_REPAIR_LOADER_TIMEOUT</rc>
     <description>
       Routine: cen_repair_loader
@@ -55,7 +52,6 @@
   </hwpError>
   <!-- ******************************************************************** -->
   <hwpError>
-    <sbeError/>
     <rc>RC_CEN_COMMON_ECC_TRAP_REG_ERROR</rc>
     <description>
       Routine: cen_repair_loader
@@ -65,7 +61,6 @@
   </hwpError>
   <!-- ******************************************************************** -->
   <hwpError>
-    <sbeError/>
     <rc>RC_CEN_COMMON_MISMATCH_IN_EXPECTED_REPAIR_LOADER_STATUS</rc>
     <description>
       Routine: cen_repair_loader
@@ -75,7 +70,6 @@
   </hwpError>
   <!-- ******************************************************************** -->
   <hwpError>
-    <sbeError/>
     <rc>RC_CEN_COMMON_REPAIR_LOADER_BUSY</rc>
     <description>
       Routine: cen_repair_loader
@@ -85,7 +79,6 @@
   </hwpError>
   <!-- ******************************************************************** -->
   <hwpError>
-    <sbeError/>
     <rc>RC_CEN_COMMON_STARTCLOCKS_CLK_THOLDS_CHECK_ERR</rc>
     <description>
       Procedure: cen_comomn_startclocks
diff --git a/src/import/chips/centaur/procedures/xml/error_info/cen_pll_initf_errors.xml b/src/import/chips/centaur/procedures/xml/error_info/cen_pll_initf_errors.xml
index c2808b781..06bd9f6e5 100644
--- a/src/import/chips/centaur/procedures/xml/error_info/cen_pll_initf_errors.xml
+++ b/src/import/chips/centaur/procedures/xml/error_info/cen_pll_initf_errors.xml
@@ -25,7 +25,6 @@
 <hwpErrors>
   <!-- ******************************************************************** -->
   <hwpError>
-    <sbeError/>
     <rc>RC_CEN_PLL_INITF_UNSUPPORTED_FREQUENCY</rc>
     <description>
       Procedure: cen_pll_initf
diff --git a/src/import/chips/centaur/procedures/xml/error_info/cen_pll_setup_errors.xml b/src/import/chips/centaur/procedures/xml/error_info/cen_pll_setup_errors.xml
index e26081742..a4dbc6539 100644
--- a/src/import/chips/centaur/procedures/xml/error_info/cen_pll_setup_errors.xml
+++ b/src/import/chips/centaur/procedures/xml/error_info/cen_pll_setup_errors.xml
@@ -25,7 +25,6 @@
 <hwpErrors>
   <!-- ******************************************************************** -->
   <hwpError>
-    <sbeError/>
     <rc>RC_CEN_PLL_SETUP_POLL_NEST_PLL_LOCK_TIMEOUT</rc>
     <description>
       Procedure: cen_pll_setup
@@ -35,7 +34,6 @@
   </hwpError>
   <!-- ******************************************************************** -->
   <hwpError>
-    <sbeError/>
     <rc>RC_CEN_PLL_SETUP_POLL_MEM_PLL_LOCK_TIMEOUT</rc>
     <description>
       Procedure: cen_pll_setup
diff --git a/src/import/chips/centaur/procedures/xml/error_info/cen_tp_chiplet_init1_errors.xml b/src/import/chips/centaur/procedures/xml/error_info/cen_tp_chiplet_init1_errors.xml
index ed43ccbcf..cdd5930ea 100644
--- a/src/import/chips/centaur/procedures/xml/error_info/cen_tp_chiplet_init1_errors.xml
+++ b/src/import/chips/centaur/procedures/xml/error_info/cen_tp_chiplet_init1_errors.xml
@@ -25,7 +25,6 @@
 <hwpErrors>
   <!-- ******************************************************************** -->
   <hwpError>
-    <sbeError/>
     <rc>RC_CEN_TP_CHIPLET_INIT1_VDD_SENSE_ERR</rc>
     <description>
       Procedure: cen_tp_chiplet_init1
diff --git a/src/import/chips/centaur/procedures/xml/error_info/cen_tp_chiplet_init2_errors.xml b/src/import/chips/centaur/procedures/xml/error_info/cen_tp_chiplet_init2_errors.xml
index 30e80912f..076388b21 100644
--- a/src/import/chips/centaur/procedures/xml/error_info/cen_tp_chiplet_init2_errors.xml
+++ b/src/import/chips/centaur/procedures/xml/error_info/cen_tp_chiplet_init2_errors.xml
@@ -25,7 +25,6 @@
 <hwpErrors>
   <!-- ******************************************************************** -->
   <hwpError>
-    <sbeError/>
     <rc>RC_CEN_TP_CHIPLET_INIT2_ERR_CLK_CNTL</rc>
     <description>
       Procedure: cen_tp_chiplet_init2
diff --git a/src/import/chips/centaur/procedures/xml/error_info/cen_tp_chiplet_init3_errors.xml b/src/import/chips/centaur/procedures/xml/error_info/cen_tp_chiplet_init3_errors.xml
index b99fad026..554976c8b 100644
--- a/src/import/chips/centaur/procedures/xml/error_info/cen_tp_chiplet_init3_errors.xml
+++ b/src/import/chips/centaur/procedures/xml/error_info/cen_tp_chiplet_init3_errors.xml
@@ -25,7 +25,6 @@
 <hwpErrors>
   <!-- ******************************************************************** -->
   <hwpError>
-    <sbeError/>
     <rc>RC_CEN_TP_CHIPLET_INIT3_ERR_CLK_STATUS</rc>
     <description>
       Procedure: cen_tp_chiplet_init3
@@ -35,7 +34,6 @@
   </hwpError>
   <!-- ******************************************************************** -->
   <hwpError>
-    <sbeError/>
     <rc>RC_CEN_TP_CHIPLET_INIT3_NOT_ALL_CLK_RUNNING</rc>
     <description>
       Procedure: cen_tp_chiplet_init3
diff --git a/src/import/chips/centaur/utils/imageProcs/cen_ringId.C b/src/import/chips/centaur/utils/imageProcs/cen_ringId.C
index 7f94273e2..b2a98f4ae 100644
--- a/src/import/chips/centaur/utils/imageProcs/cen_ringId.C
+++ b/src/import/chips/centaur/utils/imageProcs/cen_ringId.C
@@ -135,8 +135,14 @@ const GenRingIdList RING_ID_LIST_COMMON[] =
     {"tp_pib_fuse"  , 0x60, 0x01, 0x01, CEN_RING, 0x00031005},
     {"tp_pib_gptr"  , 0x61, 0x01, 0x01, CEN_RING, 0x00031002},
     {"tp_pll_bndy"  , 0x62, 0x01, 0x01, CEN_RING, 0x01030088},
-    {"tp_pib_repr"  , 0x63, 0x01, 0x01, CEN_RING, 0x00031006},
-    {"tp_vitl"      , 0x64, 0x01, 0x01, CEN_RING, 0x0003800c},
+    {"tp_pll_bndy_bucket_1", 0x63, 0x01, 0x01, CEN_RING, 0x01030088},
+    {"tp_pll_bndy_bucket_2", 0x64, 0x01, 0x01, CEN_RING, 0x01030088},
+    {"tp_pll_bndy_bucket_3", 0x65, 0x01, 0x01, CEN_RING, 0x01030088},
+    {"tp_pll_bndy_bucket_4", 0x66, 0x01, 0x01, CEN_RING, 0x01030088},
+    {"tp_pll_bndy_bucket_5", 0x67, 0x01, 0x01, CEN_RING, 0x01030088},
+    {"tp_pll_bndy_bucket_6", 0x68, 0x01, 0x01, CEN_RING, 0x01030088},
+    {"tp_pll_bndy_bucket_7", 0x69, 0x01, 0x01, CEN_RING, 0x01030088},
+    {"tp_pll_bndy_bucket_8", 0x6a, 0x01, 0x01, CEN_RING, 0x01030088},
 };
 
 const RingVariantOrder RING_VARIANT_ORDER[] = { BASE, RL, NOT_VALID };
diff --git a/src/import/chips/centaur/utils/imageProcs/cen_ringId.H b/src/import/chips/centaur/utils/imageProcs/cen_ringId.H
index fb58b76ee..b24ba963e 100644
--- a/src/import/chips/centaur/utils/imageProcs/cen_ringId.H
+++ b/src/import/chips/centaur/utils/imageProcs/cen_ringId.H
@@ -144,10 +144,16 @@ enum RingOffset
     tp_pib_fuse   = 96,
     tp_pib_gptr   = 97,
     tp_pll_bndy   = 98,
-    tp_pib_repr   = 99,
-    tp_vitl       = 100,
-    // Instance rings
-    // ** none **
+    tp_pll_bndy_bucket_1 = 99,
+    tp_pll_bndy_bucket_2 = 100,
+    tp_pll_bndy_bucket_3 = 101,
+    tp_pll_bndy_bucket_4 = 102,
+    tp_pll_bndy_bucket_5 = 103,
+    tp_pll_bndy_bucket_6 = 104,
+    tp_pll_bndy_bucket_7 = 105,
+    tp_pll_bndy_bucket_8 = 106
+                           // Instance rings
+                           // ** none **
 };
 
 static const ChipletData_t g_chipletData =
@@ -263,8 +269,14 @@ static const RingProperties_t RING_PROPERTIES[NUM_RING_IDS] =
     { CEN::tp_pib_fuse  , "tp_pib_fuse"  , CEN_TYPE },
     { CEN::tp_pib_gptr  , "tp_pib_gptr"  , CEN_TYPE },
     { CEN::tp_pll_bndy  , "tp_pll_bndy"  , CEN_TYPE },
-    { CEN::tp_pib_repr  , "tp_pib_repr"  , CEN_TYPE },
-    { CEN::tp_vitl      , "tp_vitl"      , CEN_TYPE },
+    { CEN::tp_pll_bndy_bucket_1, "tp_pll_bndy_bucket_1", CEN_TYPE },
+    { CEN::tp_pll_bndy_bucket_2, "tp_pll_bndy_bucket_2", CEN_TYPE },
+    { CEN::tp_pll_bndy_bucket_3, "tp_pll_bndy_bucket_3", CEN_TYPE },
+    { CEN::tp_pll_bndy_bucket_4, "tp_pll_bndy_bucket_4", CEN_TYPE },
+    { CEN::tp_pll_bndy_bucket_5, "tp_pll_bndy_bucket_5", CEN_TYPE },
+    { CEN::tp_pll_bndy_bucket_6, "tp_pll_bndy_bucket_6", CEN_TYPE },
+    { CEN::tp_pll_bndy_bucket_7, "tp_pll_bndy_bucket_7", CEN_TYPE },
+    { CEN::tp_pll_bndy_bucket_8, "tp_pll_bndy_bucket_8", CEN_TYPE }
 };
 
 #else
@@ -372,6 +384,14 @@ static const RingProperties_t RING_PROPERTIES[NUM_RING_IDS] =
     { CEN::tp_pll_bndy  , CEN_TYPE },
     { CEN::tp_pib_repr  , CEN_TYPE },
     { CEN::tp_vitl      , CEN_TYPE },
+    { CEN::tp_pll_bndy_bucket_1, CEN_TYPE },
+    { CEN::tp_pll_bndy_bucket_2, CEN_TYPE },
+    { CEN::tp_pll_bndy_bucket_3, CEN_TYPE },
+    { CEN::tp_pll_bndy_bucket_4, CEN_TYPE },
+    { CEN::tp_pll_bndy_bucket_5, CEN_TYPE },
+    { CEN::tp_pll_bndy_bucket_6, CEN_TYPE },
+    { CEN::tp_pll_bndy_bucket_7, CEN_TYPE },
+    { CEN::tp_pll_bndy_bucket_8, CEN_TYPE }
 };
 
 #endif // __PPE__
diff --git a/src/import/chips/centaur/utils/imageProcs/cen_ring_id.h b/src/import/chips/centaur/utils/imageProcs/cen_ring_id.h
index d7dfd33ec..e50a41eca 100644
--- a/src/import/chips/centaur/utils/imageProcs/cen_ring_id.h
+++ b/src/import/chips/centaur/utils/imageProcs/cen_ring_id.h
@@ -35,107 +35,113 @@
 
 enum RingID
 {
-    tcm_perv_cmsk = 0, //0x00
-    tcm_perv_lbst = 1, //0x01
-    tcm_perv_gptr = 2, //0x02
-    tcm_perv_func = 3, //0x03
-    tcm_perv_time = 4, //0x04
-    tcm_perv_abst = 5, //0x05
-    tcm_perv_repr = 6, //0x06
-    tcm_perv_FARR = 7, //0x07
-    tcm_memn_time = 8, //0x08
-    tcm_memn_regf = 9, //0x09
-    tcm_memn_gptr = 10,//0x0A
-    tcm_memn_func = 11,//0x0B
-    tcm_memn_lbst = 12,//0x0C
-    tcm_memn_cmsk = 13,//0x0D
-    tcm_memn_abst = 14,//0x0E
-    tcm_memn_repr = 15,//0x0F
-    tcm_memn_FARR = 16,//0x10
-    tcm_mems_time = 17,//0x11
-    tcm_mems_regf = 18,//0x12
-    tcm_mems_gptr = 19,//0x13
-    tcm_mems_func = 20,//0x14
-    tcm_mems_lbst = 21,//0x15
-    tcm_mems_cmsk = 22,//0x16
-    tcm_mems_bndy = 23,//0x17
-    tcm_mems_abst = 24,//0x18
-    tcm_mems_repr = 25,//0x19
-    tcm_mems_FARR = 26,//0x1A
-    tcm_ddrn_bndy = 27,//0x1B
-    tcm_ddrn_gptr = 28,//0x1C
-    tcm_ddrn_func = 29,//0x1D
-    tcm_ddrn_cmsk = 30,//0x1E
-    tcm_ddrn_lbst = 31,//0x1F
-    tcm_ddrs_bndy = 32,//0x20
-    tcm_ddrs_gptr = 33,//0x21
-    tcm_ddrs_func = 34,//0x22
-    tcm_ddrs_lbst = 35,//0x23
-    tcm_ddrs_cmsk = 36,//0x24
-    tcn_perv_cmsk = 37,//0x25
-    tcn_perv_lbst = 38,//0x26
-    tcn_perv_gptr = 39,//0x27
-    tcn_perv_func = 40,//0x28
-    tcn_perv_time = 41,//0x29
-    tcn_perv_FARR = 42,//0x2A
-    tcn_perv_abst = 43,//0x2B
-    tcn_mbi_FARR  = 44,//0x2C
-    tcn_mbi_time  = 45,//0x2D
-    tcn_mbi_repr  = 46,//0x2E
-    tcn_mbi_abst  = 47,//0x2F
-    tcn_mbi_regf  = 48,//0x30
-    tcn_mbi_gptr  = 49,//0x31
-    tcn_mbi_func  = 50,//0x32
-    tcn_mbi_cmsk  = 51,//0x33
-    tcn_mbi_lbst  = 52,//0x34
-    tcn_dmi_bndy  = 53,//0x35
-    tcn_dmi_gptr  = 54,//0x36
-    tcn_dmi_func  = 55,//0x37
-    tcn_dmi_cmsk  = 56,//0x38
-    tcn_dmi_lbst  = 57,//0x39
-    tcn_msc_gptr  = 58,//0x3A
-    tcn_msc_func  = 59,//0x3B
-    tcn_mbs_FARR  = 60,//0x3C
-    tcn_mbs_time  = 61,//0x3D
-    tcn_mbs_repr  = 62,//0x3E
-    tcn_mbs_abst  = 63,//0x3F
-    tcn_mbs_regf  = 64,//0x40
-    tcn_mbs_gptr  = 65,//0x41
-    tcn_mbs_func  = 66,//0x42
-    tcn_mbs_lbst  = 67,//0x43
-    tcn_mbs_cmsk  = 68,//0x44
-    tcn_refr_cmsk = 69,//0x45
-    tcn_refr_FARR = 70,//0x46
-    tcn_refr_time = 71,//0x47
-    tcn_refr_repr = 72,//0x48
-    tcn_refr_abst = 73,//0x49
-    tcn_refr_lbst = 74,//0x4A
-    tcn_refr_regf = 75,//0x4B
-    tcn_refr_gptr = 76,//0x4C
-    tcn_refr_func = 77,//0x4D
-    tcn_perv_repr = 78,//0x4E
-    tp_perv_func  = 79,//0x4F
-    tp_perv_gptr  = 80,//0x50
-    tp_perv_mode  = 81,//0x51
-    tp_perv_regf  = 82,//0x52
-    tp_perv_lbst  = 83,//0x53
-    tp_perv_abst  = 84,//0x54
-    tp_perv_repr  = 85,//0x55
-    tp_perv_time  = 86,//0x56
-    tp_perv_bndy  = 87,//0x57
-    tp_perv_farr  = 88,//0x58
-    tp_perv_cmsk  = 89,//0x59
-    tp_pll_func   = 90,//0x5A
-    tp_pll_gptr   = 91,//0x5B
-    tp_net_func   = 92,//0x5C
-    tp_net_gptr   = 93,//0x5D
-    tp_net_abst   = 94,//0x5E
-    tp_pib_func   = 95,//0x5F
-    tp_pib_fuse   = 96,//0x60
-    tp_pib_gptr   = 97,//0x61
-    tp_pll_bndy   = 98,//0x62
-    tp_pib_repr   = 99,//0x63
-    tp_vitl       = 100,//0x64
+    tcm_perv_cmsk         = 0,  //0x00
+    tcm_perv_lbst         = 1,  //0x01
+    tcm_perv_gptr         = 2,  //0x02
+    tcm_perv_func         = 3,  //0x03
+    tcm_perv_time         = 4,  //0x04
+    tcm_perv_abst         = 5,  //0x05
+    tcm_perv_repr         = 6,  //0x06
+    tcm_perv_FARR         = 7,  //0x07
+    tcm_memn_time         = 8,  //0x08
+    tcm_memn_regf         = 9,  //0x09
+    tcm_memn_gptr         = 10, //0x0A
+    tcm_memn_func         = 11, //0x0B
+    tcm_memn_lbst         = 12, //0x0C
+    tcm_memn_cmsk         = 13, //0x0D
+    tcm_memn_abst         = 14, //0x0E
+    tcm_memn_repr         = 15, //0x0F
+    tcm_memn_FARR         = 16, //0x10
+    tcm_mems_time         = 17, //0x11
+    tcm_mems_regf         = 18, //0x12
+    tcm_mems_gptr         = 19, //0x13
+    tcm_mems_func         = 20, //0x14
+    tcm_mems_lbst         = 21, //0x15
+    tcm_mems_cmsk         = 22, //0x16
+    tcm_mems_bndy         = 23, //0x17
+    tcm_mems_abst         = 24, //0x18
+    tcm_mems_repr         = 25, //0x19
+    tcm_mems_FARR         = 26, //0x1A
+    tcm_ddrn_bndy         = 27, //0x1B
+    tcm_ddrn_gptr         = 28, //0x1C
+    tcm_ddrn_func         = 29, //0x1D
+    tcm_ddrn_cmsk         = 30, //0x1E
+    tcm_ddrn_lbst         = 31, //0x1F
+    tcm_ddrs_bndy         = 32, //0x20
+    tcm_ddrs_gptr         = 33, //0x21
+    tcm_ddrs_func         = 34, //0x22
+    tcm_ddrs_lbst         = 35, //0x23
+    tcm_ddrs_cmsk         = 36, //0x24
+    tcn_perv_cmsk         = 37, //0x25
+    tcn_perv_lbst         = 38, //0x26
+    tcn_perv_gptr         = 39, //0x27
+    tcn_perv_func         = 40, //0x28
+    tcn_perv_time         = 41, //0x29
+    tcn_perv_FARR         = 42, //0x2A
+    tcn_perv_abst         = 43, //0x2B
+    tcn_mbi_FARR          = 44, //0x2C
+    tcn_mbi_time          = 45, //0x2D
+    tcn_mbi_repr          = 46, //0x2E
+    tcn_mbi_abst          = 47, //0x2F
+    tcn_mbi_regf          = 48, //0x30
+    tcn_mbi_gptr          = 49, //0x31
+    tcn_mbi_func          = 50, //0x32
+    tcn_mbi_cmsk          = 51, //0x33
+    tcn_mbi_lbst          = 52, //0x34
+    tcn_dmi_bndy          = 53, //0x35
+    tcn_dmi_gptr          = 54, //0x36
+    tcn_dmi_func          = 55, //0x37
+    tcn_dmi_cmsk          = 56, //0x38
+    tcn_dmi_lbst          = 57, //0x39
+    tcn_msc_gptr          = 58, //0x3A
+    tcn_msc_func          = 59, //0x3B
+    tcn_mbs_FARR          = 60, //0x3C
+    tcn_mbs_time          = 61, //0x3D
+    tcn_mbs_repr          = 62, //0x3E
+    tcn_mbs_abst          = 63, //0x3F
+    tcn_mbs_regf          = 64, //0x40
+    tcn_mbs_gptr          = 65, //0x41
+    tcn_mbs_func          = 66, //0x42
+    tcn_mbs_lbst          = 67, //0x43
+    tcn_mbs_cmsk          = 68, //0x44
+    tcn_refr_cmsk         = 69, //0x45
+    tcn_refr_FARR         = 70, //0x46
+    tcn_refr_time         = 71, //0x47
+    tcn_refr_repr         = 72, //0x48
+    tcn_refr_abst         = 73, //0x49
+    tcn_refr_lbst         = 74, //0x4A
+    tcn_refr_regf         = 75, //0x4B
+    tcn_refr_gptr         = 76, //0x4C
+    tcn_refr_func         = 77, //0x4D
+    tcn_perv_repr         = 78, //0x4E
+    tp_perv_func          = 79, //0x4F
+    tp_perv_gptr          = 80, //0x50
+    tp_perv_mode          = 81, //0x51
+    tp_perv_regf          = 82, //0x52
+    tp_perv_lbst          = 83, //0x53
+    tp_perv_abst          = 84, //0x54
+    tp_perv_repr          = 85, //0x55
+    tp_perv_time          = 86, //0x56
+    tp_perv_bndy          = 87, //0x57
+    tp_perv_farr          = 88, //0x58
+    tp_perv_cmsk          = 89, //0x59
+    tp_pll_func           = 90, //0x5A
+    tp_pll_gptr           = 91, //0x5B
+    tp_net_func           = 92, //0x5C
+    tp_net_gptr           = 93, //0x5D
+    tp_net_abst           = 94, //0x5E
+    tp_pib_func           = 95, //0x5F
+    tp_pib_fuse           = 96, //0x60
+    tp_pib_gptr           = 97, //0x61
+    tp_pll_bndy           = 98, //0x62
+    tp_pll_bndy_bucket_1  = 99, //0x63
+    tp_pll_bndy_bucket_2  = 100,//0x64
+    tp_pll_bndy_bucket_3  = 101,//0x65
+    tp_pll_bndy_bucket_4  = 102,//0x66
+    tp_pll_bndy_bucket_5  = 103,//0x67
+    tp_pll_bndy_bucket_6  = 104,//0x68
+    tp_pll_bndy_bucket_7  = 105,//0x69
+    tp_pll_bndy_bucket_8  = 106,//0x6A
     NUM_RING_IDS
 
 }; // enum RingID