Centaur istep 11 support

initCompiler
  generate procedures & wrapper for Centaur SCAN initfiles
  porting Centaur initfiles into p9 for Centaur EC 21
  update Initfile Compiler to generate wrapper and C/H Scan files for Centaur
  generate rings data to be pulled in Centaur HW image.

centaur_ec_attributes
  remove all attributes previously used by SBE code -- only DD2 is supported

cen_common_funcs
  cleanup trace messages
  add common clockstart module for NEST/MEM

centaur_misc_constants
  define constants for PLL scan0 operations
  define MEM scan chiplet constant

cen_tp_chiplet_init1
  remove EC feature attribute qualifications -- only DD2 is supported
  scan0 flush TP PLL GPTR BNDY and FUNC ring

cen_pll_initf
cen_initf
  directly invoke generated scan HWPs until putRing support exists

cen_chiplet_init
  remove EC feature attribute qualifications -- only DD2 is supported

cen_startclocks
  initial release

centaur.cleanup.pll.scan.initfile
  right justify spy value to match p9 initCompiler expectations

centaur.dmi.scan.initfile
  update owner

centaur.mba.scan.initfile
  remove EC feature attribute qualifications -- only DD2 is supported

centaur.mbs.scan.initfile
  remove EC feature attribute qualifications -- only DD2 is supported
  add content missing from original port

centaur.mem.pll.scan.initfile
  remove dummy settings

centaur.nest.pll.scan.initfile
  adjust freq attributes to match P9 NEST attribute content
  remove dummy settings

centaur.thermal.scan.initfile
  update owner
  add content missing from original port

cen_mem_pll_setup
cen_nest_startclocks
  remove, not required for P9 IPL flow

add missing object depedencies
create wrappers for all planned isteps

RTC 163457

Change-Id: Idd0972207f356315f1e2f52f911e1cb27f72a737
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32714
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: Richard J. Knight <rjknight@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43761
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>

1 files changed, 15 insertions, 11 deletions

diff --git a/src/import/chips/centaur/procedures/hwp/perv/cen_tp_chiplet_init1.C b/src/import/chips/centaur/procedures/hwp/perv/cen_tp_chiplet_init1.C
index 747c46d0e..6588079f2 100644
--- a/src/import/chips/centaur/procedures/hwp/perv/cen_tp_chiplet_init1.C
+++ b/src/import/chips/centaur/procedures/hwp/perv/cen_tp_chiplet_init1.C
@@ -42,6 +42,8 @@
 //------------------------------------------------------------------------------
 #include <cen_tp_chiplet_init1.H>
 #include <cen_gen_scom_addresses.H>
+#include <cen_gen_scom_addresses_fixes.H>
+#include <cen_common_funcs.H>
 #include <centaur_misc_constants.H>
 
 //------------------------------------------------------------------------------
@@ -63,7 +65,6 @@ cen_tp_chiplet_init1(const fapi2::Target<fapi2::TARGET_TYPE_MEMBUF_CHIP>& i_targ
     fapi2::Target<fapi2::TARGET_TYPE_SYSTEM> FAPI_SYSTEM;
     fapi2::ATTR_CEN_DMI_REFCLOCK_RCVR_TERM_Type l_dmi_refclock_term;
     fapi2::ATTR_CEN_DDR_REFCLOCK_RCVR_TERM_Type l_ddr_refclock_term;
-    fapi2::ATTR_CEN_EC_FEATURE_SWITCH_DIV24_RUN_MODE_Type l_div24_run_mode;
 
     FAPI_DBG("Fix PIBABORT during warmstart via MAILBOX");
     FAPI_TRY(fapi2::putCfamRegister(i_target, CEN_STATUS_ROX, l_cfam_status_data),
@@ -122,16 +123,10 @@ cen_tp_chiplet_init1(const fapi2::Target<fapi2::TARGET_TYPE_MEMBUF_CHIP>& i_targ
     FAPI_TRY(fapi2::putCfamRegister(i_target, CEN_FSIGP3, l_fsi_gp3_data),
              "Error from putCfamRegister (CEN_FSIGP3, set PLL output enable");
 
-    FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CEN_EC_FEATURE_SWITCH_DIV24_RUN_MODE, i_target, l_div24_run_mode),
-             "Error from FAPI_ATTR_GET (ATTR_CEN_EC_FEATURE_SWITCH_DIV24_RUN_MODE)");
-
-    if (l_div24_run_mode)
-    {
-        FAPI_DBG("Switch DIV24 into run mode");
-        l_fsi_gp4_data.clearBit<16>();
-        FAPI_TRY(fapi2::putCfamRegister(i_target, CEN_FSIGP4, l_fsi_gp4_data),
-                 "Error from putCfamRegister (CEN_FSIGP4, DIV24 run mode)");
-    }
+    FAPI_DBG("Switch DIV24 into run mode");
+    l_fsi_gp4_data.clearBit<16>();
+    FAPI_TRY(fapi2::putCfamRegister(i_target, CEN_FSIGP4, l_fsi_gp4_data),
+             "Error from putCfamRegister (CEN_FSIGP4, DIV24 run mode)");
 
     FAPI_DBG("Release Pervasive Chiplet endpoint reset");
     l_perv_gp3_data.clearBit<1>();
@@ -183,6 +178,15 @@ cen_tp_chiplet_init1(const fapi2::Target<fapi2::TARGET_TYPE_MEMBUF_CHIP>& i_targ
     FAPI_TRY(fapi2::putCfamRegister(i_target, CEN_FSIGP3, l_fsi_gp3_data),
              "Error from putCfamRegister (CEN_FSIGP3, drop FSI Fence3)");
 
+    // scan0 PLL GPTR ring
+    FAPI_DBG("Scan0 TP PLL GPTR ring");
+    FAPI_TRY(cen_scan0_module(i_target, SCAN_CHIPLET_TP, SCAN_TP_PLL_REGIONS, SCAN_REGION_TP_PLL_GPTR),
+             "Error from cen_scan0_module (scan0 PLL GPTR ring)");
+    // scan0 PLL BNDY/FUNC rings
+    FAPI_DBG("Scan0 TP PLL BNDY/FUNC rings");
+    FAPI_TRY(cen_scan0_module(i_target, SCAN_CHIPLET_TP, SCAN_TP_PLL_REGIONS, SCAN_REGION_TP_PLL_BNDY_FUNC),
+             "Error from cen_scan0_module (scan0 PLL BNDY/FUNC ring)");
+
 fapi_try_exit:
     FAPI_DBG("End");
     return fapi2::current_err;