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| author | crgeddes <crgeddes@us.ibm.com> | 2016-03-10 15:22:16 -0600 |
|---|---|---|
| committer | William G. Hoffa <wghoffa@us.ibm.com> | 2016-03-31 12:23:54 -0400 |
| commit | 71df97aa6a7a27d491ed260f33bcfb78339dcd71 (patch) | |
| tree | 5e84ff707710426fe619ca26348f24ecfdf0f18a /src/build | |
| parent | c38889a181c0cc7a46d4877653e52bbb6653974c (diff) | |
| download | talos-hostboot-71df97aa6a7a27d491ed260f33bcfb78339dcd71.tar.gz talos-hostboot-71df97aa6a7a27d491ed260f33bcfb78339dcd71.zip | |
Enable startDeadmanLoop in host_activate_master.C
Change-Id: I04c7d38860f042e392026f81f9f3772212dfe14f
Depends-on:Ib0db5ac2b9b5d5f5c2967ff97794493d867fb04b
Depends-on:Ic8bac9940b00eae01c175f51dd1872b2bb128b95
RTC:133832
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/21901
Tested-by: Jenkins Server
Tested-by: FSP CI Jenkins
Reviewed-by: Martin Gloff <mgloff@us.ibm.com>
Reviewed-by: Andrew J. Geissler <andrewg@us.ibm.com>
Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
Diffstat (limited to 'src/build')
| -rwxr-xr-x | src/build/debug/simics-debug-framework.py | 18 |
1 files changed, 1 insertions, 17 deletions
diff --git a/src/build/debug/simics-debug-framework.py b/src/build/debug/simics-debug-framework.py index 24dee4eeb..48a8d4818 100755 --- a/src/build/debug/simics-debug-framework.py +++ b/src/build/debug/simics-debug-framework.py @@ -6,7 +6,7 @@ # # OpenPOWER HostBoot Project # -# Contributors Listed Below - COPYRIGHT 2011,2015 +# Contributors Listed Below - COPYRIGHT 2011,2016 # [+] Google Inc. # [+] International Business Machines Corp. # @@ -513,22 +513,6 @@ def magic_instruction_callback(user_arg, cpu, arg): cmd = 'shell "fcp --force -o0 -R %s:PAYLOAD simicsPayload.ecc; ecc --remove --p8 simicsPayload.ecc simicsPayload"; load-file simicsPayload 0x%x' % (flash_file, load_addr) SIM_run_alone( run_command, cmd ) - if arg == 7015: - print "Wake up master Thread CORE0 - 7015 start \n"; - - # If more than 1 thread, we only want to do - # this on 4th hit -- won't worry about it for now. - setIar0 = "system_cmp0.cpu0_0_00_0->iar=0x100" - SIM_run_alone(run_command, setIar0 ) - - # need to disable and then re-enable thread0 to - # make it appear to wake back up - disable0 = "system_cmp0.cpu0_0_00_0.disable" - SIM_run_alone(run_command, disable0 ) - enable0 = "system_cmp0.cpu0_0_00_0.enable" - SIM_run_alone(run_command, enable0 ) - print "Master Thread should be awake now \n"; - if arg == 7016: print "Wake up rest of CORE0 - 7017 start \n"; |
