Fix simics P9C RCD timeout issues

    -Move bb level to b0702a_1827.920
    -Remove workarounds which are no longer required
     with the new bb level
    -add a patch for centaur_memory.act to restore
     several lines commented out during debug, change
     will be made in cmvc with SW434517
    -Update dimmspd.dat to newer version

CQ:SW428846
Change-Id: Ib028f25f944489d860361de96ac75af2adf8d8ef
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/62479
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>

5 files changed, 49 insertions, 89 deletions

diff --git a/src/build/citest/etc/patches/centaur_memory.act.patch b/src/build/citest/etc/patches/centaur_memory.act.patch
new file mode 100644
index 000000000..6cd8fb81e
--- /dev/null
+++ b/src/build/citest/etc/patches/centaur_memory.act.patch
@@ -0,0 +1,38 @@
+--- centaur_memory.act	2018-06-29 08:37:30.899467931 -0500
++++ centaur_memory.act.new	2018-06-29 08:37:01.321543963 -0500
+@@ -431,7 +431,7 @@
+  CAUSE: TARGET=[REG(0x0301060B)] OP=[BIT,ON] BIT=[0] # if the start maintenance command is on
+  CAUSE: TARGET=[REG(0x03010413)] OP=[BIT,OFF] BIT=[59] # ERR constant
+  CAUSE: TARGET=[REG(0x03010413)] OP=[BIT,ON] BIT=[40] # PORT0 CAS inject
+-# CAUSE: TARGET=[REG(0x03010413)] OP=[BIT,ON] BIT=[51] # Wait time
++ CAUSE: TARGET=[REG(0x03010413)] OP=[BIT,ON] BIT=[51] # Wait time
+ 
+  EFFECT: TARGET=[REG(0x02011440)] OP=[BIT,ON] BIT=[45]  # Parity error on
+  # Then, disable all of our injects
+@@ -458,7 +458,7 @@
+  CAUSE: TARGET=[REG(0x0301060B)] OP=[BIT,ON] BIT=[0] # if the start maintenance command is on
+  CAUSE: TARGET=[REG(0x03010413)] OP=[BIT,OFF] BIT=[59] # ERR constant
+  CAUSE: TARGET=[REG(0x03010413)] OP=[BIT,ON] BIT=[42] # PORT1 CAS inject
+-# CAUSE: TARGET=[REG(0x03010413)] OP=[BIT,ON] BIT=[51] # Wait time
++ CAUSE: TARGET=[REG(0x03010413)] OP=[BIT,ON] BIT=[51] # Wait time
+ 
+  EFFECT: TARGET=[REG(0x02011440)] OP=[BIT,ON] BIT=[45]  # Parity error on
+  # Then, disable all of our injects
+@@ -485,7 +485,7 @@
+  CAUSE: TARGET=[REG(0x03010E0B)] OP=[BIT,ON] BIT=[0] # if the start maintenance command is on
+  CAUSE: TARGET=[REG(0x03010C13)] OP=[BIT,OFF] BIT=[59] # ERR constant
+  CAUSE: TARGET=[REG(0x03010C13)] OP=[BIT,ON] BIT=[40] # PORT2 CAS inject
+- #CAUSE: TARGET=[REG(0x03010C13)] OP=[BIT,ON] BIT=[51] # Wait time
++ CAUSE: TARGET=[REG(0x03010C13)] OP=[BIT,ON] BIT=[51] # Wait time
+ 
+  EFFECT: TARGET=[REG(0x02011480)] OP=[BIT,ON] BIT=[45]  # Parity error on
+  # Then, disable all of our injects
+@@ -512,7 +512,7 @@
+  CAUSE: TARGET=[REG(0x03010E0B)] OP=[BIT,ON] BIT=[0] # if the start maintenance command is on
+  CAUSE: TARGET=[REG(0x03010C13)] OP=[BIT,OFF] BIT=[59] # ERR constant
+  CAUSE: TARGET=[REG(0x03010C13)] OP=[BIT,ON] BIT=[42] # PORT3 CAS inject
+-# CAUSE: TARGET=[REG(0x03010C13)] OP=[BIT,ON] BIT=[51] # Wait time
++ CAUSE: TARGET=[REG(0x03010C13)] OP=[BIT,ON] BIT=[51] # Wait time
+ 
+  EFFECT: TARGET=[REG(0x02011480)] OP=[BIT,ON] BIT=[45]  # Parity error on
+  # Then, disable all of our injects
diff --git a/src/build/citest/etc/patches/p9c.act.iovalid.patch b/src/build/citest/etc/patches/p9c.act.iovalid.patch
deleted file mode 100644
index 77acaf019..000000000
--- a/src/build/citest/etc/patches/p9c.act.iovalid.patch
+++ /dev/null
@@ -1,44 +0,0 @@
---- p9c_b0414a_1815.act	2018-06-12 10:14:12.909859250 -0500
-+++ p9c_thi.act	2018-06-12 13:02:18.161771375 -0500
-@@ -2301,19 +2301,34 @@
- # IOVALID XBUS/OBUS
- ################################################################################################
- CAUSE_EFFECT {
--  LABEL=[XBUS IOVALID Link Update]
--  WATCH=[REG(0x06000019)]
--  CAUSE: TARGET=[REG(0x06000019)] OP=[AND,ON,BUF,MASK] DATA=[LITERAL(64,0x0FC00000 0x00000000)] MASK=[LITERAL(64,0x0FC00000 0x00000000)]
-+  LABEL=[XBUS0 IOVALID DL/TL trained]
-+  WATCH=[REG(0x0601180B)]
-+  CAUSE: TARGET=[REG(0x0601180B)] OP=[BIT,ON] BIT=[1]   # XBUS 0, XBUS_LL0_IOEL_CONTROL reg, LINK0_STARTUP bit
-+  CAUSE: TARGET=[REG(0x0601180B)] OP=[BIT,ON] BIT=[33]  # XBUS 0, XBUS_LL0_IOEL_CONTROL reg, LINK1_STARTUP bit
-   EFFECT: TARGET=[REG(0x06011800)] OP=[BIT,ON] BIT=[0]  # XBUS 0  L0 DL TRAINED
-   EFFECT: TARGET=[REG(0x06011800)] OP=[BIT,ON] BIT=[1]  # XBUS    L1 DL TRAINED
--  EFFECT: TARGET=[REG(0x06011C00)] OP=[BIT,ON] BIT=[0]  # XBUS 1  L0 DL TRAINED
--  EFFECT: TARGET=[REG(0x06011C00)] OP=[BIT,ON] BIT=[1]  # XBUS    L1 DL TRAINED
--  EFFECT: TARGET=[REG(0x06012000)] OP=[BIT,ON] BIT=[0]  # XBUS 2  L0 DL TRAINED
--  EFFECT: TARGET=[REG(0x06012000)] OP=[BIT,ON] BIT=[1]  # XBUS    L1 DL TRAINED
-   EFFECT: TARGET=[REG(0x05013400)] OP=[BIT,ON] BIT=[0]  # XBUS 0  FMR00 TL TRAINED
-   EFFECT: TARGET=[REG(0x05013400)] OP=[BIT,ON] BIT=[1]  # XBUS    FMR01 TL TRAINED
-+}
-+
-+CAUSE_EFFECT {
-+  LABEL=[XBUS1 IOVALID DL/TL trained]
-+  WATCH=[REG(0x06011C0B)]
-+  CAUSE: TARGET=[REG(0x06011C0B)] OP=[BIT,ON] BIT=[1]   # XBUS 1, XBUS_LL1_IOEL_CONTROL reg, LINK0_STARTUP bit
-+  CAUSE: TARGET=[REG(0x06011C0B)] OP=[BIT,ON] BIT=[33]  # XBUS 1, XBUS_LL1_IOEL_CONTROL reg, LINK1_STARTUP bit
-+  EFFECT: TARGET=[REG(0x06011C00)] OP=[BIT,ON] BIT=[0]  # XBUS 1  L0 DL TRAINED
-+  EFFECT: TARGET=[REG(0x06011C00)] OP=[BIT,ON] BIT=[1]  # XBUS    L1 DL TRAINED
-   EFFECT: TARGET=[REG(0x05013400)] OP=[BIT,ON] BIT=[2]  # XBUS 1  FMR02 TL TRAINED
-   EFFECT: TARGET=[REG(0x05013400)] OP=[BIT,ON] BIT=[3]  # XBUS    FMR03 TL TRAINED
-+}
-+
-+CAUSE_EFFECT {
-+  LABEL=[XBUS2 IOVALID DL/TL trained]
-+  WATCH=[REG(0x0601200B)]
-+  CAUSE: TARGET=[REG(0x0601200B)] OP=[BIT,ON] BIT=[1]   # XBUS 2, XBUS_LL2_IOEL_CONTROL reg, LINK0_STARTUP bit
-+  CAUSE: TARGET=[REG(0x0601200B)] OP=[BIT,ON] BIT=[33]  # XBUS 2, XBUS_LL2_IOEL_CONTROL reg, LINK1_STARTUP bit
-+  EFFECT: TARGET=[REG(0x06012000)] OP=[BIT,ON] BIT=[0]  # XBUS 2  L0 DL TRAINED
-+  EFFECT: TARGET=[REG(0x06012000)] OP=[BIT,ON] BIT=[1]  # XBUS    L1 DL TRAINED
-   EFFECT: TARGET=[REG(0x05013400)] OP=[BIT,ON] BIT=[4]  # XBUS 2  FMR04 TL TRAINED
-   EFFECT: TARGET=[REG(0x05013400)] OP=[BIT,ON] BIT=[5]  # XBUS    FMR05 TL TRAINED
- }
diff --git a/src/build/citest/etc/patches/p9n.act.iovalid.patch b/src/build/citest/etc/patches/p9n.act.iovalid.patch
deleted file mode 100644
index 3fc911ddf..000000000
--- a/src/build/citest/etc/patches/p9n.act.iovalid.patch
+++ /dev/null
@@ -1,45 +0,0 @@
---- p9n_b0414a_1815.act	2018-06-12 10:14:13.063143912 -0500
-+++ p9n_thi.act	2018-06-12 13:03:09.072610232 -0500
-@@ -2215,19 +2215,35 @@
- # IOVALID XBUS
- ################################################################################################
- CAUSE_EFFECT {
--  LABEL=[XBUS IOVALID Link Update]
--  WATCH=[REG(0x06000019)]
--  CAUSE: TARGET=[REG(0x06000019)] OP=[AND,ON,BUF,MASK] DATA=[LITERAL(64,0x0FC00000 0x00000000)] MASK=[LITERAL(64,0x0FC00000 0x00000000)]
-+  LABEL=[XBUS0 IOVALID DL/TL trained]
-+  WATCH=[REG(0x0601180B)]
-+  CAUSE: TARGET=[REG(0x0601180B)] OP=[BIT,ON] BIT=[1]   # XBUS 0, XBUS_LL0_IOEL_CONTROL reg, LINK0_STARTUP bit
-+  CAUSE: TARGET=[REG(0x0601180B)] OP=[BIT,ON] BIT=[33]  # XBUS 0, XBUS_LL0_IOEL_CONTROL reg, LINK1_STARTUP bit
-   EFFECT: TARGET=[REG(0x06011800)] OP=[BIT,ON] BIT=[0]  # XBUS 0  L0 DL TRAINED
-   EFFECT: TARGET=[REG(0x06011800)] OP=[BIT,ON] BIT=[1]  # XBUS    L1 DL TRAINED
--  EFFECT: TARGET=[REG(0x06011C00)] OP=[BIT,ON] BIT=[0]  # XBUS 1  L0 DL TRAINED
--  EFFECT: TARGET=[REG(0x06011C00)] OP=[BIT,ON] BIT=[1]  # XBUS    L1 DL TRAINED
--  EFFECT: TARGET=[REG(0x06012000)] OP=[BIT,ON] BIT=[0]  # XBUS 2  L0 DL TRAINED
--  EFFECT: TARGET=[REG(0x06012000)] OP=[BIT,ON] BIT=[1]  # XBUS    L1 DL TRAINED
-   EFFECT: TARGET=[REG(0x05013400)] OP=[BIT,ON] BIT=[0]  # XBUS 0  FMR00 TL TRAINED
-   EFFECT: TARGET=[REG(0x05013400)] OP=[BIT,ON] BIT=[1]  # XBUS    FMR01 TL TRAINED
-+}
-+
-+CAUSE_EFFECT {
-+  LABEL=[XBUS1 IOVALID DL/TL trained]
-+  WATCH=[REG(0x06011C0B)]
-+  CAUSE: TARGET=[REG(0x06011C0B)] OP=[BIT,ON] BIT=[1]   # XBUS 1, XBUS_LL1_IOEL_CONTROL reg, LINK0_STARTUP bit
-+  CAUSE: TARGET=[REG(0x06011C0B)] OP=[BIT,ON] BIT=[33]  # XBUS 1, XBUS_LL1_IOEL_CONTROL reg, LINK1_STARTUP bit
-+  EFFECT: TARGET=[REG(0x06011C00)] OP=[BIT,ON] BIT=[0]  # XBUS 1  L0 DL TRAINED
-+  EFFECT: TARGET=[REG(0x06011C00)] OP=[BIT,ON] BIT=[1]  # XBUS    L1 DL TRAINED
-   EFFECT: TARGET=[REG(0x05013400)] OP=[BIT,ON] BIT=[2]  # XBUS 1  FMR02 TL TRAINED
-   EFFECT: TARGET=[REG(0x05013400)] OP=[BIT,ON] BIT=[3]  # XBUS    FMR03 TL TRAINED
-+}
-+
-+CAUSE_EFFECT {
-+  LABEL=[XBUS2 IOVALID DL/TL trained]
-+  WATCH=[REG(0x0601200B)]
-+  CAUSE: TARGET=[REG(0x0601200B)] OP=[BIT,ON] BIT=[1]   # XBUS 2, XBUS_LL2_IOEL_CONTROL reg, LINK0_STARTUP bit
-+  CAUSE: TARGET=[REG(0x0601200B)] OP=[BIT,ON] BIT=[33]  # XBUS 2, XBUS_LL2_IOEL_CONTROL reg, LINK1_STARTUP bit
-+  EFFECT: TARGET=[REG(0x06012000)] OP=[BIT,ON] BIT=[0]  # XBUS 2  L0 DL TRAINED
-+  EFFECT: TARGET=[REG(0x06012000)] OP=[BIT,ON] BIT=[1]  # XBUS    L1 DL TRAINED
-   EFFECT: TARGET=[REG(0x05013400)] OP=[BIT,ON] BIT=[4]  # XBUS 2  FMR04 TL TRAINED
-   EFFECT: TARGET=[REG(0x05013400)] OP=[BIT,ON] BIT=[5]  # XBUS    FMR05 TL TRAINED
- }
-+
diff --git a/src/build/citest/etc/patches/patchlist.txt b/src/build/citest/etc/patches/patchlist.txt
index 6f72600b5..7feaa7f02 100644
--- a/src/build/citest/etc/patches/patchlist.txt
+++ b/src/build/citest/etc/patches/patchlist.txt
@@ -5,3 +5,9 @@ Brief description of the problem or reason for patch
 -Files: list of files
 -Coreq: list of associated changes, e.g. workarounds.presimsetup
 
+
+centaur_memory.act.patch
+    Patch restores several lines which had been commented out
+    for testing.
+    -CQ:SW434517
+    -centaur_memory.act
diff --git a/src/build/citest/etc/workarounds.postsimsetup b/src/build/citest/etc/workarounds.postsimsetup
index 415528460..82a1c72fe 100755
--- a/src/build/citest/etc/workarounds.postsimsetup
+++ b/src/build/citest/etc/workarounds.postsimsetup
@@ -32,4 +32,9 @@
 #mkdir -p $sb/simu/data/cec-chip/
 #cp $BACKING_BUILD/src/simu/data/cec-chip/base_cec_chip_file $sb/simu/data/cec-chip
 #patch -p0 $sb/simu/data/cec-chip/base_cec_chip_file $PROJECT_ROOT/src/build/citest/etc/patches/my_patch_File
+echo "+++ Removing test code from centaur_memory.act"
+mkdir -p $sb/simu/data/cec-chip
+cp $BACKING_BUILD/src/simu/data/cec-chip/centaur_memory.act $sb/simu/data/cec-chip
+chmod 777 $sb/simu/data/cec-chip/centaur_memory.act
+patch -p0 $sb/simu/data/cec-chip/centaur_memory.act $PROJECT_ROOT/src/build/citest/etc/patches/centaur_memory.act.patch