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| author | Rick Mata Jr <ricmata@us.ibm.com> | 2017-01-06 15:27:26 -0600 |
|---|---|---|
| committer | Christian R. Geddes <crgeddes@us.ibm.com> | 2017-01-14 15:28:49 -0500 |
| commit | b4380fca211feeefe4733b8e70418327dc32c30c (patch) | |
| tree | 40f07ef0dad6035ddb62e427e79e88bf27211452 /src/build/citest/etc/workarounds.postsimsetup | |
| parent | 0e390962ea4e502d4fe828436e2913a5329cd29a (diff) | |
| download | talos-hostboot-b4380fca211feeefe4733b8e70418327dc32c30c.tar.gz talos-hostboot-b4380fca211feeefe4733b8e70418327dc32c30c.zip | |
p9_pcie_scominit procedure update to addresss PHY issues
Change-Id: I4304e754056a741b250ea2861cd9afef529a50b0
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/34521
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
CMVC-Coreq: 1014186
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/34523
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Diffstat (limited to 'src/build/citest/etc/workarounds.postsimsetup')
| -rwxr-xr-x | src/build/citest/etc/workarounds.postsimsetup | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/src/build/citest/etc/workarounds.postsimsetup b/src/build/citest/etc/workarounds.postsimsetup index 371e19450..b1a827966 100755 --- a/src/build/citest/etc/workarounds.postsimsetup +++ b/src/build/citest/etc/workarounds.postsimsetup @@ -33,3 +33,28 @@ #mkdir -p $sb/simu/data/cec-chip/ #cp $BACKING_BUILD/src/simu/data/cec-chip/base_cec_chip_file $sb/simu/data/cec-chip #patch -p0 $sb/simu/data/cec-chip/base_cec_chip_file $PROJECT_ROOT/src/build/citest/etc/patches/my_patch_File + +### RTC 167283 - Patch begins +echo "+++ Updating p9n action file for pcie_scom_init" +echo "+++ SB: " $sb +echo "+++ BACKING_BUILD: " $BACKING_BUILD +echo "+++ PROJECT_ROOT: " $PROJECT_ROOT + +### Update p9_system.act for pcie_scom_init +### Use this file in order to be able to checkin immediately, p9n.act is held up by other tracks +mkdir -p $sb/simu/data/cec-chip/ +cp $BACKING_BUILD/src/simu/data/cec-chip/p9_system.act $sb/simu/data/cec-chip/ +patch -p0 $sb/simu/data/cec-chip/p9_system.act $PROJECT_ROOT/src/build/citest/etc/patches/p9_system.act_pcie_patch + +### Update p9n_10.scomdef for pcie_scom_init +echo "+++ Adding addresses to p9n_10.scomdef for pcie_scom_init" +mkdir -p $sb/engd/scomdef/ +cp $BACKING_BUILD/src/engd/scomdef/p9n_10.scomdef $sb/engd/scomdef/ +patch -p0 $sb/engd/scomdef/p9n_10.scomdef $PROJECT_ROOT/src/build/citest/etc/patches/p9n_10.scomdef_with_pcie_patch +echo "+++ Building indirect scom action with new p9n_10.scomdef" +cd $sb/simu/ +mk -a -j32 +#execute_in_sandbox "cd $sb/simu/ && mk -a -j32" +echo "+++ Done building" +### RTC 167283 - Patch ends + |
