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authorMark Wenning <wenning@us.ibm.com>2012-06-18 18:06:12 -0500
committerA. Patrick Williams III <iawillia@us.ibm.com>2012-07-12 17:19:53 -0500
commit7f482f9ad23bd7689fdee5982ad91f8506b2dfb8 (patch)
treec519dd9a5712982bed3fc30c02d6c14c2bb17f0e /src/build/citest/etc/patches/patchlist.txt
parent3b9899c9969d46d2faddca8f3d35fa5074e3097c (diff)
downloadtalos-hostboot-7f482f9ad23bd7689fdee5982ad91f8506b2dfb8.tar.gz
talos-hostboot-7f482f9ad23bd7689fdee5982ad91f8506b2dfb8.zip
Attribute Support for proc_setup_bars and mss_setup_bars
RTC: 42296 Change-Id: I9f470f9e41c22ed28bd0365aec23b91414258945 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1235 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com> Reviewed-by: Mark W. Wenning <wenning@us.ibm.com>
Diffstat (limited to 'src/build/citest/etc/patches/patchlist.txt')
-rw-r--r--src/build/citest/etc/patches/patchlist.txt4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/build/citest/etc/patches/patchlist.txt b/src/build/citest/etc/patches/patchlist.txt
index 2274aa027..0fce8e530 100644
--- a/src/build/citest/etc/patches/patchlist.txt
+++ b/src/build/citest/etc/patches/patchlist.txt
@@ -12,3 +12,7 @@ New actions for instruction state processing
-Files: p8_inst.act
-Coreq: there are related changes in workarounds.postsimsetup
+Fixes for MCS BAR enable bits.
+-CMVC: F843251 (next HB sprint) includes the changes.
+-Files: p8.act.diff
+-Coreq: workarounds.postsimsetup
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