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authorMegan <megan.teo@ibm.com>2019-07-08 13:23:09 -0500
committerWilliam G Hoffa <wghoffa@us.ibm.com>2019-08-27 16:37:20 -0500
commit845fb4492dce998d95a0ab2542b05c866c0f5edc (patch)
tree50d1606fdeff38f9d6ffd5e5347254741f573cdd /src/build/buildpnor/defaultPnorLayout.xml
parentf8776311e0fc66e998b7095708a58a3e3087986e (diff)
downloadtalos-hostboot-845fb4492dce998d95a0ab2542b05c866c0f5edc.tar.gz
talos-hostboot-845fb4492dce998d95a0ab2542b05c866c0f5edc.zip
Allow defining a partition with automatic starting offset
If section does not have a starting offset, calculate starting offset using previous section's offset/size, generate a new output file with offsets and feed into existing tools, throw error if any sections collide Change-Id: I9adf3357b3751087535854a89fc634a415b870d0 RTC: 212219 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/80098 Reviewed-by: Nicholas E Bofferding <bofferdn@us.ibm.com> Reviewed-by: Glenn Miles <milesg@ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: William G Hoffa <wghoffa@us.ibm.com>
Diffstat (limited to 'src/build/buildpnor/defaultPnorLayout.xml')
-rw-r--r--src/build/buildpnor/defaultPnorLayout.xml24
1 files changed, 1 insertions, 23 deletions
diff --git a/src/build/buildpnor/defaultPnorLayout.xml b/src/build/buildpnor/defaultPnorLayout.xml
index 9e7419f70..fd4c8ebb5 100644
--- a/src/build/buildpnor/defaultPnorLayout.xml
+++ b/src/build/buildpnor/defaultPnorLayout.xml
@@ -89,7 +89,6 @@ Layout Description
<section>
<description>Guard Data (20K)</description>
<eyeCatch>GUARD</eyeCatch>
- <physicalOffset>0x2C000</physicalOffset>
<physicalRegionSize>0x5000</physicalRegionSize>
<side>sideless</side>
<ecc/>
@@ -98,7 +97,7 @@ Layout Description
<description>DIMM JEDEC (288K)</description>
<eyeCatch>DJVPD</eyeCatch>
<!--NOTE: MUST update standalone.simics if offset changes -->
- <physicalOffset>0x31000</physicalOffset>
+ <physicalOffset>0x31000</physicalOffset>
<physicalRegionSize>0x48000</physicalRegionSize>
<side>sideless</side>
<ecc/>
@@ -124,7 +123,6 @@ Layout Description
<section>
<description>Hostboot Base (1MB)</description>
<eyeCatch>HBB</eyeCatch>
- <physicalOffset>0x151000</physicalOffset>
<physicalRegionSize>0x100000</physicalRegionSize>
<side>sideless</side>
<sha512Version/>
@@ -133,7 +131,6 @@ Layout Description
<section>
<description>Hostboot Data (2MB)</description>
<eyeCatch>HBD</eyeCatch>
- <physicalOffset>0x251000</physicalOffset>
<physicalRegionSize>0x200000</physicalRegionSize>
<sha512Version/>
<side>sideless</side>
@@ -142,7 +139,6 @@ Layout Description
<section>
<description>Hostboot Extended image (14.22MB w/o ECC)</description>
<eyeCatch>HBI</eyeCatch>
- <physicalOffset>0x451000</physicalOffset>
<physicalRegionSize>0x1000000</physicalRegionSize>
<sha512Version/>
<side>sideless</side>
@@ -151,7 +147,6 @@ Layout Description
<section>
<description>SBE-IPL (Staging Area) (752K)</description>
<eyeCatch>SBE</eyeCatch>
- <physicalOffset>0x1451000</physicalOffset>
<physicalRegionSize>0xBC000</physicalRegionSize>
<sha512perEC/>
<sha512Version/>
@@ -161,7 +156,6 @@ Layout Description
<section>
<description>HCODE Ref Image (1.125MB)</description>
<eyeCatch>HCODE</eyeCatch>
- <physicalOffset>0x150D000</physicalOffset>
<physicalRegionSize>0x120000</physicalRegionSize>
<sha512Version/>
<side>sideless</side>
@@ -170,7 +164,6 @@ Layout Description
<section>
<description>Hostboot Runtime Services for Sapphire (7.0MB)</description>
<eyeCatch>HBRT</eyeCatch>
- <physicalOffset>0x162D000</physicalOffset>
<physicalRegionSize>0x700000</physicalRegionSize>
<sha512Version/>
<side>sideless</side>
@@ -179,7 +172,6 @@ Layout Description
<section>
<description>Payload (19.875MB)</description>
<eyeCatch>PAYLOAD</eyeCatch>
- <physicalOffset>0x1D2D000</physicalOffset>
<physicalRegionSize>0x0600000</physicalRegionSize>
<sha512Version/>
<side>sideless</side>
@@ -188,7 +180,6 @@ Layout Description
<section>
<description>Special PNOR Test Space (36K)</description>
<eyeCatch>TEST</eyeCatch>
- <physicalOffset>0x310D000</physicalOffset>
<physicalRegionSize>0x9000</physicalRegionSize>
<testonly/>
<side>sideless</side>
@@ -199,7 +190,6 @@ Layout Description
from skipping header. Signing is forced in build pnor phase -->
<description>Special PNOR Test Space with Header (36K)</description>
<eyeCatch>TESTRO</eyeCatch>
- <physicalOffset>0x3116000</physicalOffset>
<physicalRegionSize>0x9000</physicalRegionSize>
<side>sideless</side>
<testonly/>
@@ -210,7 +200,6 @@ Layout Description
<section>
<description>Hostboot Bootloader (28K)</description>
<eyeCatch>HBBL</eyeCatch>
- <physicalOffset>0x311F000</physicalOffset>
<!-- Physical Size includes Header rounded to ECC valid size -->
<!-- Max size of actual HBBL content is 20K and 22.5K with ECC -->
<physicalRegionSize>0x7000</physicalRegionSize>
@@ -221,7 +210,6 @@ Layout Description
<section>
<description>Ref Image Ring Overrides (20K)</description>
<eyeCatch>RINGOVD</eyeCatch>
- <physicalOffset>0x3126000</physicalOffset>
<physicalRegionSize>0x5000</physicalRegionSize>
<side>sideless</side>
<ecc/>
@@ -229,7 +217,6 @@ Layout Description
<section>
<description>SecureBoot Key Transition Partition (16K)</description>
<eyeCatch>SBKT</eyeCatch>
- <physicalOffset>0x312B000</physicalOffset>
<physicalRegionSize>0x4000</physicalRegionSize>
<side>sideless</side>
<ecc/>
@@ -237,7 +224,6 @@ Layout Description
<section>
<description>OCC Lid (1.125M)</description>
<eyeCatch>OCC</eyeCatch>
- <physicalOffset>0x312F000</physicalOffset>
<physicalRegionSize>0x120000</physicalRegionSize>
<sha512Version/>
<side>sideless</side>
@@ -248,7 +234,6 @@ Layout Description
<!-- We need 266KB per module sort, going to support
40 tables by default, plus ECC -->
<eyeCatch>WOFDATA</eyeCatch>
- <physicalOffset>0x324F000</physicalOffset>
<!-- TODO RTC: 208004
Reduced by MB total to allow HBI + tests to
fit in PNOR, need to increase back 1 MB once HBI size
@@ -261,7 +246,6 @@ Layout Description
<section>
<description>FIRDATA (12K)</description>
<eyeCatch>FIRDATA</eyeCatch>
- <physicalOffset>0x3D4F000</physicalOffset>
<physicalRegionSize>0x3000</physicalRegionSize>
<side>sideless</side>
<ecc/>
@@ -269,7 +253,6 @@ Layout Description
<section>
<description>Memory Data (128K)</description>
<eyeCatch>MEMD</eyeCatch>
- <physicalOffset>0x3D52000</physicalOffset>
<physicalRegionSize>0x20000</physicalRegionSize>
<side>sideless</side>
<sha512Version/>
@@ -278,7 +261,6 @@ Layout Description
<section>
<description>Secureboot Test Load (12K)</description>
<eyeCatch>TESTLOAD</eyeCatch>
- <physicalOffset>0x3D72000</physicalOffset>
<physicalRegionSize>0x3000</physicalRegionSize>
<side>sideless</side>
<sha512Version/>
@@ -287,7 +269,6 @@ Layout Description
<section>
<description>Centaur Hw Ref Image (12K)</description>
<eyeCatch>CENHWIMG</eyeCatch>
- <physicalOffset>0x3D75000</physicalOffset>
<physicalRegionSize>0x3000</physicalRegionSize>
<sha512Version/>
<side>sideless</side>
@@ -296,7 +277,6 @@ Layout Description
<section>
<description>Secure Boot (144K)</description>
<eyeCatch>SECBOOT</eyeCatch>
- <physicalOffset>0x3D78000</physicalOffset>
<physicalRegionSize>0x24000</physicalRegionSize>
<side>sideless</side>
<ecc/>
@@ -305,7 +285,6 @@ Layout Description
<section>
<description>Open CAPI Memory Buffer (OCMB) Firmware (300K)</description>
<eyeCatch>OCMBFW</eyeCatch>
- <physicalOffset>0x3D9C000</physicalOffset>
<physicalRegionSize>0x4B000</physicalRegionSize>
<side>sideless</side>
<sha512Version/>
@@ -315,7 +294,6 @@ Layout Description
<section>
<description>HDAT Data (16K)</description>
<eyeCatch>HDAT</eyeCatch>
- <physicalOffset>0x3DE7000</physicalOffset>
<physicalRegionSize>0x4000</physicalRegionSize>
<side>sideless</side>
<sha512Version/>
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