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author | Mike Baiocchi <mbaiocch@us.ibm.com> | 2017-06-14 16:35:50 -0500 |
---|---|---|
committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2017-06-19 09:51:50 -0400 |
commit | 331c3aae67d8a366dc750be9148d6bcc194b69cc (patch) | |
tree | ce58b144135453421e7367008320ee32a132e780 /src/build/buildpnor/defaultPnorLayout.xml | |
parent | 274a64b5cb71867019f4cecf47cfc0e12262238e (diff) | |
download | talos-hostboot-331c3aae67d8a366dc750be9148d6bcc194b69cc.tar.gz talos-hostboot-331c3aae67d8a366dc750be9148d6bcc194b69cc.zip |
Create and allow for PNOR SBE Partition to have DD1.0 and DD2.0 Images
This commit will attempt to put the uncustomized DD1.0 and DD2.0
SBE images into a single PNOR SBE partition. To do so, the size of the
PNOR SBE partition was expanded.
Change-Id: I938a862bd974f5a2b4fa84fcf9a7e28268a1a5bc
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41853
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Stephen M. Cprek <smcprek@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: MURULIDHAR NATARAJU <murulidhar@in.ibm.com>
Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/build/buildpnor/defaultPnorLayout.xml')
-rw-r--r-- | src/build/buildpnor/defaultPnorLayout.xml | 28 |
1 files changed, 14 insertions, 14 deletions
diff --git a/src/build/buildpnor/defaultPnorLayout.xml b/src/build/buildpnor/defaultPnorLayout.xml index 3ed40176f..de66aa826 100644 --- a/src/build/buildpnor/defaultPnorLayout.xml +++ b/src/build/buildpnor/defaultPnorLayout.xml @@ -160,10 +160,10 @@ Layout Description </section> --> <section> - <description>SBE-IPL (Staging Area) (288K)</description> + <description>SBE-IPL (Staging Area) (520K)</description> <eyeCatch>SBE</eyeCatch> <physicalOffset>0xF61000</physicalOffset> - <physicalRegionSize>0x48000</physicalRegionSize> + <physicalRegionSize>0x82000</physicalRegionSize> <sha512perEC/> <sha512Version/> <side>sideless</side> @@ -172,7 +172,7 @@ Layout Description <section> <description>HCODE Ref Image (1.125MB)</description> <eyeCatch>HCODE</eyeCatch> - <physicalOffset>0xFA9000</physicalOffset> + <physicalOffset>0xFE3000</physicalOffset> <physicalRegionSize>0x120000</physicalRegionSize> <sha512Version/> <side>sideless</side> @@ -181,7 +181,7 @@ Layout Description <section> <description>Hostboot Runtime Services for Sapphire (4.5MB)</description> <eyeCatch>HBRT</eyeCatch> - <physicalOffset>0x10C9000</physicalOffset> + <physicalOffset>0x1103000</physicalOffset> <physicalRegionSize>0x480000</physicalRegionSize> <sha512Version/> <side>sideless</side> @@ -190,7 +190,7 @@ Layout Description <section> <description>Payload (21.375MB)</description> <eyeCatch>PAYLOAD</eyeCatch> - <physicalOffset>0x1549000</physicalOffset> + <physicalOffset>0x1583000</physicalOffset> <physicalRegionSize>0x1560000</physicalRegionSize> <sha512Version/> <side>sideless</side> @@ -199,7 +199,7 @@ Layout Description <section> <description>Special PNOR Test Space (36K)</description> <eyeCatch>TEST</eyeCatch> - <physicalOffset>0x2AA9000</physicalOffset> + <physicalOffset>0x2AE3000</physicalOffset> <physicalRegionSize>0x9000</physicalRegionSize> <testonly/> <side>sideless</side> @@ -208,7 +208,7 @@ Layout Description <section> <description>Special PNOR Test Space (36K)</description> <eyeCatch>TESTRO</eyeCatch> - <physicalOffset>0x2AB2000</physicalOffset> + <physicalOffset>0x2AEC000</physicalOffset> <physicalRegionSize>0x9000</physicalRegionSize> <side>sideless</side> <testonly/> @@ -219,7 +219,7 @@ Layout Description <section> <description>Hostboot Bootloader (28K)</description> <eyeCatch>HBBL</eyeCatch> - <physicalOffset>0x2ABB000</physicalOffset> + <physicalOffset>0x2AF5000</physicalOffset> <!-- Physical Size includes Header rounded to ECC valid size --> <!-- Max size of actual HBBL content is 20K and 22.5K with ECC --> <physicalRegionSize>0x7000</physicalRegionSize> @@ -230,7 +230,7 @@ Layout Description <section> <description>Global Data (36K)</description> <eyeCatch>GLOBAL</eyeCatch> - <physicalOffset>0x2AC2000</physicalOffset> + <physicalOffset>0x2AFC000</physicalOffset> <physicalRegionSize>0x9000</physicalRegionSize> <side>sideless</side> <ecc/> @@ -238,7 +238,7 @@ Layout Description <section> <description>Ref Image Ring Overrides (20K)</description> <eyeCatch>RINGOVD</eyeCatch> - <physicalOffset>0x2ACB000</physicalOffset> + <physicalOffset>0x2B05000</physicalOffset> <physicalRegionSize>0x5000</physicalRegionSize> <side>sideless</side> <ecc/> @@ -246,7 +246,7 @@ Layout Description <section> <description>SecureBoot Key Transition Partition (16K)</description> <eyeCatch>SBKT</eyeCatch> - <physicalOffset>0x2AD0000</physicalOffset> + <physicalOffset>0x2B0A000</physicalOffset> <physicalRegionSize>0x4000</physicalRegionSize> <side>sideless</side> <ecc/> @@ -254,7 +254,7 @@ Layout Description <section> <description>OCC Lid (1.125M)</description> <eyeCatch>OCC</eyeCatch> - <physicalOffset>0x2AD4000</physicalOffset> + <physicalOffset>0x2B0E000</physicalOffset> <physicalRegionSize>0x120000</physicalRegionSize> <sha512Version/> <side>sideless</side> @@ -265,7 +265,7 @@ Layout Description <!-- We need 266KB per module sort, going to support 10 sorts by default, plus ECC --> <eyeCatch>WOFDATA</eyeCatch> - <physicalOffset>0x2BF4000</physicalOffset> + <physicalOffset>0x2C2E000</physicalOffset> <physicalRegionSize>0x300000</physicalRegionSize> <side>sideless</side> <sha512Version/> @@ -274,7 +274,7 @@ Layout Description <section> <description>FIRDATA (12K)</description> <eyeCatch>FIRDATA</eyeCatch> - <physicalOffset>0x2EF4000</physicalOffset> + <physicalOffset>0x2F2E000</physicalOffset> <physicalRegionSize>0x3000</physicalRegionSize> <side>sideless</side> <ecc/> |