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| author | Marty Gloff <mgloff@us.ibm.com> | 2017-06-08 16:38:15 -0500 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2017-06-08 22:29:56 -0400 |
| commit | b8394ea057006aaee7246f521a560589a2803475 (patch) | |
| tree | c3ad3fa1bf0e760365c3679437bff98a2a671a41 /src/bootloader | |
| parent | e1929d0094d34bd207cfc6533f1e77b4d122060e (diff) | |
| download | talos-hostboot-b8394ea057006aaee7246f521a560589a2803475.tar.gz talos-hostboot-b8394ea057006aaee7246f521a560589a2803475.zip | |
Workaround for MMIO BARs passed to Bootloader
Change-Id: I2ef14753d5681ce18c65ec6aa486d763bdc690e6
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41574
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/bootloader')
| -rw-r--r-- | src/bootloader/bootloader.C | 11 |
1 files changed, 6 insertions, 5 deletions
diff --git a/src/bootloader/bootloader.C b/src/bootloader/bootloader.C index 772279bc9..bf8ca180a 100644 --- a/src/bootloader/bootloader.C +++ b/src/bootloader/bootloader.C @@ -124,9 +124,9 @@ namespace Bootloader{ // Copy values for MMIO BARs g_blData->blToHbData.xscomBAR - = (l_blConfigData->version >= MMIO_BARS_ADDED) + = /* (l_blConfigData->version >= MMIO_BARS_ADDED) ? l_blConfigData->xscomBAR - : MMIO_GROUP0_CHIP0_XSCOM_BASE_ADDR; + : @fixme-RTC:149250-Remove */ MMIO_GROUP0_CHIP0_XSCOM_BASE_ADDR; /* lpcBAR already copied in main() */ // Only set rest of BlToHbData if SecureROM is valid @@ -290,12 +290,13 @@ namespace Bootloader{ // @TODO RTC:138268 Support multiple sides of PNOR in bootloader // Copy SBE BL shared data into BL HB shared data - const auto l_blConfigData = reinterpret_cast<BootloaderConfigData_t *>( +/* const auto l_blConfigData = reinterpret_cast<BootloaderConfigData_t *>( SBE_HB_COMM_ADDR); + @fixme-RTC:149250-Remove */ g_blData->blToHbData.lpcBAR - = (l_blConfigData->version >= MMIO_BARS_ADDED) + = /* (l_blConfigData->version >= MMIO_BARS_ADDED) ? l_blConfigData->lpcBAR - : MMIO_GROUP0_CHIP0_LPC_BASE_ADDR; + : @fixme-RTC:149250-Remove */ MMIO_GROUP0_CHIP0_LPC_BASE_ADDR; //pnorEnd is the end of flash, which is base of lpc, plus //the offset of the FW space, plus the TOP memory address in FW space |
