Memory map and execution fixes for simics.

5 files changed, 33 insertions, 12 deletions

diff --git a/src/include/kernel/ppcarch.H b/src/include/kernel/ppcarch.H
index 2b61f6200..13ebfe6e2 100644
--- a/src/include/kernel/ppcarch.H
+++ b/src/include/kernel/ppcarch.H
@@ -43,5 +43,20 @@ inline void ppc_setSPRG3(uint64_t _sprg3)
     return;
 }
 
+__attribute__((always_inline))
+inline uint64_t ppc_getMSR()
+{
+    register uint64_t msr = 0;
+    asm volatile("mfmsr %0" : "=r" (msr));
+    return msr;
+}
+
+__attribute__((always_inline))
+inline void ppc_setMSR(uint64_t _msr)
+{
+    register uint64_t msr = _msr;
+    asm volatile("mtmsr %0; isync" : "=r" (msr));
+}
+
 
 #endif
diff --git a/src/kernel/start.S b/src/kernel/start.S
index 3754f5d3d..169497601 100644
--- a/src/kernel/start.S
+++ b/src/kernel/start.S
@@ -215,7 +215,9 @@ kernel_dispatch_task:
     stdcx. r0, 0, r1	;// the CPU pointer in the task.
 
     mfmsr r2		;// Get current MSR
-    ori r2,r2, 0xC000	;// Enable MSR[EE,PR].
+    ori r2,r2, 0xC030	;// Enable MSR[EE,PR,IR,DR].
+    rldicl r2,r2,1,1	;// Clear ...
+    rotldi r2,r2,63	;// 	MSR[TA]
     mtsrr1 r2		;// Set task MSR (SRR1)
 
     ld r2, TASK_NIP(r1)	;// Load NIP from context.
diff --git a/src/kernel/taskmgr.C b/src/kernel/taskmgr.C
index 42826e61d..7ed190709 100644
--- a/src/kernel/taskmgr.C
+++ b/src/kernel/taskmgr.C
@@ -54,6 +54,9 @@ task_t* TaskManager::_createTask(TaskManager::task_fn_t t,
     task->context.nip = (void*) ((uint64_t*) t)[0];
     task->context.gprs[2] = ((uint64_t*)t)[1];
 
+    // Set up GRP[13] as task structure reserved.
+    task->context.gprs[13] = (uint64_t)task;
+
     // Set up argument.
     task->context.gprs[3] = (uint64_t) p;
     
diff --git a/src/kernel/vmmmgr.C b/src/kernel/vmmmgr.C
index 1cbf33e55..57e59eace 100644
--- a/src/kernel/vmmmgr.C
+++ b/src/kernel/vmmmgr.C
@@ -12,7 +12,7 @@ void VmmManager::init()
     
     VmmManager& v = Singleton<VmmManager>::instance();
 
-    //v.initSLB();
+    v.initSLB();
     v.initPTEs();
     v.initSDR1();
 
@@ -23,13 +23,14 @@ void VmmManager::initSLB()
 {
     register uint64_t slbRS, slbRB;
 
-    // ESID = 0, V = 1, Index = 0.
-    slbRB = 0x0000000008000000; 
+    // ESID = 0, V = 1, Index = 1.
+    slbRB = 0x0000000008000001; 
     
     // B = 01 (1TB), VSID = 0, Ks = 0, Kp = 1, NLCLP = 0
     slbRS = 0x4000000000000400;
-
+    
     asm volatile("slbmte %0, %1" :: "r"(slbRS), "r"(slbRB) : "memory");
+    asm volatile("isync" ::: "memory");
 }
 
 void VmmManager::initPTEs()
@@ -53,8 +54,8 @@ void VmmManager::initPTEs()
 
 void VmmManager::initSDR1()
 {
-    // HTABORG << 17, HTABSIZE = 0 (11 bits, 256k table)
-    register uint64_t sdr1 = (((uint64_t)HTABORG) << 17);
+    // HTABORG, HTABSIZE = 0 (11 bits, 256k table)
+    register uint64_t sdr1 = (uint64_t)HTABORG;
     asm volatile("mtsdr1 %0" :: "r"(sdr1) : "memory");
 }
 
diff --git a/src/lib/syscall_task.C b/src/lib/syscall_task.C
index a29a9a94c..d637b45af 100644
--- a/src/lib/syscall_task.C
+++ b/src/lib/syscall_task.C
@@ -24,11 +24,11 @@ void task_end()
 
 tid_t task_gettid()
 {
-    // Even though we have a syscall for GETTID, we can implement this as a 
-    // direct access to SPRG3.  On processor that do not support unprivilaged
-    // access to this SPR, we implement it as an emulated instruction in the
-    // exception handler.
+    // Even though we have a syscall for GETTID, we also have the task in 
+    // GRP13.
 
-    return TaskManager::getCurrentTask()->tid;
+    register task_t* task;
+    asm volatile("addi %0, 13, 0" : "=r"(task));
+    return task->tid;
     //return (tid_t)_syscall0(TASK_GETTID);
 }