diff options
| author | Ben Gass <bgass@us.ibm.com> | 2019-09-05 10:00:38 -0400 |
|---|---|---|
| committer | Nicholas E Bofferding <bofferdn@us.ibm.com> | 2019-09-17 08:03:28 -0500 |
| commit | d534ac32b8ded6b464c90406a28f7cdef7ea086b (patch) | |
| tree | 9ea9e32b11a4c5786fca6a3b5718d5114eafb364 | |
| parent | d2bcdefb26aecf8cd6d01577729ac45a66685a12 (diff) | |
| download | talos-hostboot-d534ac32b8ded6b464c90406a28f7cdef7ea086b.tar.gz talos-hostboot-d534ac32b8ded6b464c90406a28f7cdef7ea086b.zip | |
Update explorer scom header files with newer figtree data.
Change-Id: I2ba7df5fdd7f532f9ad5c2fca202849d443bfea9
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/83277
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Dev-Ready: STEPHEN GLANCY <sglancy@us.ibm.com>
Reviewed-by: Jennifer A Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/83427
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Nicholas E Bofferding <bofferdn@us.ibm.com>
8 files changed, 7413 insertions, 7159 deletions
diff --git a/src/import/chips/ocmb/explorer/common/include/explorer_scom_addresses.H b/src/import/chips/ocmb/explorer/common/include/explorer_scom_addresses.H index 010b81049..66ad88c03 100644 --- a/src/import/chips/ocmb/explorer/common/include/explorer_scom_addresses.H +++ b/src/import/chips/ocmb/explorer/common/include/explorer_scom_addresses.H @@ -23,1540 +23,1504 @@ /* */ /* IBM_PROLOG_END_TAG */ + #ifndef __EXPLR_SCOM_ADDRESSES_H #define __EXPLR_SCOM_ADDRESSES_H -static const uint64_t EXPLR_DLX_CMN_CONFIG = 0x0801280Eull; - - -static const uint64_t EXPLR_DLX_DL0_CONFIG0 = 0x08012810ull; - - -static const uint64_t EXPLR_DLX_DL0_CONFIG1 = 0x08012811ull; - - -static const uint64_t EXPLR_DLX_DL0_CYA_BITS = 0x0801281Full; - - -static const uint64_t EXPLR_DLX_DL0_DEBUG_AID = 0x0801281Eull; - - -static const uint64_t EXPLR_DLX_DL0_DLX_CONFIG = 0x08012818ull; - - -static const uint64_t EXPLR_DLX_DL0_DLX_INFO = 0x08012819ull; - - -static const uint64_t EXPLR_DLX_DL0_EDPL_MAX_COUNT = 0x08012815ull; - - -static const uint64_t EXPLR_DLX_DL0_ERROR_ACTION = 0x0801281Dull; - - -static const uint64_t EXPLR_DLX_DL0_ERROR_CAPTURE = 0x08012814ull; - - -static const uint64_t EXPLR_DLX_DL0_ERROR_HOLD = 0x08012813ull; - - -static const uint64_t EXPLR_DLX_DL0_ERROR_MASK = 0x08012812ull; - - -static const uint64_t EXPLR_DLX_DL0_STATUS = 0x08012816ull; - - -static const uint64_t EXPLR_DLX_DL0_TRAINING_STATUS = 0x08012817ull; - - -static const uint64_t EXPLR_DLX_ERR_HOLD_LAT = 0x0801280Bull; - - -static const uint64_t EXPLR_DLX_ERR_MASK_LAT = 0x0801280Aull; - -static const uint64_t EXPLR_DLX_MC_OMI_FIR_ACTION0_REG = 0x08012806ull; +static const uint64_t EXPLR_DLX_CMN_CONFIG = 0x0801280Eull; -static const uint64_t EXPLR_DLX_MC_OMI_FIR_ACTION1_REG = 0x08012807ull; +static const uint64_t EXPLR_DLX_DL0_CONFIG0 = 0x08012810ull; -static const uint64_t EXPLR_DLX_MC_OMI_FIR_MASK_REG = 0x08012803ull; -static const uint64_t EXPLR_DLX_MC_OMI_FIR_MASK_REG_AND = 0x08012804ull; +static const uint64_t EXPLR_DLX_DL0_CONFIG1 = 0x08012811ull; -static const uint64_t EXPLR_DLX_MC_OMI_FIR_MASK_REG_OR = 0x08012805ull; +static const uint64_t EXPLR_DLX_DL0_CYA_BITS = 0x0801281Full; -static const uint64_t EXPLR_DLX_MC_OMI_FIR_REG = 0x08012800ull; -static const uint64_t EXPLR_DLX_MC_OMI_FIR_REG_AND = 0x08012801ull; +static const uint64_t EXPLR_DLX_DL0_DEBUG_AID = 0x0801281Eull; -static const uint64_t EXPLR_DLX_MC_OMI_FIR_REG_OR = 0x08012802ull; +static const uint64_t EXPLR_DLX_DL0_DLX_CONFIG = 0x08012818ull; -static const uint64_t EXPLR_DLX_MC_OMI_FIR_WOF_REG = 0x08012808ull; +static const uint64_t EXPLR_DLX_DL0_DLX_INFO = 0x08012819ull; -static const uint64_t EXPLR_DLX_PMU_CNTR = 0x0801280Full; +static const uint64_t EXPLR_DLX_DL0_EDPL_MAX_COUNT = 0x08012815ull; -static const uint64_t EXPLR_MCBIST_CCSARRERRINJQ = 0x080118DEull; +static const uint64_t EXPLR_DLX_DL0_ERROR_ACTION = 0x0801281Dull; -static const uint64_t EXPLR_MCBIST_CCS_CNTLQ = 0x080118A5ull; +static const uint64_t EXPLR_DLX_DL0_ERROR_CAPTURE = 0x08012814ull; -static const uint64_t EXPLR_MCBIST_CCS_FIXED_DATA0Q = 0x080118E5ull; +static const uint64_t EXPLR_DLX_DL0_ERROR_HOLD = 0x08012813ull; -static const uint64_t EXPLR_MCBIST_CCS_FIXED_DATA1Q = 0x080118E6ull; +static const uint64_t EXPLR_DLX_DL0_ERROR_MASK = 0x08012812ull; -static const uint64_t EXPLR_MCBIST_CCS_INST_ARR0_00 = 0x08011815ull; +static const uint64_t EXPLR_DLX_DL0_STATUS = 0x08012816ull; -static const uint64_t EXPLR_MCBIST_CCS_INST_ARR0_01 = 0x08011816ull; +static const uint64_t EXPLR_DLX_DL0_TRAINING_STATUS = 0x08012817ull; -static const uint64_t EXPLR_MCBIST_CCS_INST_ARR0_02 = 0x08011817ull; +static const uint64_t EXPLR_DLX_ERR_HOLD_LAT = 0x0801280Bull; -static const uint64_t EXPLR_MCBIST_CCS_INST_ARR0_03 = 0x08011818ull; +static const uint64_t EXPLR_DLX_ERR_MASK_LAT = 0x0801280Aull; -static const uint64_t EXPLR_MCBIST_CCS_INST_ARR0_04 = 0x08011819ull; +static const uint64_t EXPLR_DLX_MC_OMI_FIR_ACTION0_REG = 0x08012806ull; -static const uint64_t EXPLR_MCBIST_CCS_INST_ARR0_05 = 0x0801181Aull; +static const uint64_t EXPLR_DLX_MC_OMI_FIR_ACTION1_REG = 0x08012807ull; -static const uint64_t EXPLR_MCBIST_CCS_INST_ARR0_06 = 0x0801181Bull; +static const uint64_t EXPLR_DLX_MC_OMI_FIR_MASK_REG = 0x08012803ull; -static const uint64_t EXPLR_MCBIST_CCS_INST_ARR0_07 = 0x0801181Cull; +static const uint64_t EXPLR_DLX_MC_OMI_FIR_MASK_REG_AND = 0x08012804ull; +static const uint64_t EXPLR_DLX_MC_OMI_FIR_MASK_REG_OR = 0x08012805ull; -static const uint64_t EXPLR_MCBIST_CCS_INST_ARR0_08 = 0x0801181Dull; +static const uint64_t EXPLR_DLX_MC_OMI_FIR_REG = 0x08012800ull; -static const uint64_t EXPLR_MCBIST_CCS_INST_ARR0_09 = 0x0801181Eull; +static const uint64_t EXPLR_DLX_MC_OMI_FIR_REG_AND = 0x08012801ull; +static const uint64_t EXPLR_DLX_MC_OMI_FIR_REG_OR = 0x08012802ull; -static const uint64_t EXPLR_MCBIST_CCS_INST_ARR0_10 = 0x0801181Full; +static const uint64_t EXPLR_DLX_MC_OMI_FIR_WOF_REG = 0x08012808ull; -static const uint64_t EXPLR_MCBIST_CCS_INST_ARR0_11 = 0x08011820ull; +static const uint64_t EXPLR_DLX_PMU_CNTR = 0x0801280Full; -static const uint64_t EXPLR_MCBIST_CCS_INST_ARR0_12 = 0x08011821ull; +static const uint64_t EXPLR_MCBIST_CCSARRERRINJQ = 0x080118DEull; -static const uint64_t EXPLR_MCBIST_CCS_INST_ARR0_13 = 0x08011822ull; +static const uint64_t EXPLR_MCBIST_CCS_CNTLQ = 0x080118A5ull; -static const uint64_t EXPLR_MCBIST_CCS_INST_ARR0_14 = 0x08011823ull; +static const uint64_t EXPLR_MCBIST_CCS_FIXED_DATA0Q = 0x080118E5ull; -static const uint64_t EXPLR_MCBIST_CCS_INST_ARR0_15 = 0x08011824ull; +static const uint64_t EXPLR_MCBIST_CCS_FIXED_DATA1Q = 0x080118E6ull; -static const uint64_t EXPLR_MCBIST_CCS_INST_ARR0_16 = 0x08011825ull; +static const uint64_t EXPLR_MCBIST_CCS_INST_ARR0_00 = 0x08011815ull; -static const uint64_t EXPLR_MCBIST_CCS_INST_ARR0_17 = 0x08011826ull; +static const uint64_t EXPLR_MCBIST_CCS_INST_ARR0_01 = 0x08011816ull; -static const uint64_t EXPLR_MCBIST_CCS_INST_ARR0_18 = 0x08011827ull; +static const uint64_t EXPLR_MCBIST_CCS_INST_ARR0_02 = 0x08011817ull; -static const uint64_t EXPLR_MCBIST_CCS_INST_ARR0_19 = 0x08011828ull; +static const uint64_t EXPLR_MCBIST_CCS_INST_ARR0_03 = 0x08011818ull; -static const uint64_t EXPLR_MCBIST_CCS_INST_ARR0_20 = 0x08011829ull; +static const uint64_t EXPLR_MCBIST_CCS_INST_ARR0_04 = 0x08011819ull; -static const uint64_t EXPLR_MCBIST_CCS_INST_ARR0_21 = 0x0801182Aull; +static const uint64_t EXPLR_MCBIST_CCS_INST_ARR0_05 = 0x0801181Aull; -static const uint64_t EXPLR_MCBIST_CCS_INST_ARR0_22 = 0x0801182Bull; +static const uint64_t EXPLR_MCBIST_CCS_INST_ARR0_06 = 0x0801181Bull; -static const uint64_t EXPLR_MCBIST_CCS_INST_ARR0_23 = 0x0801182Cull; +static const uint64_t EXPLR_MCBIST_CCS_INST_ARR0_07 = 0x0801181Cull; -static const uint64_t EXPLR_MCBIST_CCS_INST_ARR0_24 = 0x0801182Dull; +static const uint64_t EXPLR_MCBIST_CCS_INST_ARR0_08 = 0x0801181Dull; -static const uint64_t EXPLR_MCBIST_CCS_INST_ARR0_25 = 0x0801182Eull; +static const uint64_t EXPLR_MCBIST_CCS_INST_ARR0_09 = 0x0801181Eull; -static const uint64_t EXPLR_MCBIST_CCS_INST_ARR0_26 = 0x0801182Full; +static const uint64_t EXPLR_MCBIST_CCS_INST_ARR0_10 = 0x0801181Full; -static const uint64_t EXPLR_MCBIST_CCS_INST_ARR0_27 = 0x08011830ull; +static const uint64_t EXPLR_MCBIST_CCS_INST_ARR0_11 = 0x08011820ull; -static const uint64_t EXPLR_MCBIST_CCS_INST_ARR0_28 = 0x08011831ull; +static const uint64_t EXPLR_MCBIST_CCS_INST_ARR0_12 = 0x08011821ull; -static const uint64_t EXPLR_MCBIST_CCS_INST_ARR0_29 = 0x08011832ull; +static const uint64_t EXPLR_MCBIST_CCS_INST_ARR0_13 = 0x08011822ull; -static const uint64_t EXPLR_MCBIST_CCS_INST_ARR0_30 = 0x08011833ull; +static const uint64_t EXPLR_MCBIST_CCS_INST_ARR0_14 = 0x08011823ull; -static const uint64_t EXPLR_MCBIST_CCS_INST_ARR0_31 = 0x08011834ull; +static const uint64_t EXPLR_MCBIST_CCS_INST_ARR0_15 = 0x08011824ull; -static const uint64_t EXPLR_MCBIST_CCS_INST_ARR1_00 = 0x08011835ull; +static const uint64_t EXPLR_MCBIST_CCS_INST_ARR0_16 = 0x08011825ull; -static const uint64_t EXPLR_MCBIST_CCS_INST_ARR1_01 = 0x08011836ull; +static const uint64_t EXPLR_MCBIST_CCS_INST_ARR0_17 = 0x08011826ull; -static const uint64_t EXPLR_MCBIST_CCS_INST_ARR1_02 = 0x08011837ull; +static const uint64_t EXPLR_MCBIST_CCS_INST_ARR0_18 = 0x08011827ull; -static const uint64_t EXPLR_MCBIST_CCS_INST_ARR1_03 = 0x08011838ull; +static const uint64_t EXPLR_MCBIST_CCS_INST_ARR0_19 = 0x08011828ull; -static const uint64_t EXPLR_MCBIST_CCS_INST_ARR1_04 = 0x08011839ull; +static const uint64_t EXPLR_MCBIST_CCS_INST_ARR0_20 = 0x08011829ull; -static const uint64_t EXPLR_MCBIST_CCS_INST_ARR1_05 = 0x0801183Aull; +static const uint64_t EXPLR_MCBIST_CCS_INST_ARR0_21 = 0x0801182Aull; -static const uint64_t EXPLR_MCBIST_CCS_INST_ARR1_06 = 0x0801183Bull; +static const uint64_t EXPLR_MCBIST_CCS_INST_ARR0_22 = 0x0801182Bull; -static const uint64_t EXPLR_MCBIST_CCS_INST_ARR1_07 = 0x0801183Cull; +static const uint64_t EXPLR_MCBIST_CCS_INST_ARR0_23 = 0x0801182Cull; -static const uint64_t EXPLR_MCBIST_CCS_INST_ARR1_08 = 0x0801183Dull; +static const uint64_t EXPLR_MCBIST_CCS_INST_ARR0_24 = 0x0801182Dull; -static const uint64_t EXPLR_MCBIST_CCS_INST_ARR1_09 = 0x0801183Eull; +static const uint64_t EXPLR_MCBIST_CCS_INST_ARR0_25 = 0x0801182Eull; -static const uint64_t EXPLR_MCBIST_CCS_INST_ARR1_10 = 0x0801183Full; +static const uint64_t EXPLR_MCBIST_CCS_INST_ARR0_26 = 0x0801182Full; -static const uint64_t EXPLR_MCBIST_CCS_INST_ARR1_11 = 0x08011840ull; +static const uint64_t EXPLR_MCBIST_CCS_INST_ARR0_27 = 0x08011830ull; -static const uint64_t EXPLR_MCBIST_CCS_INST_ARR1_12 = 0x08011841ull; +static const uint64_t EXPLR_MCBIST_CCS_INST_ARR0_28 = 0x08011831ull; -static const uint64_t EXPLR_MCBIST_CCS_INST_ARR1_13 = 0x08011842ull; +static const uint64_t EXPLR_MCBIST_CCS_INST_ARR0_29 = 0x08011832ull; -static const uint64_t EXPLR_MCBIST_CCS_INST_ARR1_14 = 0x08011843ull; +static const uint64_t EXPLR_MCBIST_CCS_INST_ARR0_30 = 0x08011833ull; -static const uint64_t EXPLR_MCBIST_CCS_INST_ARR1_15 = 0x08011844ull; +static const uint64_t EXPLR_MCBIST_CCS_INST_ARR0_31 = 0x08011834ull; -static const uint64_t EXPLR_MCBIST_CCS_INST_ARR1_16 = 0x08011845ull; +static const uint64_t EXPLR_MCBIST_CCS_INST_ARR1_00 = 0x08011835ull; -static const uint64_t EXPLR_MCBIST_CCS_INST_ARR1_17 = 0x08011846ull; +static const uint64_t EXPLR_MCBIST_CCS_INST_ARR1_01 = 0x08011836ull; -static const uint64_t EXPLR_MCBIST_CCS_INST_ARR1_18 = 0x08011847ull; +static const uint64_t EXPLR_MCBIST_CCS_INST_ARR1_02 = 0x08011837ull; -static const uint64_t EXPLR_MCBIST_CCS_INST_ARR1_19 = 0x08011848ull; +static const uint64_t EXPLR_MCBIST_CCS_INST_ARR1_03 = 0x08011838ull; -static const uint64_t EXPLR_MCBIST_CCS_INST_ARR1_20 = 0x08011849ull; +static const uint64_t EXPLR_MCBIST_CCS_INST_ARR1_04 = 0x08011839ull; -static const uint64_t EXPLR_MCBIST_CCS_INST_ARR1_21 = 0x0801184Aull; +static const uint64_t EXPLR_MCBIST_CCS_INST_ARR1_05 = 0x0801183Aull; -static const uint64_t EXPLR_MCBIST_CCS_INST_ARR1_22 = 0x0801184Bull; +static const uint64_t EXPLR_MCBIST_CCS_INST_ARR1_06 = 0x0801183Bull; -static const uint64_t EXPLR_MCBIST_CCS_INST_ARR1_23 = 0x0801184Cull; +static const uint64_t EXPLR_MCBIST_CCS_INST_ARR1_07 = 0x0801183Cull; -static const uint64_t EXPLR_MCBIST_CCS_INST_ARR1_24 = 0x0801184Dull; +static const uint64_t EXPLR_MCBIST_CCS_INST_ARR1_08 = 0x0801183Dull; -static const uint64_t EXPLR_MCBIST_CCS_INST_ARR1_25 = 0x0801184Eull; +static const uint64_t EXPLR_MCBIST_CCS_INST_ARR1_09 = 0x0801183Eull; -static const uint64_t EXPLR_MCBIST_CCS_INST_ARR1_26 = 0x0801184Full; +static const uint64_t EXPLR_MCBIST_CCS_INST_ARR1_10 = 0x0801183Full; -static const uint64_t EXPLR_MCBIST_CCS_INST_ARR1_27 = 0x08011850ull; +static const uint64_t EXPLR_MCBIST_CCS_INST_ARR1_11 = 0x08011840ull; -static const uint64_t EXPLR_MCBIST_CCS_INST_ARR1_28 = 0x08011851ull; +static const uint64_t EXPLR_MCBIST_CCS_INST_ARR1_12 = 0x08011841ull; -static const uint64_t EXPLR_MCBIST_CCS_INST_ARR1_29 = 0x08011852ull; +static const uint64_t EXPLR_MCBIST_CCS_INST_ARR1_13 = 0x08011842ull; -static const uint64_t EXPLR_MCBIST_CCS_INST_ARR1_30 = 0x08011853ull; +static const uint64_t EXPLR_MCBIST_CCS_INST_ARR1_14 = 0x08011843ull; -static const uint64_t EXPLR_MCBIST_CCS_INST_ARR1_31 = 0x08011854ull; +static const uint64_t EXPLR_MCBIST_CCS_INST_ARR1_15 = 0x08011844ull; -static const uint64_t EXPLR_MCBIST_CCS_MODEQ = 0x080118A7ull; +static const uint64_t EXPLR_MCBIST_CCS_INST_ARR1_16 = 0x08011845ull; -static const uint64_t EXPLR_MCBIST_CCS_STATQ = 0x080118A6ull; +static const uint64_t EXPLR_MCBIST_CCS_INST_ARR1_17 = 0x08011846ull; -static const uint64_t EXPLR_MCBIST_DBGCFG0Q = 0x080118E8ull; +static const uint64_t EXPLR_MCBIST_CCS_INST_ARR1_18 = 0x08011847ull; -static const uint64_t EXPLR_MCBIST_DBGCFG1Q = 0x080118E9ull; +static const uint64_t EXPLR_MCBIST_CCS_INST_ARR1_19 = 0x08011848ull; -static const uint64_t EXPLR_MCBIST_DBGCFG2Q = 0x080118EAull; +static const uint64_t EXPLR_MCBIST_CCS_INST_ARR1_20 = 0x08011849ull; -static const uint64_t EXPLR_MCBIST_DBGCFG3Q = 0x080118EBull; +static const uint64_t EXPLR_MCBIST_CCS_INST_ARR1_21 = 0x0801184Aull; -static const uint64_t EXPLR_MCBIST_DBG_BUS_CFGQ = 0x08011872ull; +static const uint64_t EXPLR_MCBIST_CCS_INST_ARR1_22 = 0x0801184Bull; -static const uint64_t EXPLR_MCBIST_ERR_HOLD_LAT = 0x0801180Bull; +static const uint64_t EXPLR_MCBIST_CCS_INST_ARR1_23 = 0x0801184Cull; -static const uint64_t EXPLR_MCBIST_ERR_MASK0Q = 0x08011873ull; +static const uint64_t EXPLR_MCBIST_CCS_INST_ARR1_24 = 0x0801184Dull; -static const uint64_t EXPLR_MCBIST_ERR_MASK1Q = 0x08011874ull; +static const uint64_t EXPLR_MCBIST_CCS_INST_ARR1_25 = 0x0801184Eull; -static const uint64_t EXPLR_MCBIST_ERR_MASK_LAT = 0x0801180Aull; +static const uint64_t EXPLR_MCBIST_CCS_INST_ARR1_26 = 0x0801184Full; -static const uint64_t EXPLR_MCBIST_MBAUER0Q = 0x0801186Eull; +static const uint64_t EXPLR_MCBIST_CCS_INST_ARR1_27 = 0x08011850ull; -static const uint64_t EXPLR_MCBIST_MBA_MCBERRPT0Q = 0x080118E7ull; +static const uint64_t EXPLR_MCBIST_CCS_INST_ARR1_28 = 0x08011851ull; -static const uint64_t EXPLR_MCBIST_MBA_MCBERRPT1Q = 0x080118ECull; +static const uint64_t EXPLR_MCBIST_CCS_INST_ARR1_29 = 0x08011852ull; -static const uint64_t EXPLR_MCBIST_MBECTLQ = 0x08011810ull; +static const uint64_t EXPLR_MCBIST_CCS_INST_ARR1_30 = 0x08011853ull; -static const uint64_t EXPLR_MCBIST_MBMPER0Q = 0x0801186Cull; +static const uint64_t EXPLR_MCBIST_CCS_INST_ARR1_31 = 0x08011854ull; -static const uint64_t EXPLR_MCBIST_MBNCER0Q = 0x0801186Aull; +static const uint64_t EXPLR_MCBIST_CCS_MODEQ = 0x080118A7ull; -static const uint64_t EXPLR_MCBIST_MBRCER0Q = 0x0801186Bull; +static const uint64_t EXPLR_MCBIST_CCS_STATQ = 0x080118A6ull; -static const uint64_t EXPLR_MCBIST_MBSEC0Q = 0x08011855ull; +static const uint64_t EXPLR_MCBIST_DBGCFG0Q = 0x080118E8ull; -static const uint64_t EXPLR_MCBIST_MBSEC1Q = 0x08011856ull; +static const uint64_t EXPLR_MCBIST_DBGCFG1Q = 0x080118E9ull; -static const uint64_t EXPLR_MCBIST_MBSEVR0Q = 0x0801187Eull; +static const uint64_t EXPLR_MCBIST_DBGCFG2Q = 0x080118EAull; -static const uint64_t EXPLR_MCBIST_MBSMODESQ = 0x08011862ull; +static const uint64_t EXPLR_MCBIST_DBGCFG3Q = 0x080118EBull; -static const uint64_t EXPLR_MCBIST_MBSMSECQ = 0x08011869ull; +static const uint64_t EXPLR_MCBIST_DBG_BUS_CFGQ = 0x08011872ull; -static const uint64_t EXPLR_MCBIST_MBSSYMEC0Q = 0x08011858ull; +static const uint64_t EXPLR_MCBIST_ERR_HOLD_LAT = 0x0801180Bull; -static const uint64_t EXPLR_MCBIST_MBSSYMEC1Q = 0x08011859ull; +static const uint64_t EXPLR_MCBIST_ERR_MASK0Q = 0x08011873ull; -static const uint64_t EXPLR_MCBIST_MBSSYMEC2Q = 0x0801185Aull; +static const uint64_t EXPLR_MCBIST_ERR_MASK1Q = 0x08011874ull; -static const uint64_t EXPLR_MCBIST_MBSSYMEC3Q = 0x0801185Bull; +static const uint64_t EXPLR_MCBIST_ERR_MASK_LAT = 0x0801180Aull; -static const uint64_t EXPLR_MCBIST_MBSSYMEC4Q = 0x0801185Cull; +static const uint64_t EXPLR_MCBIST_MBAUER0Q = 0x0801186Eull; -static const uint64_t EXPLR_MCBIST_MBSSYMEC5Q = 0x0801185Dull; +static const uint64_t EXPLR_MCBIST_MBA_MCBERRPT0Q = 0x080118E7ull; -static const uint64_t EXPLR_MCBIST_MBSSYMEC6Q = 0x0801185Eull; +static const uint64_t EXPLR_MCBIST_MBA_MCBERRPT1Q = 0x080118ECull; -static const uint64_t EXPLR_MCBIST_MBSSYMEC7Q = 0x0801185Full; +static const uint64_t EXPLR_MCBIST_MBECTLQ = 0x08011810ull; -static const uint64_t EXPLR_MCBIST_MBSSYMEC8Q = 0x08011860ull; +static const uint64_t EXPLR_MCBIST_MBMPER0Q = 0x0801186Cull; -static const uint64_t EXPLR_MCBIST_MBSTRQ = 0x08011857ull; +static const uint64_t EXPLR_MCBIST_MBNCER0Q = 0x0801186Aull; -static const uint64_t EXPLR_MCBIST_MBUER0Q = 0x0801186Dull; +static const uint64_t EXPLR_MCBIST_MBRCER0Q = 0x0801186Bull; -static const uint64_t EXPLR_MCBIST_MBXLT0Q = 0x0801186Full; +static const uint64_t EXPLR_MCBIST_MBSEC0Q = 0x08011855ull; -static const uint64_t EXPLR_MCBIST_MBXLT1 = 0x08011870ull; +static const uint64_t EXPLR_MCBIST_MBSEC1Q = 0x08011856ull; -static const uint64_t EXPLR_MCBIST_MBXLT2 = 0x08011871ull; +static const uint64_t EXPLR_MCBIST_MBSEVR0Q = 0x0801187Eull; -static const uint64_t EXPLR_MCBIST_MCBACQ = 0x080118D5ull; +static const uint64_t EXPLR_MCBIST_MBSMODESQ = 0x08011862ull; -static const uint64_t EXPLR_MCBIST_MCBAGRAQ = 0x080118D6ull; +static const uint64_t EXPLR_MCBIST_MBSMSECQ = 0x08011869ull; -static const uint64_t EXPLR_MCBIST_MCBAMR0A0Q = 0x080118C8ull; +static const uint64_t EXPLR_MCBIST_MBSSYMEC0Q = 0x08011858ull; -static const uint64_t EXPLR_MCBIST_MCBAMR1A0Q = 0x080118C9ull; +static const uint64_t EXPLR_MCBIST_MBSSYMEC1Q = 0x08011859ull; -static const uint64_t EXPLR_MCBIST_MCBAMR2A0Q = 0x080118CAull; +static const uint64_t EXPLR_MCBIST_MBSSYMEC2Q = 0x0801185Aull; -static const uint64_t EXPLR_MCBIST_MCBAMR3A0Q = 0x080118CBull; +static const uint64_t EXPLR_MCBIST_MBSSYMEC3Q = 0x0801185Bull; -static const uint64_t EXPLR_MCBIST_MCBCFGQ = 0x080118E0ull; +static const uint64_t EXPLR_MCBIST_MBSSYMEC4Q = 0x0801185Cull; -static const uint64_t EXPLR_MCBIST_MCBDRCRQ = 0x080118BDull; +static const uint64_t EXPLR_MCBIST_MBSSYMEC5Q = 0x0801185Dull; -static const uint64_t EXPLR_MCBIST_MCBDRSRQ = 0x080118BCull; +static const uint64_t EXPLR_MCBIST_MBSSYMEC6Q = 0x0801185Eull; -static const uint64_t EXPLR_MCBIST_MCBEA0Q = 0x080118CEull; +static const uint64_t EXPLR_MCBIST_MBSSYMEC7Q = 0x0801185Full; -static const uint64_t EXPLR_MCBIST_MCBEA1Q = 0x080118CFull; +static const uint64_t EXPLR_MCBIST_MBSSYMEC8Q = 0x08011860ull; -static const uint64_t EXPLR_MCBIST_MCBEA2Q = 0x080118D2ull; +static const uint64_t EXPLR_MCBIST_MBSSYMEC9Q = 0x08011861ull; -static const uint64_t EXPLR_MCBIST_MCBEA3Q = 0x080118D3ull; +static const uint64_t EXPLR_MCBIST_MBSTRQ = 0x08011857ull; -static const uint64_t EXPLR_MCBIST_MCBFD0Q = 0x080118BEull; +static const uint64_t EXPLR_MCBIST_MBUER0Q = 0x0801186Dull; -static const uint64_t EXPLR_MCBIST_MCBFD1Q = 0x080118BFull; +static const uint64_t EXPLR_MCBIST_MBXLT0Q = 0x0801186Full; -static const uint64_t EXPLR_MCBIST_MCBFD2Q = 0x080118C0ull; +static const uint64_t EXPLR_MCBIST_MBXLT1 = 0x08011870ull; -static const uint64_t EXPLR_MCBIST_MCBFD3Q = 0x080118C1ull; +static const uint64_t EXPLR_MCBIST_MBXLT2 = 0x08011871ull; -static const uint64_t EXPLR_MCBIST_MCBFD4Q = 0x080118C2ull; +static const uint64_t EXPLR_MCBIST_MCBACQ = 0x080118D5ull; -static const uint64_t EXPLR_MCBIST_MCBFD5Q = 0x080118C3ull; +static const uint64_t EXPLR_MCBIST_MCBAGRAQ = 0x080118D6ull; -static const uint64_t EXPLR_MCBIST_MCBFD6Q = 0x080118C4ull; +static const uint64_t EXPLR_MCBIST_MCBAMR0A0Q = 0x080118C8ull; -static const uint64_t EXPLR_MCBIST_MCBFD7Q = 0x080118C5ull; +static const uint64_t EXPLR_MCBIST_MCBAMR1A0Q = 0x080118C9ull; -static const uint64_t EXPLR_MCBIST_MCBFDQ = 0x080118C6ull; +static const uint64_t EXPLR_MCBIST_MCBAMR2A0Q = 0x080118CAull; -static const uint64_t EXPLR_MCBIST_MCBFDSPQ = 0x080118C7ull; +static const uint64_t EXPLR_MCBIST_MCBAMR3A0Q = 0x080118CBull; -static const uint64_t EXPLR_MCBIST_MCBISTFIRACT0 = 0x08011806ull; +static const uint64_t EXPLR_MCBIST_MCBCFGQ = 0x080118E0ull; -static const uint64_t EXPLR_MCBIST_MCBISTFIRACT1 = 0x08011807ull; +static const uint64_t EXPLR_MCBIST_MCBDRCRQ = 0x080118BDull; -static const uint64_t EXPLR_MCBIST_MCBISTFIRMASK = 0x08011803ull; -static const uint64_t EXPLR_MCBIST_MCBISTFIRMASK_AND = 0x08011804ull; +static const uint64_t EXPLR_MCBIST_MCBDRSRQ = 0x080118BCull; -static const uint64_t EXPLR_MCBIST_MCBISTFIRMASK_OR = 0x08011805ull; +static const uint64_t EXPLR_MCBIST_MCBEA0Q = 0x080118CEull; -static const uint64_t EXPLR_MCBIST_MCBISTFIRQ = 0x08011800ull; -static const uint64_t EXPLR_MCBIST_MCBISTFIRQ_AND = 0x08011801ull; +static const uint64_t EXPLR_MCBIST_MCBEA1Q = 0x080118CFull; -static const uint64_t EXPLR_MCBIST_MCBISTFIRQ_OR = 0x08011802ull; +static const uint64_t EXPLR_MCBIST_MCBEA2Q = 0x080118D2ull; -static const uint64_t EXPLR_MCBIST_MCBISTFIRWOF = 0x08011808ull; +static const uint64_t EXPLR_MCBIST_MCBEA3Q = 0x080118D3ull; -static const uint64_t EXPLR_MCBIST_MCBLFSRA0Q = 0x080118D4ull; +static const uint64_t EXPLR_MCBIST_MCBFD0Q = 0x080118BEull; -static const uint64_t EXPLR_MCBIST_MCBMCATQ = 0x080118D7ull; +static const uint64_t EXPLR_MCBIST_MCBFD1Q = 0x080118BFull; -static const uint64_t EXPLR_MCBIST_MCBMR0Q = 0x080118A8ull; +static const uint64_t EXPLR_MCBIST_MCBFD2Q = 0x080118C0ull; -static const uint64_t EXPLR_MCBIST_MCBMR1Q = 0x080118A9ull; +static const uint64_t EXPLR_MCBIST_MCBFD3Q = 0x080118C1ull; -static const uint64_t EXPLR_MCBIST_MCBMR2Q = 0x080118AAull; +static const uint64_t EXPLR_MCBIST_MCBFD4Q = 0x080118C2ull; -static const uint64_t EXPLR_MCBIST_MCBMR3Q = 0x080118ABull; +static const uint64_t EXPLR_MCBIST_MCBFD5Q = 0x080118C3ull; -static const uint64_t EXPLR_MCBIST_MCBMR4Q = 0x080118ACull; +static const uint64_t EXPLR_MCBIST_MCBFD6Q = 0x080118C4ull; -static const uint64_t EXPLR_MCBIST_MCBMR5Q = 0x080118ADull; +static const uint64_t EXPLR_MCBIST_MCBFD7Q = 0x080118C5ull; -static const uint64_t EXPLR_MCBIST_MCBMR6Q = 0x080118AEull; +static const uint64_t EXPLR_MCBIST_MCBFDQ = 0x080118C6ull; -static const uint64_t EXPLR_MCBIST_MCBMR7Q = 0x080118DFull; +static const uint64_t EXPLR_MCBIST_MCBFDSPQ = 0x080118C7ull; -static const uint64_t EXPLR_MCBIST_MCBPARMQ = 0x080118AFull; +static const uint64_t EXPLR_MCBIST_MCBISTFIRACT0 = 0x08011806ull; -static const uint64_t EXPLR_MCBIST_MCBRCRQ = 0x080118B1ull; +static const uint64_t EXPLR_MCBIST_MCBISTFIRACT1 = 0x08011807ull; -static const uint64_t EXPLR_MCBIST_MCBRDS0Q = 0x080118B2ull; +static const uint64_t EXPLR_MCBIST_MCBISTFIRMASK = 0x08011803ull; -static const uint64_t EXPLR_MCBIST_MCBRDS1Q = 0x080118B3ull; +static const uint64_t EXPLR_MCBIST_MCBISTFIRMASK_AND = 0x08011804ull; +static const uint64_t EXPLR_MCBIST_MCBISTFIRMASK_OR = 0x08011805ull; -static const uint64_t EXPLR_MCBIST_MCBSA0Q = 0x080118CCull; +static const uint64_t EXPLR_MCBIST_MCBISTFIRQ = 0x08011800ull; -static const uint64_t EXPLR_MCBIST_MCBSA1Q = 0x080118CDull; +static const uint64_t EXPLR_MCBIST_MCBISTFIRQ_AND = 0x08011801ull; +static const uint64_t EXPLR_MCBIST_MCBISTFIRQ_OR = 0x08011802ull; -static const uint64_t EXPLR_MCBIST_MCBSA2Q = 0x080118D0ull; +static const uint64_t EXPLR_MCBIST_MCBISTFIRWOF = 0x08011808ull; -static const uint64_t EXPLR_MCBIST_MCBSA3Q = 0x080118D1ull; +static const uint64_t EXPLR_MCBIST_MCBLFSRA0Q = 0x080118D4ull; -static const uint64_t EXPLR_MCBIST_MCBSTATQ = 0x08011866ull; +static const uint64_t EXPLR_MCBIST_MCBMCATQ = 0x080118D7ull; -static const uint64_t EXPLR_MCBIST_MCB_CNTLQ = 0x080118DBull; +static const uint64_t EXPLR_MCBIST_MCBMR0Q = 0x080118A8ull; -static const uint64_t EXPLR_MCBIST_MCB_CNTLSTATQ = 0x080118DCull; +static const uint64_t EXPLR_MCBIST_MCBMR1Q = 0x080118A9ull; -static const uint64_t EXPLR_MCBIST_RCD_LRDIM_CNTL_WORD0_15Q = 0x080118DDull; +static const uint64_t EXPLR_MCBIST_MCBMR2Q = 0x080118AAull; -static const uint64_t EXPLR_MCBIST_RUNTIMECTRQ = 0x080118B0ull; +static const uint64_t EXPLR_MCBIST_MCBMR3Q = 0x080118ABull; -static const uint64_t EXPLR_MCBIST_WATCFG0AQ = 0x08011880ull; +static const uint64_t EXPLR_MCBIST_MCBMR4Q = 0x080118ACull; -static const uint64_t EXPLR_MCBIST_WATCFG0BQ = 0x08011881ull; +static const uint64_t EXPLR_MCBIST_MCBMR5Q = 0x080118ADull; -static const uint64_t EXPLR_MCBIST_WATCFG0CQ = 0x08011882ull; +static const uint64_t EXPLR_MCBIST_MCBMR6Q = 0x080118AEull; -static const uint64_t EXPLR_MCBIST_WATCFG0DQ = 0x08011883ull; +static const uint64_t EXPLR_MCBIST_MCBMR7Q = 0x080118DFull; -static const uint64_t EXPLR_MCBIST_WATCFG0EQ = 0x08011884ull; +static const uint64_t EXPLR_MCBIST_MCBPARMQ = 0x080118AFull; -static const uint64_t EXPLR_MCBIST_WATCFG1AQ = 0x08011885ull; +static const uint64_t EXPLR_MCBIST_MCBRCRQ = 0x080118B1ull; -static const uint64_t EXPLR_MCBIST_WATCFG1BQ = 0x08011886ull; +static const uint64_t EXPLR_MCBIST_MCBRDS0Q = 0x080118B2ull; -static const uint64_t EXPLR_MCBIST_WATCFG1CQ = 0x08011887ull; +static const uint64_t EXPLR_MCBIST_MCBRDS1Q = 0x080118B3ull; -static const uint64_t EXPLR_MCBIST_WATCFG1DQ = 0x08011888ull; +static const uint64_t EXPLR_MCBIST_MCBSA0Q = 0x080118CCull; -static const uint64_t EXPLR_MCBIST_WATCFG1EQ = 0x08011889ull; +static const uint64_t EXPLR_MCBIST_MCBSA1Q = 0x080118CDull; -static const uint64_t EXPLR_MCBIST_WATCFG2AQ = 0x0801188Aull; +static const uint64_t EXPLR_MCBIST_MCBSA2Q = 0x080118D0ull; -static const uint64_t EXPLR_MCBIST_WATCFG2BQ = 0x0801188Bull; +static const uint64_t EXPLR_MCBIST_MCBSA3Q = 0x080118D1ull; -static const uint64_t EXPLR_MCBIST_WATCFG2CQ = 0x0801188Cull; +static const uint64_t EXPLR_MCBIST_MCBSTATQ = 0x08011866ull; -static const uint64_t EXPLR_MCBIST_WATCFG2DQ = 0x0801188Dull; +static const uint64_t EXPLR_MCBIST_MCB_CNTLQ = 0x080118DBull; -static const uint64_t EXPLR_MCBIST_WATCFG2EQ = 0x0801188Eull; +static const uint64_t EXPLR_MCBIST_MCB_CNTLSTATQ = 0x080118DCull; -static const uint64_t EXPLR_MCBIST_WATCFG3AQ = 0x0801188Full; +static const uint64_t EXPLR_MCBIST_RCD_LRDIM_CNTL_WORD0_15Q = 0x080118DDull; -static const uint64_t EXPLR_MCBIST_WATCFG3BQ = 0x08011890ull; +static const uint64_t EXPLR_MCBIST_RUNTIMECTRQ = 0x080118B0ull; -static const uint64_t EXPLR_MCBIST_WATCFG3CQ = 0x08011891ull; +static const uint64_t EXPLR_MCBIST_WATCFG0AQ = 0x08011880ull; -static const uint64_t EXPLR_MCBIST_WATCFG3DQ = 0x08011892ull; +static const uint64_t EXPLR_MCBIST_WATCFG0BQ = 0x08011881ull; -static const uint64_t EXPLR_MCBIST_WATCFG3EQ = 0x08011893ull; +static const uint64_t EXPLR_MCBIST_WATCFG0CQ = 0x08011882ull; -static const uint64_t EXPLR_MMIO_MCFGERR = 0x080108EDull; +static const uint64_t EXPLR_MCBIST_WATCFG0DQ = 0x08011883ull; -static const uint64_t EXPLR_MMIO_MCFGERRA = 0x080108ECull; +static const uint64_t EXPLR_MCBIST_WATCFG0EQ = 0x08011884ull; -static const uint64_t EXPLR_MMIO_MCHOLD = 0x0801087Bull; +static const uint64_t EXPLR_MCBIST_WATCFG1AQ = 0x08011885ull; -static const uint64_t EXPLR_MMIO_MCMASK = 0x0801087Aull; +static const uint64_t EXPLR_MCBIST_WATCFG1BQ = 0x08011886ull; -static const uint64_t EXPLR_MMIO_MDBELL = 0x080108E6ull; +static const uint64_t EXPLR_MCBIST_WATCFG1CQ = 0x08011887ull; -static const uint64_t EXPLR_MMIO_MDBELLC = 0x080108E7ull; +static const uint64_t EXPLR_MCBIST_WATCFG1DQ = 0x08011888ull; -static const uint64_t EXPLR_MMIO_MDEBUG0 = 0x080108EEull; +static const uint64_t EXPLR_MCBIST_WATCFG1EQ = 0x08011889ull; -static const uint64_t EXPLR_MMIO_MDEBUG1 = 0x080108EFull; +static const uint64_t EXPLR_MCBIST_WATCFG2AQ = 0x0801188Aull; -static const uint64_t EXPLR_MMIO_MENTERP = 0x080108E4ull; +static const uint64_t EXPLR_MCBIST_WATCFG2BQ = 0x0801188Bull; -static const uint64_t EXPLR_MMIO_MERRCTL = 0x080108EAull; +static const uint64_t EXPLR_MCBIST_WATCFG2CQ = 0x0801188Cull; -static const uint64_t EXPLR_MMIO_MFIR = 0x08010870ull; -static const uint64_t EXPLR_MMIO_MFIR_AND = 0x08010871ull; +static const uint64_t EXPLR_MCBIST_WATCFG2DQ = 0x0801188Dull; -static const uint64_t EXPLR_MMIO_MFIR_OR = 0x08010872ull; +static const uint64_t EXPLR_MCBIST_WATCFG2EQ = 0x0801188Eull; -static const uint64_t EXPLR_MMIO_MFIRACT0 = 0x08010876ull; +static const uint64_t EXPLR_MCBIST_WATCFG3AQ = 0x0801188Full; -static const uint64_t EXPLR_MMIO_MFIRACT1 = 0x08010877ull; +static const uint64_t EXPLR_MCBIST_WATCFG3BQ = 0x08011890ull; -static const uint64_t EXPLR_MMIO_MFIRMASK = 0x08010873ull; -static const uint64_t EXPLR_MMIO_MFIRMASK_AND = 0x08010874ull; +static const uint64_t EXPLR_MCBIST_WATCFG3CQ = 0x08011891ull; -static const uint64_t EXPLR_MMIO_MFIRMASK_OR = 0x08010875ull; +static const uint64_t EXPLR_MCBIST_WATCFG3DQ = 0x08011892ull; -static const uint64_t EXPLR_MMIO_MFIRWOF = 0x08010878ull; +static const uint64_t EXPLR_MCBIST_WATCFG3EQ = 0x08011893ull; -static const uint64_t EXPLR_MMIO_MHOLD0 = 0x0801087Cull; +static const uint64_t EXPLR_MMIO_MCFGERR = 0x080108EDull; -static const uint64_t EXPLR_MMIO_MHOLD1 = 0x0801087Eull; +static const uint64_t EXPLR_MMIO_MCFGERRA = 0x080108ECull; -static const uint64_t EXPLR_MMIO_MMASK0 = 0x0801087Dull; +static const uint64_t EXPLR_MMIO_MCHOLD = 0x0801087Bull; -static const uint64_t EXPLR_MMIO_MMASK1 = 0x0801087Full; +static const uint64_t EXPLR_MMIO_MCMASK = 0x0801087Aull; -static const uint64_t EXPLR_MMIO_MMIOERR = 0x080108E8ull; +static const uint64_t EXPLR_MMIO_MDBELL = 0x080108E6ull; -static const uint64_t EXPLR_MMIO_MMIOEWD = 0x080108E9ull; +static const uint64_t EXPLR_MMIO_MDBELLC = 0x080108E7ull; -static const uint64_t EXPLR_MMIO_MPIBERR0 = 0x080108FCull; +static const uint64_t EXPLR_MMIO_MDEBUG0 = 0x080108EEull; -static const uint64_t EXPLR_MMIO_MPIBERR1 = 0x080108FDull; +static const uint64_t EXPLR_MMIO_MDEBUG1 = 0x080108EFull; -static const uint64_t EXPLR_MMIO_MPIBERR2 = 0x080108FEull; +static const uint64_t EXPLR_MMIO_MENTERP = 0x080108E4ull; -static const uint64_t EXPLR_MMIO_MPIBERR3 = 0x080108FFull; +static const uint64_t EXPLR_MMIO_MERRCTL = 0x080108EAull; -static const uint64_t EXPLR_MMIO_MSCCRNGE = 0x080108E5ull; +static const uint64_t EXPLR_MMIO_MFIR = 0x08010870ull; -static const uint64_t EXPLR_MMIO_O0ACTAG_O0FNID = 0x08010831ull; +static const uint64_t EXPLR_MMIO_MFIR_AND = 0x08010871ull; +static const uint64_t EXPLR_MMIO_MFIR_OR = 0x08010872ull; -static const uint64_t EXPLR_MMIO_O0BAR0 = 0x08010802ull; +static const uint64_t EXPLR_MMIO_MFIRACT0 = 0x08010876ull; -static const uint64_t EXPLR_MMIO_O0BAR1 = 0x08010803ull; +static const uint64_t EXPLR_MMIO_MFIRACT1 = 0x08010877ull; -static const uint64_t EXPLR_MMIO_O0BAR2 = 0x08010804ull; +static const uint64_t EXPLR_MMIO_MFIRMASK = 0x08010873ull; -static const uint64_t EXPLR_MMIO_O0CAPPTR_O0ROMBAR = 0x08010806ull; +static const uint64_t EXPLR_MMIO_MFIRMASK_AND = 0x08010874ull; +static const uint64_t EXPLR_MMIO_MFIRMASK_OR = 0x08010875ull; -static const uint64_t EXPLR_MMIO_O0CCD = 0x08010801ull; +static const uint64_t EXPLR_MMIO_MFIRWOF = 0x08010878ull; -static const uint64_t EXPLR_MMIO_O0FNVID_O0FNCAP = 0x08010830ull; +static const uint64_t EXPLR_MMIO_MHOLD0 = 0x0801087Cull; -static const uint64_t EXPLR_MMIO_O0MBIT_O0DID = 0x08010800ull; +static const uint64_t EXPLR_MMIO_MHOLD1 = 0x0801087Eull; -static const uint64_t EXPLR_MMIO_O0SSYSID = 0x08010805ull; +static const uint64_t EXPLR_MMIO_MMASK0 = 0x0801087Dull; -static const uint64_t EXPLR_MMIO_O0VSDLXA = 0x08010864ull; +static const uint64_t EXPLR_MMIO_MMASK1 = 0x0801087Full; -static const uint64_t EXPLR_MMIO_O0VSDLXB = 0x08010865ull; +static const uint64_t EXPLR_MMIO_MMIOERR = 0x080108E8ull; -static const uint64_t EXPLR_MMIO_O0VSFLSH = 0x08010866ull; +static const uint64_t EXPLR_MMIO_MMIOEWD = 0x080108E9ull; -static const uint64_t EXPLR_MMIO_O0VSID = 0x08010861ull; +static const uint64_t EXPLR_MMIO_MPIBERR0 = 0x080108FCull; -static const uint64_t EXPLR_MMIO_O0VSTLXA = 0x08010862ull; +static const uint64_t EXPLR_MMIO_MPIBERR1 = 0x080108FDull; -static const uint64_t EXPLR_MMIO_O0VSTLXB = 0x08010863ull; +static const uint64_t EXPLR_MMIO_MPIBERR2 = 0x080108FEull; -static const uint64_t EXPLR_MMIO_O0VSVID_O0VSCAP = 0x08010860ull; +static const uint64_t EXPLR_MMIO_MPIBERR3 = 0x080108FFull; -static const uint64_t EXPLR_MMIO_O1ACTAG_O1FNID = 0x080108B1ull; +static const uint64_t EXPLR_MMIO_MSCCRNGE = 0x080108E5ull; -static const uint64_t EXPLR_MMIO_O1BAR0 = 0x08010882ull; +static const uint64_t EXPLR_MMIO_O0ACTAG_O0FNID = 0x08010831ull; -static const uint64_t EXPLR_MMIO_O1BAR1 = 0x08010883ull; +static const uint64_t EXPLR_MMIO_O0BAR0 = 0x08010802ull; -static const uint64_t EXPLR_MMIO_O1BAR2 = 0x08010884ull; +static const uint64_t EXPLR_MMIO_O0BAR1 = 0x08010803ull; -static const uint64_t EXPLR_MMIO_O1CAPPTR_O1ROMBAR = 0x08010886ull; +static const uint64_t EXPLR_MMIO_O0BAR2 = 0x08010804ull; -static const uint64_t EXPLR_MMIO_O1CCD = 0x08010881ull; +static const uint64_t EXPLR_MMIO_O0CAPPTR_O0ROMBAR = 0x08010806ull; -static const uint64_t EXPLR_MMIO_O1FNVID_O1FNCAP = 0x080108B0ull; +static const uint64_t EXPLR_MMIO_O0CCD = 0x08010801ull; -static const uint64_t EXPLR_MMIO_O1INFDAT = 0x080108C2ull; +static const uint64_t EXPLR_MMIO_O0FNVID_O0FNCAP = 0x08010830ull; -static const uint64_t EXPLR_MMIO_O1INFOFF_O1INFID = 0x080108C1ull; +static const uint64_t EXPLR_MMIO_O0MBIT_O0DID = 0x08010800ull; -static const uint64_t EXPLR_MMIO_O1INFVID_O1INFCAP = 0x080108C0ull; +static const uint64_t EXPLR_MMIO_O0SSYSID = 0x08010805ull; -static const uint64_t EXPLR_MMIO_O1MBIT_O1DID = 0x08010880ull; +static const uint64_t EXPLR_MMIO_O0VSDLXA = 0x08010864ull; -static const uint64_t EXPLR_MMIO_O1SSYSID = 0x08010885ull; +static const uint64_t EXPLR_MMIO_O0VSDLXB = 0x08010865ull; -static const uint64_t EXPLR_MMIO_O1VSID = 0x080108E1ull; +static const uint64_t EXPLR_MMIO_O0VSFLSH = 0x08010866ull; -static const uint64_t EXPLR_MMIO_O1VSVID_O1VSCAP = 0x080108E0ull; +static const uint64_t EXPLR_MMIO_O0VSID = 0x08010861ull; -static const uint64_t EXPLR_MMIO_OAFUVER_ONAME5 = 0x080108F3ull; +static const uint64_t EXPLR_MMIO_O0VSTLXA = 0x08010862ull; -static const uint64_t EXPLR_MMIO_OCTRLENB_OCTRLID = 0x080108D1ull; +static const uint64_t EXPLR_MMIO_O0VSTLXB = 0x08010863ull; -static const uint64_t EXPLR_MMIO_OCTRLPID = 0x080108D2ull; +static const uint64_t EXPLR_MMIO_O0VSVID_O0VSCAP = 0x08010860ull; -static const uint64_t EXPLR_MMIO_OCTRLTAG = 0x080108D3ull; +static const uint64_t EXPLR_MMIO_O1ACTAG_O1FNID = 0x080108B1ull; -static const uint64_t EXPLR_MMIO_OCTRLVID_OCTRLCAP = 0x080108D0ull; +static const uint64_t EXPLR_MMIO_O1BAR0 = 0x08010882ull; -static const uint64_t EXPLR_MMIO_ODSNHI = 0x08010811ull; +static const uint64_t EXPLR_MMIO_O1BAR1 = 0x08010883ull; -static const uint64_t EXPLR_MMIO_ODSNLO_ODSNCAP = 0x08010810ull; +static const uint64_t EXPLR_MMIO_O1BAR2 = 0x08010884ull; -static const uint64_t EXPLR_MMIO_OGMMIOOF = 0x080108F4ull; +static const uint64_t EXPLR_MMIO_O1CAPPTR_O1ROMBAR = 0x08010886ull; -static const uint64_t EXPLR_MMIO_OGMMIOSZ = 0x080108F5ull; +static const uint64_t EXPLR_MMIO_O1CCD = 0x08010881ull; -static const uint64_t EXPLR_MMIO_OMEMADDR = 0x080108F8ull; +static const uint64_t EXPLR_MMIO_O1FNVID_O1FNCAP = 0x080108B0ull; -static const uint64_t EXPLR_MMIO_ONAME0_ODESCTML = 0x080108F0ull; +static const uint64_t EXPLR_MMIO_O1INFDAT = 0x080108C2ull; -static const uint64_t EXPLR_MMIO_ONAME21 = 0x080108F1ull; +static const uint64_t EXPLR_MMIO_O1INFOFF_O1INFID = 0x080108C1ull; -static const uint64_t EXPLR_MMIO_ONAME43 = 0x080108F2ull; +static const uint64_t EXPLR_MMIO_O1INFVID_O1INFCAP = 0x080108C0ull; -static const uint64_t EXPLR_MMIO_OPASID = 0x08010890ull; +static const uint64_t EXPLR_MMIO_O1MBIT_O1DID = 0x08010880ull; -static const uint64_t EXPLR_MMIO_OPMMIOOF = 0x080108F6ull; +static const uint64_t EXPLR_MMIO_O1SSYSID = 0x08010885ull; -static const uint64_t EXPLR_MMIO_OPMMIOST = 0x080108F7ull; +static const uint64_t EXPLR_MMIO_O1VSID = 0x080108E1ull; -static const uint64_t EXPLR_MMIO_ORRCAP10 = 0x08010826ull; +static const uint64_t EXPLR_MMIO_O1VSVID_O1VSCAP = 0x080108E0ull; -static const uint64_t EXPLR_MMIO_ORRCAP32 = 0x08010827ull; +static const uint64_t EXPLR_MMIO_OAFUVER_ONAME5 = 0x080108F3ull; -static const uint64_t EXPLR_MMIO_ORRCAP54 = 0x08010828ull; +static const uint64_t EXPLR_MMIO_OCTRLENB_OCTRLID = 0x080108D1ull; -static const uint64_t EXPLR_MMIO_ORRCAP76 = 0x08010829ull; +static const uint64_t EXPLR_MMIO_OCTRLPID = 0x080108D2ull; -static const uint64_t EXPLR_MMIO_ORTCAP = 0x08010823ull; +static const uint64_t EXPLR_MMIO_OCTRLTAG = 0x080108D3ull; -static const uint64_t EXPLR_MMIO_OSYSMEML = 0x080108FBull; +static const uint64_t EXPLR_MMIO_OCTRLVID_OCTRLCAP = 0x080108D0ull; -static const uint64_t EXPLR_MMIO_OTLVID_OTLCAP = 0x08010820ull; +static const uint64_t EXPLR_MMIO_ODSNHI = 0x08010811ull; -static const uint64_t EXPLR_MMIO_OTRCFG10 = 0x0801082Aull; +static const uint64_t EXPLR_MMIO_ODSNLO_ODSNCAP = 0x08010810ull; -static const uint64_t EXPLR_MMIO_OTRCFG32 = 0x0801082Bull; +static const uint64_t EXPLR_MMIO_OGMMIOOF = 0x080108F4ull; -static const uint64_t EXPLR_MMIO_OTRCFG54 = 0x0801082Cull; +static const uint64_t EXPLR_MMIO_OGMMIOSZ = 0x080108F5ull; -static const uint64_t EXPLR_MMIO_OTRCFG76 = 0x0801082Dull; +static const uint64_t EXPLR_MMIO_OMEMADDR = 0x080108F8ull; -static const uint64_t EXPLR_MMIO_OTTCFG = 0x08010824ull; +static const uint64_t EXPLR_MMIO_ONAME0_ODESCTML = 0x080108F0ull; -static const uint64_t EXPLR_MMIO_OVERCAP_OTLID = 0x08010821ull; +static const uint64_t EXPLR_MMIO_ONAME21 = 0x080108F1ull; -static const uint64_t EXPLR_MMIO_OVERCFG = 0x08010822ull; +static const uint64_t EXPLR_MMIO_ONAME43 = 0x080108F2ull; -static const uint64_t EXPLR_MMIO_OVPD = 0x08010808ull; +static const uint64_t EXPLR_MMIO_OPASID = 0x08010890ull; -static const uint64_t EXPLR_MMIO_OWWID10 = 0x080108F9ull; +static const uint64_t EXPLR_MMIO_OPMMIOOF = 0x080108F6ull; -static const uint64_t EXPLR_MMIO_OWWID32 = 0x080108FAull; +static const uint64_t EXPLR_MMIO_OPMMIOST = 0x080108F7ull; -static const uint64_t EXPLR_MMIO_SCOMEWD = 0x080108EBull; +static const uint64_t EXPLR_MMIO_ORRCAP10 = 0x08010826ull; -static const uint64_t EXPLR_MMIO_SNSC_ACTPWRUP = 0x08010855ull; +static const uint64_t EXPLR_MMIO_ORRCAP32 = 0x08010827ull; -static const uint64_t EXPLR_MMIO_SNSC_D0THERM = 0x08010852ull; +static const uint64_t EXPLR_MMIO_ORRCAP54 = 0x08010828ull; -static const uint64_t EXPLR_MMIO_SNSC_D1THERM = 0x08010853ull; +static const uint64_t EXPLR_MMIO_ORRCAP76 = 0x08010829ull; -static const uint64_t EXPLR_MMIO_SNSC_FRAMESR = 0x08010856ull; +static const uint64_t EXPLR_MMIO_ORTCAP = 0x08010823ull; -static const uint64_t EXPLR_MMIO_SNSC_HISTOBASELOW = 0x08010857ull; +static const uint64_t EXPLR_MMIO_OSYSMEML = 0x080108FBull; -static const uint64_t EXPLR_MMIO_SNSC_HISTOMEDHIGH = 0x08010858ull; +static const uint64_t EXPLR_MMIO_OTLVID_OTLCAP = 0x08010820ull; -static const uint64_t EXPLR_MMIO_SNSC_OCTHERM = 0x08010851ull; +static const uint64_t EXPLR_MMIO_OTRCFG10 = 0x0801082Aull; -static const uint64_t EXPLR_MMIO_SNSC_RDWR = 0x08010854ull; +static const uint64_t EXPLR_MMIO_OTRCFG32 = 0x0801082Bull; -static const uint64_t EXPLR_MMIO_SNSC_STATEREG = 0x08010850ull; +static const uint64_t EXPLR_MMIO_OTRCFG54 = 0x0801082Cull; -static const uint64_t EXPLR_RDF_AACR = 0x08011C29ull; +static const uint64_t EXPLR_MMIO_OTRCFG76 = 0x0801082Dull; -static const uint64_t EXPLR_RDF_AADR = 0x08011C2Aull; +static const uint64_t EXPLR_MMIO_OTTCFG = 0x08010824ull; -static const uint64_t EXPLR_RDF_AAER = 0x08011C2Bull; +static const uint64_t EXPLR_MMIO_OVERCAP_OTLID = 0x08010821ull; -static const uint64_t EXPLR_RDF_ACTION0 = 0x08011C06ull; +static const uint64_t EXPLR_MMIO_OVERCFG = 0x08010822ull; -static const uint64_t EXPLR_RDF_ACTION1 = 0x08011C07ull; +static const uint64_t EXPLR_MMIO_OVPD = 0x08010808ull; -static const uint64_t EXPLR_RDF_CERR0 = 0x08011C0Eull; +static const uint64_t EXPLR_MMIO_OWWID10 = 0x080108F9ull; -static const uint64_t EXPLR_RDF_CERR1 = 0x08011C0Full; +static const uint64_t EXPLR_MMIO_OWWID32 = 0x080108FAull; -static const uint64_t EXPLR_RDF_CGDR = 0x08011C32ull; +static const uint64_t EXPLR_MMIO_SCOMEWD = 0x080108EBull; -static const uint64_t EXPLR_RDF_CTCR = 0x08011C28ull; +static const uint64_t EXPLR_MMIO_SNSC_ACTPWRUP = 0x08010855ull; -static const uint64_t EXPLR_RDF_DBGR = 0x08011C2Eull; +static const uint64_t EXPLR_MMIO_SNSC_D0THERM = 0x08010852ull; -static const uint64_t EXPLR_RDF_EICR = 0x08011C0Dull; +static const uint64_t EXPLR_MMIO_SNSC_D1THERM = 0x08010853ull; -static const uint64_t EXPLR_RDF_ELPR = 0x08011C2Full; +static const uint64_t EXPLR_MMIO_SNSC_FRAMESR = 0x08010856ull; -static const uint64_t EXPLR_RDF_ERR_HOLD_LAT = 0x08011C0Bull; +static const uint64_t EXPLR_MMIO_SNSC_HISTOBASELOW = 0x08010857ull; -static const uint64_t EXPLR_RDF_ERR_MASK_LAT = 0x08011C0Aull; +static const uint64_t EXPLR_MMIO_SNSC_HISTOMEDHIGH = 0x08010858ull; -static const uint64_t EXPLR_RDF_FIR = 0x08011C00ull; -static const uint64_t EXPLR_RDF_FIR_AND = 0x08011C01ull; +static const uint64_t EXPLR_MMIO_SNSC_OCTHERM = 0x08010851ull; -static const uint64_t EXPLR_RDF_FIR_OR = 0x08011C02ull; +static const uint64_t EXPLR_MMIO_SNSC_RDWR = 0x08010854ull; -static const uint64_t EXPLR_RDF_FWMS0 = 0x08011C18ull; +static const uint64_t EXPLR_MMIO_SNSC_STATEREG = 0x08010850ull; -static const uint64_t EXPLR_RDF_FWMS1 = 0x08011C19ull; +static const uint64_t EXPLR_RDF_AACR = 0x08011C29ull; -static const uint64_t EXPLR_RDF_FWMS2 = 0x08011C1Aull; +static const uint64_t EXPLR_RDF_AADR = 0x08011C2Aull; -static const uint64_t EXPLR_RDF_FWMS3 = 0x08011C1Bull; +static const uint64_t EXPLR_RDF_AAER = 0x08011C2Bull; -static const uint64_t EXPLR_RDF_FWMS4 = 0x08011C1Cull; +static const uint64_t EXPLR_RDF_ACTION0 = 0x08011C06ull; -static const uint64_t EXPLR_RDF_FWMS5 = 0x08011C1Dull; +static const uint64_t EXPLR_RDF_ACTION1 = 0x08011C07ull; -static const uint64_t EXPLR_RDF_FWMS6 = 0x08011C1Eull; +static const uint64_t EXPLR_RDF_CERR0 = 0x08011C0Eull; -static const uint64_t EXPLR_RDF_FWMS7 = 0x08011C1Full; +static const uint64_t EXPLR_RDF_CERR1 = 0x08011C0Full; -static const uint64_t EXPLR_RDF_HWMS0 = 0x08011C10ull; +static const uint64_t EXPLR_RDF_CGDR = 0x08011C32ull; -static const uint64_t EXPLR_RDF_HWMS1 = 0x08011C11ull; +static const uint64_t EXPLR_RDF_CTCR = 0x08011C28ull; -static const uint64_t EXPLR_RDF_HWMS2 = 0x08011C12ull; +static const uint64_t EXPLR_RDF_DBGR = 0x08011C2Eull; -static const uint64_t EXPLR_RDF_HWMS3 = 0x08011C13ull; +static const uint64_t EXPLR_RDF_EICR = 0x08011C0Dull; -static const uint64_t EXPLR_RDF_HWMS4 = 0x08011C14ull; +static const uint64_t EXPLR_RDF_ELPR = 0x08011C2Full; -static const uint64_t EXPLR_RDF_HWMS5 = 0x08011C15ull; +static const uint64_t EXPLR_RDF_ERR_HOLD_LAT = 0x08011C0Bull; -static const uint64_t EXPLR_RDF_HWMS6 = 0x08011C16ull; +static const uint64_t EXPLR_RDF_ERR_MASK_LAT = 0x08011C0Aull; -static const uint64_t EXPLR_RDF_HWMS7 = 0x08011C17ull; +static const uint64_t EXPLR_RDF_FIR = 0x08011C00ull; -static const uint64_t EXPLR_RDF_MASK = 0x08011C03ull; +static const uint64_t EXPLR_RDF_FIR_AND = 0x08011C01ull; -static const uint64_t EXPLR_RDF_MASK_AND = 0x08011C04ull; +static const uint64_t EXPLR_RDF_FIR_OR = 0x08011C02ull; -static const uint64_t EXPLR_RDF_MASK_OR = 0x08011C05ull; +static const uint64_t EXPLR_RDF_FWMS0 = 0x08011C18ull; -static const uint64_t EXPLR_RDF_MASK0 = 0x08011C30ull; +static const uint64_t EXPLR_RDF_FWMS1 = 0x08011C19ull; -static const uint64_t EXPLR_RDF_MASK1 = 0x08011C31ull; +static const uint64_t EXPLR_RDF_FWMS2 = 0x08011C1Aull; -static const uint64_t EXPLR_RDF_MCBCM = 0x08011C2Cull; +static const uint64_t EXPLR_RDF_FWMS3 = 0x08011C1Bull; -static const uint64_t EXPLR_RDF_MSR = 0x08011C0Cull; +static const uint64_t EXPLR_RDF_FWMS4 = 0x08011C1Cull; -static const uint64_t EXPLR_RDF_RECR = 0x08011C2Dull; +static const uint64_t EXPLR_RDF_FWMS5 = 0x08011C1Dull; -static const uint64_t EXPLR_RDF_RSPAR = 0x08011C20ull; +static const uint64_t EXPLR_RDF_FWMS6 = 0x08011C1Eull; -static const uint64_t EXPLR_RDF_WOF = 0x08011C08ull; +static const uint64_t EXPLR_RDF_FWMS7 = 0x08011C1Full; -static const uint64_t EXPLR_SRQ_ERR_HOLD_LAT = 0x0801140Bull; +static const uint64_t EXPLR_RDF_HWMS0 = 0x08011C10ull; -static const uint64_t EXPLR_SRQ_ERR_MASK_LAT = 0x0801140Aull; +static const uint64_t EXPLR_RDF_HWMS1 = 0x08011C11ull; -static const uint64_t EXPLR_SRQ_MBAREF0Q = 0x08011434ull; +static const uint64_t EXPLR_RDF_HWMS2 = 0x08011C12ull; -static const uint64_t EXPLR_SRQ_MBAREFAQ = 0x08011438ull; +static const uint64_t EXPLR_RDF_HWMS3 = 0x08011C13ull; -static const uint64_t EXPLR_SRQ_MBARPC0Q = 0x08011436ull; +static const uint64_t EXPLR_RDF_HWMS4 = 0x08011C14ull; -static const uint64_t EXPLR_SRQ_MBARSVD0 = 0x08011435ull; +static const uint64_t EXPLR_RDF_HWMS5 = 0x08011C15ull; -static const uint64_t EXPLR_SRQ_MBASTR0Q = 0x08011437ull; +static const uint64_t EXPLR_RDF_HWMS6 = 0x08011C16ull; -static const uint64_t EXPLR_SRQ_MBA_DBG0Q = 0x0801141Eull; +static const uint64_t EXPLR_RDF_HWMS7 = 0x08011C17ull; -static const uint64_t EXPLR_SRQ_MBA_DBG1Q = 0x0801141Full; +static const uint64_t EXPLR_RDF_MASK = 0x08011C03ull; -static const uint64_t EXPLR_SRQ_MBA_DSM0Q = 0x0801140Cull; +static const uint64_t EXPLR_RDF_MASK_AND = 0x08011C04ull; +static const uint64_t EXPLR_RDF_MASK_OR = 0x08011C05ull; -static const uint64_t EXPLR_SRQ_MBA_ERR_REPORTQ = 0x0801141Cull; +static const uint64_t EXPLR_RDF_MASK0 = 0x08011C30ull; -static const uint64_t EXPLR_SRQ_MBA_ERR_REPORTQ_MASK = 0x0801142Bull; +static const uint64_t EXPLR_RDF_MASK1 = 0x08011C31ull; -static const uint64_t EXPLR_SRQ_MBA_FARB0Q = 0x08011415ull; +static const uint64_t EXPLR_RDF_MCBCM = 0x08011C34ull; -static const uint64_t EXPLR_SRQ_MBA_FARB1Q = 0x08011416ull; +static const uint64_t EXPLR_RDF_MCBCM2 = 0x08011C35ull; -static const uint64_t EXPLR_SRQ_MBA_FARB2Q = 0x08011417ull; +static const uint64_t EXPLR_RDF_MSR = 0x08011C0Cull; -static const uint64_t EXPLR_SRQ_MBA_FARB3Q = 0x08011418ull; +static const uint64_t EXPLR_RDF_RECR = 0x08011C2Dull; -static const uint64_t EXPLR_SRQ_MBA_FARB4Q = 0x08011419ull; +static const uint64_t EXPLR_RDF_RSPAR = 0x08011C20ull; -static const uint64_t EXPLR_SRQ_MBA_FARB5Q = 0x0801141Aull; +static const uint64_t EXPLR_RDF_WOF = 0x08011C08ull; -static const uint64_t EXPLR_SRQ_MBA_FARB6Q = 0x0801141Bull; +static const uint64_t EXPLR_SRQ_ERR_HOLD_LAT = 0x0801140Bull; -static const uint64_t EXPLR_SRQ_MBA_FARB7Q = 0x0801141Dull; +static const uint64_t EXPLR_SRQ_ERR_MASK_LAT = 0x0801140Aull; -static const uint64_t EXPLR_SRQ_MBA_FARB8Q = 0x08011420ull; +static const uint64_t EXPLR_SRQ_MBAREF0Q = 0x08011434ull; -static const uint64_t EXPLR_SRQ_MBA_FARB9Q = 0x08011411ull; +static const uint64_t EXPLR_SRQ_MBAREFAQ = 0x08011438ull; -static const uint64_t EXPLR_SRQ_MBA_PMU0Q = 0x08011439ull; +static const uint64_t EXPLR_SRQ_MBARPC0Q = 0x08011436ull; -static const uint64_t EXPLR_SRQ_MBA_PMU1Q = 0x0801143Aull; +static const uint64_t EXPLR_SRQ_MBARSVD0 = 0x08011435ull; -static const uint64_t EXPLR_SRQ_MBA_PMU2Q = 0x0801143Bull; +static const uint64_t EXPLR_SRQ_MBASTR0Q = 0x08011437ull; -static const uint64_t EXPLR_SRQ_MBA_PMU3Q = 0x0801143Cull; +static const uint64_t EXPLR_SRQ_MBA_DBG0Q = 0x0801141Eull; -static const uint64_t EXPLR_SRQ_MBA_PMU4Q = 0x0801143Dull; +static const uint64_t EXPLR_SRQ_MBA_DBG1Q = 0x0801141Full; -static const uint64_t EXPLR_SRQ_MBA_PMU5Q = 0x0801143Eull; +static const uint64_t EXPLR_SRQ_MBA_DSM0Q = 0x0801140Cull; -static const uint64_t EXPLR_SRQ_MBA_PMU6Q = 0x0801143Full; +static const uint64_t EXPLR_SRQ_MBA_ERR_REPORTQ = 0x0801141Cull; -static const uint64_t EXPLR_SRQ_MBA_PMU7Q = 0x08011440ull; +static const uint64_t EXPLR_SRQ_MBA_ERR_REPORTQ_MASK = 0x0801142Bull; -static const uint64_t EXPLR_SRQ_MBA_PMU8Q = 0x08011441ull; +static const uint64_t EXPLR_SRQ_MBA_FARB0Q = 0x08011415ull; -static const uint64_t EXPLR_SRQ_MBA_RRQ0Q = 0x08011410ull; +static const uint64_t EXPLR_SRQ_MBA_FARB1Q = 0x08011416ull; -static const uint64_t EXPLR_SRQ_MBA_SYNCCNTLQ = 0x0801142Aull; +static const uint64_t EXPLR_SRQ_MBA_FARB2Q = 0x08011417ull; -static const uint64_t EXPLR_SRQ_MBA_TMR0Q = 0x0801140Dull; +static const uint64_t EXPLR_SRQ_MBA_FARB3Q = 0x08011418ull; -static const uint64_t EXPLR_SRQ_MBA_TMR1Q = 0x0801140Eull; +static const uint64_t EXPLR_SRQ_MBA_FARB4Q = 0x08011419ull; -static const uint64_t EXPLR_SRQ_MBA_TMR2Q = 0x08011431ull; +static const uint64_t EXPLR_SRQ_MBA_FARB5Q = 0x0801141Aull; -static const uint64_t EXPLR_SRQ_MBA_WRQ0Q = 0x0801140Full; +static const uint64_t EXPLR_SRQ_MBA_FARB6Q = 0x0801141Bull; -static const uint64_t EXPLR_SRQ_SRQCFG0 = 0x0801142Eull; +static const uint64_t EXPLR_SRQ_MBA_FARB7Q = 0x0801141Dull; -static const uint64_t EXPLR_SRQ_SRQFIRQ = 0x08011400ull; -static const uint64_t EXPLR_SRQ_SRQFIRQ_AND = 0x08011401ull; +static const uint64_t EXPLR_SRQ_MBA_FARB8Q = 0x08011420ull; -static const uint64_t EXPLR_SRQ_SRQFIRQ_OR = 0x08011402ull; +static const uint64_t EXPLR_SRQ_MBA_FARB9Q = 0x08011411ull; -static const uint64_t EXPLR_SRQ_SRQFIRWOF = 0x08011408ull; +static const uint64_t EXPLR_SRQ_MBA_PMU0Q = 0x08011439ull; -static const uint64_t EXPLR_SRQ_SRQFIR_ACTION0 = 0x08011406ull; +static const uint64_t EXPLR_SRQ_MBA_PMU1Q = 0x0801143Aull; -static const uint64_t EXPLR_SRQ_SRQFIR_ACTION1 = 0x08011407ull; +static const uint64_t EXPLR_SRQ_MBA_PMU2Q = 0x0801143Bull; -static const uint64_t EXPLR_SRQ_SRQFIR_MASK = 0x08011403ull; -static const uint64_t EXPLR_SRQ_SRQFIR_MASK_AND = 0x08011404ull; +static const uint64_t EXPLR_SRQ_MBA_PMU3Q = 0x0801143Cull; -static const uint64_t EXPLR_SRQ_SRQFIR_MASK_OR = 0x08011405ull; +static const uint64_t EXPLR_SRQ_MBA_PMU4Q = 0x0801143Dull; -static const uint64_t EXPLR_SRQ_SRQTRAP0 = 0x0801142Cull; +static const uint64_t EXPLR_SRQ_MBA_PMU5Q = 0x0801143Eull; -static const uint64_t EXPLR_SRQ_SRQTRAP1 = 0x0801142Dull; +static const uint64_t EXPLR_SRQ_MBA_PMU6Q = 0x0801143Full; -static const uint64_t EXPLR_TLXT_ERR_HOLD_LAT = 0x0801240Bull; +static const uint64_t EXPLR_SRQ_MBA_PMU7Q = 0x08011440ull; -static const uint64_t EXPLR_TLXT_ERR_MASK_LAT = 0x0801240Aull; +static const uint64_t EXPLR_SRQ_MBA_PMU8Q = 0x08011441ull; -static const uint64_t EXPLR_TLXT_TLXCFG0 = 0x0801240Cull; +static const uint64_t EXPLR_SRQ_MBA_RRQ0Q = 0x08011410ull; -static const uint64_t EXPLR_TLXT_TLXCFG1 = 0x0801240Dull; +static const uint64_t EXPLR_SRQ_MBA_SYNCCNTLQ = 0x0801142Aull; -static const uint64_t EXPLR_TLXT_TLXCFG2 = 0x0801240Eull; +static const uint64_t EXPLR_SRQ_MBA_TMR0Q = 0x0801140Dull; -static const uint64_t EXPLR_TLXT_TLXFIRACT0 = 0x08012406ull; +static const uint64_t EXPLR_SRQ_MBA_TMR1Q = 0x0801140Eull; -static const uint64_t EXPLR_TLXT_TLXFIRACT1 = 0x08012407ull; +static const uint64_t EXPLR_SRQ_MBA_TMR2Q = 0x08011431ull; -static const uint64_t EXPLR_TLXT_TLXFIRMASK = 0x08012403ull; -static const uint64_t EXPLR_TLXT_TLXFIRMASK_AND = 0x08012404ull; +static const uint64_t EXPLR_SRQ_MBA_WRQ0Q = 0x0801140Full; -static const uint64_t EXPLR_TLXT_TLXFIRMASK_OR = 0x08012405ull; +static const uint64_t EXPLR_SRQ_SRQCFG0 = 0x0801142Eull; -static const uint64_t EXPLR_TLXT_TLXFIRQ = 0x08012400ull; -static const uint64_t EXPLR_TLXT_TLXFIRQ_AND = 0x08012401ull; +static const uint64_t EXPLR_SRQ_SRQFIRQ = 0x08011400ull; -static const uint64_t EXPLR_TLXT_TLXFIRQ_OR = 0x08012402ull; +static const uint64_t EXPLR_SRQ_SRQFIRQ_AND = 0x08011401ull; +static const uint64_t EXPLR_SRQ_SRQFIRQ_OR = 0x08011402ull; -static const uint64_t EXPLR_TLXT_TLXFIRWOF = 0x08012408ull; +static const uint64_t EXPLR_SRQ_SRQFIRWOF = 0x08011408ull; -static const uint64_t EXPLR_TLXT_TLXTINTHLD0 = 0x08012410ull; +static const uint64_t EXPLR_SRQ_SRQFIR_ACTION0 = 0x08011406ull; -static const uint64_t EXPLR_TLXT_TLXTINTHLD1 = 0x08012411ull; +static const uint64_t EXPLR_SRQ_SRQFIR_ACTION1 = 0x08011407ull; -static const uint64_t EXPLR_TLXT_TLXTINTHLD2 = 0x08012412ull; +static const uint64_t EXPLR_SRQ_SRQFIR_MASK = 0x08011403ull; -static const uint64_t EXPLR_TLXT_TLXTINTHLD3 = 0x08012413ull; +static const uint64_t EXPLR_SRQ_SRQFIR_MASK_AND = 0x08011404ull; +static const uint64_t EXPLR_SRQ_SRQFIR_MASK_OR = 0x08011405ull; -static const uint64_t EXPLR_TLXT_TLXTRAP0 = 0x08012424ull; +static const uint64_t EXPLR_SRQ_SRQTRAP0 = 0x0801142Cull; -static const uint64_t EXPLR_TLXT_TLXTRAP1 = 0x08012425ull; +static const uint64_t EXPLR_SRQ_SRQTRAP1 = 0x0801142Dull; -static const uint64_t EXPLR_TLXT_TLXTTRAP2 = 0x08012426ull; +static const uint64_t EXPLR_TLXT_ERR_HOLD_LAT = 0x0801240Bull; -static const uint64_t EXPLR_TLXT_TLXTTRAP3 = 0x08012427ull; +static const uint64_t EXPLR_TLXT_ERR_MASK_LAT = 0x0801240Aull; -static const uint64_t EXPLR_TLXT_TLXTTRAP4 = 0x08012428ull; +static const uint64_t EXPLR_TLXT_TLXCFG0 = 0x0801240Cull; -static const uint64_t EXPLR_TLXT_TLX_ERR0_REPORTQ = 0x0801241Cull; +static const uint64_t EXPLR_TLXT_TLXCFG1 = 0x0801240Dull; -static const uint64_t EXPLR_TLXT_TLX_ERR0_REPORTQ_MASK = 0x08012414ull; +static const uint64_t EXPLR_TLXT_TLXCFG2 = 0x0801240Eull; -static const uint64_t EXPLR_TLXT_TLX_ERR1_REPORTQ = 0x0801241Dull; +static const uint64_t EXPLR_TLXT_TLXFIRACT0 = 0x08012406ull; -static const uint64_t EXPLR_TLXT_TLX_ERR1_REPORTQ_MASK = 0x08012415ull; +static const uint64_t EXPLR_TLXT_TLXFIRACT1 = 0x08012407ull; -static const uint64_t EXPLR_TLXT_TLX_ERR2_REPORTQ = 0x0801241Eull; +static const uint64_t EXPLR_TLXT_TLXFIRMASK = 0x08012403ull; -static const uint64_t EXPLR_TLXT_TLX_ERR2_REPORTQ_MASK = 0x08012416ull; +static const uint64_t EXPLR_TLXT_TLXFIRMASK_AND = 0x08012404ull; +static const uint64_t EXPLR_TLXT_TLXFIRMASK_OR = 0x08012405ull; -static const uint64_t EXPLR_TP_MB_UNIT_TOP_ADDR_TRAP_REG = 0x08010003ull; +static const uint64_t EXPLR_TLXT_TLXFIRQ = 0x08012400ull; -static const uint64_t EXPLR_TP_MB_UNIT_TOP_ATOMIC_LOCK_MASK_LATCH_REG = 0x08010007ull; +static const uint64_t EXPLR_TLXT_TLXFIRQ_AND = 0x08012401ull; +static const uint64_t EXPLR_TLXT_TLXFIRQ_OR = 0x08012402ull; -static const uint64_t EXPLR_TP_MB_UNIT_TOP_DBG_INST1_COND_REG_1 = 0x080107C1ull; +static const uint64_t EXPLR_TLXT_TLXFIRWOF = 0x08012408ull; -static const uint64_t EXPLR_TP_MB_UNIT_TOP_DBG_INST1_COND_REG_2 = 0x080107C2ull; +static const uint64_t EXPLR_TLXT_TLXTINTHLD0 = 0x08012410ull; -static const uint64_t EXPLR_TP_MB_UNIT_TOP_DBG_INST1_COND_REG_3 = 0x080107C3ull; +static const uint64_t EXPLR_TLXT_TLXTINTHLD1 = 0x08012411ull; -static const uint64_t EXPLR_TP_MB_UNIT_TOP_DBG_INST2_COND_REG_1 = 0x080107C4ull; +static const uint64_t EXPLR_TLXT_TLXTINTHLD2 = 0x08012412ull; -static const uint64_t EXPLR_TP_MB_UNIT_TOP_DBG_INST2_COND_REG_2 = 0x080107C5ull; +static const uint64_t EXPLR_TLXT_TLXTINTHLD3 = 0x08012413ull; -static const uint64_t EXPLR_TP_MB_UNIT_TOP_DBG_INST2_COND_REG_3 = 0x080107C6ull; +static const uint64_t EXPLR_TLXT_TLXTRAP0 = 0x08012424ull; -static const uint64_t EXPLR_TP_MB_UNIT_TOP_DBG_MODE_REG = 0x080107C0ull; +static const uint64_t EXPLR_TLXT_TLXTRAP1 = 0x08012425ull; -static const uint64_t EXPLR_TP_MB_UNIT_TOP_DBG_TRACE_MODE_REG_2 = 0x080107CFull; +static const uint64_t EXPLR_TLXT_TLXTTRAP2 = 0x08012426ull; -static const uint64_t EXPLR_TP_MB_UNIT_TOP_DBG_TRACE_REG_0 = 0x080107CDull; +static const uint64_t EXPLR_TLXT_TLXTTRAP3 = 0x08012427ull; -static const uint64_t EXPLR_TP_MB_UNIT_TOP_DBG_TRACE_REG_1 = 0x080107CEull; +static const uint64_t EXPLR_TLXT_TLXTTRAP4 = 0x08012428ull; -static const uint64_t EXPLR_TP_MB_UNIT_TOP_DEBUG_TRACE_CONTROL = 0x080107D0ull; +static const uint64_t EXPLR_TLXT_TLX_ERR0_REPORTQ = 0x0801241Cull; -static const uint64_t EXPLR_TP_MB_UNIT_TOP_ERR_HOLD_LAT = 0x08040015ull; +static const uint64_t EXPLR_TLXT_TLX_ERR0_REPORTQ_MASK = 0x08012414ull; -static const uint64_t EXPLR_TP_MB_UNIT_TOP_ERR_MASK = 0x08040014ull; +static const uint64_t EXPLR_TLXT_TLX_ERR1_REPORTQ = 0x0801241Dull; -static const uint64_t EXPLR_TP_MB_UNIT_TOP_ERR_RPT_MASK = 0x0801000Aull; +static const uint64_t EXPLR_TLXT_TLX_ERR1_REPORTQ_MASK = 0x08012415ull; -static const uint64_t EXPLR_TP_MB_UNIT_TOP_FIR_MASK = 0x08040002ull; +static const uint64_t EXPLR_TLXT_TLX_ERR2_REPORTQ = 0x0801241Eull; -static const uint64_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_ABORT_ON_ERROR_REG = 0x080F0004ull; +static const uint64_t EXPLR_TLXT_TLX_ERR2_REPORTQ_MASK = 0x08012416ull; -static const uint64_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_AXI_PARITY_ERROR_REG = 0x080F0005ull; +static const uint64_t EXPLR_TP_MB_UNIT_TOP_ADDR_TRAP_REG = 0x08010003ull; -static const uint64_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_ERROR_MASK_REG = 0x080F0001ull; +static const uint64_t EXPLR_TP_MB_UNIT_TOP_ATOMIC_LOCK_MASK_LATCH_REG = 0x08010007ull; -static const uint64_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_ERROR_REG = 0x080F0000ull; +static const uint64_t EXPLR_TP_MB_UNIT_TOP_DBG_INST1_COND_REG_1 = 0x080107C1ull; -static const uint64_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_RESET_REG = 0x080F0003ull; +static const uint64_t EXPLR_TP_MB_UNIT_TOP_DBG_INST1_COND_REG_2 = 0x080107C2ull; -static const uint64_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_TIMER_REG = 0x080F0002ull; +static const uint64_t EXPLR_TP_MB_UNIT_TOP_DBG_INST1_COND_REG_3 = 0x080107C3ull; -static const uint64_t EXPLR_TP_MB_UNIT_TOP_HOLD_OUT_REG = 0x0801000Bull; +static const uint64_t EXPLR_TP_MB_UNIT_TOP_DBG_INST2_COND_REG_1 = 0x080107C4ull; -static const uint64_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR = 0x0804000Aull; -static const uint64_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_AND = 0x0804000Bull; +static const uint64_t EXPLR_TP_MB_UNIT_TOP_DBG_INST2_COND_REG_2 = 0x080107C5ull; -static const uint64_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_OR = 0x0804000Cull; +static const uint64_t EXPLR_TP_MB_UNIT_TOP_DBG_INST2_COND_REG_3 = 0x080107C6ull; -static const uint64_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_ACTION0 = 0x08040010ull; +static const uint64_t EXPLR_TP_MB_UNIT_TOP_DBG_MODE_REG = 0x080107C0ull; -static const uint64_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_ACTION1 = 0x08040011ull; +static const uint64_t EXPLR_TP_MB_UNIT_TOP_DBG_TRACE_MODE_REG_2 = 0x080107CFull; -static const uint64_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_MASK = 0x0804000Dull; -static const uint64_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_MASK_AND = 0x0804000Eull; +static const uint64_t EXPLR_TP_MB_UNIT_TOP_DBG_TRACE_REG_0 = 0x080107CDull; -static const uint64_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_MASK_OR = 0x0804000Full; +static const uint64_t EXPLR_TP_MB_UNIT_TOP_DBG_TRACE_REG_1 = 0x080107CEull; -static const uint64_t EXPLR_TP_MB_UNIT_TOP_LOCAL_XSTOP_ERR = 0x08040018ull; +static const uint64_t EXPLR_TP_MB_UNIT_TOP_DEBUG_TRACE_CONTROL = 0x080107D0ull; -static const uint64_t EXPLR_TP_MB_UNIT_TOP_LOCAL_XSTOP_MASK = 0x08040019ull; +static const uint64_t EXPLR_TP_MB_UNIT_TOP_ERR_HOLD_LAT = 0x08040015ull; -static const uint64_t EXPLR_TP_MB_UNIT_TOP_MODE_REG = 0x08040008ull; +static const uint64_t EXPLR_TP_MB_UNIT_TOP_ERR_MASK = 0x08040014ull; -static const uint64_t EXPLR_TP_MB_UNIT_TOP_MSG_REG = 0x08000001ull; +static const uint64_t EXPLR_TP_MB_UNIT_TOP_ERR_RPT_MASK = 0x0801000Aull; -static const uint64_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_ABORT_ON_ERROR_REG = 0x080E0005ull; +static const uint64_t EXPLR_TP_MB_UNIT_TOP_FIR_MASK = 0x08040002ull; -static const uint64_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_ERROR_MASK2_REG = 0x080E0002ull; +static const uint64_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_ABORT_ON_ERROR_REG = 0x080F0004ull; -static const uint64_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_ERROR_MASK_REG = 0x080E0001ull; +static const uint64_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_AXI_PARITY_ERROR_REG = 0x080F0005ull; -static const uint64_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_ERROR_REG = 0x080E0000ull; +static const uint64_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_ERROR_MASK_REG = 0x080F0001ull; -static const uint64_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_ERROR_REG2 = 0x080E0004ull; +static const uint64_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_ERROR_REG = 0x080F0000ull; -static const uint64_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_TIMER_REG = 0x080E0003ull; +static const uint64_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_RESET_REG = 0x080F0003ull; -static const uint64_t EXPLR_TP_MB_UNIT_TOP_PSCOM_ERROR_MASK = 0x08010002ull; +static const uint64_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_TIMER_REG = 0x080F0002ull; -static const uint64_t EXPLR_TP_MB_UNIT_TOP_PSCOM_MODE_REG = 0x08010000ull; +static const uint64_t EXPLR_TP_MB_UNIT_TOP_HOLD_OUT_REG = 0x0801000Bull; -static const uint64_t EXPLR_TP_MB_UNIT_TOP_PSCOM_STATUS_ERROR_REG = 0x08010001ull; +static const uint64_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR = 0x0804000Aull; -static const uint64_t EXPLR_TP_MB_UNIT_TOP_RFIR = 0x08040001ull; +static const uint64_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_AND = 0x0804000Bull; +static const uint64_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_OR = 0x0804000Cull; -static const uint64_t EXPLR_TP_MB_UNIT_TOP_RING_FENCE_MASK_LATCH_REG = 0x08010008ull; +static const uint64_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_ACTION0 = 0x08040010ull; -static const uint64_t EXPLR_TP_MB_UNIT_TOP_SPATTN_SCOM = 0x08040004ull; -static const uint64_t EXPLR_TP_MB_UNIT_TOP_SPATTN_SCOM1 = 0x08040005ull; +static const uint64_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_ACTION1 = 0x08040011ull; -static const uint64_t EXPLR_TP_MB_UNIT_TOP_SPATTN_SCOM2 = 0x08040006ull; +static const uint64_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_MASK = 0x0804000Dull; -static const uint64_t EXPLR_TP_MB_UNIT_TOP_SPA_MASK = 0x08040007ull; +static const uint64_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_MASK_AND = 0x0804000Eull; +static const uint64_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_MASK_OR = 0x0804000Full; -static const uint64_t EXPLR_TP_MB_UNIT_TOP_SUM_MASK_REG = 0x08040017ull; +static const uint64_t EXPLR_TP_MB_UNIT_TOP_LOCAL_XSTOP_ERR = 0x08040018ull; -static const uint64_t EXPLR_TP_MB_UNIT_TOP_TRACE_HI_DATA_REG = 0x08010400ull; -static const uint64_t EXPLR_TP_MB_UNIT_TOP_TRACE_LO_DATA_REG = 0x08010401ull; +static const uint64_t EXPLR_TP_MB_UNIT_TOP_LOCAL_XSTOP_MASK = 0x08040019ull; -static const uint64_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRCTRL_CONFIG = 0x08010402ull; -static const uint64_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_0 = 0x08010403ull; +static const uint64_t EXPLR_TP_MB_UNIT_TOP_MODE_REG = 0x08040008ull; -static const uint64_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_1 = 0x08010404ull; -static const uint64_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_2 = 0x08010405ull; +static const uint64_t EXPLR_TP_MB_UNIT_TOP_MSG_REG = 0x08000001ull; -static const uint64_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_3 = 0x08010406ull; -static const uint64_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_4 = 0x08010407ull; +static const uint64_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_ABORT_ON_ERROR_REG = 0x080E0005ull; -static const uint64_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_5 = 0x08010408ull; -static const uint64_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_9 = 0x08010409ull; +static const uint64_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_ERROR_MASK2_REG = 0x080E0002ull; -static const uint64_t EXPLR_TP_MB_UNIT_TOP_WRITE_PROTECT_ENABLE_REG = 0x08010005ull; +static const uint64_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_ERROR_MASK_REG = 0x080E0001ull; -static const uint64_t EXPLR_TP_MB_UNIT_TOP_WRITE_PROTECT_RINGS_REG = 0x08010006ull; +static const uint64_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_ERROR_REG = 0x080E0000ull; -static const uint64_t EXPLR_TP_MB_UNIT_TOP_XFIR = 0x08040000ull; +static const uint64_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_ERROR_REG2 = 0x080E0004ull; -static const uint64_t EXPLR_TP_MB_UNIT_TOP_XTRA_TRACE_MODE = 0x080107D1ull; +static const uint64_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_TIMER_REG = 0x080E0003ull; -static const uint64_t EXPLR_WDF_AACR = 0x08012002ull; +static const uint64_t EXPLR_TP_MB_UNIT_TOP_PSCOM_ERROR_MASK = 0x08010002ull; -static const uint64_t EXPLR_WDF_AADR = 0x08012003ull; +static const uint64_t EXPLR_TP_MB_UNIT_TOP_PSCOM_MODE_REG = 0x08010000ull; -static const uint64_t EXPLR_WDF_AAER = 0x08012004ull; +static const uint64_t EXPLR_TP_MB_UNIT_TOP_PSCOM_STATUS_ERROR_REG = 0x08010001ull; -static const uint64_t EXPLR_WDF_DQS0R = 0x08012000ull; +static const uint64_t EXPLR_TP_MB_UNIT_TOP_RFIR = 0x08040001ull; -static const uint64_t EXPLR_WDF_DQS1R = 0x08012001ull; +static const uint64_t EXPLR_TP_MB_UNIT_TOP_RING_FENCE_MASK_LATCH_REG = 0x08010008ull; -static const uint64_t EXPLR_WDF_WECR = 0x08012005ull; +static const uint64_t EXPLR_TP_MB_UNIT_TOP_SPATTN_SCOM = 0x08040004ull; -static const uint64_t EXPLR_WDF_WERR = 0x08012007ull; +static const uint64_t EXPLR_TP_MB_UNIT_TOP_SPATTN_SCOM1 = 0x08040005ull; +static const uint64_t EXPLR_TP_MB_UNIT_TOP_SPATTN_SCOM2 = 0x08040006ull; -static const uint64_t EXPLR_WDF_WESR = 0x08012006ull; +static const uint64_t EXPLR_TP_MB_UNIT_TOP_SPA_MASK = 0x08040007ull; -static const uint64_t EXPLR_WDF_WMSK = 0x08012009ull; +static const uint64_t EXPLR_TP_MB_UNIT_TOP_SUM_MASK_REG = 0x08040017ull; -static const uint64_t EXPLR_WDF_WSPAR = 0x08012008ull; +static const uint64_t EXPLR_TP_MB_UNIT_TOP_TRACE_HI_DATA_REG = 0x08010400ull; +//DUPS: 08010400, -static const uint32_t EXPLR_EFUSE_IMAGE_OUT_0 = 0x20B080ull; +static const uint64_t EXPLR_TP_MB_UNIT_TOP_TRACE_LO_DATA_REG = 0x08010401ull; +//DUPS: 08010401, +static const uint64_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRCTRL_CONFIG = 0x08010402ull; +//DUPS: 08010402, -static const uint32_t EXPLR_EFUSE_IMAGE_OUT_1 = 0x20B084ull; +static const uint64_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_0 = 0x08010403ull; +//DUPS: 08010403, +static const uint64_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_1 = 0x08010404ull; +//DUPS: 08010404, -static const uint32_t EXPLR_EFUSE_IMAGE_OUT_2 = 0x20B088ull; +static const uint64_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_2 = 0x08010405ull; +//DUPS: 08010405, +static const uint64_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_3 = 0x08010406ull; +//DUPS: 08010406, -static const uint32_t EXPLR_EFUSE_IMAGE_OUT_3 = 0x20B08Cull; +static const uint64_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_4 = 0x08010407ull; +//DUPS: 08010407, +static const uint64_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_5 = 0x08010408ull; +//DUPS: 08010408, -static const uint32_t EXPLR_EFUSE_PE_DATA_0 = 0x20B090ull; +static const uint64_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_9 = 0x08010409ull; +//DUPS: 08010409, +static const uint64_t EXPLR_TP_MB_UNIT_TOP_WRITE_PROTECT_ENABLE_REG = 0x08010005ull; -static const uint32_t EXPLR_EFUSE_PE_DATA_1 = 0x20B094ull; +static const uint64_t EXPLR_TP_MB_UNIT_TOP_WRITE_PROTECT_RINGS_REG = 0x08010006ull; -static const uint32_t EXPLR_EFUSE_PE_DATA_2 = 0x20B098ull; +static const uint64_t EXPLR_TP_MB_UNIT_TOP_XFIR = 0x08040000ull; -static const uint32_t EXPLR_EFUSE_PE_DATA_3 = 0x20B09Cull; +static const uint64_t EXPLR_TP_MB_UNIT_TOP_XTRA_TRACE_MODE = 0x080107D1ull; -static const uint32_t EXPLR_EFUSE_PE_DATA_4 = 0x20B0A0ull; +static const uint64_t EXPLR_WDF_AACR = 0x08012002ull; -static const uint32_t EXPLR_EFUSE_PE_DATA_5 = 0x20B0A4ull; +static const uint64_t EXPLR_WDF_AADR = 0x08012003ull; -static const uint32_t EXPLR_EFUSE_PE_DATA_6 = 0x20B0A8ull; +static const uint64_t EXPLR_WDF_AAER = 0x08012004ull; -static const uint32_t EXPLR_EFUSE_PE_DATA_8 = 0x20B0ACull; +static const uint64_t EXPLR_WDF_DQS0R = 0x08012000ull; -static const uint32_t EXPLR_EFUSE_PE_DATA_9 = 0x20B0B0ull; +static const uint64_t EXPLR_WDF_DQS1R = 0x08012001ull; -static const uint32_t EXPLR_EFUSE_PE_DATA_10 = 0x20B0B4ull; +static const uint64_t EXPLR_WDF_WECR = 0x08012005ull; -static const uint32_t EXPLR_EFUSE_PE_DATA_11 = 0x20B0B8ull; +static const uint64_t EXPLR_WDF_WERR = 0x08012007ull; -static const uint32_t EXPLR_EFUSE_PE_DATA_12 = 0x20B0BCull; +static const uint64_t EXPLR_WDF_WESR = 0x08012006ull; -static const uint32_t EXPLR_EFUSE_PE_DATA_13 = 0x20B0C0ull; +static const uint64_t EXPLR_WDF_WMSK = 0x08012009ull; -static const uint32_t EXPLR_EFUSE_PE_DATA_14 = 0x20B0C4ull; +static const uint64_t EXPLR_WDF_WSPAR = 0x08012008ull; #endif diff --git a/src/import/chips/ocmb/explorer/common/include/explorer_scom_addresses_fixes.H b/src/import/chips/ocmb/explorer/common/include/explorer_scom_addresses_fixes.H index 1bbd7bab9..a78134244 100644 --- a/src/import/chips/ocmb/explorer/common/include/explorer_scom_addresses_fixes.H +++ b/src/import/chips/ocmb/explorer/common/include/explorer_scom_addresses_fixes.H @@ -28,7 +28,6 @@ #define __EXPLR_SCOM_ADDRESSES_FIXES_H static const uint64_t EXPLR_MIPS_TO_OCMB_INTERRUPT_REGISTER1 = 0x2058ull; -static const uint64_t EXPLR_MCBIST_MBSSYMEC9Q = 0x08011861ull; static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQSDLYTG0_U0_P0 = 0x04040340ull; static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKDLYTG0_U0_P0 = 0x04040230ull; @@ -3146,8 +3145,61 @@ static const uint64_t EXP_DDR4_PHY_DBYTE9_RXPBDLYTG3_R5 = 0x040655acull; static const uint64_t EXP_DDR4_PHY_DBYTE9_RXPBDLYTG3_R6 = 0x040659acull; static const uint64_t EXP_DDR4_PHY_DBYTE9_RXPBDLYTG3_R7 = 0x04065dacull; static const uint64_t EXP_DDR4_PHY_DBYTE9_RXPBDLYTG3_R8 = 0x040661acull; -static const uint64_t EXPLR_RDF_MCBCM2 = 0x08011c35ull; static const uint64_t EXPLR_TP_MB_UNIT_TOP_TR1_TRACE_TRCTRL_CONFIG = 0x08010442ull; static const uint64_t EXP_APBONLY0_MICROCONTMUXSEL = 0x04340000ull; + +static const uint32_t EXPLR_EFUSE_IMAGE_OUT_0 = 0x20B080ull; + + +static const uint32_t EXPLR_EFUSE_IMAGE_OUT_1 = 0x20B084ull; + + +static const uint32_t EXPLR_EFUSE_IMAGE_OUT_2 = 0x20B088ull; + + +static const uint32_t EXPLR_EFUSE_IMAGE_OUT_3 = 0x20B08Cull; + + +static const uint32_t EXPLR_EFUSE_PE_DATA_0 = 0x20B090ull; + + +static const uint32_t EXPLR_EFUSE_PE_DATA_1 = 0x20B094ull; + + +static const uint32_t EXPLR_EFUSE_PE_DATA_2 = 0x20B098ull; + + +static const uint32_t EXPLR_EFUSE_PE_DATA_3 = 0x20B09Cull; + + +static const uint32_t EXPLR_EFUSE_PE_DATA_4 = 0x20B0A0ull; + + +static const uint32_t EXPLR_EFUSE_PE_DATA_5 = 0x20B0A4ull; + + +static const uint32_t EXPLR_EFUSE_PE_DATA_6 = 0x20B0A8ull; + + +static const uint32_t EXPLR_EFUSE_PE_DATA_8 = 0x20B0ACull; + + +static const uint32_t EXPLR_EFUSE_PE_DATA_9 = 0x20B0B0ull; + + +static const uint32_t EXPLR_EFUSE_PE_DATA_10 = 0x20B0B4ull; + + +static const uint32_t EXPLR_EFUSE_PE_DATA_11 = 0x20B0B8ull; + + +static const uint32_t EXPLR_EFUSE_PE_DATA_12 = 0x20B0BCull; + + +static const uint32_t EXPLR_EFUSE_PE_DATA_13 = 0x20B0C0ull; + + +static const uint32_t EXPLR_EFUSE_PE_DATA_14 = 0x20B0C4ull; + #endif diff --git a/src/import/chips/ocmb/explorer/common/include/explorer_scom_addresses_fld.H b/src/import/chips/ocmb/explorer/common/include/explorer_scom_addresses_fld.H index 1f1f89d32..ab747c2bb 100644 --- a/src/import/chips/ocmb/explorer/common/include/explorer_scom_addresses_fld.H +++ b/src/import/chips/ocmb/explorer/common/include/explorer_scom_addresses_fld.H @@ -27,6096 +27,6258 @@ #define __EXPLR_SCOM_ADDRESSES_FLD_H -static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_SPARE = 0 ; -static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_SPARE_LEN = 4 ; -static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_PM_CDR_TIMER = 4 ; -static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_PM_CDR_TIMER_LEN = 4 ; -static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_PM_DIDT_TIMER = 8 ; -static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_PM_DIDT_TIMER_LEN = 4 ; -static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_PSAVE_STS_ENABLE = 12 ; -static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_RECAL_TIMER = 13 ; -static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_RECAL_TIMER_LEN = 3 ; -static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_1US_TMR = 16 ; -static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_1US_TMR_LEN = 12 ; -static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_DBG_EN = 28 ; -static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_DBG_SEL = 29 ; -static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_DBG_SEL_LEN = 3 ; -static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_RD_RST = 32 ; -static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_PRE_SCALAR = 33 ; -static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_PRE_SCALAR_LEN = 3 ; -static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_FREEZE = 36 ; -static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_PORT_SEL = 37 ; -static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_PORT_SEL_LEN = 3 ; -static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_CNTR3_PS = 40 ; -static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_CNTR3_PS_LEN = 2 ; -static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_CNTR3_ES = 42 ; -static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_CNTR3_ES_LEN = 2 ; -static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_CNTR2_PS = 44 ; -static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_CNTR2_PS_LEN = 2 ; -static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_CNTR2_ES = 46 ; -static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_CNTR2_ES_LEN = 2 ; -static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_CNTR1_PS = 48 ; -static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_CNTR1_PS_LEN = 2 ; -static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_CNTR1_ES = 50 ; -static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_CNTR1_ES_LEN = 2 ; -static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_CNTR0_PS = 52 ; -static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_CNTR0_PS_LEN = 2 ; -static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_CNTR0_ES = 54 ; -static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_CNTR0_ES_LEN = 2 ; -static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_CNTR3_PE = 56 ; -static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_CNTR2_PE = 57 ; -static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_CNTR1_PE = 58 ; -static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_CNTR0_PE = 59 ; -static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_CNTR3_EN = 60 ; -static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_CNTR2_EN = 61 ; -static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_CNTR1_EN = 62 ; -static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_CNTR0_EN = 63 ; - -static const uint8_t EXPLR_DLX_DL0_CONFIG0_CFG_ENABLE = 0 ; -static const uint8_t EXPLR_DLX_DL0_CONFIG0_CFG_CFG_SPARE = 1 ; -static const uint8_t EXPLR_DLX_DL0_CONFIG0_CFG_CFG_SPARE_LEN = 5 ; -static const uint8_t EXPLR_DLX_DL0_CONFIG0_CFG_CFG_TL_CREDITS = 6 ; -static const uint8_t EXPLR_DLX_DL0_CONFIG0_CFG_CFG_TL_CREDITS_LEN = 6 ; -static const uint8_t EXPLR_DLX_DL0_CONFIG0_CFG_TL_EVENT_ACTIONS = 12 ; -static const uint8_t EXPLR_DLX_DL0_CONFIG0_CFG_TL_EVENT_ACTIONS_LEN = 4 ; -static const uint8_t EXPLR_DLX_DL0_CONFIG0_CFG_TL_ERROR_ACTIONS = 16 ; -static const uint8_t EXPLR_DLX_DL0_CONFIG0_CFG_TL_ERROR_ACTIONS_LEN = 4 ; -static const uint8_t EXPLR_DLX_DL0_CONFIG0_CFG_FWD_PROGRESS_TIMER = 20 ; -static const uint8_t EXPLR_DLX_DL0_CONFIG0_CFG_FWD_PROGRESS_TIMER_LEN = 4 ; -static const uint8_t EXPLR_DLX_DL0_CONFIG0_CFG_REPLAY_RSVD_ENTRIES = 24 ; -static const uint8_t EXPLR_DLX_DL0_CONFIG0_CFG_REPLAY_RSVD_ENTRIES_LEN = 4 ; -static const uint8_t EXPLR_DLX_DL0_CONFIG0_CFG_DEBUG_SELECT = 28 ; -static const uint8_t EXPLR_DLX_DL0_CONFIG0_CFG_DEBUG_SELECT_LEN = 3 ; -static const uint8_t EXPLR_DLX_DL0_CONFIG0_CFG_DEBUG_ENABLE = 31 ; -static const uint8_t EXPLR_DLX_DL0_CONFIG0_CFG_DL2TL_DATA_PARITY_INJECT = 32 ; -static const uint8_t EXPLR_DLX_DL0_CONFIG0_CFG_DL2TL_CONTROL_PARITY_INJECT = 33 ; -static const uint8_t EXPLR_DLX_DL0_CONFIG0_CFG_ECC_UE_INJECTION = 34 ; -static const uint8_t EXPLR_DLX_DL0_CONFIG0_CFG_ECC_CE_INJECTION = 35 ; -static const uint8_t EXPLR_DLX_DL0_CONFIG0_CFG_FP_DISABLE = 36 ; -static const uint8_t EXPLR_DLX_DL0_CONFIG0_CFG_UNUSED2 = 37 ; -static const uint8_t EXPLR_DLX_DL0_CONFIG0_CFG_TX_LN_REV_ENA = 38 ; -static const uint8_t EXPLR_DLX_DL0_CONFIG0_CFG_128_130_ENCODING_ENABLED = 39 ; -static const uint8_t EXPLR_DLX_DL0_CONFIG0_CFG_PHY_CNTR_LIMIT = 40 ; -static const uint8_t EXPLR_DLX_DL0_CONFIG0_CFG_PHY_CNTR_LIMIT_LEN = 4 ; -static const uint8_t EXPLR_DLX_DL0_CONFIG0_CFG_RUNLANE_OVRD_ENABLE = 44 ; -static const uint8_t EXPLR_DLX_DL0_CONFIG0_CFG_PWRMGT_ENABLE = 45 ; -static const uint8_t EXPLR_DLX_DL0_CONFIG0_CFG_X1_BACKOFF_ENABLE = 46 ; -static const uint8_t EXPLR_DLX_DL0_CONFIG0_CFG_X4_BACKOFF_ENABLE = 47 ; -static const uint8_t EXPLR_DLX_DL0_CONFIG0_CFG_SUPPORTED_MODES = 48 ; -static const uint8_t EXPLR_DLX_DL0_CONFIG0_CFG_SUPPORTED_MODES_LEN = 4 ; -static const uint8_t EXPLR_DLX_DL0_CONFIG0_CFG_TRAIN_MODE = 52 ; -static const uint8_t EXPLR_DLX_DL0_CONFIG0_CFG_TRAIN_MODE_LEN = 4 ; -static const uint8_t EXPLR_DLX_DL0_CONFIG0_CFG_VERSION = 56 ; -static const uint8_t EXPLR_DLX_DL0_CONFIG0_CFG_VERSION_LEN = 6 ; -static const uint8_t EXPLR_DLX_DL0_CONFIG0_CFG_RETRAIN = 62 ; -static const uint8_t EXPLR_DLX_DL0_CONFIG0_CFG_RESET = 63 ; - -static const uint8_t EXPLR_DLX_DL0_CONFIG1_CFG_CFG1_SPARE = 0 ; -static const uint8_t EXPLR_DLX_DL0_CONFIG1_CFG_CFG1_SPARE_LEN = 2 ; -static const uint8_t EXPLR_DLX_DL0_CONFIG1_CFG_LANE_WIDTH = 2 ; -static const uint8_t EXPLR_DLX_DL0_CONFIG1_CFG_LANE_WIDTH_LEN = 2 ; -static const uint8_t EXPLR_DLX_DL0_CONFIG1_CFG_PREIPL_PRBS_ENA = 4 ; -static const uint8_t EXPLR_DLX_DL0_CONFIG1_CFG_PREIPL_PRBS_TIME = 5 ; -static const uint8_t EXPLR_DLX_DL0_CONFIG1_CFG_PREIPL_PRBS_TIME_LEN = 3 ; -static const uint8_t EXPLR_DLX_DL0_CONFIG1_CFG_B_HYSTERESIS = 8 ; -static const uint8_t EXPLR_DLX_DL0_CONFIG1_CFG_B_HYSTERESIS_LEN = 4 ; -static const uint8_t EXPLR_DLX_DL0_CONFIG1_CFG_A_HYSTERESIS = 12 ; -static const uint8_t EXPLR_DLX_DL0_CONFIG1_CFG_A_HYSTERESIS_LEN = 4 ; -static const uint8_t EXPLR_DLX_DL0_CONFIG1_CFG_B_PATTERN_LENGTH = 16 ; -static const uint8_t EXPLR_DLX_DL0_CONFIG1_CFG_B_PATTERN_LENGTH_LEN = 2 ; -static const uint8_t EXPLR_DLX_DL0_CONFIG1_CFG_A_PATTERN_LENGTH = 18 ; -static const uint8_t EXPLR_DLX_DL0_CONFIG1_CFG_A_PATTERN_LENGTH_LEN = 2 ; -static const uint8_t EXPLR_DLX_DL0_CONFIG1_CFG_TX_PERF_DEGRADED = 20 ; -static const uint8_t EXPLR_DLX_DL0_CONFIG1_CFG_TX_PERF_DEGRADED_LEN = 2 ; -static const uint8_t EXPLR_DLX_DL0_CONFIG1_CFG_RX_PERF_DEGRADED = 22 ; -static const uint8_t EXPLR_DLX_DL0_CONFIG1_CFG_RX_PERF_DEGRADED_LEN = 2 ; -static const uint8_t EXPLR_DLX_DL0_CONFIG1_CFG_TX_LANES_DISABLE = 24 ; -static const uint8_t EXPLR_DLX_DL0_CONFIG1_CFG_TX_LANES_DISABLE_LEN = 8 ; -static const uint8_t EXPLR_DLX_DL0_CONFIG1_CFG_RX_LANES_DISABLE = 32 ; -static const uint8_t EXPLR_DLX_DL0_CONFIG1_CFG_RX_LANES_DISABLE_LEN = 8 ; -static const uint8_t EXPLR_DLX_DL0_CONFIG1_CFG_CFG1_SPARE1 = 40 ; -static const uint8_t EXPLR_DLX_DL0_CONFIG1_CFG_CFG1_SPARE1_LEN = 4 ; -static const uint8_t EXPLR_DLX_DL0_CONFIG1_CFG_RESET_ERR_HLD = 44 ; -static const uint8_t EXPLR_DLX_DL0_CONFIG1_CFG_RESET_ERR_CAP = 45 ; -static const uint8_t EXPLR_DLX_DL0_CONFIG1_CFG_RESET_TSHD_REG = 46 ; -static const uint8_t EXPLR_DLX_DL0_CONFIG1_CFG_RESET_RMT_MSG = 47 ; -static const uint8_t EXPLR_DLX_DL0_CONFIG1_CFG_INJECT_CRC_DIRECTION = 48 ; -static const uint8_t EXPLR_DLX_DL0_CONFIG1_CFG_INJECT_CRC_RATE = 49 ; -static const uint8_t EXPLR_DLX_DL0_CONFIG1_CFG_INJECT_CRC_RATE_LEN = 3 ; -static const uint8_t EXPLR_DLX_DL0_CONFIG1_CFG_INJECT_CRC_LANE = 52 ; -static const uint8_t EXPLR_DLX_DL0_CONFIG1_CFG_INJECT_CRC_LANE_LEN = 3 ; -static const uint8_t EXPLR_DLX_DL0_CONFIG1_CFG_INJECT_CRC_ERROR = 55 ; -static const uint8_t EXPLR_DLX_DL0_CONFIG1_CFG_EDPL_TIME = 56 ; -static const uint8_t EXPLR_DLX_DL0_CONFIG1_CFG_EDPL_TIME_LEN = 4 ; -static const uint8_t EXPLR_DLX_DL0_CONFIG1_CFG_EDPL_THRESHOLD = 60 ; -static const uint8_t EXPLR_DLX_DL0_CONFIG1_CFG_EDPL_THRESHOLD_LEN = 3 ; -static const uint8_t EXPLR_DLX_DL0_CONFIG1_CFG_EDPL_ENA = 63 ; - -static const uint8_t EXPLR_DLX_DL0_CYA_BITS_CFG_BITS0 = 32 ; -static const uint8_t EXPLR_DLX_DL0_CYA_BITS_CFG_BITS0_LEN = 32 ; - -static const uint8_t EXPLR_DLX_DL0_DEBUG_AID_RESERVED = 0 ; -static const uint8_t EXPLR_DLX_DL0_DEBUG_AID_RESERVED_LEN = 55 ; -static const uint8_t EXPLR_DLX_DL0_DEBUG_AID_PRBS7_RESET = 55 ; -static const uint8_t EXPLR_DLX_DL0_DEBUG_AID_PRBS7_STATUS = 56 ; -static const uint8_t EXPLR_DLX_DL0_DEBUG_AID_PRBS7_STATUS_LEN = 8 ; - -static const uint8_t EXPLR_DLX_DL0_DLX_CONFIG_CFG_DLX0 = 32 ; -static const uint8_t EXPLR_DLX_DL0_DLX_CONFIG_CFG_DLX0_LEN = 32 ; - -static const uint8_t EXPLR_DLX_DL0_DLX_INFO_STS = 0 ; -static const uint8_t EXPLR_DLX_DL0_DLX_INFO_STS_LEN = 64 ; - -static const uint8_t EXPLR_DLX_DL0_EDPL_MAX_COUNT_L7 = 0 ; -static const uint8_t EXPLR_DLX_DL0_EDPL_MAX_COUNT_L7_LEN = 8 ; -static const uint8_t EXPLR_DLX_DL0_EDPL_MAX_COUNT_L6 = 8 ; -static const uint8_t EXPLR_DLX_DL0_EDPL_MAX_COUNT_L6_LEN = 8 ; -static const uint8_t EXPLR_DLX_DL0_EDPL_MAX_COUNT_L5 = 16 ; -static const uint8_t EXPLR_DLX_DL0_EDPL_MAX_COUNT_L5_LEN = 8 ; -static const uint8_t EXPLR_DLX_DL0_EDPL_MAX_COUNT_L4 = 24 ; -static const uint8_t EXPLR_DLX_DL0_EDPL_MAX_COUNT_L4_LEN = 8 ; -static const uint8_t EXPLR_DLX_DL0_EDPL_MAX_COUNT_L3 = 32 ; -static const uint8_t EXPLR_DLX_DL0_EDPL_MAX_COUNT_L3_LEN = 8 ; -static const uint8_t EXPLR_DLX_DL0_EDPL_MAX_COUNT_L2 = 40 ; -static const uint8_t EXPLR_DLX_DL0_EDPL_MAX_COUNT_L2_LEN = 8 ; -static const uint8_t EXPLR_DLX_DL0_EDPL_MAX_COUNT_L1 = 48 ; -static const uint8_t EXPLR_DLX_DL0_EDPL_MAX_COUNT_L1_LEN = 8 ; -static const uint8_t EXPLR_DLX_DL0_EDPL_MAX_COUNT_L0 = 56 ; -static const uint8_t EXPLR_DLX_DL0_EDPL_MAX_COUNT_L0_LEN = 8 ; - -static const uint8_t EXPLR_DLX_DL0_ERROR_ACTION_FIR_11 = 16 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_ACTION_FIR_11_LEN = 4 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_ACTION_FIR_10 = 20 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_ACTION_FIR_10_LEN = 4 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_ACTION_FIR_9 = 24 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_ACTION_FIR_9_LEN = 4 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_ACTION_FIR_8 = 28 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_ACTION_FIR_8_LEN = 4 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_ACTION_FIR_7 = 32 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_ACTION_FIR_7_LEN = 4 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_ACTION_FIR_6 = 36 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_ACTION_FIR_6_LEN = 4 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_ACTION_FIR_5 = 40 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_ACTION_FIR_5_LEN = 4 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_ACTION_FIR_4 = 44 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_ACTION_FIR_4_LEN = 4 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_ACTION_FIR_3 = 48 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_ACTION_FIR_3_LEN = 4 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_ACTION_FIR_2 = 52 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_ACTION_FIR_2_LEN = 4 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_ACTION_FIR_1 = 56 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_ACTION_FIR_1_LEN = 4 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_ACTION_FIR_0 = 60 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_ACTION_FIR_0_LEN = 4 ; - -static const uint8_t EXPLR_DLX_DL0_ERROR_CAPTURE_INFO = 1 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_CAPTURE_INFO_LEN = 63 ; - -static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_47 = 16 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_46 = 17 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_45 = 18 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_44 = 19 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_43 = 20 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_42 = 21 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_41 = 22 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_40 = 23 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_39 = 24 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_38 = 25 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_37 = 26 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_36 = 27 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_35 = 28 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_34 = 29 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_33 = 30 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_32 = 31 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_31 = 32 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_30 = 33 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_29 = 34 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_28 = 35 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_27 = 36 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_26 = 37 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_25 = 38 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_24 = 39 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_23 = 40 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_22 = 41 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_21 = 42 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_20 = 43 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_19 = 44 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_18 = 45 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_17 = 46 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_16 = 47 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_15 = 48 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_14 = 49 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_13 = 50 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_12 = 51 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_11 = 52 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_10 = 53 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_09 = 54 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_08 = 55 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_07 = 56 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_06 = 57 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_05 = 58 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_04 = 59 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_03 = 60 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_02 = 61 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_01 = 62 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_00 = 63 ; - -static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_47 = 16 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_46 = 17 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_45 = 18 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_44 = 19 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_43 = 20 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_42 = 21 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_41 = 22 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_40 = 23 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_39 = 24 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_38 = 25 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_37 = 26 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_36 = 27 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_35 = 28 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_34 = 29 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_33 = 30 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_32 = 31 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_31 = 32 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_30 = 33 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_29 = 34 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_28 = 35 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_27 = 36 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_26 = 37 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_25 = 38 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_24 = 39 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_23 = 40 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_22 = 41 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_21 = 42 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_20 = 43 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_19 = 44 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_18 = 45 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_17 = 46 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_16 = 47 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_15 = 48 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_14 = 49 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_13 = 50 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_12 = 51 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_11 = 52 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_10 = 53 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_09 = 54 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_08 = 55 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_07 = 56 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_06 = 57 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_05 = 58 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_04 = 59 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_03 = 60 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_02 = 61 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_01 = 62 ; -static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_00 = 63 ; - -static const uint8_t EXPLR_DLX_DL0_STATUS_STS_TRAINED_MODE = 0 ; -static const uint8_t EXPLR_DLX_DL0_STATUS_STS_TRAINED_MODE_LEN = 4 ; -static const uint8_t EXPLR_DLX_DL0_STATUS_STS_RX_LANE_REVERSED = 4 ; -static const uint8_t EXPLR_DLX_DL0_STATUS_STS_TX_LANE_REVERSED = 5 ; -static const uint8_t EXPLR_DLX_DL0_STATUS_STS_RSVD0 = 6 ; -static const uint8_t EXPLR_DLX_DL0_STATUS_STS_ACK_PTRS_EQUAL = 7 ; -static const uint8_t EXPLR_DLX_DL0_STATUS_STS_RSVD1 = 8 ; -static const uint8_t EXPLR_DLX_DL0_STATUS_STS_RSVD1_LEN = 4 ; -static const uint8_t EXPLR_DLX_DL0_STATUS_STS_REQUESTED_LN_WIDTH = 12 ; -static const uint8_t EXPLR_DLX_DL0_STATUS_STS_REQUESTED_LN_WIDTH_LEN = 2 ; -static const uint8_t EXPLR_DLX_DL0_STATUS_STS_ACTUAL_LN_WIDTH = 14 ; -static const uint8_t EXPLR_DLX_DL0_STATUS_STS_ACTUAL_LN_WIDTH_LEN = 2 ; -static const uint8_t EXPLR_DLX_DL0_STATUS_STS_TX_TRAINED_LANES = 16 ; -static const uint8_t EXPLR_DLX_DL0_STATUS_STS_TX_TRAINED_LANES_LEN = 8 ; -static const uint8_t EXPLR_DLX_DL0_STATUS_STS_RX_TRAINED_LANES = 24 ; -static const uint8_t EXPLR_DLX_DL0_STATUS_STS_RX_TRAINED_LANES_LEN = 8 ; -static const uint8_t EXPLR_DLX_DL0_STATUS_STS_ENDPOINT_INFO = 32 ; -static const uint8_t EXPLR_DLX_DL0_STATUS_STS_ENDPOINT_INFO_LEN = 16 ; -static const uint8_t EXPLR_DLX_DL0_STATUS_STS_RSVD2 = 48 ; -static const uint8_t EXPLR_DLX_DL0_STATUS_STS_TRAINING_STATE_MACHINE = 49 ; -static const uint8_t EXPLR_DLX_DL0_STATUS_STS_TRAINING_STATE_MACHINE_LEN = 3 ; -static const uint8_t EXPLR_DLX_DL0_STATUS_STS_RSVD3 = 52 ; -static const uint8_t EXPLR_DLX_DL0_STATUS_STS_RSVD3_LEN = 3 ; -static const uint8_t EXPLR_DLX_DL0_STATUS_STS_DESKEW_DONE = 55 ; -static const uint8_t EXPLR_DLX_DL0_STATUS_STS_LANES_DISABLED = 56 ; -static const uint8_t EXPLR_DLX_DL0_STATUS_STS_LANES_DISABLED_LEN = 8 ; - -static const uint8_t EXPLR_DLX_DL0_TRAINING_STATUS_STS_RX_PATTERN_A = 0 ; -static const uint8_t EXPLR_DLX_DL0_TRAINING_STATUS_STS_RX_PATTERN_A_LEN = 8 ; -static const uint8_t EXPLR_DLX_DL0_TRAINING_STATUS_STS_RX_PATTERN_B = 8 ; -static const uint8_t EXPLR_DLX_DL0_TRAINING_STATUS_STS_RX_PATTERN_B_LEN = 8 ; -static const uint8_t EXPLR_DLX_DL0_TRAINING_STATUS_STS_SYNC_PATTERN = 16 ; -static const uint8_t EXPLR_DLX_DL0_TRAINING_STATUS_STS_SYNC_PATTERN_LEN = 8 ; -static const uint8_t EXPLR_DLX_DL0_TRAINING_STATUS_STS_PHY_INIT_DONE = 24 ; -static const uint8_t EXPLR_DLX_DL0_TRAINING_STATUS_STS_PHY_INIT_DONE_LEN = 8 ; -static const uint8_t EXPLR_DLX_DL0_TRAINING_STATUS_STS_BLOCK_LOCKED = 32 ; -static const uint8_t EXPLR_DLX_DL0_TRAINING_STATUS_STS_BLOCK_LOCKED_LEN = 8 ; -static const uint8_t EXPLR_DLX_DL0_TRAINING_STATUS_STS_RX_TS1 = 40 ; -static const uint8_t EXPLR_DLX_DL0_TRAINING_STATUS_STS_RX_TS1_LEN = 8 ; -static const uint8_t EXPLR_DLX_DL0_TRAINING_STATUS_STS_RX_TS2 = 48 ; -static const uint8_t EXPLR_DLX_DL0_TRAINING_STATUS_STS_RX_TS2_LEN = 8 ; -static const uint8_t EXPLR_DLX_DL0_TRAINING_STATUS_STS_RX_TS3 = 56 ; -static const uint8_t EXPLR_DLX_DL0_TRAINING_STATUS_STS_RX_TS3_LEN = 8 ; - -static const uint8_t EXPLR_DLX_ERR_HOLD_LAT_FIR_MASK_PAR = 0 ; -static const uint8_t EXPLR_DLX_ERR_HOLD_LAT_FIR_ACTION0_PAR = 1 ; -static const uint8_t EXPLR_DLX_ERR_HOLD_LAT_FIR_ACTION1_PAR = 2 ; - -static const uint8_t EXPLR_DLX_ERR_MASK_LAT_FIR_PAR = 0 ; -static const uint8_t EXPLR_DLX_ERR_MASK_LAT_FIR_ACTION0_PAR = 1 ; -static const uint8_t EXPLR_DLX_ERR_MASK_LAT_FIR_ACTION1_PAR = 2 ; - -static const uint8_t EXPLR_DLX_MC_OMI_FIR_ACTION0_REG_ACTION0 = 0 ; -static const uint8_t EXPLR_DLX_MC_OMI_FIR_ACTION0_REG_ACTION0_LEN = 64 ; - -static const uint8_t EXPLR_DLX_MC_OMI_FIR_ACTION1_REG_ACTION1 = 0 ; -static const uint8_t EXPLR_DLX_MC_OMI_FIR_ACTION1_REG_ACTION1_LEN = 64 ; - -static const uint8_t EXPLR_DLX_MC_OMI_FIR_MASK_REG_DL0_ERROR = 0 ; -static const uint8_t EXPLR_DLX_MC_OMI_FIR_MASK_REG_DL0_ERROR_LEN = 20 ; -static const uint8_t EXPLR_DLX_MC_OMI_FIR_MASK_REG_DL1_ERROR = 20 ; -static const uint8_t EXPLR_DLX_MC_OMI_FIR_MASK_REG_DL1_ERROR_LEN = 20 ; -static const uint8_t EXPLR_DLX_MC_OMI_FIR_MASK_REG_DL2_ERROR = 40 ; -static const uint8_t EXPLR_DLX_MC_OMI_FIR_MASK_REG_DL2_ERROR_LEN = 20 ; -static const uint8_t EXPLR_DLX_MC_OMI_FIR_MASK_REG_PERF_MON_WRAPPED = 60 ; - -static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL0_FATAL_ERROR = 0 ; -static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL0_DATA_UE = 1 ; -static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL0_FLIT_CE = 2 ; -static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL0_CRC_ERROR = 3 ; -static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL0_NACK = 4 ; -static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL0_X4_MODE = 5 ; -static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL0_EDPL = 6 ; -static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL0_TIMEOUT = 7 ; -static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL0_REMOTE_RETRAIN = 8 ; -static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL0_ERROR_RETRAIN = 9 ; -static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL0_EDPL_RETRAIN = 10 ; -static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL0_TRAINED = 11 ; -static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL0_ENDPOINT_FIR0 = 12 ; -static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL0_ENDPOINT_FIR1 = 13 ; -static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL0_ENDPOINT_FIR2 = 14 ; -static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL0_ENDPOINT_FIR3 = 15 ; -static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL0_ENDPOINT_FIR4 = 16 ; -static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL0_ENDPOINT_FIR5 = 17 ; -static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL0_ENDPOINT_FIR6 = 18 ; -static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL0_ENDPOINT_FIR7 = 19 ; -static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL1_FATAL_ERROR = 20 ; -static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL1_DATA_UE = 21 ; -static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL1_FLIT_CE = 22 ; -static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL1_CRC_ERROR = 23 ; -static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL1_NACK = 24 ; -static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL1_X4_MODE = 25 ; -static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL1_EDPL = 26 ; -static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL1_TIMEOUT = 27 ; -static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL1_REMOTE_RETRAIN = 28 ; -static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL1_ERROR_RETRAIN = 29 ; -static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL1_EDPL_RETRAIN = 30 ; -static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL1_TRAINED = 31 ; -static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL1_ENDPOINT_FIR0 = 32 ; -static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL1_ENDPOINT_FIR1 = 33 ; -static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL1_ENDPOINT_FIR2 = 34 ; -static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL1_ENDPOINT_FIR3 = 35 ; -static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL1_ENDPOINT_FIR4 = 36 ; -static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL1_ENDPOINT_FIR5 = 37 ; -static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL1_ENDPOINT_FIR6 = 38 ; -static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL1_ENDPOINT_FIR7 = 39 ; -static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL2_FATAL_ERROR = 40 ; -static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL2_DATA_UE = 41 ; -static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL2_FLIT_CE = 42 ; -static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL2_CRC_ERROR = 43 ; -static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL2_NACK = 44 ; -static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL2_X4_MODE = 45 ; -static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL2_EDPL = 46 ; -static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL2_TIMEOUT = 47 ; -static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL2_REMOTE_RETRAIN = 48 ; -static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL2_ERROR_RETRAIN = 49 ; -static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL2_EDPL_RETRAIN = 50 ; -static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL2_TRAINED = 51 ; -static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL2_ENDPOINT_FIR0 = 52 ; -static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL2_ENDPOINT_FIR1 = 53 ; -static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL2_ENDPOINT_FIR2 = 54 ; -static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL2_ENDPOINT_FIR3 = 55 ; -static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL2_ENDPOINT_FIR4 = 56 ; -static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL2_ENDPOINT_FIR5 = 57 ; -static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL2_ENDPOINT_FIR6 = 58 ; -static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL2_ENDPOINT_FIR7 = 59 ; -static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_PERF_MON_WRAPPED = 60 ; - -static const uint8_t EXPLR_DLX_MC_OMI_FIR_WOF_REG_WOF = 0 ; -static const uint8_t EXPLR_DLX_MC_OMI_FIR_WOF_REG_WOF_LEN = 64 ; - -static const uint8_t EXPLR_DLX_PMU_CNTR_CFG_PMU3 = 0 ; -static const uint8_t EXPLR_DLX_PMU_CNTR_CFG_PMU3_LEN = 16 ; -static const uint8_t EXPLR_DLX_PMU_CNTR_CFG_PMU2 = 16 ; -static const uint8_t EXPLR_DLX_PMU_CNTR_CFG_PMU2_LEN = 16 ; -static const uint8_t EXPLR_DLX_PMU_CNTR_CFG_PMU1 = 32 ; -static const uint8_t EXPLR_DLX_PMU_CNTR_CFG_PMU1_LEN = 16 ; -static const uint8_t EXPLR_DLX_PMU_CNTR_CFG_PMU0 = 48 ; -static const uint8_t EXPLR_DLX_PMU_CNTR_CFG_PMU0_LEN = 16 ; - -static const uint8_t EXPLR_MCBIST_CCSARRERRINJQ_CCS_ARRAY_CE_ERR_INJ_MODE = 0 ; -static const uint8_t EXPLR_MCBIST_CCSARRERRINJQ_CCS_ARRAY_CE_ERR_INJ = 1 ; -static const uint8_t EXPLR_MCBIST_CCSARRERRINJQ_CCS_ARRAY_UE_ERR_INJ_MODE = 2 ; -static const uint8_t EXPLR_MCBIST_CCSARRERRINJQ_CCS_ARRAY_UE_ERR_INJ = 3 ; -static const uint8_t EXPLR_MCBIST_CCSARRERRINJQ_RESERVED_4 = 4 ; -static const uint8_t EXPLR_MCBIST_CCSARRERRINJQ_DISABLE_2N_MODE = 5 ; -static const uint8_t EXPLR_MCBIST_CCSARRERRINJQ_RESERVED_6_14 = 6 ; -static const uint8_t EXPLR_MCBIST_CCSARRERRINJQ_RESERVED_6_14_LEN = 9 ; -static const uint8_t EXPLR_MCBIST_CCSARRERRINJQ_READ_RESPONSE_DELAY_ENABLE = 15 ; -static const uint8_t EXPLR_MCBIST_CCSARRERRINJQ_CCS_LOOP_COUNTER_COMPARE0 = 16 ; -static const uint8_t EXPLR_MCBIST_CCSARRERRINJQ_CCS_LOOP_COUNTER_COMPARE0_LEN = 16 ; -static const uint8_t EXPLR_MCBIST_CCSARRERRINJQ_CCS_LOOP_COUNTER_COMPARE1 = 32 ; -static const uint8_t EXPLR_MCBIST_CCSARRERRINJQ_CCS_LOOP_COUNTER_COMPARE1_LEN = 16 ; -static const uint8_t EXPLR_MCBIST_CCSARRERRINJQ_CCS_LOOP_COUNTER_COMPARE2 = 48 ; -static const uint8_t EXPLR_MCBIST_CCSARRERRINJQ_CCS_LOOP_COUNTER_COMPARE2_LEN = 16 ; - -static const uint8_t EXPLR_MCBIST_CCS_CNTLQ_START = 0 ; -static const uint8_t EXPLR_MCBIST_CCS_CNTLQ_STOP = 1 ; -static const uint8_t EXPLR_MCBIST_CCS_CNTLQ_UNPAUSE = 2 ; - -static const uint8_t EXPLR_MCBIST_CCS_FIXED_DATA0Q_DATA_0_63 = 0 ; -static const uint8_t EXPLR_MCBIST_CCS_FIXED_DATA0Q_DATA_0_63_LEN = 64 ; - -static const uint8_t EXPLR_MCBIST_CCS_FIXED_DATA1Q_DATA_64_79 = 0 ; -static const uint8_t EXPLR_MCBIST_CCS_FIXED_DATA1Q_DATA_64_79_LEN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_FIXED_DATA1Q_NTTM_READ_DELAY = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_FIXED_DATA1Q_NTTM_READ_DELAY_LEN = 16 ; - -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_00_DDR_ADDRESS_0_13 = 0 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_00_DDR_ADDRESS_0_13_LEN = 14 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_00_DDR_ADDRESS_17 = 14 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_00_DDR_BANK_GROUP_1 = 15 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_00_DDR_RESETN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_00_DDR_BANK_0_1 = 17 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_00_DDR_BANK_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_00_DDR_BANK_GROUP_0 = 19 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_00_DDR_ACTN = 20 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_00_DDR_ADDRESS_16 = 21 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_00_DDR_ADDRESS_15 = 22 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_00_DDR_ADDRESS_14 = 23 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_00_DDR_CKE = 24 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_00_DDR_CKE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_00_RESERVED_28_31 = 28 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_00_RESERVED_28_31_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_00_DDR_CSN_0_1 = 32 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_00_DDR_CSN_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_00_DDR_CID_0_1 = 34 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_00_DDR_CID_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_00_DDR_CSN_2_3 = 36 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_00_DDR_CSN_2_3_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_00_DDR_CID_2 = 38 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_00_RESERVED_39 = 39 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_00_NESTED_LOOP_CNT = 40 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_00_NESTED_LOOP_CNT_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_00_DDR_ODT = 48 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_00_DDR_ODT_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_00_RESERVED_52_54 = 52 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_00_RESERVED_52_54_LEN = 3 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_00_PAUSE_INSTR = 55 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_00_DDR_CAL_TYPE = 56 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_00_DDR_CAL_TYPE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_00_DDR_PARITY = 60 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_00_DDR_BANK_2 = 61 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_00_LOOP_BREAK_MODE = 62 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_00_LOOP_BREAK_MODE_LEN = 2 ; - -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_01_DDR_ADDRESS_0_13 = 0 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_01_DDR_ADDRESS_0_13_LEN = 14 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_01_DDR_ADDRESS_17 = 14 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_01_DDR_BANK_GROUP_1 = 15 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_01_DDR_RESETN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_01_DDR_BANK_0_1 = 17 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_01_DDR_BANK_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_01_DDR_BANK_GROUP_0 = 19 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_01_DDR_ACTN = 20 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_01_DDR_ADDRESS_16 = 21 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_01_DDR_ADDRESS_15 = 22 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_01_DDR_ADDRESS_14 = 23 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_01_DDR_CKE = 24 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_01_DDR_CKE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_01_RESERVED_28_31 = 28 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_01_RESERVED_28_31_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_01_DDR_CSN_0_1 = 32 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_01_DDR_CSN_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_01_DDR_CID_0_1 = 34 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_01_DDR_CID_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_01_DDR_CSN_2_3 = 36 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_01_DDR_CSN_2_3_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_01_DDR_CID_2 = 38 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_01_RESERVED_39 = 39 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_01_NESTED_LOOP_CNT = 40 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_01_NESTED_LOOP_CNT_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_01_DDR_ODT = 48 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_01_DDR_ODT_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_01_RESERVED_52_54 = 52 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_01_RESERVED_52_54_LEN = 3 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_01_PAUSE_INSTR = 55 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_01_DDR_CAL_TYPE = 56 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_01_DDR_CAL_TYPE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_01_DDR_PARITY = 60 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_01_DDR_BANK_2 = 61 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_01_LOOP_BREAK_MODE = 62 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_01_LOOP_BREAK_MODE_LEN = 2 ; - -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_02_DDR_ADDRESS_0_13 = 0 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_02_DDR_ADDRESS_0_13_LEN = 14 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_02_DDR_ADDRESS_17 = 14 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_02_DDR_BANK_GROUP_1 = 15 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_02_DDR_RESETN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_02_DDR_BANK_0_1 = 17 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_02_DDR_BANK_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_02_DDR_BANK_GROUP_0 = 19 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_02_DDR_ACTN = 20 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_02_DDR_ADDRESS_16 = 21 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_02_DDR_ADDRESS_15 = 22 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_02_DDR_ADDRESS_14 = 23 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_02_DDR_CKE = 24 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_02_DDR_CKE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_02_RESERVED_28_31 = 28 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_02_RESERVED_28_31_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_02_DDR_CSN_0_1 = 32 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_02_DDR_CSN_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_02_DDR_CID_0_1 = 34 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_02_DDR_CID_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_02_DDR_CSN_2_3 = 36 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_02_DDR_CSN_2_3_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_02_DDR_CID_2 = 38 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_02_RESERVED_39 = 39 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_02_NESTED_LOOP_CNT = 40 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_02_NESTED_LOOP_CNT_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_02_DDR_ODT = 48 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_02_DDR_ODT_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_02_RESERVED_52_54 = 52 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_02_RESERVED_52_54_LEN = 3 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_02_PAUSE_INSTR = 55 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_02_DDR_CAL_TYPE = 56 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_02_DDR_CAL_TYPE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_02_DDR_PARITY = 60 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_02_DDR_BANK_2 = 61 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_02_LOOP_BREAK_MODE = 62 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_02_LOOP_BREAK_MODE_LEN = 2 ; - -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_03_DDR_ADDRESS_0_13 = 0 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_03_DDR_ADDRESS_0_13_LEN = 14 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_03_DDR_ADDRESS_17 = 14 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_03_DDR_BANK_GROUP_1 = 15 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_03_DDR_RESETN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_03_DDR_BANK_0_1 = 17 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_03_DDR_BANK_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_03_DDR_BANK_GROUP_0 = 19 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_03_DDR_ACTN = 20 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_03_DDR_ADDRESS_16 = 21 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_03_DDR_ADDRESS_15 = 22 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_03_DDR_ADDRESS_14 = 23 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_03_DDR_CKE = 24 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_03_DDR_CKE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_03_RESERVED_28_31 = 28 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_03_RESERVED_28_31_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_03_DDR_CSN_0_1 = 32 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_03_DDR_CSN_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_03_DDR_CID_0_1 = 34 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_03_DDR_CID_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_03_DDR_CSN_2_3 = 36 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_03_DDR_CSN_2_3_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_03_DDR_CID_2 = 38 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_03_RESERVED_39 = 39 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_03_NESTED_LOOP_CNT = 40 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_03_NESTED_LOOP_CNT_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_03_DDR_ODT = 48 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_03_DDR_ODT_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_03_RESERVED_52_54 = 52 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_03_RESERVED_52_54_LEN = 3 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_03_PAUSE_INSTR = 55 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_03_DDR_CAL_TYPE = 56 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_03_DDR_CAL_TYPE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_03_DDR_PARITY = 60 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_03_DDR_BANK_2 = 61 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_03_LOOP_BREAK_MODE = 62 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_03_LOOP_BREAK_MODE_LEN = 2 ; - -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_04_DDR_ADDRESS_0_13 = 0 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_04_DDR_ADDRESS_0_13_LEN = 14 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_04_DDR_ADDRESS_17 = 14 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_04_DDR_BANK_GROUP_1 = 15 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_04_DDR_RESETN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_04_DDR_BANK_0_1 = 17 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_04_DDR_BANK_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_04_DDR_BANK_GROUP_0 = 19 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_04_DDR_ACTN = 20 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_04_DDR_ADDRESS_16 = 21 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_04_DDR_ADDRESS_15 = 22 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_04_DDR_ADDRESS_14 = 23 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_04_DDR_CKE = 24 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_04_DDR_CKE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_04_RESERVED_28_31 = 28 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_04_RESERVED_28_31_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_04_DDR_CSN_0_1 = 32 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_04_DDR_CSN_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_04_DDR_CID_0_1 = 34 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_04_DDR_CID_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_04_DDR_CSN_2_3 = 36 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_04_DDR_CSN_2_3_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_04_DDR_CID_2 = 38 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_04_RESERVED_39 = 39 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_04_NESTED_LOOP_CNT = 40 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_04_NESTED_LOOP_CNT_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_04_DDR_ODT = 48 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_04_DDR_ODT_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_04_RESERVED_52_54 = 52 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_04_RESERVED_52_54_LEN = 3 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_04_PAUSE_INSTR = 55 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_04_DDR_CAL_TYPE = 56 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_04_DDR_CAL_TYPE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_04_DDR_PARITY = 60 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_04_DDR_BANK_2 = 61 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_04_LOOP_BREAK_MODE = 62 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_04_LOOP_BREAK_MODE_LEN = 2 ; - -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_05_DDR_ADDRESS_0_13 = 0 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_05_DDR_ADDRESS_0_13_LEN = 14 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_05_DDR_ADDRESS_17 = 14 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_05_DDR_BANK_GROUP_1 = 15 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_05_DDR_RESETN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_05_DDR_BANK_0_1 = 17 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_05_DDR_BANK_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_05_DDR_BANK_GROUP_0 = 19 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_05_DDR_ACTN = 20 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_05_DDR_ADDRESS_16 = 21 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_05_DDR_ADDRESS_15 = 22 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_05_DDR_ADDRESS_14 = 23 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_05_DDR_CKE = 24 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_05_DDR_CKE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_05_RESERVED_28_31 = 28 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_05_RESERVED_28_31_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_05_DDR_CSN_0_1 = 32 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_05_DDR_CSN_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_05_DDR_CID_0_1 = 34 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_05_DDR_CID_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_05_DDR_CSN_2_3 = 36 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_05_DDR_CSN_2_3_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_05_DDR_CID_2 = 38 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_05_RESERVED_39 = 39 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_05_NESTED_LOOP_CNT = 40 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_05_NESTED_LOOP_CNT_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_05_DDR_ODT = 48 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_05_DDR_ODT_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_05_RESERVED_52_54 = 52 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_05_RESERVED_52_54_LEN = 3 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_05_PAUSE_INSTR = 55 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_05_DDR_CAL_TYPE = 56 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_05_DDR_CAL_TYPE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_05_DDR_PARITY = 60 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_05_DDR_BANK_2 = 61 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_05_LOOP_BREAK_MODE = 62 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_05_LOOP_BREAK_MODE_LEN = 2 ; - -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_06_DDR_ADDRESS_0_13 = 0 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_06_DDR_ADDRESS_0_13_LEN = 14 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_06_DDR_ADDRESS_17 = 14 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_06_DDR_BANK_GROUP_1 = 15 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_06_DDR_RESETN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_06_DDR_BANK_0_1 = 17 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_06_DDR_BANK_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_06_DDR_BANK_GROUP_0 = 19 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_06_DDR_ACTN = 20 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_06_DDR_ADDRESS_16 = 21 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_06_DDR_ADDRESS_15 = 22 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_06_DDR_ADDRESS_14 = 23 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_06_DDR_CKE = 24 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_06_DDR_CKE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_06_RESERVED_28_31 = 28 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_06_RESERVED_28_31_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_06_DDR_CSN_0_1 = 32 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_06_DDR_CSN_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_06_DDR_CID_0_1 = 34 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_06_DDR_CID_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_06_DDR_CSN_2_3 = 36 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_06_DDR_CSN_2_3_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_06_DDR_CID_2 = 38 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_06_RESERVED_39 = 39 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_06_NESTED_LOOP_CNT = 40 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_06_NESTED_LOOP_CNT_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_06_DDR_ODT = 48 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_06_DDR_ODT_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_06_RESERVED_52_54 = 52 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_06_RESERVED_52_54_LEN = 3 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_06_PAUSE_INSTR = 55 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_06_DDR_CAL_TYPE = 56 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_06_DDR_CAL_TYPE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_06_DDR_PARITY = 60 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_06_DDR_BANK_2 = 61 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_06_LOOP_BREAK_MODE = 62 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_06_LOOP_BREAK_MODE_LEN = 2 ; - -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_07_DDR_ADDRESS_0_13 = 0 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_07_DDR_ADDRESS_0_13_LEN = 14 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_07_DDR_ADDRESS_17 = 14 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_07_DDR_BANK_GROUP_1 = 15 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_07_DDR_RESETN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_07_DDR_BANK_0_1 = 17 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_07_DDR_BANK_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_07_DDR_BANK_GROUP_0 = 19 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_07_DDR_ACTN = 20 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_07_DDR_ADDRESS_16 = 21 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_07_DDR_ADDRESS_15 = 22 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_07_DDR_ADDRESS_14 = 23 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_07_DDR_CKE = 24 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_07_DDR_CKE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_07_RESERVED_28_31 = 28 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_07_RESERVED_28_31_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_07_DDR_CSN_0_1 = 32 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_07_DDR_CSN_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_07_DDR_CID_0_1 = 34 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_07_DDR_CID_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_07_DDR_CSN_2_3 = 36 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_07_DDR_CSN_2_3_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_07_DDR_CID_2 = 38 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_07_RESERVED_39 = 39 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_07_NESTED_LOOP_CNT = 40 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_07_NESTED_LOOP_CNT_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_07_DDR_ODT = 48 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_07_DDR_ODT_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_07_RESERVED_52_54 = 52 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_07_RESERVED_52_54_LEN = 3 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_07_PAUSE_INSTR = 55 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_07_DDR_CAL_TYPE = 56 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_07_DDR_CAL_TYPE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_07_DDR_PARITY = 60 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_07_DDR_BANK_2 = 61 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_07_LOOP_BREAK_MODE = 62 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_07_LOOP_BREAK_MODE_LEN = 2 ; - -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_08_DDR_ADDRESS_0_13 = 0 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_08_DDR_ADDRESS_0_13_LEN = 14 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_08_DDR_ADDRESS_17 = 14 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_08_DDR_BANK_GROUP_1 = 15 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_08_DDR_RESETN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_08_DDR_BANK_0_1 = 17 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_08_DDR_BANK_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_08_DDR_BANK_GROUP_0 = 19 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_08_DDR_ACTN = 20 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_08_DDR_ADDRESS_16 = 21 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_08_DDR_ADDRESS_15 = 22 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_08_DDR_ADDRESS_14 = 23 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_08_DDR_CKE = 24 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_08_DDR_CKE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_08_RESERVED_28_31 = 28 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_08_RESERVED_28_31_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_08_DDR_CSN_0_1 = 32 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_08_DDR_CSN_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_08_DDR_CID_0_1 = 34 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_08_DDR_CID_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_08_DDR_CSN_2_3 = 36 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_08_DDR_CSN_2_3_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_08_DDR_CID_2 = 38 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_08_RESERVED_39 = 39 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_08_NESTED_LOOP_CNT = 40 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_08_NESTED_LOOP_CNT_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_08_DDR_ODT = 48 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_08_DDR_ODT_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_08_RESERVED_52_54 = 52 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_08_RESERVED_52_54_LEN = 3 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_08_PAUSE_INSTR = 55 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_08_DDR_CAL_TYPE = 56 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_08_DDR_CAL_TYPE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_08_DDR_PARITY = 60 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_08_DDR_BANK_2 = 61 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_08_LOOP_BREAK_MODE = 62 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_08_LOOP_BREAK_MODE_LEN = 2 ; - -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_09_DDR_ADDRESS_0_13 = 0 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_09_DDR_ADDRESS_0_13_LEN = 14 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_09_DDR_ADDRESS_17 = 14 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_09_DDR_BANK_GROUP_1 = 15 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_09_DDR_RESETN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_09_DDR_BANK_0_1 = 17 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_09_DDR_BANK_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_09_DDR_BANK_GROUP_0 = 19 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_09_DDR_ACTN = 20 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_09_DDR_ADDRESS_16 = 21 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_09_DDR_ADDRESS_15 = 22 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_09_DDR_ADDRESS_14 = 23 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_09_DDR_CKE = 24 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_09_DDR_CKE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_09_RESERVED_28_31 = 28 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_09_RESERVED_28_31_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_09_DDR_CSN_0_1 = 32 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_09_DDR_CSN_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_09_DDR_CID_0_1 = 34 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_09_DDR_CID_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_09_DDR_CSN_2_3 = 36 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_09_DDR_CSN_2_3_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_09_DDR_CID_2 = 38 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_09_RESERVED_39 = 39 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_09_NESTED_LOOP_CNT = 40 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_09_NESTED_LOOP_CNT_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_09_DDR_ODT = 48 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_09_DDR_ODT_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_09_RESERVED_52_54 = 52 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_09_RESERVED_52_54_LEN = 3 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_09_PAUSE_INSTR = 55 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_09_DDR_CAL_TYPE = 56 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_09_DDR_CAL_TYPE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_09_DDR_PARITY = 60 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_09_DDR_BANK_2 = 61 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_09_LOOP_BREAK_MODE = 62 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_09_LOOP_BREAK_MODE_LEN = 2 ; - -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_10_DDR_ADDRESS_0_13 = 0 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_10_DDR_ADDRESS_0_13_LEN = 14 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_10_DDR_ADDRESS_17 = 14 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_10_DDR_BANK_GROUP_1 = 15 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_10_DDR_RESETN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_10_DDR_BANK_0_1 = 17 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_10_DDR_BANK_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_10_DDR_BANK_GROUP_0 = 19 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_10_DDR_ACTN = 20 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_10_DDR_ADDRESS_16 = 21 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_10_DDR_ADDRESS_15 = 22 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_10_DDR_ADDRESS_14 = 23 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_10_DDR_CKE = 24 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_10_DDR_CKE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_10_RESERVED_28_31 = 28 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_10_RESERVED_28_31_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_10_DDR_CSN_0_1 = 32 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_10_DDR_CSN_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_10_DDR_CID_0_1 = 34 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_10_DDR_CID_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_10_DDR_CSN_2_3 = 36 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_10_DDR_CSN_2_3_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_10_DDR_CID_2 = 38 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_10_RESERVED_39 = 39 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_10_NESTED_LOOP_CNT = 40 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_10_NESTED_LOOP_CNT_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_10_DDR_ODT = 48 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_10_DDR_ODT_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_10_RESERVED_52_54 = 52 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_10_RESERVED_52_54_LEN = 3 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_10_PAUSE_INSTR = 55 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_10_DDR_CAL_TYPE = 56 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_10_DDR_CAL_TYPE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_10_DDR_PARITY = 60 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_10_DDR_BANK_2 = 61 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_10_LOOP_BREAK_MODE = 62 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_10_LOOP_BREAK_MODE_LEN = 2 ; - -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_11_DDR_ADDRESS_0_13 = 0 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_11_DDR_ADDRESS_0_13_LEN = 14 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_11_DDR_ADDRESS_17 = 14 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_11_DDR_BANK_GROUP_1 = 15 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_11_DDR_RESETN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_11_DDR_BANK_0_1 = 17 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_11_DDR_BANK_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_11_DDR_BANK_GROUP_0 = 19 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_11_DDR_ACTN = 20 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_11_DDR_ADDRESS_16 = 21 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_11_DDR_ADDRESS_15 = 22 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_11_DDR_ADDRESS_14 = 23 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_11_DDR_CKE = 24 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_11_DDR_CKE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_11_RESERVED_28_31 = 28 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_11_RESERVED_28_31_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_11_DDR_CSN_0_1 = 32 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_11_DDR_CSN_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_11_DDR_CID_0_1 = 34 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_11_DDR_CID_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_11_DDR_CSN_2_3 = 36 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_11_DDR_CSN_2_3_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_11_DDR_CID_2 = 38 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_11_RESERVED_39 = 39 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_11_NESTED_LOOP_CNT = 40 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_11_NESTED_LOOP_CNT_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_11_DDR_ODT = 48 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_11_DDR_ODT_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_11_RESERVED_52_54 = 52 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_11_RESERVED_52_54_LEN = 3 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_11_PAUSE_INSTR = 55 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_11_DDR_CAL_TYPE = 56 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_11_DDR_CAL_TYPE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_11_DDR_PARITY = 60 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_11_DDR_BANK_2 = 61 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_11_LOOP_BREAK_MODE = 62 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_11_LOOP_BREAK_MODE_LEN = 2 ; - -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_12_DDR_ADDRESS_0_13 = 0 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_12_DDR_ADDRESS_0_13_LEN = 14 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_12_DDR_ADDRESS_17 = 14 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_12_DDR_BANK_GROUP_1 = 15 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_12_DDR_RESETN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_12_DDR_BANK_0_1 = 17 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_12_DDR_BANK_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_12_DDR_BANK_GROUP_0 = 19 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_12_DDR_ACTN = 20 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_12_DDR_ADDRESS_16 = 21 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_12_DDR_ADDRESS_15 = 22 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_12_DDR_ADDRESS_14 = 23 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_12_DDR_CKE = 24 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_12_DDR_CKE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_12_RESERVED_28_31 = 28 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_12_RESERVED_28_31_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_12_DDR_CSN_0_1 = 32 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_12_DDR_CSN_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_12_DDR_CID_0_1 = 34 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_12_DDR_CID_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_12_DDR_CSN_2_3 = 36 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_12_DDR_CSN_2_3_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_12_DDR_CID_2 = 38 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_12_RESERVED_39 = 39 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_12_NESTED_LOOP_CNT = 40 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_12_NESTED_LOOP_CNT_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_12_DDR_ODT = 48 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_12_DDR_ODT_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_12_RESERVED_52_54 = 52 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_12_RESERVED_52_54_LEN = 3 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_12_PAUSE_INSTR = 55 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_12_DDR_CAL_TYPE = 56 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_12_DDR_CAL_TYPE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_12_DDR_PARITY = 60 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_12_DDR_BANK_2 = 61 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_12_LOOP_BREAK_MODE = 62 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_12_LOOP_BREAK_MODE_LEN = 2 ; - -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_13_DDR_ADDRESS_0 = 0 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_13_DDR_ADDRESS_0_LEN = 14 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_13_DDR_ADDRESS_17 = 14 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_13_DDR_BANK_GROUP_1 = 15 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_13_DDR_RESETN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_13_DDR_BANK_0_1 = 17 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_13_DDR_BANK_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_13_DDR_BANK_GROUP_0 = 19 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_13_DDR_ACTN = 20 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_13_DDR_ADDRESS_16 = 21 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_13_DDR_ADDRESS_15 = 22 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_13_DDR_ADDRESS_14 = 23 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_13_DDR_CKE = 24 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_13_DDR_CKE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_13_RESERVED_28_31 = 28 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_13_RESERVED_28_31_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_13_DDR_CSN_0_1 = 32 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_13_DDR_CSN_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_13_DDR_CID_0_1 = 34 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_13_DDR_CID_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_13_DDR_CSN_2_3 = 36 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_13_DDR_CSN_2_3_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_13_DDR_CID_2 = 38 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_13_RESERVED_39 = 39 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_13_NESTED_LOOP_CNT = 40 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_13_NESTED_LOOP_CNT_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_13_DDR_ODT = 48 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_13_DDR_ODT_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_13_RESERVED_52_54 = 52 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_13_RESERVED_52_54_LEN = 3 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_13_PAUSE_INSTR = 55 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_13_DDR_CAL_TYPE = 56 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_13_DDR_CAL_TYPE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_13_DDR_PARITY = 60 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_13_DDR_BANK_2 = 61 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_13_LOOP_BREAK_MODE = 62 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_13_LOOP_BREAK_MODE_LEN = 2 ; - -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_14_DDR_ADDRESS_0_13 = 0 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_14_DDR_ADDRESS_0_13_LEN = 14 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_14_DDR_ADDRESS_17 = 14 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_14_DDR_BANK_GROUP_1 = 15 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_14_DDR_RESETN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_14_DDR_BANK_0_1 = 17 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_14_DDR_BANK_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_14_DDR_BANK_GROUP_0 = 19 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_14_DDR_ACTN = 20 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_14_DDR_ADDRESS_16 = 21 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_14_DDR_ADDRESS_15 = 22 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_14_DDR_ADDRESS = 23 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_14_DDR_CKE = 24 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_14_DDR_CKE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_14_RESERVED_28_31 = 28 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_14_RESERVED_28_31_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_14_DDR_CSN_0_1 = 32 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_14_DDR_CSN_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_14_DDR_CID_0_1 = 34 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_14_DDR_CID_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_14_DDR_CSN_2_3 = 36 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_14_DDR_CSN_2_3_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_14_DDR_CID_2 = 38 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_14_RESERVED_39 = 39 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_14_NESTED_LOOP_CNT = 40 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_14_NESTED_LOOP_CNT_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_14_DDR_ODT = 48 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_14_DDR_ODT_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_14_RESERVED_52_54 = 52 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_14_RESERVED_52_54_LEN = 3 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_14_PAUSE_INSTR = 55 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_14_DDR_CAL_TYPE = 56 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_14_DDR_CAL_TYPE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_14_DDR_PARITY = 60 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_14_DDR_BANK_2 = 61 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_14_LOOP_BREAK_MODE = 62 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_14_LOOP_BREAK_MODE_LEN = 2 ; - -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_15_DDR_ADDRESS_0_13 = 0 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_15_DDR_ADDRESS_0_13_LEN = 14 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_15_DDR_ADDRESS_17 = 14 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_15_DDR_BANK_GROUP_1 = 15 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_15_DDR_RESETN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_15_DDR_BANK_0_1 = 17 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_15_DDR_BANK_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_15_DDR_BANK_GROUP_0 = 19 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_15_DDR_ACTN = 20 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_15_DDR_ADDRESS_16 = 21 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_15_DDR_ADDRESS = 22 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_15_DDR_ADDRESS_14 = 23 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_15_DDR_CKE = 24 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_15_DDR_CKE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_15_RESERVED_28_31 = 28 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_15_RESERVED_28_31_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_15_DDR_CSN_0_1 = 32 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_15_DDR_CSN_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_15_DDR_CID_0_1 = 34 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_15_DDR_CID_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_15_DDR_CSN_2_3 = 36 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_15_DDR_CSN_2_3_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_15_DDR_CID_2 = 38 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_15_RESERVED_39 = 39 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_15_NESTED_LOOP_CNT = 40 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_15_NESTED_LOOP_CNT_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_15_DDR_ODT = 48 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_15_DDR_ODT_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_15_RESERVED_52_54 = 52 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_15_RESERVED_52_54_LEN = 3 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_15_PAUSE_INSTR = 55 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_15_DDR_CAL_TYPE = 56 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_15_DDR_CAL_TYPE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_15_DDR_PARITY = 60 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_15_DDR_BANK_2 = 61 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_15_LOOP_BREAK_MODE = 62 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_15_LOOP_BREAK_MODE_LEN = 2 ; - -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_16_DDR_ADDRESS_0_13 = 0 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_16_DDR_ADDRESS_0_13_LEN = 14 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_16_DDR_ADDRESS_17 = 14 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_16_DDR_BANK_GROUP_1 = 15 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_16_DDR_RESETN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_16_DDR_BANK_0_1 = 17 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_16_DDR_BANK_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_16_DDR_BANK_GROUP_0 = 19 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_16_DDR_ACTN = 20 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_16_DDR_ADDRESS = 21 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_16_DDR_ADDRESS_15 = 22 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_16_DDR_ADDRESS_14 = 23 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_16_DDR_CKE = 24 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_16_DDR_CKE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_16_RESERVED_28_31 = 28 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_16_RESERVED_28_31_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_16_DDR_CSN_0_1 = 32 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_16_DDR_CSN_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_16_DDR_CID_0_1 = 34 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_16_DDR_CID_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_16_DDR_CSN_2_3 = 36 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_16_DDR_CSN_2_3_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_16_DDR_CID_2 = 38 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_16_RESERVED_39 = 39 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_16_NESTED_LOOP_CNT = 40 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_16_NESTED_LOOP_CNT_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_16_DDR_ODT = 48 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_16_DDR_ODT_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_16_RESERVED_52_54 = 52 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_16_RESERVED_52_54_LEN = 3 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_16_PAUSE_INSTR = 55 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_16_DDR_CAL_TYPE = 56 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_16_DDR_CAL_TYPE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_16_DDR_PARITY = 60 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_16_DDR_BANK_2 = 61 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_16_LOOP_BREAK_MODE = 62 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_16_LOOP_BREAK_MODE_LEN = 2 ; - -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_17_DDR_ADDRESS_0_13 = 0 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_17_DDR_ADDRESS_0_13_LEN = 14 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_17_DDR_ADDRESS = 14 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_17_DDR_BANK_GROUP_1 = 15 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_17_DDR_RESETN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_17_DDR_BANK_0_1 = 17 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_17_DDR_BANK_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_17_DDR_BANK_GROUP_0 = 19 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_17_DDR_ACTN = 20 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_17_DDR_ADDRESS_16 = 21 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_17_DDR_ADDRESS_15 = 22 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_17_DDR_ADDRESS_14 = 23 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_17_DDR_CKE = 24 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_17_DDR_CKE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_17_RESERVED_28_31 = 28 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_17_RESERVED_28_31_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_17_DDR_CSN_0_1 = 32 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_17_DDR_CSN_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_17_DDR_CID_0_1 = 34 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_17_DDR_CID_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_17_DDR_CSN_2_3 = 36 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_17_DDR_CSN_2_3_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_17_DDR_CID_2 = 38 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_17_RESERVED_39 = 39 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_17_NESTED_LOOP_CNT = 40 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_17_NESTED_LOOP_CNT_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_17_DDR_ODT = 48 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_17_DDR_ODT_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_17_RESERVED_52_54 = 52 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_17_RESERVED_52_54_LEN = 3 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_17_PAUSE_INSTR = 55 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_17_DDR_CAL_TYPE = 56 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_17_DDR_CAL_TYPE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_17_DDR_PARITY = 60 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_17_DDR_BANK_2 = 61 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_17_LOOP_BREAK_MODE = 62 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_17_LOOP_BREAK_MODE_LEN = 2 ; - -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_18_DDR_ADDRESS_0_13 = 0 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_18_DDR_ADDRESS_0_13_LEN = 14 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_18_DDR_ADDRESS_17 = 14 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_18_DDR_BANK_GROUP_1 = 15 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_18_DDR_RESETN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_18_DDR_BANK_0_1 = 17 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_18_DDR_BANK_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_18_DDR_BANK_GROUP_0 = 19 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_18_DDR_ACTN = 20 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_18_DDR_ADDRESS_16 = 21 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_18_DDR_ADDRESS_15 = 22 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_18_DDR_ADDRESS_14 = 23 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_18_DDR_CKE = 24 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_18_DDR_CKE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_18_RESERVED_28_31 = 28 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_18_RESERVED_28_31_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_18_DDR_CSN_0_1 = 32 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_18_DDR_CSN_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_18_DDR_CID_0_1 = 34 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_18_DDR_CID_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_18_DDR_CSN_2_3 = 36 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_18_DDR_CSN_2_3_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_18_DDR_CID_2 = 38 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_18_RESERVED_39 = 39 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_18_NESTED_LOOP_CNT = 40 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_18_NESTED_LOOP_CNT_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_18_DDR_ODT = 48 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_18_DDR_ODT_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_18_RESERVED_52_54 = 52 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_18_RESERVED_52_54_LEN = 3 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_18_PAUSE_INSTR = 55 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_18_DDR_CAL_TYPE = 56 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_18_DDR_CAL_TYPE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_18_DDR_PARITY = 60 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_18_DDR_BANK_2 = 61 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_18_LOOP_BREAK_MODE = 62 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_18_LOOP_BREAK_MODE_LEN = 2 ; - -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_19_DDR_ADDRESS_0_13 = 0 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_19_DDR_ADDRESS_0_13_LEN = 14 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_19_DDR_ADDRESS_17 = 14 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_19_DDR_BANK_GROUP_1 = 15 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_19_DDR_RESETN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_19_DDR_BANK_0_1 = 17 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_19_DDR_BANK_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_19_DDR_BANK_GROUP_0 = 19 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_19_DDR_ACTN = 20 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_19_DDR_ADDRESS_16 = 21 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_19_DDR_ADDRESS_15 = 22 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_19_DDR_ADDRESS_14 = 23 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_19_DDR_CKE = 24 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_19_DDR_CKE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_19_RESERVED_28_31 = 28 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_19_RESERVED_28_31_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_19_DDR_CSN_0_1 = 32 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_19_DDR_CSN_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_19_DDR_CID_0_1 = 34 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_19_DDR_CID_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_19_DDR_CSN_2_3 = 36 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_19_DDR_CSN_2_3_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_19_DDR_CID_2 = 38 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_19_RESERVED_39 = 39 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_19_NESTED_LOOP_CNT = 40 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_19_NESTED_LOOP_CNT_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_19_DDR_ODT = 48 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_19_DDR_ODT_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_19_RESERVED_52_54 = 52 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_19_RESERVED_52_54_LEN = 3 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_19_PAUSE_INSTR = 55 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_19_DDR_CAL_TYPE = 56 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_19_DDR_CAL_TYPE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_19_DDR_PARITY = 60 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_19_DDR_BANK_2 = 61 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_19_LOOP_BREAK_MODE = 62 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_19_LOOP_BREAK_MODE_LEN = 2 ; - -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_20_DDR_ADDRESS_0_13 = 0 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_20_DDR_ADDRESS_0_13_LEN = 14 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_20_DDR_ADDRESS_17 = 14 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_20_DDR_BANK_GROUP_1 = 15 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_20_DDR_RESETN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_20_DDR_BANK_0_1 = 17 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_20_DDR_BANK_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_20_DDR_BANK_GROUP_0 = 19 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_20_DDR_ACTN = 20 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_20_DDR_ADDRESS_16 = 21 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_20_DDR_ADDRESS_15 = 22 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_20_DDR_ADDRESS_14 = 23 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_20_DDR_CKE = 24 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_20_DDR_CKE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_20_RESERVED_28_31 = 28 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_20_RESERVED_28_31_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_20_DDR_CSN_0_1 = 32 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_20_DDR_CSN_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_20_DDR_CID_0_1 = 34 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_20_DDR_CID_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_20_DDR_CSN_2_3 = 36 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_20_DDR_CSN_2_3_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_20_DDR_CID_2 = 38 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_20_RESERVED_39 = 39 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_20_NESTED_LOOP_CNT = 40 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_20_NESTED_LOOP_CNT_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_20_DDR_ODT = 48 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_20_DDR_ODT_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_20_RESERVED_52_54 = 52 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_20_RESERVED_52_54_LEN = 3 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_20_PAUSE_INSTR = 55 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_20_DDR_CAL_TYPE = 56 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_20_DDR_CAL_TYPE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_20_DDR_PARITY = 60 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_20_DDR_BANK_2 = 61 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_20_LOOP_BREAK_MODE = 62 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_20_LOOP_BREAK_MODE_LEN = 2 ; - -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_21_DDR_ADDRESS_0_13 = 0 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_21_DDR_ADDRESS_0_13_LEN = 14 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_21_DDR_ADDRESS_17 = 14 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_21_DDR_BANK_GROUP_1 = 15 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_21_DDR_RESETN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_21_DDR_BANK_0_1 = 17 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_21_DDR_BANK_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_21_DDR_BANK_GROUP_0 = 19 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_21_DDR_ACTN = 20 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_21_DDR_ADDRESS_16 = 21 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_21_DDR_ADDRESS_15 = 22 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_21_DDR_ADDRESS_14 = 23 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_21_DDR_CKE = 24 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_21_DDR_CKE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_21_RESERVED_28_31 = 28 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_21_RESERVED_28_31_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_21_DDR_CSN_0_1 = 32 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_21_DDR_CSN_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_21_DDR_CID_0_1 = 34 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_21_DDR_CID_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_21_DDR_CSN_2_3 = 36 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_21_DDR_CSN_2_3_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_21_DDR_CID_2 = 38 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_21_RESERVED_39 = 39 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_21_NESTED_LOOP_CNT = 40 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_21_NESTED_LOOP_CNT_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_21_DDR_ODT = 48 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_21_DDR_ODT_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_21_RESERVED_52_54 = 52 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_21_RESERVED_52_54_LEN = 3 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_21_PAUSE_INSTR = 55 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_21_DDR_CAL_TYPE = 56 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_21_DDR_CAL_TYPE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_21_DDR_PARITY = 60 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_21_DDR_BANK_2 = 61 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_21_LOOP_BREAK_MODE = 62 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_21_LOOP_BREAK_MODE_LEN = 2 ; - -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_22_DDR_ADDRESS_0_13 = 0 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_22_DDR_ADDRESS_0_13_LEN = 14 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_22_DDR_ADDRESS_17 = 14 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_22_DDR_BANK_GROUP_1 = 15 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_22_DDR_RESETN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_22_DDR_BANK_0_1 = 17 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_22_DDR_BANK_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_22_DDR_BANK_GROUP_0 = 19 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_22_DDR_ACTN = 20 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_22_DDR_ADDRESS_16 = 21 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_22_DDR_ADDRESS_15 = 22 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_22_DDR_ADDRESS_14 = 23 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_22_DDR_CKE = 24 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_22_DDR_CKE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_22_RESERVED_28_31 = 28 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_22_RESERVED_28_31_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_22_DDR_CSN_0_1 = 32 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_22_DDR_CSN_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_22_DDR_CID_0_1 = 34 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_22_DDR_CID_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_22_DDR_CSN_2_3 = 36 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_22_DDR_CSN_2_3_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_22_DDR_CID_2 = 38 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_22_RESERVED_39 = 39 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_22_NESTED_LOOP_CNT = 40 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_22_NESTED_LOOP_CNT_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_22_DDR_ODT = 48 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_22_DDR_ODT_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_22_RESERVED_52_54 = 52 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_22_RESERVED_52_54_LEN = 3 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_22_PAUSE_INSTR = 55 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_22_DDR_CAL_TYPE = 56 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_22_DDR_CAL_TYPE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_22_DDR_PARITY = 60 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_22_DDR_BANK_2 = 61 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_22_LOOP_BREAK_MODE = 62 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_22_LOOP_BREAK_MODE_LEN = 2 ; - -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_23_DDR_ADDRESS_0_13 = 0 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_23_DDR_ADDRESS_0_13_LEN = 14 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_23_DDR_ADDRESS_17 = 14 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_23_DDR_BANK_GROUP_1 = 15 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_23_DDR_RESETN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_23_DDR_BANK_0_1 = 17 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_23_DDR_BANK_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_23_DDR_BANK_GROUP_0 = 19 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_23_DDR_ACTN = 20 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_23_DDR_ADDRESS_16 = 21 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_23_DDR_ADDRESS_15 = 22 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_23_DDR_ADDRESS_14 = 23 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_23_DDR_CKE = 24 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_23_DDR_CKE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_23_RESERVED_28_31 = 28 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_23_RESERVED_28_31_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_23_DDR_CSN_0_1 = 32 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_23_DDR_CSN_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_23_DDR_CID_0_1 = 34 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_23_DDR_CID_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_23_DDR_CSN_2_3 = 36 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_23_DDR_CSN_2_3_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_23_DDR_CID_2 = 38 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_23_RESERVED_39 = 39 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_23_NESTED_LOOP_CNT = 40 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_23_NESTED_LOOP_CNT_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_23_DDR_ODT = 48 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_23_DDR_ODT_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_23_RESERVED_52_54 = 52 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_23_RESERVED_52_54_LEN = 3 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_23_PAUSE_INSTR = 55 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_23_DDR_CAL_TYPE = 56 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_23_DDR_CAL_TYPE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_23_DDR_PARITY = 60 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_23_DDR_BANK_2 = 61 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_23_LOOP_BREAK_MODE = 62 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_23_LOOP_BREAK_MODE_LEN = 2 ; - -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_24_DDR_ADDRESS_0_13 = 0 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_24_DDR_ADDRESS_0_13_LEN = 14 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_24_DDR_ADDRESS_17 = 14 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_24_DDR_BANK_GROUP_1 = 15 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_24_DDR_RESETN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_24_DDR_BANK_0_1 = 17 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_24_DDR_BANK_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_24_DDR_BANK_GROUP_0 = 19 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_24_DDR_ACTN = 20 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_24_DDR_ADDRESS_16 = 21 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_24_DDR_ADDRESS_15 = 22 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_24_DDR_ADDRESS_14 = 23 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_24_DDR_CKE = 24 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_24_DDR_CKE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_24_RESERVED_28_31 = 28 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_24_RESERVED_28_31_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_24_DDR_CSN_0_1 = 32 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_24_DDR_CSN_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_24_DDR_CID_0_1 = 34 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_24_DDR_CID_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_24_DDR_CSN_2_3 = 36 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_24_DDR_CSN_2_3_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_24_DDR_CID_2 = 38 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_24_RESERVED_39 = 39 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_24_NESTED_LOOP_CNT = 40 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_24_NESTED_LOOP_CNT_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_24_DDR_ODT = 48 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_24_DDR_ODT_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_24_RESERVED_52_54 = 52 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_24_RESERVED_52_54_LEN = 3 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_24_PAUSE_INSTR = 55 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_24_DDR_CAL_TYPE = 56 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_24_DDR_CAL_TYPE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_24_DDR_PARITY = 60 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_24_DDR_BANK_2 = 61 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_24_LOOP_BREAK_MODE = 62 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_24_LOOP_BREAK_MODE_LEN = 2 ; - -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_25_DDR_ADDRESS_0_13 = 0 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_25_DDR_ADDRESS_0_13_LEN = 14 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_25_DDR_ADDRESS_17 = 14 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_25_DDR_BANK_GROUP_1 = 15 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_25_DDR_RESETN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_25_DDR_BANK_0_1 = 17 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_25_DDR_BANK_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_25_DDR_BANK_GROUP_0 = 19 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_25_DDR_ACTN = 20 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_25_DDR_ADDRESS_16 = 21 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_25_DDR_ADDRESS_15 = 22 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_25_DDR_ADDRESS_14 = 23 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_25_DDR_CKE = 24 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_25_DDR_CKE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_25_RESERVED_28_31 = 28 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_25_RESERVED_28_31_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_25_DDR_CSN_0_1 = 32 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_25_DDR_CSN_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_25_DDR_CID_0_1 = 34 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_25_DDR_CID_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_25_DDR_CSN_2_3 = 36 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_25_DDR_CSN_2_3_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_25_DDR_CID_2 = 38 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_25_RESERVED_39 = 39 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_25_NESTED_LOOP_CNT = 40 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_25_NESTED_LOOP_CNT_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_25_DDR_ODT = 48 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_25_DDR_ODT_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_25_RESERVED_52_54 = 52 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_25_RESERVED_52_54_LEN = 3 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_25_PAUSE_INSTR = 55 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_25_DDR_CAL_TYPE = 56 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_25_DDR_CAL_TYPE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_25_DDR_PARITY = 60 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_25_DDR_BANK_2 = 61 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_25_LOOP_BREAK_MODE = 62 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_25_LOOP_BREAK_MODE_LEN = 2 ; - -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_26_DDR_ADDRESS_0_13 = 0 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_26_DDR_ADDRESS_0_13_LEN = 14 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_26_DDR_ADDRESS_17 = 14 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_26_DDR_BANK_GROUP_1 = 15 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_26_DDR_RESETN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_26_DDR_BANK_0_1 = 17 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_26_DDR_BANK_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_26_DDR_BANK_GROUP_0 = 19 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_26_DDR_ACTN = 20 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_26_DDR_ADDRESS_16 = 21 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_26_DDR_ADDRESS_15 = 22 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_26_DDR_ADDRESS_14 = 23 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_26_DDR_CKE = 24 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_26_DDR_CKE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_26_RESERVED_28_31 = 28 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_26_RESERVED_28_31_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_26_DDR_CSN_0_1 = 32 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_26_DDR_CSN_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_26_DDR_CID_0_1 = 34 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_26_DDR_CID_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_26_DDR_CSN_2_3 = 36 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_26_DDR_CSN_2_3_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_26_DDR_CID_2 = 38 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_26_RESERVED_39 = 39 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_26_NESTED_LOOP_CNT = 40 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_26_NESTED_LOOP_CNT_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_26_DDR_ODT = 48 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_26_DDR_ODT_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_26_RESERVED_52_54 = 52 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_26_RESERVED_52_54_LEN = 3 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_26_PAUSE_INSTR = 55 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_26_DDR_CAL_TYPE = 56 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_26_DDR_CAL_TYPE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_26_DDR_PARITY = 60 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_26_DDR_BANK_2 = 61 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_26_LOOP_BREAK_MODE = 62 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_26_LOOP_BREAK_MODE_LEN = 2 ; - -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_27_DDR_ADDRESS_0_13 = 0 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_27_DDR_ADDRESS_0_13_LEN = 14 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_27_DDR_ADDRESS_17 = 14 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_27_DDR_BANK_GROUP_1 = 15 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_27_DDR_RESETN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_27_DDR_BANK_0_1 = 17 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_27_DDR_BANK_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_27_DDR_BANK_GROUP_0 = 19 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_27_DDR_ACTN = 20 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_27_DDR_ADDRESS_16 = 21 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_27_DDR_ADDRESS_15 = 22 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_27_DDR_ADDRESS_14 = 23 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_27_DDR_CKE = 24 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_27_DDR_CKE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_27_RESERVED_28_31 = 28 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_27_RESERVED_28_31_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_27_DDR_CSN_0_1 = 32 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_27_DDR_CSN_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_27_DDR_CID_0_1 = 34 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_27_DDR_CID_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_27_DDR_CSN_2_3 = 36 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_27_DDR_CSN_2_3_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_27_DDR_CID_2 = 38 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_27_RESERVED_39 = 39 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_27_NESTED_LOOP_CNT = 40 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_27_NESTED_LOOP_CNT_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_27_DDR_ODT = 48 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_27_DDR_ODT_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_27_RESERVED_52_54 = 52 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_27_RESERVED_52_54_LEN = 3 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_27_PAUSE_INSTR = 55 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_27_DDR_CAL_TYPE = 56 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_27_DDR_CAL_TYPE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_27_DDR_PARITY = 60 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_27_DDR_BANK_2 = 61 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_27_LOOP_BREAK_MODE = 62 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_27_LOOP_BREAK_MODE_LEN = 2 ; - -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_28_DDR_ADDRESS_0_13 = 0 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_28_DDR_ADDRESS_0_13_LEN = 14 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_28_DDR_ADDRESS_17 = 14 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_28_DDR_BANK_GROUP_1 = 15 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_28_DDR_RESETN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_28_DDR_BANK_0_1 = 17 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_28_DDR_BANK_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_28_DDR_BANK_GROUP_0 = 19 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_28_DDR_ACTN = 20 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_28_DDR_ADDRESS_16 = 21 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_28_DDR_ADDRESS_15 = 22 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_28_DDR_ADDRESS_14 = 23 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_28_DDR_CKE = 24 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_28_DDR_CKE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_28_RESERVED_31 = 28 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_28_RESERVED_31_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_28_DDR_CSN_0_1 = 32 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_28_DDR_CSN_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_28_DDR_CID_0_1 = 34 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_28_DDR_CID_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_28_DDR_CSN_2_3 = 36 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_28_DDR_CSN_2_3_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_28_DDR_CID_2 = 38 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_28_RESERVED_39 = 39 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_28_NESTED_LOOP_CNT = 40 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_28_NESTED_LOOP_CNT_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_28_DDR_ODT = 48 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_28_DDR_ODT_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_28_RESERVED_52_54 = 52 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_28_RESERVED_52_54_LEN = 3 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_28_PAUSE_INSTR = 55 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_28_DDR_CAL_TYPE = 56 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_28_DDR_CAL_TYPE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_28_DDR_PARITY = 60 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_28_DDR_BANK_2 = 61 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_28_LOOP_BREAK_MODE = 62 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_28_LOOP_BREAK_MODE_LEN = 2 ; - -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_29_DDR_ADDRESS_0_13 = 0 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_29_DDR_ADDRESS_0_13_LEN = 14 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_29_DDR_ADDRESS_17 = 14 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_29_DDR_BANK_GROUP_1 = 15 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_29_DDR_RESETN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_29_DDR_BANK_0_1 = 17 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_29_DDR_BANK_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_29_DDR_BANK_GROUP_0 = 19 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_29_DDR_ACTN = 20 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_29_DDR_ADDRESS_16 = 21 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_29_DDR_ADDRESS_15 = 22 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_29_DDR_ADDRESS_14 = 23 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_29_DDR_CKE = 24 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_29_DDR_CKE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_29_RESERVED_28_31 = 28 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_29_RESERVED_28_31_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_29_DDR_CSN_0_1 = 32 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_29_DDR_CSN_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_29_DDR_CID_0_1 = 34 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_29_DDR_CID_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_29_DDR_CSN_2_3 = 36 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_29_DDR_CSN_2_3_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_29_DDR_CID_2 = 38 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_29_RESERVED_39 = 39 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_29_NESTED_LOOP_CNT = 40 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_29_NESTED_LOOP_CNT_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_29_DDR_ODT = 48 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_29_DDR_ODT_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_29_RESERVED_52_54 = 52 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_29_RESERVED_52_54_LEN = 3 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_29_PAUSE_INSTR = 55 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_29_DDR_CAL_TYPE = 56 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_29_DDR_CAL_TYPE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_29_DDR_PARITY = 60 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_29_DDR_BANK_2 = 61 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_29_LOOP_BREAK_MODE = 62 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_29_LOOP_BREAK_MODE_LEN = 2 ; - -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_30_DDR_ADDRESS_0_13 = 0 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_30_DDR_ADDRESS_0_13_LEN = 14 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_30_DDR_ADDRESS_17 = 14 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_30_DDR_BANK_GROUP_1 = 15 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_30_DDR_RESETN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_30_DDR_BANK_0_1 = 17 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_30_DDR_BANK_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_30_DDR_BANK_GROUP_0 = 19 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_30_DDR_ACTN = 20 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_30_DDR_ADDRESS_16 = 21 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_30_DDR_ADDRESS_15 = 22 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_30_DDR_ADDRESS_14 = 23 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_30_DDR_CKE = 24 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_30_DDR_CKE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_30_RESERVED_28_31 = 28 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_30_RESERVED_28_31_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_30_DDR_CSN_0_1 = 32 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_30_DDR_CSN_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_30_DDR_CID_0_1 = 34 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_30_DDR_CID_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_30_DDR_CSN_2_3 = 36 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_30_DDR_CSN_2_3_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_30_DDR_CID_2 = 38 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_30_RESERVED_39 = 39 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_30_NESTED_LOOP_CNT = 40 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_30_NESTED_LOOP_CNT_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_30_DDR_ODT = 48 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_30_DDR_ODT_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_30_RESERVED_52_54 = 52 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_30_RESERVED_52_54_LEN = 3 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_30_PAUSE_INSTR = 55 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_30_DDR_CAL_TYPE = 56 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_30_DDR_CAL_TYPE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_30_DDR_PARITY = 60 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_30_DDR_BANK_2 = 61 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_30_LOOP_BREAK_MODE = 62 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_30_LOOP_BREAK_MODE_LEN = 2 ; - -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_31_DDR_ADDRESS_0_13 = 0 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_31_DDR_ADDRESS_0_13_LEN = 14 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_31_DDR_ADDRESS_17 = 14 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_31_DDR_BANK_GROUP_1 = 15 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_31_DDR_RESETN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_31_DDR_BANK_0_1 = 17 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_31_DDR_BANK_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_31_DDR_BANK_GROUP_0 = 19 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_31_DDR_ACTN = 20 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_31_DDR_ADDRESS_16 = 21 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_31_DDR_ADDRESS_15 = 22 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_31_DDR_ADDRESS_14 = 23 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_31_DDR_CKE = 24 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_31_DDR_CKE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_31_RESERVED_28 = 28 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_31_RESERVED_28_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_31_DDR_CSN_0_1 = 32 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_31_DDR_CSN_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_31_DDR_CID_0_1 = 34 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_31_DDR_CID_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_31_DDR_CSN_2_3 = 36 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_31_DDR_CSN_2_3_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_31_DDR_CID_2 = 38 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_31_RESERVED_39 = 39 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_31_NESTED_LOOP_CNT = 40 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_31_NESTED_LOOP_CNT_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_31_DDR_ODT = 48 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_31_DDR_ODT_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_31_RESERVED_52_54 = 52 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_31_RESERVED_52_54_LEN = 3 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_31_PAUSE_INSTR = 55 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_31_DDR_CAL_TYPE = 56 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_31_DDR_CAL_TYPE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_31_DDR_PARITY = 60 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_31_DDR_BANK_2 = 61 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_31_LOOP_BREAK_MODE = 62 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_31_LOOP_BREAK_MODE_LEN = 2 ; - -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_00_IDLES = 0 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_00_IDLES_LEN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_00_REPEAT_CMD_CNT = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_00_REPEAT_CMD_CNT_LEN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_00_READ_OR_WRITE_DATA = 32 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_00_READ_OR_WRITE_DATA_LEN = 20 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_00_READ_COMPARE_REQUIRED = 52 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_00_DDR_CAL_RANK = 53 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_00_DDR_CAL_RANK_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_00_DDR_CALIBRATION_ENABLE = 57 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_00_END = 58 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_00_GOTO_CMD = 59 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_00_GOTO_CMD_LEN = 5 ; - -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_01_IDLES = 0 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_01_IDLES_LEN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_01_REPEAT_CMD_CNT = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_01_REPEAT_CMD_CNT_LEN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_01_READ_OR_WRITE_DATA = 32 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_01_READ_OR_WRITE_DATA_LEN = 20 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_01_READ_COMPARE_REQUIRED = 52 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_01_DDR_CAL_RANK = 53 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_01_DDR_CAL_RANK_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_01_DDR_CALIBRATION_ENABLE = 57 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_01_END = 58 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_01_GOTO_CMD = 59 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_01_GOTO_CMD_LEN = 5 ; - -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_02_IDLES = 0 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_02_IDLES_LEN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_02_REPEAT_CMD_CNT = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_02_REPEAT_CMD_CNT_LEN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_02_READ_OR_WRITE_DATA = 32 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_02_READ_OR_WRITE_DATA_LEN = 20 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_02_READ_COMPARE_REQUIRED = 52 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_02_DDR_CAL_RANK = 53 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_02_DDR_CAL_RANK_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_02_DDR_CALIBRATION_ENABLE = 57 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_02_END = 58 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_02_GOTO_CMD = 59 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_02_GOTO_CMD_LEN = 5 ; - -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_03_IDLES = 0 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_03_IDLES_LEN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_03_REPEAT_CMD_CNT = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_03_REPEAT_CMD_CNT_LEN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_03_READ_OR_WRITE_DATA = 32 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_03_READ_OR_WRITE_DATA_LEN = 20 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_03_READ_COMPARE_REQUIRED = 52 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_03_DDR_CAL_RANK = 53 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_03_DDR_CAL_RANK_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_03_DDR_CALIBRATION_ENABLE = 57 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_03_END = 58 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_03_GOTO_CMD = 59 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_03_GOTO_CMD_LEN = 5 ; - -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_04_IDLES = 0 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_04_IDLES_LEN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_04_REPEAT_CMD_CNT = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_04_REPEAT_CMD_CNT_LEN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_04_READ_OR_WRITE_DATA = 32 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_04_READ_OR_WRITE_DATA_LEN = 20 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_04_READ_COMPARE_REQUIRED = 52 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_04_DDR_CAL_RANK = 53 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_04_DDR_CAL_RANK_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_04_DDR_CALIBRATION_ENABLE = 57 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_04_END = 58 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_04_GOTO_CMD = 59 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_04_GOTO_CMD_LEN = 5 ; - -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_05_IDLES = 0 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_05_IDLES_LEN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_05_REPEAT_CMD_CNT = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_05_REPEAT_CMD_CNT_LEN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_05_READ_OR_WRITE_DATA = 32 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_05_READ_OR_WRITE_DATA_LEN = 20 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_05_READ_COMPARE_REQUIRED = 52 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_05_DDR_CAL_RANK = 53 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_05_DDR_CAL_RANK_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_05_DDR_CALIBRATION_ENABLE = 57 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_05_END = 58 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_05_GOTO_CMD = 59 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_05_GOTO_CMD_LEN = 5 ; - -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_06_IDLES = 0 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_06_IDLES_LEN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_06_REPEAT_CMD_CNT = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_06_REPEAT_CMD_CNT_LEN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_06_READ_OR_WRITE_DATA = 32 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_06_READ_OR_WRITE_DATA_LEN = 20 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_06_READ_COMPARE_REQUIRED = 52 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_06_DDR_CAL_RANK = 53 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_06_DDR_CAL_RANK_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_06_DDR_CALIBRATION_ENABLE = 57 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_06_END = 58 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_06_GOTO_CMD = 59 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_06_GOTO_CMD_LEN = 5 ; - -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_07_IDLES = 0 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_07_IDLES_LEN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_07_REPEAT_CMD_CNT = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_07_REPEAT_CMD_CNT_LEN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_07_READ_OR_WRITE_DATA = 32 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_07_READ_OR_WRITE_DATA_LEN = 20 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_07_READ_COMPARE_REQUIRED = 52 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_07_DDR_CAL_RANK = 53 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_07_DDR_CAL_RANK_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_07_DDR_CALIBRATION_ENABLE = 57 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_07_END = 58 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_07_GOTO_CMD = 59 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_07_GOTO_CMD_LEN = 5 ; - -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_08_IDLES = 0 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_08_IDLES_LEN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_08_REPEAT_CMD_CNT = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_08_REPEAT_CMD_CNT_LEN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_08_READ_OR_WRITE_DATA = 32 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_08_READ_OR_WRITE_DATA_LEN = 20 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_08_READ_COMPARE_REQUIRED = 52 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_08_DDR_CAL_RANK = 53 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_08_DDR_CAL_RANK_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_08_DDR_CALIBRATION_ENABLE = 57 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_08_END = 58 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_08_GOTO_CMD = 59 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_08_GOTO_CMD_LEN = 5 ; - -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_09_IDLES = 0 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_09_IDLES_LEN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_09_REPEAT_CMD_CNT = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_09_REPEAT_CMD_CNT_LEN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_09_READ_OR_WRITE_DATA = 32 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_09_READ_OR_WRITE_DATA_LEN = 20 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_09_READ_COMPARE_REQUIRED = 52 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_09_DDR_CAL_RANK = 53 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_09_DDR_CAL_RANK_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_09_DDR_CALIBRATION_ENABLE = 57 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_09_END = 58 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_09_GOTO_CMD = 59 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_09_GOTO_CMD_LEN = 5 ; - -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_10_IDLES = 0 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_10_IDLES_LEN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_10_REPEAT_CMD_CNT = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_10_REPEAT_CMD_CNT_LEN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_10_READ_OR_WRITE_DATA = 32 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_10_READ_OR_WRITE_DATA_LEN = 20 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_10_READ_COMPARE_REQUIRED = 52 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_10_DDR_CAL_RANK = 53 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_10_DDR_CAL_RANK_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_10_DDR_CALIBRATION_ENABLE = 57 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_10_END = 58 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_10_GOTO_CMD = 59 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_10_GOTO_CMD_LEN = 5 ; - -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_11_IDLES = 0 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_11_IDLES_LEN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_11_REPEAT_CMD_CNT = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_11_REPEAT_CMD_CNT_LEN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_11_READ_OR_WRITE_DATA = 32 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_11_READ_OR_WRITE_DATA_LEN = 20 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_11_READ_COMPARE_REQUIRED = 52 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_11_DDR_CAL_RANK = 53 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_11_DDR_CAL_RANK_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_11_DDR_CALIBRATION_ENABLE = 57 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_11_END = 58 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_11_GOTO_CMD = 59 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_11_GOTO_CMD_LEN = 5 ; - -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_12_IDLES = 0 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_12_IDLES_LEN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_12_REPEAT_CMD_CNT = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_12_REPEAT_CMD_CNT_LEN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_12_READ_OR_WRITE_DATA = 32 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_12_READ_OR_WRITE_DATA_LEN = 20 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_12_READ_COMPARE_REQUIRED = 52 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_12_DDR_CAL_RANK = 53 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_12_DDR_CAL_RANK_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_12_DDR_CALIBRATION_ENABLE = 57 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_12_END = 58 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_12_GOTO_CMD = 59 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_12_GOTO_CMD_LEN = 5 ; - -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_13_IDLES = 0 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_13_IDLES_LEN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_13_REPEAT_CMD_CNT = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_13_REPEAT_CMD_CNT_LEN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_13_READ_OR_WRITE_DATA = 32 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_13_READ_OR_WRITE_DATA_LEN = 20 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_13_READ_COMPARE_REQUIRED = 52 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_13_DDR_CAL_RANK = 53 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_13_DDR_CAL_RANK_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_13_DDR_CALIBRATION_ENABLE = 57 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_13_END = 58 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_13_GOTO_CMD = 59 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_13_GOTO_CMD_LEN = 5 ; - -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_14_IDLES = 0 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_14_IDLES_LEN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_14_REPEAT_CMD_CNT = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_14_REPEAT_CMD_CNT_LEN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_14_READ_OR_WRITE_DATA = 32 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_14_READ_OR_WRITE_DATA_LEN = 20 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_14_READ_COMPARE_REQUIRED = 52 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_14_DDR_CAL_RANK = 53 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_14_DDR_CAL_RANK_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_14_DDR_CALIBRATION_ENABLE = 57 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_14_END = 58 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_14_GOTO_CMD = 59 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_14_GOTO_CMD_LEN = 5 ; - -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_15_IDLES = 0 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_15_IDLES_LEN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_15_REPEAT_CMD_CNT = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_15_REPEAT_CMD_CNT_LEN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_15_READ_OR_WRITE_DATA = 32 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_15_READ_OR_WRITE_DATA_LEN = 20 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_15_READ_COMPARE_REQUIRED = 52 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_15_DDR_CAL_RANK = 53 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_15_DDR_CAL_RANK_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_15_DDR_CALIBRATION_ENABLE = 57 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_15_END = 58 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_15_GOTO_CMD = 59 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_15_GOTO_CMD_LEN = 5 ; - -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_16_IDLES = 0 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_16_IDLES_LEN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_16_REPEAT_CMD_CNT = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_16_REPEAT_CMD_CNT_LEN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_16_READ_OR_WRITE_DATA = 32 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_16_READ_OR_WRITE_DATA_LEN = 20 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_16_READ_COMPARE_REQUIRED = 52 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_16_DDR_CAL_RANK = 53 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_16_DDR_CAL_RANK_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_16_DDR_CALIBRATION_ENABLE = 57 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_16_END = 58 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_16_GOTO_CMD = 59 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_16_GOTO_CMD_LEN = 5 ; - -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_17_IDLES = 0 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_17_IDLES_LEN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_17_REPEAT_CMD_CNT = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_17_REPEAT_CMD_CNT_LEN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_17_READ_OR_WRITE_DATA = 32 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_17_READ_OR_WRITE_DATA_LEN = 20 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_17_READ_COMPARE_REQUIRED = 52 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_17_DDR_CAL_RANK = 53 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_17_DDR_CAL_RANK_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_17_DDR_CALIBRATION_ENABLE = 57 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_17_END = 58 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_17_GOTO_CMD = 59 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_17_GOTO_CMD_LEN = 5 ; - -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_18_IDLES = 0 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_18_IDLES_LEN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_18_REPEAT_CMD_CNT = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_18_REPEAT_CMD_CNT_LEN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_18_READ_OR_WRITE_DATA = 32 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_18_READ_OR_WRITE_DATA_LEN = 20 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_18_READ_COMPARE_REQUIRED = 52 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_18_DDR_CAL_RANK = 53 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_18_DDR_CAL_RANK_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_18_DDR_CALIBRATION_ENABLE = 57 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_18_END = 58 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_18_GOTO_CMD = 59 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_18_GOTO_CMD_LEN = 5 ; - -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_19_IDLES = 0 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_19_IDLES_LEN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_19_REPEAT_CMD_CNT = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_19_REPEAT_CMD_CNT_LEN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_19_READ_OR_WRITE_DATA = 32 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_19_READ_OR_WRITE_DATA_LEN = 20 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_19_READ_COMPARE_REQUIRED = 52 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_19_DDR_CAL_RANK = 53 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_19_DDR_CAL_RANK_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_19_DDR_CALIBRATION_ENABLE = 57 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_19_END = 58 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_19_GOTO_CMD = 59 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_19_GOTO_CMD_LEN = 5 ; - -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_20_IDLES = 0 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_20_IDLES_LEN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_20_REPEAT_CMD_CNT = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_20_REPEAT_CMD_CNT_LEN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_20_READ_OR_WRITE_DATA = 32 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_20_READ_OR_WRITE_DATA_LEN = 20 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_20_READ_COMPARE_REQUIRED = 52 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_20_DDR_CAL_RANK = 53 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_20_DDR_CAL_RANK_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_20_DDR_CALIBRATION_ENABLE = 57 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_20_END = 58 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_20_GOTO_CMD = 59 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_20_GOTO_CMD_LEN = 5 ; - -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_21_IDLES = 0 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_21_IDLES_LEN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_21_REPEAT_CMD_CNT = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_21_REPEAT_CMD_CNT_LEN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_21_READ_OR_WRITE_DATA = 32 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_21_READ_OR_WRITE_DATA_LEN = 20 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_21_READ_COMPARE_REQUIRED = 52 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_21_DDR_CAL_RANK = 53 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_21_DDR_CAL_RANK_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_21_DDR_CALIBRATION_ENABLE = 57 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_21_END = 58 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_21_GOTO_CMD = 59 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_21_GOTO_CMD_LEN = 5 ; - -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_22_IDLES = 0 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_22_IDLES_LEN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_22_REPEAT_CMD_CNT = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_22_REPEAT_CMD_CNT_LEN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_22_READ_OR_WRITE_DATA = 32 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_22_READ_OR_WRITE_DATA_LEN = 20 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_22_READ_COMPARE_REQUIRED = 52 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_22_DDR_CAL_RANK = 53 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_22_DDR_CAL_RANK_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_22_DDR_CALIBRATION_ENABLE = 57 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_22_END = 58 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_22_GOTO_CMD = 59 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_22_GOTO_CMD_LEN = 5 ; - -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_23_IDLES = 0 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_23_IDLES_LEN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_23_REPEAT_CMD_CNT = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_23_REPEAT_CMD_CNT_LEN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_23_READ_OR_WRITE_DATA = 32 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_23_READ_OR_WRITE_DATA_LEN = 20 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_23_READ_COMPARE_REQUIRED = 52 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_23_DDR_CAL_RANK = 53 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_23_DDR_CAL_RANK_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_23_DDR_CALIBRATION_ENABLE = 57 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_23_END = 58 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_23_GOTO_CMD = 59 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_23_GOTO_CMD_LEN = 5 ; - -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_24_IDLES = 0 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_24_IDLES_LEN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_24_REPEAT_CMD_CNT = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_24_REPEAT_CMD_CNT_LEN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_24_READ_OR_WRITE_DATA = 32 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_24_READ_OR_WRITE_DATA_LEN = 20 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_24_READ_COMPARE_REQUIRED = 52 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_24_DDR_CAL_RANK = 53 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_24_DDR_CAL_RANK_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_24_DDR_CALIBRATION_ENABLE = 57 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_24_END = 58 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_24_GOTO_CMD = 59 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_24_GOTO_CMD_LEN = 5 ; - -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_25_IDLES = 0 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_25_IDLES_LEN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_25_REPEAT_CMD_CNT = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_25_REPEAT_CMD_CNT_LEN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_25_READ_OR_WRITE_DATA = 32 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_25_READ_OR_WRITE_DATA_LEN = 20 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_25_READ_COMPARE_REQUIRED = 52 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_25_DDR_CAL_RANK = 53 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_25_DDR_CAL_RANK_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_25_DDR_CALIBRATION_ENABLE = 57 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_25_END = 58 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_25_GOTO_CMD = 59 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_25_GOTO_CMD_LEN = 5 ; - -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_26_IDLES = 0 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_26_IDLES_LEN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_26_REPEAT_CMD_CNT = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_26_REPEAT_CMD_CNT_LEN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_26_READ_OR_WRITE_DATA = 32 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_26_READ_OR_WRITE_DATA_LEN = 20 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_26_READ_COMPARE_REQUIRED = 52 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_26_DDR_CAL_RANK = 53 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_26_DDR_CAL_RANK_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_26_DDR_CALIBRATION_ENABLE = 57 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_26_END = 58 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_26_GOTO_CMD = 59 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_26_GOTO_CMD_LEN = 5 ; - -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_27_IDLES = 0 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_27_IDLES_LEN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_27_REPEAT_CMD_CNT = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_27_REPEAT_CMD_CNT_LEN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_27_READ_OR_WRITE_DATA = 32 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_27_READ_OR_WRITE_DATA_LEN = 20 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_27_READ_COMPARE_REQUIRED = 52 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_27_DDR_CAL_RANK = 53 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_27_DDR_CAL_RANK_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_27_DDR_CALIBRATION_ENABLE = 57 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_27_END = 58 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_27_GOTO_CMD = 59 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_27_GOTO_CMD_LEN = 5 ; - -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_28_IDLES = 0 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_28_IDLES_LEN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_28_REPEAT_CMD_CNT = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_28_REPEAT_CMD_CNT_LEN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_28_READ_OR_WRITE_DATA = 32 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_28_READ_OR_WRITE_DATA_LEN = 20 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_28_READ_COMPARE_REQUIRED = 52 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_28_DDR_CAL_RANK = 53 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_28_DDR_CAL_RANK_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_28_DDR_CALIBRATION_ENABLE = 57 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_28_END = 58 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_28_GOTO_CMD = 59 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_28_GOTO_CMD_LEN = 5 ; - -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_29_IDLES = 0 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_29_IDLES_LEN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_29_REPEAT_CMD_CNT = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_29_REPEAT_CMD_CNT_LEN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_29_READ_OR_WRITE_DATA = 32 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_29_READ_OR_WRITE_DATA_LEN = 20 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_29_READ_COMPARE_REQUIRED = 52 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_29_DDR_CAL_RANK = 53 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_29_DDR_CAL_RANK_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_29_DDR_CALIBRATION_ENABLE = 57 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_29_END = 58 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_29_GOTO_CMD = 59 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_29_GOTO_CMD_LEN = 5 ; - -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_30_IDLES = 0 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_30_IDLES_LEN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_30_REPEAT_CMD_CNT = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_30_REPEAT_CMD_CNT_LEN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_30_READ_OR_WRITE_DATA = 32 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_30_READ_OR_WRITE_DATA_LEN = 20 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_30_READ_COMPARE_REQUIRED = 52 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_30_DDR_CAL_RANK = 53 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_30_DDR_CAL_RANK_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_30_DDR_CALIBRATION_ENABLE = 57 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_30_END = 58 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_30_GOTO_CMD = 59 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_30_GOTO_CMD_LEN = 5 ; - -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_31_IDLES = 0 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_31_IDLES_LEN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_31_REPEAT_CMD_CNT = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_31_REPEAT_CMD_CNT_LEN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_31_READ_OR_WRITE_DATA = 32 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_31_READ_OR_WRITE_DATA_LEN = 20 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_31_READ_COMPARE_REQUIRED = 52 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_31_DDR_CAL_RANK = 53 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_31_DDR_CAL_RANK_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_31_DDR_CALIBRATION_ENABLE = 57 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_31_END = 58 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_31_GOTO_CMD = 59 ; -static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_31_GOTO_CMD_LEN = 5 ; - -static const uint8_t EXPLR_MCBIST_CCS_MODEQ_STOP_ON_ERR = 0 ; -static const uint8_t EXPLR_MCBIST_CCS_MODEQ_UE_DISABLE = 1 ; -static const uint8_t EXPLR_MCBIST_CCS_MODEQ_DATA_COMPARE_BURST_SEL = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_MODEQ_DATA_COMPARE_BURST_SEL_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_MODEQ_RESERVED_4_6 = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_MODEQ_RESERVED_4_6_LEN = 3 ; -static const uint8_t EXPLR_MCBIST_CCS_MODEQ_TRACE_SELECT_DQBYPASS = 7 ; -static const uint8_t EXPLR_MCBIST_CCS_MODEQ_DDR_CAL_TIMEOUT_CNT = 8 ; -static const uint8_t EXPLR_MCBIST_CCS_MODEQ_DDR_CAL_TIMEOUT_CNT_LEN = 16 ; -static const uint8_t EXPLR_MCBIST_CCS_MODEQ_CFG_PARITY_AFTER_CMD = 24 ; -static const uint8_t EXPLR_MCBIST_CCS_MODEQ_NESTED_LOOP_ENABLE = 25 ; -static const uint8_t EXPLR_MCBIST_CCS_MODEQ_COPY_CKE_TO_SPARE_CKE = 26 ; -static const uint8_t EXPLR_MCBIST_CCS_MODEQ_DISABLE_ECC_ARRAY_CHK = 27 ; -static const uint8_t EXPLR_MCBIST_CCS_MODEQ_DISABLE_ECC_ARRAY_CORRECTION = 28 ; -static const uint8_t EXPLR_MCBIST_CCS_MODEQ_CFG_DGEN_FIXED_MODE = 29 ; -static const uint8_t EXPLR_MCBIST_CCS_MODEQ_DDR_CAL_TIMEOUT_CNT_MULT = 30 ; -static const uint8_t EXPLR_MCBIST_CCS_MODEQ_DDR_CAL_TIMEOUT_CNT_MULT_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_MODEQ_IDLE_PAT_ADDRESS_0_13 = 32 ; -static const uint8_t EXPLR_MCBIST_CCS_MODEQ_IDLE_PAT_ADDRESS_0_13_LEN = 14 ; -static const uint8_t EXPLR_MCBIST_CCS_MODEQ_IDLE_PAT_ADDRESS_17 = 46 ; -static const uint8_t EXPLR_MCBIST_CCS_MODEQ_IDLE_PAT_BANK_GROUP_1 = 47 ; -static const uint8_t EXPLR_MCBIST_CCS_MODEQ_IDLE_PAT_BANK_0_1 = 48 ; -static const uint8_t EXPLR_MCBIST_CCS_MODEQ_IDLE_PAT_BANK_0_1_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_MODEQ_IDLE_PAT_BANK_GROUP_0 = 50 ; -static const uint8_t EXPLR_MCBIST_CCS_MODEQ_IDLE_PAT_ACTN = 51 ; -static const uint8_t EXPLR_MCBIST_CCS_MODEQ_IDLE_PAT_ADDRESS_16 = 52 ; -static const uint8_t EXPLR_MCBIST_CCS_MODEQ_IDLE_PAT_ADDRESS_15 = 53 ; -static const uint8_t EXPLR_MCBIST_CCS_MODEQ_IDLE_PAT_ADDRESS_14 = 54 ; -static const uint8_t EXPLR_MCBIST_CCS_MODEQ_NTTM_MODE = 55 ; -static const uint8_t EXPLR_MCBIST_CCS_MODEQ_NTTM_RW_DATA_DLY = 56 ; -static const uint8_t EXPLR_MCBIST_CCS_MODEQ_NTTM_RW_DATA_DLY_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_CCS_MODEQ_IDLE_PAT_BANK_2 = 60 ; -static const uint8_t EXPLR_MCBIST_CCS_MODEQ_DDR_PARITY_ENABLE = 61 ; -static const uint8_t EXPLR_MCBIST_CCS_MODEQ_IDLE_PAT_PARITY = 62 ; -static const uint8_t EXPLR_MCBIST_CCS_MODEQ_PAUSE_DISABLE = 63 ; - -static const uint8_t EXPLR_MCBIST_CCS_STATQ_IP = 0 ; -static const uint8_t EXPLR_MCBIST_CCS_STATQ_DONE = 1 ; -static const uint8_t EXPLR_MCBIST_CCS_STATQ_FAIL = 2 ; -static const uint8_t EXPLR_MCBIST_CCS_STATQ_FAIL_TYPE = 3 ; -static const uint8_t EXPLR_MCBIST_CCS_STATQ_FAIL_TYPE_LEN = 3 ; -static const uint8_t EXPLR_MCBIST_CCS_STATQ_MCBIST_SUBTEST_IP = 6 ; -static const uint8_t EXPLR_MCBIST_CCS_STATQ_FAIL_RCD = 7 ; -static const uint8_t EXPLR_MCBIST_CCS_STATQ_PAUSED = 8 ; -static const uint8_t EXPLR_MCBIST_CCS_STATQ_CE = 9 ; - -static const uint8_t EXPLR_MCBIST_DBGCFG0Q_CFG_DBG_ENABLE = 0 ; -static const uint8_t EXPLR_MCBIST_DBGCFG0Q_CFG_DBG_PICK_ASYNC_PORT01 = 1 ; -static const uint8_t EXPLR_MCBIST_DBGCFG0Q_CFG_DBG_PICK_ASYNC_PORT01_LEN = 11 ; -static const uint8_t EXPLR_MCBIST_DBGCFG0Q_CFG_DBG_PICK_ASYNC_PORT23 = 12 ; -static const uint8_t EXPLR_MCBIST_DBGCFG0Q_CFG_DBG_PICK_ASYNC_PORT23_LEN = 11 ; -static const uint8_t EXPLR_MCBIST_DBGCFG0Q_CFG_DBG_PICK_MCBIST01 = 23 ; -static const uint8_t EXPLR_MCBIST_DBGCFG0Q_CFG_DBG_PICK_MCBIST01_LEN = 11 ; -static const uint8_t EXPLR_MCBIST_DBGCFG0Q_CFG_DBG_PICK_MCBIST23 = 34 ; -static const uint8_t EXPLR_MCBIST_DBGCFG0Q_CFG_DBG_PICK_MCBIST23_LEN = 11 ; -static const uint8_t EXPLR_MCBIST_DBGCFG0Q_SCOM_SET_WAT_EXT_TRIGGER = 45 ; -static const uint8_t EXPLR_MCBIST_DBGCFG0Q_SCOM_SET_WAT_EXT_RESET = 46 ; -static const uint8_t EXPLR_MCBIST_DBGCFG0Q_SCOM_SET_WAT_EXT_ARM = 47 ; - -static const uint8_t EXPLR_MCBIST_DBGCFG1Q_CFG_WAT_ENABLE = 0 ; -static const uint8_t EXPLR_MCBIST_DBGCFG1Q_CFG_WAT_EXT_EVENT_TO_INT = 1 ; -static const uint8_t EXPLR_MCBIST_DBGCFG1Q_CFG_WAT_EXT_EVENT_TO_INT_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_DBGCFG1Q_CFG_WAT_EXT_TRIGGER_SEL = 3 ; -static const uint8_t EXPLR_MCBIST_DBGCFG1Q_CFG_WAT_EXT_TRIGGER_SEL_LEN = 20 ; -static const uint8_t EXPLR_MCBIST_DBGCFG1Q_CFG_WAT_EXT_RESET_SEL = 23 ; -static const uint8_t EXPLR_MCBIST_DBGCFG1Q_CFG_WAT_EXT_RESET_SEL_LEN = 20 ; -static const uint8_t EXPLR_MCBIST_DBGCFG1Q_CFG_WAT_EXT_ARM_SEL = 43 ; -static const uint8_t EXPLR_MCBIST_DBGCFG1Q_CFG_WAT_EXT_ARM_SEL_LEN = 20 ; -static const uint8_t EXPLR_MCBIST_DBGCFG1Q_RESERVED_63 = 63 ; - -static const uint8_t EXPLR_MCBIST_DBGCFG2Q_CFG_WAT_LOC_EVENT0_SEL = 0 ; -static const uint8_t EXPLR_MCBIST_DBGCFG2Q_CFG_WAT_LOC_EVENT0_SEL_LEN = 20 ; -static const uint8_t EXPLR_MCBIST_DBGCFG2Q_CFG_WAT_LOC_EVENT1_SEL = 20 ; -static const uint8_t EXPLR_MCBIST_DBGCFG2Q_CFG_WAT_LOC_EVENT1_SEL_LEN = 20 ; -static const uint8_t EXPLR_MCBIST_DBGCFG2Q_CFG_WAT_LOC_EVENT2_SEL = 40 ; -static const uint8_t EXPLR_MCBIST_DBGCFG2Q_CFG_WAT_LOC_EVENT2_SEL_LEN = 20 ; -static const uint8_t EXPLR_MCBIST_DBGCFG2Q_RESERVED_60_63 = 60 ; -static const uint8_t EXPLR_MCBIST_DBGCFG2Q_RESERVED_60_63_LEN = 4 ; - -static const uint8_t EXPLR_MCBIST_DBGCFG3Q_CFG_WAT_LOC_EVENT3_SEL = 0 ; -static const uint8_t EXPLR_MCBIST_DBGCFG3Q_CFG_WAT_LOC_EVENT3_SEL_LEN = 20 ; -static const uint8_t EXPLR_MCBIST_DBGCFG3Q_CFG_WAT_GLOB_EVENT0_SEL = 20 ; -static const uint8_t EXPLR_MCBIST_DBGCFG3Q_CFG_WAT_GLOB_EVENT0_SEL_LEN = 3 ; -static const uint8_t EXPLR_MCBIST_DBGCFG3Q_CFG_WAT_GLOB_EVENT1_SEL = 23 ; -static const uint8_t EXPLR_MCBIST_DBGCFG3Q_CFG_WAT_GLOB_EVENT1_SEL_LEN = 3 ; -static const uint8_t EXPLR_MCBIST_DBGCFG3Q_CFG_WAT_GLOB_EVENT2_SEL = 26 ; -static const uint8_t EXPLR_MCBIST_DBGCFG3Q_CFG_WAT_GLOB_EVENT2_SEL_LEN = 3 ; -static const uint8_t EXPLR_MCBIST_DBGCFG3Q_CFG_WAT_GLOB_EVENT3_SEL = 29 ; -static const uint8_t EXPLR_MCBIST_DBGCFG3Q_CFG_WAT_GLOB_EVENT3_SEL_LEN = 3 ; -static const uint8_t EXPLR_MCBIST_DBGCFG3Q_CFG_WAT_OUTPUT_PULSE = 32 ; -static const uint8_t EXPLR_MCBIST_DBGCFG3Q_CFG_WAT_ACT_MNT_GO_IDLE_PULSE = 33 ; -static const uint8_t EXPLR_MCBIST_DBGCFG3Q_CFG_WAT_ACT_MNT_GO_IDLE_PULSE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_DBGCFG3Q_CFG_WAT_ACT_SET_SPATTN_PULSE = 37 ; -static const uint8_t EXPLR_MCBIST_DBGCFG3Q_CFG_WAT_ACT_SET_SPATTN_PULSE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_DBGCFG3Q_CFG_WAT_ACT_FRC_TB_PULSE_PULSE = 41 ; -static const uint8_t EXPLR_MCBIST_DBGCFG3Q_CFG_WAT_ACT_FRC_TB_PULSE_PULSE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_DBGCFG3Q_CFG_WAT_CNT_VALUE = 45 ; -static const uint8_t EXPLR_MCBIST_DBGCFG3Q_CFG_WAT_CNT_VALUE_LEN = 6 ; -static const uint8_t EXPLR_MCBIST_DBGCFG3Q_CFG_WAT_TMR_VALUE = 51 ; -static const uint8_t EXPLR_MCBIST_DBGCFG3Q_CFG_WAT_TMR_VALUE_LEN = 8 ; - -static const uint8_t EXPLR_MCBIST_DBG_BUS_CFGQ_TRACE_SEL0_A = 0 ; -static const uint8_t EXPLR_MCBIST_DBG_BUS_CFGQ_TRACE_SEL0_A_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_DBG_BUS_CFGQ_TRACE_SEL0_B = 4 ; -static const uint8_t EXPLR_MCBIST_DBG_BUS_CFGQ_TRACE_SEL0_B_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_DBG_BUS_CFGQ_TRACE_SEL0_C = 8 ; -static const uint8_t EXPLR_MCBIST_DBG_BUS_CFGQ_TRACE_SEL0_C_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_DBG_BUS_CFGQ_TRACE_SEL0_D = 12 ; -static const uint8_t EXPLR_MCBIST_DBG_BUS_CFGQ_TRACE_SEL0_D_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_DBG_BUS_CFGQ_TRACE_SEL1_A = 16 ; -static const uint8_t EXPLR_MCBIST_DBG_BUS_CFGQ_TRACE_SEL1_A_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_DBG_BUS_CFGQ_TRACE_SEL1_B = 20 ; -static const uint8_t EXPLR_MCBIST_DBG_BUS_CFGQ_TRACE_SEL1_B_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_DBG_BUS_CFGQ_TRACE_SEL1_C = 24 ; -static const uint8_t EXPLR_MCBIST_DBG_BUS_CFGQ_TRACE_SEL1_C_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_DBG_BUS_CFGQ_TRACE_SEL1_D = 28 ; -static const uint8_t EXPLR_MCBIST_DBG_BUS_CFGQ_TRACE_SEL1_D_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_DBG_BUS_CFGQ_TLXR_SHIFT_SEL = 32 ; -static const uint8_t EXPLR_MCBIST_DBG_BUS_CFGQ_TLXT_SHIFT_SEL = 33 ; -static const uint8_t EXPLR_MCBIST_DBG_BUS_CFGQ_WDF_SHIFT_SEL = 34 ; -static const uint8_t EXPLR_MCBIST_DBG_BUS_CFGQ_RDF_SHIFT_SEL = 35 ; -static const uint8_t EXPLR_MCBIST_DBG_BUS_CFGQ_SRQ_SHIFT_SEL = 36 ; -static const uint8_t EXPLR_MCBIST_DBG_BUS_CFGQ_MCB_SHIFT_SEL = 37 ; -static const uint8_t EXPLR_MCBIST_DBG_BUS_CFGQ_MMIO_SHIFT_SEL = 38 ; -static const uint8_t EXPLR_MCBIST_DBG_BUS_CFGQ_DLX_SHIFT_SEL = 39 ; -static const uint8_t EXPLR_MCBIST_DBG_BUS_CFGQ_TRACE0_TRACE_ERR_SEL = 40 ; -static const uint8_t EXPLR_MCBIST_DBG_BUS_CFGQ_TRACE0_TRACE_ERR_SEL_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_DBG_BUS_CFGQ_TRACE1_TRACE_ERR_SEL = 44 ; -static const uint8_t EXPLR_MCBIST_DBG_BUS_CFGQ_TRACE1_TRACE_ERR_SEL_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_DBG_BUS_CFGQ_DFI_SLICE_SEL_A = 48 ; -static const uint8_t EXPLR_MCBIST_DBG_BUS_CFGQ_DFI_SLICE_SEL_A_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_DBG_BUS_CFGQ_DFI_SLICE_SEL_B = 52 ; -static const uint8_t EXPLR_MCBIST_DBG_BUS_CFGQ_DFI_SLICE_SEL_B_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_DBG_BUS_CFGQ_RESERVED_56 = 56 ; -static const uint8_t EXPLR_MCBIST_DBG_BUS_CFGQ_DFI_GROUP_SEL0 = 57 ; -static const uint8_t EXPLR_MCBIST_DBG_BUS_CFGQ_DFI_GROUP_SEL0_LEN = 3 ; -static const uint8_t EXPLR_MCBIST_DBG_BUS_CFGQ_RESERVED_60 = 60 ; -static const uint8_t EXPLR_MCBIST_DBG_BUS_CFGQ_DFI_GROUP_SEL1 = 61 ; -static const uint8_t EXPLR_MCBIST_DBG_BUS_CFGQ_DFI_GROUP_SEL1_LEN = 3 ; - -static const uint8_t EXPLR_MCBIST_ERR_HOLD_LAT_FIR_MASK_PAR = 0 ; -static const uint8_t EXPLR_MCBIST_ERR_HOLD_LAT_FIR_ACTION0_PAR = 1 ; -static const uint8_t EXPLR_MCBIST_ERR_HOLD_LAT_FIR_ACTION1_PAR = 2 ; - -static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MBECTLQ_PE = 0 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_CCS_STATQ_PE = 1 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_CCS_MODEQ_PE = 2 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_RCD_LRDIM_CNTL_WORD0_15Q_PE = 3 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_CCSARRERRINJQ_PE = 4 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_CCS_FIXED_DATA0Q_PE = 5 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_CCS_FIXED_DATA1Q_PE = 6 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MCBAMR0A0Q_PE = 7 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MCBAMR1A0Q_PE = 8 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MCBAMR2A0Q_PE = 9 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MCBAMR3A0Q_PE = 10 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MCBSA0Q_PE = 11 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MCBSA1Q_PE = 12 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MCBEA0Q_PE = 13 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MCBEA1Q_PE = 14 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MCBSA2Q_PE = 15 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MCBSA3Q_PE = 16 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MCBEA2Q_PE = 17 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MCBEA3Q_PE = 18 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MCBLFSRA0Q_PE = 19 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MCBACQ_PE = 20 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MCBAGRAQ_PE = 21 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MCBRDS0Q_PE = 22 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MCBRDS1Q_PE = 23 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MCBDRSRQ_PE = 24 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MCBDRCRQ_PE = 25 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MCBFD0Q_PE = 26 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MCBFD1Q_PE = 27 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MCBFD2Q_PE = 28 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MCBFD3Q_PE = 29 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MCBFD4Q_PE = 30 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MCBFD5Q_PE = 31 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MCBFD6Q_PE = 32 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MCBFD7Q_PE = 33 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MCBFDSPQ_PE = 34 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MCBFDQ_PE = 35 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MCBPARMQ_PE = 36 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_RUNTIMECTRQ_PE = 37 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MCBRCRQ_PE = 38 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MCB_CNTLSTATQ_PE = 39 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MCBCFGQ_PE = 40 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MCBMCATQ_PE = 41 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MBSEC0Q_PE = 42 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MBSEC1Q_PE = 43 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MBSTRQ_PE = 44 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MBSSYMEC0Q_PE = 45 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MBSSYMEC1Q_PE = 46 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MBSSYMEC2Q_PE = 47 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MBSSYMEC3Q_PE = 48 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MBSSYMEC4Q_PE = 49 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MBSSYMEC5Q_PE = 50 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MBSSYMEC6Q_PE = 51 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MBSSYMEC7Q_PE = 52 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MBSSYMEC8Q_PE = 53 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MBSMODESQ_PE = 54 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MCBSTATQ_PE = 55 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MBSMSECQ_PE = 56 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MBNCER0Q_PE = 57 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MBRCER0Q_PE = 58 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MBMPER0Q_PE = 59 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MBUER0Q_PE = 60 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MBAUER0Q_PE = 61 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_DBG_BUS_CFGQ_PE = 62 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MASK1Q_PE = 63 ; - -static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_MASK0Q_PE = 0 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_MBSEVR0Q_PE = 1 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_DBGCFG0Q_PE = 2 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_DBGCFG1Q_PE = 3 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_DBGCFG2Q_PE = 4 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_DBGCFG3Q_PE = 5 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_WATCFG0AQ_PE = 6 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_WATCFG0BQ_PE = 7 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_WATCFG0CQ_PE = 8 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_WATCFG0DQ_PE = 9 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_WATCFG0EQ_PE = 10 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_WATCFG1AQ_PE = 11 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_WATCFG1BQ_PE = 12 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_WATCFG1CQ_PE = 13 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_WATCFG1DQ_PE = 14 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_WATCFG1EQ_PE = 15 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_WATCFG2AQ_PE = 16 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_WATCFG2BQ_PE = 17 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_WATCFG2CQ_PE = 18 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_WATCFG2DQ_PE = 19 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_WATCFG2EQ_PE = 20 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_WATCFG3AQ_PE = 21 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_WATCFG3BQ_PE = 22 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_WATCFG3CQ_PE = 23 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_WATCFG3DQ_PE = 24 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_WATCFG3EQ_PE = 25 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_MCBMR0Q_PE = 26 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_MCBMR1Q_PE = 27 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_MCBMR2Q_PE = 28 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_MCBMR3Q_PE = 29 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_MCBMR4Q_PE = 30 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_MCBMR5Q_PE = 31 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_MCBMR6Q_PE = 32 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_MCBMR7Q_PE = 33 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_MBXLT0Q_PE = 34 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_MBXLT1Q_PE = 35 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_MBXLT2Q_PE = 36 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_CCS_CNTLQ_PE = 37 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_MCB_CNTLQ_PE = 38 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_MCB_FIR_CCS = 39 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_MCB_FIR_MCBFSM = 40 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_CCS_ARRAY_UNCORRECTED_CE = 41 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_CCS_ARRAY_UE = 42 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_CCS_ARRAY_SCOM_ECC = 43 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_RESERVED_44_63 = 44 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_RESERVED_44_63_LEN = 20 ; - -static const uint8_t EXPLR_MCBIST_ERR_MASK_LAT_FIR_PAR = 0 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK_LAT_FIR_ACTION0_PAR = 1 ; -static const uint8_t EXPLR_MCBIST_ERR_MASK_LAT_FIR_ACTION1_PAR = 2 ; - -static const uint8_t EXPLR_MCBIST_MBAUER0Q_PORT_0_MAINLINE_AUE_ADDR_TRAP = 0 ; -static const uint8_t EXPLR_MCBIST_MBAUER0Q_PORT_0_MAINLINE_AUE_ADDR_TRAP_LEN = 38 ; -static const uint8_t EXPLR_MCBIST_MBAUER0Q_RESERVED_38_39 = 38 ; -static const uint8_t EXPLR_MCBIST_MBAUER0Q_RESERVED_38_39_LEN = 2 ; - -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MBECTLQ_PE = 0 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_CCS_STATQ_PE = 1 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_CCS_MODEQ_PE = 2 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_RCD_LRDIM_CNTL_WORD0_15Q_PE = 3 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_CCSARRERRINJQ_PE = 4 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_CCS_FIXED_DATA0Q_PE = 5 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_CCS_FIXED_DATA1Q_PE = 6 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MCBAMR0A0Q_PE = 7 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MCBAMR1A0Q_PE = 8 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MCBAMR2A0Q_PE = 9 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MCBAMR3A0Q_PE = 10 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MCBSA0Q_PE = 11 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MCBSA1Q_PE = 12 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MCBEA0Q_PE = 13 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MCBEA1Q_PE = 14 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MCBSA2Q_PE = 15 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MCBSA3Q_PE = 16 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MCBEA2Q_PE = 17 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MCBEA3Q_PE = 18 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MCBLFSRA0Q_PE = 19 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MCBACQ_PE = 20 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MCBAGRAQ_PE = 21 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MCBRDS0Q_PE = 22 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MCBRDS1Q_PE = 23 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MCBDRSRQ_PE = 24 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MCBDRCRQ_PE = 25 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MCBFD0Q_PE = 26 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MCBFD1Q_PE = 27 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MCBFD2Q_PE = 28 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MCBFD3Q_PE = 29 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MCBFD4Q_PE = 30 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MCBFD5Q_PE = 31 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MCBFD6Q_PE = 32 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MCBFD7Q_PE = 33 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MCBFDSPQ_PE = 34 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MCBFDQ_PE = 35 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MCBPARMQ_PE = 36 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_RUNTIMECTRQ_PE = 37 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MCBRCRQ_PE = 38 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MCB_CNTLSTATQ_PE = 39 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MCBCFGQ_PE = 40 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MCBMCATQ_PE = 41 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MBSEC0Q_PE = 42 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MBSEC1Q_PE = 43 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MBSTRQ_PE = 44 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MBSSYMEC0Q_PE = 45 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MBSSYMEC1Q_PE = 46 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MBSSYMEC2Q_PE = 47 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MBSSYMEC3Q_PE = 48 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MBSSYMEC4Q_PE = 49 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MBSSYMEC5Q_PE = 50 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MBSSYMEC6Q_PE = 51 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MBSSYMEC7Q_PE = 52 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MBSSYMEC8Q_PE = 53 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MBSMODESQ_PE = 54 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MCBSTATQ_PE = 55 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MBSMSECQ_PE = 56 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MBNCER0Q_PE = 57 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MBRCER0Q_PE = 58 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MBMPER0Q_PE = 59 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MBUER0Q_PE = 60 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MBAUER0Q_PE = 61 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_DBG_BUS_CFGQ_PE = 62 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_ERR_MASK1Q_PE = 63 ; - -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_ERR_MASK0Q_PE = 0 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_MBSEVR0Q_PE = 1 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_DBGCFG0Q_PE = 2 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_DBGCFG1Q_PE = 3 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_DBGCFG2Q_PE = 4 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_DBGCFG3Q_PE = 5 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_WATCFG0AQ_PE = 6 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_WATCFG0BQ_PE = 7 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_WATCFG0CQ_PE = 8 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_WATCFG0DQ_PE = 9 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_WATCFG0EQ_PE = 10 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_WATCFG1AQ_PE = 11 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_WATCFG1BQ_PE = 12 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_WATCFG1CQ_PE = 13 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_WATCFG1DQ_PE = 14 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_WATCFG1EQ_PE = 15 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_WATCFG2AQ_PE = 16 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_WATCFG2BQ_PE = 17 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_WATCFG2CQ_PE = 18 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_WATCFG2DQ_PE = 19 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_WATCFG2EQ_PE = 20 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_WATCFG3AQ_PE = 21 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_WATCFG3BQ_PE = 22 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_WATCFG3CQ_PE = 23 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_WATCFG3DQ_PE = 24 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_WATCFG3EQ_PE = 25 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_MCBMR0Q_PE = 26 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_MCBMR1Q_PE = 27 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_MCBMR2Q_PE = 28 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_MCBMR3Q_PE = 29 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_MCBMR4Q_PE = 30 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_MCBMR5Q_PE = 31 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_MCBMR6Q_PE = 32 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_MCBMR7Q_PE = 33 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_MBXLT0Q_PE = 34 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_MBXLT1Q_PE = 35 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_MBXLT2Q_PE = 36 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_CCS_CNTLQ_PE = 37 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_MCB_CNTLQ_PE = 38 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_MCB_FIR_CCS_ERR = 39 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_MCB_FIR_MCBFSM_ERR = 40 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_CCS_ARRAY_UNCORRECTED_CE_ERR = 41 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_CCS_ARRAY_UE_ERR = 42 ; -static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_CCS_ARRAY_SCOM_ECC_ERR = 43 ; - -static const uint8_t EXPLR_MCBIST_MBECTLQ_ATOMIC_ALT_CE_INJ = 0 ; -static const uint8_t EXPLR_MCBIST_MBECTLQ_ATOMIC_ALT_CHIP_KILL_INJ = 1 ; -static const uint8_t EXPLR_MCBIST_MBECTLQ_ATOMIC_ALT_UE_INJ = 2 ; -static const uint8_t EXPLR_MCBIST_MBECTLQ_ATOMIC_ALT_SUE_INJ = 3 ; -static const uint8_t EXPLR_MCBIST_MBECTLQ_ATOMIC_ALT_INJ_SYM_SEL = 4 ; -static const uint8_t EXPLR_MCBIST_MBECTLQ_ATOMIC_ALT_INJ_SYM_SEL_LEN = 7 ; -static const uint8_t EXPLR_MCBIST_MBECTLQ_RESERVE_11 = 11 ; -static const uint8_t EXPLR_MCBIST_MBECTLQ_SCOM_CMD_REG_INJ_MODE = 12 ; -static const uint8_t EXPLR_MCBIST_MBECTLQ_SCOM_CMD_REG_INJ = 13 ; -static const uint8_t EXPLR_MCBIST_MBECTLQ_MCBIST_FSM_INJ_MODE = 14 ; -static const uint8_t EXPLR_MCBIST_MBECTLQ_MCBIST_FSM_INJ_REG = 15 ; -static const uint8_t EXPLR_MCBIST_MBECTLQ_CCS_FSM_INJ_MODE = 16 ; -static const uint8_t EXPLR_MCBIST_MBECTLQ_CCS_FSM_INJ_REG = 17 ; -static const uint8_t EXPLR_MCBIST_MBECTLQ_RESERVED_18_31 = 18 ; -static const uint8_t EXPLR_MCBIST_MBECTLQ_RESERVED_18_31_LEN = 14 ; - -static const uint8_t EXPLR_MCBIST_MBMPER0Q_PORT_0_MAINLINE_MPE_ADDR_TRAP = 0 ; -static const uint8_t EXPLR_MCBIST_MBMPER0Q_PORT_0_MAINLINE_MPE_ADDR_TRAP_LEN = 38 ; -static const uint8_t EXPLR_MCBIST_MBMPER0Q_PORT_0_MAINLINE_MPE_ON_RCE = 38 ; -static const uint8_t EXPLR_MCBIST_MBMPER0Q_RESERVED_39 = 39 ; - -static const uint8_t EXPLR_MCBIST_MBNCER0Q_PORT_0_MAINLINE_NCE_ADDR_TRAP = 0 ; -static const uint8_t EXPLR_MCBIST_MBNCER0Q_PORT_0_MAINLINE_NCE_ADDR_TRAP_LEN = 38 ; -static const uint8_t EXPLR_MCBIST_MBNCER0Q_PORT_0_MAINLINE_NCE_ON_RCE = 38 ; -static const uint8_t EXPLR_MCBIST_MBNCER0Q_PORT_0_MAINLINE_NCE_IS_TCE = 39 ; - -static const uint8_t EXPLR_MCBIST_MBRCER0Q_PORT_0_MAINLINE_RCE_ADDR_TRAP = 0 ; -static const uint8_t EXPLR_MCBIST_MBRCER0Q_PORT_0_MAINLINE_RCE_ADDR_TRAP_LEN = 38 ; -static const uint8_t EXPLR_MCBIST_MBRCER0Q_RESERVED_38_39 = 38 ; -static const uint8_t EXPLR_MCBIST_MBRCER0Q_RESERVED_38_39_LEN = 2 ; - -static const uint8_t EXPLR_MCBIST_MBSEC0Q_INTERMITTENT_CE_COUNT = 0 ; -static const uint8_t EXPLR_MCBIST_MBSEC0Q_INTERMITTENT_CE_COUNT_LEN = 12 ; -static const uint8_t EXPLR_MCBIST_MBSEC0Q_SOFT_CE_COUNT = 12 ; -static const uint8_t EXPLR_MCBIST_MBSEC0Q_SOFT_CE_COUNT_LEN = 12 ; -static const uint8_t EXPLR_MCBIST_MBSEC0Q_HARD_CE_COUNT = 24 ; -static const uint8_t EXPLR_MCBIST_MBSEC0Q_HARD_CE_COUNT_LEN = 12 ; -static const uint8_t EXPLR_MCBIST_MBSEC0Q_INTERMITTENT_MCE_COUNT = 36 ; -static const uint8_t EXPLR_MCBIST_MBSEC0Q_INTERMITTENT_MCE_COUNT_LEN = 12 ; -static const uint8_t EXPLR_MCBIST_MBSEC0Q_SOFT_MCE_COUNT = 48 ; -static const uint8_t EXPLR_MCBIST_MBSEC0Q_SOFT_MCE_COUNT_LEN = 12 ; - -static const uint8_t EXPLR_MCBIST_MBSEC1Q_HARD_MCE_COUNT = 0 ; -static const uint8_t EXPLR_MCBIST_MBSEC1Q_HARD_MCE_COUNT_LEN = 12 ; -static const uint8_t EXPLR_MCBIST_MBSEC1Q_ICE_COUNT = 12 ; -static const uint8_t EXPLR_MCBIST_MBSEC1Q_ICE_COUNT_LEN = 12 ; -static const uint8_t EXPLR_MCBIST_MBSEC1Q_UE_COUNT = 24 ; -static const uint8_t EXPLR_MCBIST_MBSEC1Q_UE_COUNT_LEN = 12 ; -static const uint8_t EXPLR_MCBIST_MBSEC1Q_AUE = 36 ; -static const uint8_t EXPLR_MCBIST_MBSEC1Q_AUE_LEN = 12 ; -static const uint8_t EXPLR_MCBIST_MBSEC1Q_RCE_COUNT = 48 ; -static const uint8_t EXPLR_MCBIST_MBSEC1Q_RCE_COUNT_LEN = 12 ; - -static const uint8_t EXPLR_MCBIST_MBSEVR0Q_PORT_0_MAINLINE_NCE_GALOIS_FIELD = 0 ; + +static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_SPARE = 0 ; +static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_SPARE_LEN = 4 ; +static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_PM_CDR_TIMER = 4 ; +static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_PM_CDR_TIMER_LEN = 4 ; +static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_PM_DIDT_TIMER = 8 ; +static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_PM_DIDT_TIMER_LEN = 4 ; +static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_PSAVE_STS_ENABLE = 12 ; +static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_RECAL_TIMER = 13 ; +static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_RECAL_TIMER_LEN = 3 ; +static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_1US_TMR = 16 ; +static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_1US_TMR_LEN = 12 ; +static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_DBG_EN = 28 ; +static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_DBG_SEL = 29 ; +static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_DBG_SEL_LEN = 3 ; +static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_RD_RST = 32 ; +static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_PRE_SCALAR = 33 ; +static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_PRE_SCALAR_LEN = 3 ; +static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_FREEZE = 36 ; +static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_PORT_SEL = 37 ; +static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_PORT_SEL_LEN = 3 ; +static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_CNTR3_PS = 40 ; +static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_CNTR3_PS_LEN = 2 ; +static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_CNTR3_ES = 42 ; +static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_CNTR3_ES_LEN = 2 ; +static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_CNTR2_PS = 44 ; +static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_CNTR2_PS_LEN = 2 ; +static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_CNTR2_ES = 46 ; +static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_CNTR2_ES_LEN = 2 ; +static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_CNTR1_PS = 48 ; +static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_CNTR1_PS_LEN = 2 ; +static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_CNTR1_ES = 50 ; +static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_CNTR1_ES_LEN = 2 ; +static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_CNTR0_PS = 52 ; +static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_CNTR0_PS_LEN = 2 ; +static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_CNTR0_ES = 54 ; +static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_CNTR0_ES_LEN = 2 ; +static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_CNTR3_PE = 56 ; +static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_CNTR2_PE = 57 ; +static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_CNTR1_PE = 58 ; +static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_CNTR0_PE = 59 ; +static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_CNTR3_EN = 60 ; +static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_CNTR2_EN = 61 ; +static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_CNTR1_EN = 62 ; +static const uint8_t EXPLR_DLX_CMN_CONFIG_CFG_CNTR0_EN = 63 ; + +static const uint8_t EXPLR_DLX_DL0_CONFIG0_CFG_ENABLE = 0 ; +static const uint8_t EXPLR_DLX_DL0_CONFIG0_CFG_CFG_SPARE = 1 ; +static const uint8_t EXPLR_DLX_DL0_CONFIG0_CFG_CFG_SPARE_LEN = 5 ; +static const uint8_t EXPLR_DLX_DL0_CONFIG0_CFG_CFG_TL_CREDITS = 6 ; +static const uint8_t EXPLR_DLX_DL0_CONFIG0_CFG_CFG_TL_CREDITS_LEN = 6 ; +static const uint8_t EXPLR_DLX_DL0_CONFIG0_CFG_TL_EVENT_ACTIONS = 12 ; +static const uint8_t EXPLR_DLX_DL0_CONFIG0_CFG_TL_EVENT_ACTIONS_LEN = 4 ; +static const uint8_t EXPLR_DLX_DL0_CONFIG0_CFG_TL_ERROR_ACTIONS = 16 ; +static const uint8_t EXPLR_DLX_DL0_CONFIG0_CFG_TL_ERROR_ACTIONS_LEN = 4 ; +static const uint8_t EXPLR_DLX_DL0_CONFIG0_CFG_FWD_PROGRESS_TIMER = 20 ; +static const uint8_t EXPLR_DLX_DL0_CONFIG0_CFG_FWD_PROGRESS_TIMER_LEN = 4 ; +static const uint8_t EXPLR_DLX_DL0_CONFIG0_CFG_REPLAY_RSVD_ENTRIES = 24 ; +static const uint8_t EXPLR_DLX_DL0_CONFIG0_CFG_REPLAY_RSVD_ENTRIES_LEN = 4 ; +static const uint8_t EXPLR_DLX_DL0_CONFIG0_CFG_DEBUG_SELECT = 28 ; +static const uint8_t EXPLR_DLX_DL0_CONFIG0_CFG_DEBUG_SELECT_LEN = 3 ; +static const uint8_t EXPLR_DLX_DL0_CONFIG0_CFG_DEBUG_ENABLE = 31 ; +static const uint8_t EXPLR_DLX_DL0_CONFIG0_CFG_DL2TL_DATA_PARITY_INJECT = 32 ; +static const uint8_t EXPLR_DLX_DL0_CONFIG0_CFG_DL2TL_CONTROL_PARITY_INJECT = 33 ; +static const uint8_t EXPLR_DLX_DL0_CONFIG0_CFG_ECC_UE_INJECTION = 34 ; +static const uint8_t EXPLR_DLX_DL0_CONFIG0_CFG_ECC_CE_INJECTION = 35 ; +static const uint8_t EXPLR_DLX_DL0_CONFIG0_CFG_FP_DISABLE = 36 ; +static const uint8_t EXPLR_DLX_DL0_CONFIG0_CFG_UNUSED2 = 37 ; +static const uint8_t EXPLR_DLX_DL0_CONFIG0_CFG_TX_LN_REV_ENA = 38 ; +static const uint8_t EXPLR_DLX_DL0_CONFIG0_CFG_128_130_ENCODING_ENABLED = 39 ; +static const uint8_t EXPLR_DLX_DL0_CONFIG0_CFG_PHY_CNTR_LIMIT = 40 ; +static const uint8_t EXPLR_DLX_DL0_CONFIG0_CFG_PHY_CNTR_LIMIT_LEN = 4 ; +static const uint8_t EXPLR_DLX_DL0_CONFIG0_CFG_RUNLANE_OVRD_ENABLE = 44 ; +static const uint8_t EXPLR_DLX_DL0_CONFIG0_CFG_PWRMGT_ENABLE = 45 ; +static const uint8_t EXPLR_DLX_DL0_CONFIG0_CFG_QUARTER_WIDTH_BACKOFF_ENABLE = 46 ; +static const uint8_t EXPLR_DLX_DL0_CONFIG0_CFG_HALF_WIDTH_BACKOFF_ENABLE = 47 ; +static const uint8_t EXPLR_DLX_DL0_CONFIG0_CFG_SUPPORTED_MODES = 48 ; +static const uint8_t EXPLR_DLX_DL0_CONFIG0_CFG_SUPPORTED_MODES_LEN = 4 ; +static const uint8_t EXPLR_DLX_DL0_CONFIG0_CFG_TRAIN_MODE = 52 ; +static const uint8_t EXPLR_DLX_DL0_CONFIG0_CFG_TRAIN_MODE_LEN = 4 ; +static const uint8_t EXPLR_DLX_DL0_CONFIG0_CFG_VERSION = 56 ; +static const uint8_t EXPLR_DLX_DL0_CONFIG0_CFG_VERSION_LEN = 6 ; +static const uint8_t EXPLR_DLX_DL0_CONFIG0_CFG_RETRAIN = 62 ; +static const uint8_t EXPLR_DLX_DL0_CONFIG0_CFG_RESET = 63 ; + +static const uint8_t EXPLR_DLX_DL0_CONFIG1_CFG_CFG1_SPARE = 0 ; +static const uint8_t EXPLR_DLX_DL0_CONFIG1_CFG_CFG1_SPARE_LEN = 2 ; +static const uint8_t EXPLR_DLX_DL0_CONFIG1_CFG_LANE_WIDTH = 2 ; +static const uint8_t EXPLR_DLX_DL0_CONFIG1_CFG_LANE_WIDTH_LEN = 2 ; +static const uint8_t EXPLR_DLX_DL0_CONFIG1_CFG_PREIPL_PRBS_ENA = 4 ; +static const uint8_t EXPLR_DLX_DL0_CONFIG1_CFG_PREIPL_PRBS_TIME = 5 ; +static const uint8_t EXPLR_DLX_DL0_CONFIG1_CFG_PREIPL_PRBS_TIME_LEN = 3 ; +static const uint8_t EXPLR_DLX_DL0_CONFIG1_CFG_B_HYSTERESIS = 8 ; +static const uint8_t EXPLR_DLX_DL0_CONFIG1_CFG_B_HYSTERESIS_LEN = 4 ; +static const uint8_t EXPLR_DLX_DL0_CONFIG1_CFG_A_HYSTERESIS = 12 ; +static const uint8_t EXPLR_DLX_DL0_CONFIG1_CFG_A_HYSTERESIS_LEN = 4 ; +static const uint8_t EXPLR_DLX_DL0_CONFIG1_CFG_B_PATTERN_LENGTH = 16 ; +static const uint8_t EXPLR_DLX_DL0_CONFIG1_CFG_B_PATTERN_LENGTH_LEN = 2 ; +static const uint8_t EXPLR_DLX_DL0_CONFIG1_CFG_A_PATTERN_LENGTH = 18 ; +static const uint8_t EXPLR_DLX_DL0_CONFIG1_CFG_A_PATTERN_LENGTH_LEN = 2 ; +static const uint8_t EXPLR_DLX_DL0_CONFIG1_CFG_TX_PERF_DEGRADED = 20 ; +static const uint8_t EXPLR_DLX_DL0_CONFIG1_CFG_TX_PERF_DEGRADED_LEN = 2 ; +static const uint8_t EXPLR_DLX_DL0_CONFIG1_CFG_RX_PERF_DEGRADED = 22 ; +static const uint8_t EXPLR_DLX_DL0_CONFIG1_CFG_RX_PERF_DEGRADED_LEN = 2 ; +static const uint8_t EXPLR_DLX_DL0_CONFIG1_CFG_TX_LANES_DISABLE = 24 ; +static const uint8_t EXPLR_DLX_DL0_CONFIG1_CFG_TX_LANES_DISABLE_LEN = 8 ; +static const uint8_t EXPLR_DLX_DL0_CONFIG1_CFG_RX_LANES_DISABLE = 32 ; +static const uint8_t EXPLR_DLX_DL0_CONFIG1_CFG_RX_LANES_DISABLE_LEN = 8 ; +static const uint8_t EXPLR_DLX_DL0_CONFIG1_CFG_MACRO_DBG_SEL = 40 ; +static const uint8_t EXPLR_DLX_DL0_CONFIG1_CFG_MACRO_DBG_SEL_LEN = 4 ; +static const uint8_t EXPLR_DLX_DL0_CONFIG1_CFG_RESET_ERR_HLD = 44 ; +static const uint8_t EXPLR_DLX_DL0_CONFIG1_CFG_RESET_ERR_CAP = 45 ; +static const uint8_t EXPLR_DLX_DL0_CONFIG1_CFG_RESET_TSHD_REG = 46 ; +static const uint8_t EXPLR_DLX_DL0_CONFIG1_CFG_RESET_RMT_MSG = 47 ; +static const uint8_t EXPLR_DLX_DL0_CONFIG1_CFG_INJECT_CRC_DIRECTION = 48 ; +static const uint8_t EXPLR_DLX_DL0_CONFIG1_CFG_INJECT_CRC_RATE = 49 ; +static const uint8_t EXPLR_DLX_DL0_CONFIG1_CFG_INJECT_CRC_RATE_LEN = 3 ; +static const uint8_t EXPLR_DLX_DL0_CONFIG1_CFG_INJECT_CRC_LANE = 52 ; +static const uint8_t EXPLR_DLX_DL0_CONFIG1_CFG_INJECT_CRC_LANE_LEN = 3 ; +static const uint8_t EXPLR_DLX_DL0_CONFIG1_CFG_INJECT_CRC_ERROR = 55 ; +static const uint8_t EXPLR_DLX_DL0_CONFIG1_CFG_EDPL_TIME = 56 ; +static const uint8_t EXPLR_DLX_DL0_CONFIG1_CFG_EDPL_TIME_LEN = 4 ; +static const uint8_t EXPLR_DLX_DL0_CONFIG1_CFG_EDPL_THRESHOLD = 60 ; +static const uint8_t EXPLR_DLX_DL0_CONFIG1_CFG_EDPL_THRESHOLD_LEN = 3 ; +static const uint8_t EXPLR_DLX_DL0_CONFIG1_CFG_EDPL_ENA = 63 ; + +static const uint8_t EXPLR_DLX_DL0_CYA_BITS_CFG_BITS0 = 32 ; +static const uint8_t EXPLR_DLX_DL0_CYA_BITS_CFG_BITS0_LEN = 17 ; +static const uint8_t EXPLR_DLX_DL0_CYA_BITS_CFG_KILL_CRC_REPLAY0 = 49 ; +static const uint8_t EXPLR_DLX_DL0_CYA_BITS_CFG_RETRAIN_CRC_REPLAY0 = 50 ; +static const uint8_t EXPLR_DLX_DL0_CYA_BITS_CFG_PM_DISABLE_EDPL0 = 51 ; +static const uint8_t EXPLR_DLX_DL0_CYA_BITS_CFG_RETRAIN_CRC_RETRAIN0 = 52 ; +static const uint8_t EXPLR_DLX_DL0_CYA_BITS_CFG_RETRAIN_CRC_RESET0 = 53 ; +static const uint8_t EXPLR_DLX_DL0_CYA_BITS_CFG_FRBUF_FULL0 = 54 ; +static const uint8_t EXPLR_DLX_DL0_CYA_BITS_CFG_FRBUF_FULL_REPLAY0 = 55 ; +static const uint8_t EXPLR_DLX_DL0_CYA_BITS_CFG_PM_RETRAIN0 = 56 ; +static const uint8_t EXPLR_DLX_DL0_CYA_BITS_CFG_PM_RESET0 = 57 ; +static const uint8_t EXPLR_DLX_DL0_CYA_BITS_CFG_CRC_RETRAIN0 = 58 ; +static const uint8_t EXPLR_DLX_DL0_CYA_BITS_CFG_CRC_RESET0 = 59 ; +static const uint8_t EXPLR_DLX_DL0_CYA_BITS_CFG_MESO_BUFFER_ENABLE = 60 ; +static const uint8_t EXPLR_DLX_DL0_CYA_BITS_CFG_MESO_BUFFER_START = 61 ; +static const uint8_t EXPLR_DLX_DL0_CYA_BITS_CFG_MESO_BUFFER_DEPTH = 62 ; +static const uint8_t EXPLR_DLX_DL0_CYA_BITS_CFG_MESO_BUFFER_DEPTH_LEN = 2 ; + +static const uint8_t EXPLR_DLX_DL0_DEBUG_AID_RESERVED = 0 ; +static const uint8_t EXPLR_DLX_DL0_DEBUG_AID_RESERVED_LEN = 55 ; +static const uint8_t EXPLR_DLX_DL0_DEBUG_AID_PRBS7_RESET = 55 ; +static const uint8_t EXPLR_DLX_DL0_DEBUG_AID_PRBS7_STATUS = 56 ; +static const uint8_t EXPLR_DLX_DL0_DEBUG_AID_PRBS7_STATUS_LEN = 8 ; + +static const uint8_t EXPLR_DLX_DL0_DLX_CONFIG_CFG_DLX0 = 32 ; +static const uint8_t EXPLR_DLX_DL0_DLX_CONFIG_CFG_DLX0_LEN = 32 ; + +static const uint8_t EXPLR_DLX_DL0_DLX_INFO_STS = 0 ; +static const uint8_t EXPLR_DLX_DL0_DLX_INFO_STS_LEN = 64 ; + +static const uint8_t EXPLR_DLX_DL0_EDPL_MAX_COUNT_L7 = 0 ; +static const uint8_t EXPLR_DLX_DL0_EDPL_MAX_COUNT_L7_LEN = 8 ; +static const uint8_t EXPLR_DLX_DL0_EDPL_MAX_COUNT_L6 = 8 ; +static const uint8_t EXPLR_DLX_DL0_EDPL_MAX_COUNT_L6_LEN = 8 ; +static const uint8_t EXPLR_DLX_DL0_EDPL_MAX_COUNT_L5 = 16 ; +static const uint8_t EXPLR_DLX_DL0_EDPL_MAX_COUNT_L5_LEN = 8 ; +static const uint8_t EXPLR_DLX_DL0_EDPL_MAX_COUNT_L4 = 24 ; +static const uint8_t EXPLR_DLX_DL0_EDPL_MAX_COUNT_L4_LEN = 8 ; +static const uint8_t EXPLR_DLX_DL0_EDPL_MAX_COUNT_L3 = 32 ; +static const uint8_t EXPLR_DLX_DL0_EDPL_MAX_COUNT_L3_LEN = 8 ; +static const uint8_t EXPLR_DLX_DL0_EDPL_MAX_COUNT_L2 = 40 ; +static const uint8_t EXPLR_DLX_DL0_EDPL_MAX_COUNT_L2_LEN = 8 ; +static const uint8_t EXPLR_DLX_DL0_EDPL_MAX_COUNT_L1 = 48 ; +static const uint8_t EXPLR_DLX_DL0_EDPL_MAX_COUNT_L1_LEN = 8 ; +static const uint8_t EXPLR_DLX_DL0_EDPL_MAX_COUNT_L0 = 56 ; +static const uint8_t EXPLR_DLX_DL0_EDPL_MAX_COUNT_L0_LEN = 8 ; + +static const uint8_t EXPLR_DLX_DL0_ERROR_ACTION_FIR_11 = 16 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_ACTION_FIR_11_LEN = 4 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_ACTION_FIR_10 = 20 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_ACTION_FIR_10_LEN = 4 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_ACTION_FIR_9 = 24 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_ACTION_FIR_9_LEN = 4 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_ACTION_FIR_8 = 28 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_ACTION_FIR_8_LEN = 4 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_ACTION_FIR_7 = 32 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_ACTION_FIR_7_LEN = 4 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_ACTION_FIR_6 = 36 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_ACTION_FIR_6_LEN = 4 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_ACTION_FIR_5 = 40 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_ACTION_FIR_5_LEN = 4 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_ACTION_FIR_4 = 44 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_ACTION_FIR_4_LEN = 4 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_ACTION_FIR_3 = 48 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_ACTION_FIR_3_LEN = 4 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_ACTION_FIR_2 = 52 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_ACTION_FIR_2_LEN = 4 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_ACTION_FIR_1 = 56 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_ACTION_FIR_1_LEN = 4 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_ACTION_FIR_0 = 60 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_ACTION_FIR_0_LEN = 4 ; + +static const uint8_t EXPLR_DLX_DL0_ERROR_CAPTURE_INFO = 1 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_CAPTURE_INFO_LEN = 63 ; + +static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_47 = 16 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_46 = 17 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_45 = 18 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_44 = 19 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_43 = 20 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_42 = 21 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_41 = 22 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_40 = 23 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_39 = 24 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_38 = 25 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_37 = 26 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_36 = 27 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_35 = 28 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_34 = 29 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_33 = 30 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_32 = 31 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_31 = 32 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_30 = 33 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_29 = 34 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_28 = 35 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_27 = 36 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_26 = 37 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_25 = 38 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_24 = 39 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_23 = 40 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_22 = 41 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_21 = 42 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_20 = 43 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_19 = 44 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_18 = 45 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_17 = 46 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_16 = 47 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_15 = 48 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_14 = 49 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_13 = 50 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_12 = 51 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_11 = 52 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_10 = 53 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_09 = 54 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_08 = 55 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_07 = 56 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_06 = 57 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_05 = 58 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_04 = 59 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_03 = 60 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_02 = 61 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_01 = 62 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_HOLD_CERR_00 = 63 ; + +static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_47 = 16 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_46 = 17 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_45 = 18 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_44 = 19 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_43 = 20 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_42 = 21 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_41 = 22 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_40 = 23 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_39 = 24 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_38 = 25 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_37 = 26 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_36 = 27 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_35 = 28 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_34 = 29 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_33 = 30 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_32 = 31 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_31 = 32 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_30 = 33 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_29 = 34 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_28 = 35 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_27 = 36 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_26 = 37 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_25 = 38 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_24 = 39 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_23 = 40 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_22 = 41 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_21 = 42 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_20 = 43 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_19 = 44 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_18 = 45 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_17 = 46 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_16 = 47 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_15 = 48 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_14 = 49 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_13 = 50 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_12 = 51 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_11 = 52 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_10 = 53 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_09 = 54 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_08 = 55 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_07 = 56 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_06 = 57 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_05 = 58 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_04 = 59 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_03 = 60 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_02 = 61 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_01 = 62 ; +static const uint8_t EXPLR_DLX_DL0_ERROR_MASK_00 = 63 ; + +static const uint8_t EXPLR_DLX_DL0_STATUS_STS_TRAINED_MODE = 0 ; +static const uint8_t EXPLR_DLX_DL0_STATUS_STS_TRAINED_MODE_LEN = 4 ; +static const uint8_t EXPLR_DLX_DL0_STATUS_STS_RX_LANE_REVERSED = 4 ; +static const uint8_t EXPLR_DLX_DL0_STATUS_STS_TX_LANE_REVERSED = 5 ; +static const uint8_t EXPLR_DLX_DL0_STATUS_STS_RSVD0 = 6 ; +static const uint8_t EXPLR_DLX_DL0_STATUS_STS_ACK_PTRS_EQUAL = 7 ; +static const uint8_t EXPLR_DLX_DL0_STATUS_STS_RSVD1 = 8 ; +static const uint8_t EXPLR_DLX_DL0_STATUS_STS_RSVD1_LEN = 4 ; +static const uint8_t EXPLR_DLX_DL0_STATUS_STS_REQUESTED_LN_WIDTH = 12 ; +static const uint8_t EXPLR_DLX_DL0_STATUS_STS_REQUESTED_LN_WIDTH_LEN = 2 ; +static const uint8_t EXPLR_DLX_DL0_STATUS_STS_ACTUAL_LN_WIDTH = 14 ; +static const uint8_t EXPLR_DLX_DL0_STATUS_STS_ACTUAL_LN_WIDTH_LEN = 2 ; +static const uint8_t EXPLR_DLX_DL0_STATUS_STS_TX_TRAINED_LANES = 16 ; +static const uint8_t EXPLR_DLX_DL0_STATUS_STS_TX_TRAINED_LANES_LEN = 8 ; +static const uint8_t EXPLR_DLX_DL0_STATUS_STS_RX_TRAINED_LANES = 24 ; +static const uint8_t EXPLR_DLX_DL0_STATUS_STS_RX_TRAINED_LANES_LEN = 8 ; +static const uint8_t EXPLR_DLX_DL0_STATUS_STS_ENDPOINT_INFO = 32 ; +static const uint8_t EXPLR_DLX_DL0_STATUS_STS_ENDPOINT_INFO_LEN = 16 ; +static const uint8_t EXPLR_DLX_DL0_STATUS_STS_RSVD2 = 48 ; +static const uint8_t EXPLR_DLX_DL0_STATUS_STS_TRAINING_STATE_MACHINE = 49 ; +static const uint8_t EXPLR_DLX_DL0_STATUS_STS_TRAINING_STATE_MACHINE_LEN = 3 ; +static const uint8_t EXPLR_DLX_DL0_STATUS_STS_RSVD3 = 52 ; +static const uint8_t EXPLR_DLX_DL0_STATUS_STS_RSVD3_LEN = 3 ; +static const uint8_t EXPLR_DLX_DL0_STATUS_STS_DESKEW_DONE = 55 ; +static const uint8_t EXPLR_DLX_DL0_STATUS_STS_LANES_DISABLED = 56 ; +static const uint8_t EXPLR_DLX_DL0_STATUS_STS_LANES_DISABLED_LEN = 8 ; + +static const uint8_t EXPLR_DLX_DL0_TRAINING_STATUS_STS_RX_PATTERN_A = 0 ; +static const uint8_t EXPLR_DLX_DL0_TRAINING_STATUS_STS_RX_PATTERN_A_LEN = 8 ; +static const uint8_t EXPLR_DLX_DL0_TRAINING_STATUS_STS_RX_PATTERN_B = 8 ; +static const uint8_t EXPLR_DLX_DL0_TRAINING_STATUS_STS_RX_PATTERN_B_LEN = 8 ; +static const uint8_t EXPLR_DLX_DL0_TRAINING_STATUS_STS_SYNC_PATTERN = 16 ; +static const uint8_t EXPLR_DLX_DL0_TRAINING_STATUS_STS_SYNC_PATTERN_LEN = 8 ; +static const uint8_t EXPLR_DLX_DL0_TRAINING_STATUS_STS_PHY_INIT_DONE = 24 ; +static const uint8_t EXPLR_DLX_DL0_TRAINING_STATUS_STS_PHY_INIT_DONE_LEN = 8 ; +static const uint8_t EXPLR_DLX_DL0_TRAINING_STATUS_STS_BLOCK_LOCKED = 32 ; +static const uint8_t EXPLR_DLX_DL0_TRAINING_STATUS_STS_BLOCK_LOCKED_LEN = 8 ; +static const uint8_t EXPLR_DLX_DL0_TRAINING_STATUS_STS_RX_TS1 = 40 ; +static const uint8_t EXPLR_DLX_DL0_TRAINING_STATUS_STS_RX_TS1_LEN = 8 ; +static const uint8_t EXPLR_DLX_DL0_TRAINING_STATUS_STS_RX_TS2 = 48 ; +static const uint8_t EXPLR_DLX_DL0_TRAINING_STATUS_STS_RX_TS2_LEN = 8 ; +static const uint8_t EXPLR_DLX_DL0_TRAINING_STATUS_STS_RX_TS3 = 56 ; +static const uint8_t EXPLR_DLX_DL0_TRAINING_STATUS_STS_RX_TS3_LEN = 8 ; + +static const uint8_t EXPLR_DLX_ERR_HOLD_LAT_FIR_MASK_PAR = 0 ; +static const uint8_t EXPLR_DLX_ERR_HOLD_LAT_FIR_ACTION0_PAR = 1 ; +static const uint8_t EXPLR_DLX_ERR_HOLD_LAT_FIR_ACTION1_PAR = 2 ; + +static const uint8_t EXPLR_DLX_ERR_MASK_LAT_FIR_PAR = 0 ; +static const uint8_t EXPLR_DLX_ERR_MASK_LAT_FIR_ACTION0_PAR = 1 ; +static const uint8_t EXPLR_DLX_ERR_MASK_LAT_FIR_ACTION1_PAR = 2 ; + +static const uint8_t EXPLR_DLX_MC_OMI_FIR_ACTION0_REG_ACTION0 = 0 ; +static const uint8_t EXPLR_DLX_MC_OMI_FIR_ACTION0_REG_ACTION0_LEN = 64 ; + +static const uint8_t EXPLR_DLX_MC_OMI_FIR_ACTION1_REG_ACTION1 = 0 ; +static const uint8_t EXPLR_DLX_MC_OMI_FIR_ACTION1_REG_ACTION1_LEN = 64 ; + +static const uint8_t EXPLR_DLX_MC_OMI_FIR_MASK_REG_DL0_ERROR = 0 ; +static const uint8_t EXPLR_DLX_MC_OMI_FIR_MASK_REG_DL0_ERROR_LEN = 20 ; +static const uint8_t EXPLR_DLX_MC_OMI_FIR_MASK_REG_DL1_ERROR = 20 ; +static const uint8_t EXPLR_DLX_MC_OMI_FIR_MASK_REG_DL1_ERROR_LEN = 20 ; +static const uint8_t EXPLR_DLX_MC_OMI_FIR_MASK_REG_DL2_ERROR = 40 ; +static const uint8_t EXPLR_DLX_MC_OMI_FIR_MASK_REG_DL2_ERROR_LEN = 20 ; +static const uint8_t EXPLR_DLX_MC_OMI_FIR_MASK_REG_PERF_MON_WRAPPED = 60 ; +static const uint8_t EXPLR_DLX_MC_OMI_FIR_MASK_REG_LFIR_PAR_ERR = 62 ; +static const uint8_t EXPLR_DLX_MC_OMI_FIR_MASK_REG_SCOM_SAT_ERR = 63 ; + +static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL0_FATAL_ERROR = 0 ; +static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL0_DATA_UE = 1 ; +static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL0_FLIT_CE = 2 ; +static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL0_CRC_ERROR = 3 ; +static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL0_NACK = 4 ; +static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL0_X4_MODE = 5 ; +static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL0_EDPL = 6 ; +static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL0_TIMEOUT = 7 ; +static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL0_REMOTE_RETRAIN = 8 ; +static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL0_ERROR_RETRAIN = 9 ; +static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL0_EDPL_RETRAIN = 10 ; +static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL0_TRAINED = 11 ; +static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL0_ENDPOINT_FIR0 = 12 ; +static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL0_ENDPOINT_FIR1 = 13 ; +static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL0_ENDPOINT_FIR2 = 14 ; +static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL0_ENDPOINT_FIR3 = 15 ; +static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL0_ENDPOINT_FIR4 = 16 ; +static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL0_ENDPOINT_FIR5 = 17 ; +static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL0_ENDPOINT_FIR6 = 18 ; +static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL0_ENDPOINT_FIR7 = 19 ; +static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL1_FATAL_ERROR = 20 ; +static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL1_DATA_UE = 21 ; +static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL1_FLIT_CE = 22 ; +static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL1_CRC_ERROR = 23 ; +static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL1_NACK = 24 ; +static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL1_X4_MODE = 25 ; +static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL1_EDPL = 26 ; +static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL1_TIMEOUT = 27 ; +static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL1_REMOTE_RETRAIN = 28 ; +static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL1_ERROR_RETRAIN = 29 ; +static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL1_EDPL_RETRAIN = 30 ; +static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL1_TRAINED = 31 ; +static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL1_ENDPOINT_FIR0 = 32 ; +static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL1_ENDPOINT_FIR1 = 33 ; +static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL1_ENDPOINT_FIR2 = 34 ; +static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL1_ENDPOINT_FIR3 = 35 ; +static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL1_ENDPOINT_FIR4 = 36 ; +static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL1_ENDPOINT_FIR5 = 37 ; +static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL1_ENDPOINT_FIR6 = 38 ; +static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL1_ENDPOINT_FIR7 = 39 ; +static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL2_FATAL_ERROR = 40 ; +static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL2_DATA_UE = 41 ; +static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL2_FLIT_CE = 42 ; +static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL2_CRC_ERROR = 43 ; +static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL2_NACK = 44 ; +static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL2_X4_MODE = 45 ; +static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL2_EDPL = 46 ; +static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL2_TIMEOUT = 47 ; +static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL2_REMOTE_RETRAIN = 48 ; +static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL2_ERROR_RETRAIN = 49 ; +static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL2_EDPL_RETRAIN = 50 ; +static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL2_TRAINED = 51 ; +static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL2_ENDPOINT_FIR0 = 52 ; +static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL2_ENDPOINT_FIR1 = 53 ; +static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL2_ENDPOINT_FIR2 = 54 ; +static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL2_ENDPOINT_FIR3 = 55 ; +static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL2_ENDPOINT_FIR4 = 56 ; +static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL2_ENDPOINT_FIR5 = 57 ; +static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL2_ENDPOINT_FIR6 = 58 ; +static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_DL2_ENDPOINT_FIR7 = 59 ; +static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_PERF_MON_WRAPPED = 60 ; +static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_LFIR_PAR_ERR = 62 ; +static const uint8_t EXPLR_DLX_MC_OMI_FIR_REG_SCOM_SAT_ERR = 63 ; + +static const uint8_t EXPLR_DLX_MC_OMI_FIR_WOF_REG_WOF = 0 ; +static const uint8_t EXPLR_DLX_MC_OMI_FIR_WOF_REG_WOF_LEN = 64 ; + +static const uint8_t EXPLR_DLX_PMU_CNTR_CFG_PMU3 = 0 ; +static const uint8_t EXPLR_DLX_PMU_CNTR_CFG_PMU3_LEN = 16 ; +static const uint8_t EXPLR_DLX_PMU_CNTR_CFG_PMU2 = 16 ; +static const uint8_t EXPLR_DLX_PMU_CNTR_CFG_PMU2_LEN = 16 ; +static const uint8_t EXPLR_DLX_PMU_CNTR_CFG_PMU1 = 32 ; +static const uint8_t EXPLR_DLX_PMU_CNTR_CFG_PMU1_LEN = 16 ; +static const uint8_t EXPLR_DLX_PMU_CNTR_CFG_PMU0 = 48 ; +static const uint8_t EXPLR_DLX_PMU_CNTR_CFG_PMU0_LEN = 16 ; + +static const uint8_t EXPLR_MCBIST_CCSARRERRINJQ_CCS_ARRAY_CE_ERR_INJ_MODE = 0 ; +static const uint8_t EXPLR_MCBIST_CCSARRERRINJQ_CCS_ARRAY_CE_ERR_INJ = 1 ; +static const uint8_t EXPLR_MCBIST_CCSARRERRINJQ_CCS_ARRAY_UE_ERR_INJ_MODE = 2 ; +static const uint8_t EXPLR_MCBIST_CCSARRERRINJQ_CCS_ARRAY_UE_ERR_INJ = 3 ; +static const uint8_t EXPLR_MCBIST_CCSARRERRINJQ_RESERVED_4 = 4 ; +static const uint8_t EXPLR_MCBIST_CCSARRERRINJQ_DISABLE_2N_MODE = 5 ; +static const uint8_t EXPLR_MCBIST_CCSARRERRINJQ_RESERVED_6_14 = 6 ; +static const uint8_t EXPLR_MCBIST_CCSARRERRINJQ_RESERVED_6_14_LEN = 9 ; +static const uint8_t EXPLR_MCBIST_CCSARRERRINJQ_READ_RESPONSE_DELAY_ENABLE = 15 ; +static const uint8_t EXPLR_MCBIST_CCSARRERRINJQ_CCS_LOOP_COUNTER_COMPARE0 = 16 ; +static const uint8_t EXPLR_MCBIST_CCSARRERRINJQ_CCS_LOOP_COUNTER_COMPARE0_LEN = 16 ; +static const uint8_t EXPLR_MCBIST_CCSARRERRINJQ_CCS_LOOP_COUNTER_COMPARE1 = 32 ; +static const uint8_t EXPLR_MCBIST_CCSARRERRINJQ_CCS_LOOP_COUNTER_COMPARE1_LEN = 16 ; +static const uint8_t EXPLR_MCBIST_CCSARRERRINJQ_CCS_LOOP_COUNTER_COMPARE2 = 48 ; +static const uint8_t EXPLR_MCBIST_CCSARRERRINJQ_CCS_LOOP_COUNTER_COMPARE2_LEN = 16 ; + +static const uint8_t EXPLR_MCBIST_CCS_CNTLQ_START = 0 ; +static const uint8_t EXPLR_MCBIST_CCS_CNTLQ_STOP = 1 ; +static const uint8_t EXPLR_MCBIST_CCS_CNTLQ_UNPAUSE = 2 ; + +static const uint8_t EXPLR_MCBIST_CCS_FIXED_DATA0Q_DATA_0_63 = 0 ; +static const uint8_t EXPLR_MCBIST_CCS_FIXED_DATA0Q_DATA_0_63_LEN = 64 ; + +static const uint8_t EXPLR_MCBIST_CCS_FIXED_DATA1Q_DATA_64_79 = 0 ; +static const uint8_t EXPLR_MCBIST_CCS_FIXED_DATA1Q_DATA_64_79_LEN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_FIXED_DATA1Q_NTTM_READ_DELAY = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_FIXED_DATA1Q_NTTM_READ_DELAY_LEN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_FIXED_DATA1Q_WRITE_DATA_DELAY = 32 ; +static const uint8_t EXPLR_MCBIST_CCS_FIXED_DATA1Q_WRITE_DATA_DELAY_LEN = 16 ; + +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_00_DDR_ADDRESS_0_13 = 0 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_00_DDR_ADDRESS_0_13_LEN = 14 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_00_DDR_ADDRESS_17 = 14 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_00_DDR_BANK_GROUP_1 = 15 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_00_DDR_RESETN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_00_DDR_BANK_0_1 = 17 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_00_DDR_BANK_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_00_DDR_BANK_GROUP_0 = 19 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_00_DDR_ACTN = 20 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_00_DDR_ADDRESS_16 = 21 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_00_DDR_ADDRESS_15 = 22 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_00_DDR_ADDRESS_14 = 23 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_00_DDR_CKE = 24 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_00_DDR_CKE_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_00_ADDRESS_OP = 28 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_00_ADDRESS_OP_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_00_RESERVED_30_31 = 30 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_00_RESERVED_30_31_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_00_DDR_CSN_0_1 = 32 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_00_DDR_CSN_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_00_DDR_CID_0_1 = 34 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_00_DDR_CID_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_00_DDR_CSN_2_3 = 36 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_00_DDR_CSN_2_3_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_00_DDR_CID_2 = 38 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_00_FORCE_DATA_IMMED = 39 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_00_NESTED_LOOP_CNT = 40 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_00_NESTED_LOOP_CNT_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_00_DDR_ODT = 48 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_00_DDR_ODT_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_00_RESERVED_52_54 = 52 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_00_RESERVED_52_54_LEN = 3 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_00_PAUSE_INSTR = 55 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_00_VARIABLE_SEL = 56 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_00_VARIABLE_SEL_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_00_RESERVED_58_59 = 58 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_00_RESERVED_58_59_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_00_DDR_PARITY = 60 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_00_DDR_BANK_2 = 61 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_00_LOOP_BREAK_MODE = 62 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_00_LOOP_BREAK_MODE_LEN = 2 ; + +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_01_DDR_ADDRESS_0_13 = 0 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_01_DDR_ADDRESS_0_13_LEN = 14 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_01_DDR_ADDRESS_17 = 14 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_01_DDR_BANK_GROUP_1 = 15 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_01_DDR_RESETN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_01_DDR_BANK_0_1 = 17 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_01_DDR_BANK_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_01_DDR_BANK_GROUP_0 = 19 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_01_DDR_ACTN = 20 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_01_DDR_ADDRESS_16 = 21 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_01_DDR_ADDRESS_15 = 22 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_01_DDR_ADDRESS_14 = 23 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_01_DDR_CKE = 24 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_01_DDR_CKE_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_01_ADDRESS_OP = 28 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_01_ADDRESS_OP_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_01_RESERVED_30_31 = 30 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_01_RESERVED_30_31_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_01_DDR_CSN_0_1 = 32 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_01_DDR_CSN_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_01_DDR_CID_0_1 = 34 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_01_DDR_CID_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_01_DDR_CSN_2_3 = 36 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_01_DDR_CSN_2_3_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_01_DDR_CID_2 = 38 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_01_FORCE_DATA_IMMED = 39 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_01_NESTED_LOOP_CNT = 40 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_01_NESTED_LOOP_CNT_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_01_DDR_ODT = 48 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_01_DDR_ODT_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_01_RESERVED_52_54 = 52 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_01_RESERVED_52_54_LEN = 3 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_01_PAUSE_INSTR = 55 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_01_VARIABLE_SEL = 56 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_01_VARIABLE_SEL_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_01_RESERVED_58_59 = 58 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_01_RESERVED_58_59_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_01_DDR_PARITY = 60 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_01_DDR_BANK_2 = 61 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_01_LOOP_BREAK_MODE = 62 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_01_LOOP_BREAK_MODE_LEN = 2 ; + +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_02_DDR_ADDRESS_0_13 = 0 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_02_DDR_ADDRESS_0_13_LEN = 14 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_02_DDR_ADDRESS_17 = 14 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_02_DDR_BANK_GROUP_1 = 15 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_02_DDR_RESETN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_02_DDR_BANK_0_1 = 17 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_02_DDR_BANK_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_02_DDR_BANK_GROUP_0 = 19 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_02_DDR_ACTN = 20 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_02_DDR_ADDRESS_16 = 21 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_02_DDR_ADDRESS_15 = 22 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_02_DDR_ADDRESS_14 = 23 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_02_DDR_CKE = 24 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_02_DDR_CKE_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_02_ADDRESS_OP = 28 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_02_ADDRESS_OP_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_02_RESERVED_30_31 = 30 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_02_RESERVED_30_31_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_02_DDR_CSN_0_1 = 32 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_02_DDR_CSN_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_02_DDR_CID_0_1 = 34 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_02_DDR_CID_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_02_DDR_CSN_2_3 = 36 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_02_DDR_CSN_2_3_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_02_DDR_CID_2 = 38 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_02_FORCE_DATA_IMMED = 39 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_02_NESTED_LOOP_CNT = 40 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_02_NESTED_LOOP_CNT_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_02_DDR_ODT = 48 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_02_DDR_ODT_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_02_RESERVED_52_54 = 52 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_02_RESERVED_52_54_LEN = 3 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_02_PAUSE_INSTR = 55 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_02_VARIABLE_SEL = 56 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_02_VARIABLE_SEL_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_02_RESERVED_58_59 = 58 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_02_RESERVED_58_59_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_02_DDR_PARITY = 60 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_02_DDR_BANK_2 = 61 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_02_LOOP_BREAK_MODE = 62 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_02_LOOP_BREAK_MODE_LEN = 2 ; + +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_03_DDR_ADDRESS_0_13 = 0 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_03_DDR_ADDRESS_0_13_LEN = 14 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_03_DDR_ADDRESS_17 = 14 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_03_DDR_BANK_GROUP_1 = 15 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_03_DDR_RESETN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_03_DDR_BANK_0_1 = 17 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_03_DDR_BANK_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_03_DDR_BANK_GROUP_0 = 19 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_03_DDR_ACTN = 20 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_03_DDR_ADDRESS_16 = 21 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_03_DDR_ADDRESS_15 = 22 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_03_DDR_ADDRESS_14 = 23 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_03_DDR_CKE = 24 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_03_DDR_CKE_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_03_ADDRESS_OP = 28 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_03_ADDRESS_OP_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_03_RESERVED_30_31 = 30 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_03_RESERVED_30_31_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_03_DDR_CSN_0_1 = 32 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_03_DDR_CSN_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_03_DDR_CID_0_1 = 34 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_03_DDR_CID_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_03_DDR_CSN_2_3 = 36 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_03_DDR_CSN_2_3_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_03_DDR_CID_2 = 38 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_03_FORCE_DATA_IMMED = 39 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_03_NESTED_LOOP_CNT = 40 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_03_NESTED_LOOP_CNT_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_03_DDR_ODT = 48 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_03_DDR_ODT_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_03_RESERVED_52_54 = 52 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_03_RESERVED_52_54_LEN = 3 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_03_PAUSE_INSTR = 55 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_03_VARIABLE_SEL = 56 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_03_VARIABLE_SEL_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_03_RESERVED_58_59 = 58 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_03_RESERVED_58_59_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_03_DDR_PARITY = 60 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_03_DDR_BANK_2 = 61 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_03_LOOP_BREAK_MODE = 62 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_03_LOOP_BREAK_MODE_LEN = 2 ; + +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_04_DDR_ADDRESS_0_13 = 0 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_04_DDR_ADDRESS_0_13_LEN = 14 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_04_DDR_ADDRESS_17 = 14 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_04_DDR_BANK_GROUP_1 = 15 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_04_DDR_RESETN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_04_DDR_BANK_0_1 = 17 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_04_DDR_BANK_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_04_DDR_BANK_GROUP_0 = 19 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_04_DDR_ACTN = 20 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_04_DDR_ADDRESS_16 = 21 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_04_DDR_ADDRESS_15 = 22 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_04_DDR_ADDRESS_14 = 23 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_04_DDR_CKE = 24 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_04_DDR_CKE_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_04_ADDRESS_OP = 28 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_04_ADDRESS_OP_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_04_RESERVED_30_31 = 30 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_04_RESERVED_30_31_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_04_DDR_CSN_0_1 = 32 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_04_DDR_CSN_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_04_DDR_CID_0_1 = 34 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_04_DDR_CID_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_04_DDR_CSN_2_3 = 36 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_04_DDR_CSN_2_3_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_04_DDR_CID_2 = 38 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_04_FORCE_DATA_IMMED = 39 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_04_NESTED_LOOP_CNT = 40 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_04_NESTED_LOOP_CNT_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_04_DDR_ODT = 48 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_04_DDR_ODT_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_04_RESERVED_52_54 = 52 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_04_RESERVED_52_54_LEN = 3 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_04_PAUSE_INSTR = 55 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_04_VARIABLE_SEL = 56 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_04_VARIABLE_SEL_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_04_RESERVED_58_59 = 58 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_04_RESERVED_58_59_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_04_DDR_PARITY = 60 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_04_DDR_BANK_2 = 61 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_04_LOOP_BREAK_MODE = 62 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_04_LOOP_BREAK_MODE_LEN = 2 ; + +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_05_DDR_ADDRESS_0_13 = 0 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_05_DDR_ADDRESS_0_13_LEN = 14 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_05_DDR_ADDRESS_17 = 14 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_05_DDR_BANK_GROUP_1 = 15 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_05_DDR_RESETN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_05_DDR_BANK_0_1 = 17 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_05_DDR_BANK_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_05_DDR_BANK_GROUP_0 = 19 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_05_DDR_ACTN = 20 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_05_DDR_ADDRESS_16 = 21 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_05_DDR_ADDRESS_15 = 22 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_05_DDR_ADDRESS_14 = 23 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_05_DDR_CKE = 24 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_05_DDR_CKE_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_05_ADDRESS_OP = 28 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_05_ADDRESS_OP_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_05_RESERVED_30_31 = 30 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_05_RESERVED_30_31_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_05_DDR_CSN_0_1 = 32 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_05_DDR_CSN_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_05_DDR_CID_0_1 = 34 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_05_DDR_CID_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_05_DDR_CSN_2_3 = 36 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_05_DDR_CSN_2_3_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_05_DDR_CID_2 = 38 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_05_FORCE_DATA_IMMED = 39 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_05_NESTED_LOOP_CNT = 40 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_05_NESTED_LOOP_CNT_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_05_DDR_ODT = 48 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_05_DDR_ODT_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_05_RESERVED_52_54 = 52 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_05_RESERVED_52_54_LEN = 3 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_05_PAUSE_INSTR = 55 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_05_VARIABLE_SEL = 56 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_05_VARIABLE_SEL_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_05_RESERVED_58_59 = 58 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_05_RESERVED_58_59_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_05_DDR_PARITY = 60 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_05_DDR_BANK_2 = 61 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_05_LOOP_BREAK_MODE = 62 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_05_LOOP_BREAK_MODE_LEN = 2 ; + +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_06_DDR_ADDRESS_0_13 = 0 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_06_DDR_ADDRESS_0_13_LEN = 14 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_06_DDR_ADDRESS_17 = 14 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_06_DDR_BANK_GROUP_1 = 15 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_06_DDR_RESETN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_06_DDR_BANK_0_1 = 17 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_06_DDR_BANK_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_06_DDR_BANK_GROUP_0 = 19 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_06_DDR_ACTN = 20 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_06_DDR_ADDRESS_16 = 21 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_06_DDR_ADDRESS_15 = 22 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_06_DDR_ADDRESS_14 = 23 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_06_DDR_CKE = 24 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_06_DDR_CKE_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_06_ADDRESS_OP = 28 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_06_ADDRESS_OP_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_06_RESERVED_30_31 = 30 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_06_RESERVED_30_31_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_06_DDR_CSN_0_1 = 32 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_06_DDR_CSN_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_06_DDR_CID_0_1 = 34 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_06_DDR_CID_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_06_DDR_CSN_2_3 = 36 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_06_DDR_CSN_2_3_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_06_DDR_CID_2 = 38 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_06_FORCE_DATA_IMMED = 39 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_06_NESTED_LOOP_CNT = 40 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_06_NESTED_LOOP_CNT_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_06_DDR_ODT = 48 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_06_DDR_ODT_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_06_RESERVED_52_54 = 52 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_06_RESERVED_52_54_LEN = 3 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_06_PAUSE_INSTR = 55 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_06_VARIABLE_SEL = 56 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_06_VARIABLE_SEL_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_06_RESERVED_58_59 = 58 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_06_RESERVED_58_59_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_06_DDR_PARITY = 60 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_06_DDR_BANK_2 = 61 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_06_LOOP_BREAK_MODE = 62 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_06_LOOP_BREAK_MODE_LEN = 2 ; + +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_07_DDR_ADDRESS_0_13 = 0 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_07_DDR_ADDRESS_0_13_LEN = 14 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_07_DDR_ADDRESS_17 = 14 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_07_DDR_BANK_GROUP_1 = 15 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_07_DDR_RESETN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_07_DDR_BANK_0_1 = 17 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_07_DDR_BANK_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_07_DDR_BANK_GROUP_0 = 19 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_07_DDR_ACTN = 20 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_07_DDR_ADDRESS_16 = 21 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_07_DDR_ADDRESS_15 = 22 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_07_DDR_ADDRESS_14 = 23 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_07_DDR_CKE = 24 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_07_DDR_CKE_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_07_ADDRESS_OP = 28 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_07_ADDRESS_OP_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_07_RESERVED_30_31 = 30 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_07_RESERVED_30_31_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_07_DDR_CSN_0_1 = 32 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_07_DDR_CSN_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_07_DDR_CID_0_1 = 34 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_07_DDR_CID_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_07_DDR_CSN_2_3 = 36 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_07_DDR_CSN_2_3_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_07_DDR_CID_2 = 38 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_07_FORCE_DATA_IMMED = 39 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_07_NESTED_LOOP_CNT = 40 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_07_NESTED_LOOP_CNT_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_07_DDR_ODT = 48 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_07_DDR_ODT_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_07_RESERVED_52_54 = 52 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_07_RESERVED_52_54_LEN = 3 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_07_PAUSE_INSTR = 55 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_07_VARIABLE_SEL = 56 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_07_VARIABLE_SEL_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_07_RESERVED_58_59 = 58 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_07_RESERVED_58_59_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_07_DDR_PARITY = 60 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_07_DDR_BANK_2 = 61 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_07_LOOP_BREAK_MODE = 62 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_07_LOOP_BREAK_MODE_LEN = 2 ; + +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_08_DDR_ADDRESS_0_13 = 0 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_08_DDR_ADDRESS_0_13_LEN = 14 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_08_DDR_ADDRESS_17 = 14 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_08_DDR_BANK_GROUP_1 = 15 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_08_DDR_RESETN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_08_DDR_BANK_0_1 = 17 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_08_DDR_BANK_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_08_DDR_BANK_GROUP_0 = 19 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_08_DDR_ACTN = 20 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_08_DDR_ADDRESS_16 = 21 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_08_DDR_ADDRESS_15 = 22 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_08_DDR_ADDRESS_14 = 23 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_08_DDR_CKE = 24 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_08_DDR_CKE_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_08_ADDRESS_OP = 28 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_08_ADDRESS_OP_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_08_RESERVED_30_31 = 30 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_08_RESERVED_30_31_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_08_DDR_CSN_0_1 = 32 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_08_DDR_CSN_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_08_DDR_CID_0_1 = 34 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_08_DDR_CID_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_08_DDR_CSN_2_3 = 36 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_08_DDR_CSN_2_3_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_08_DDR_CID_2 = 38 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_08_FORCE_DATA_IMMED = 39 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_08_NESTED_LOOP_CNT = 40 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_08_NESTED_LOOP_CNT_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_08_DDR_ODT = 48 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_08_DDR_ODT_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_08_RESERVED_52_54 = 52 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_08_RESERVED_52_54_LEN = 3 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_08_PAUSE_INSTR = 55 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_08_VARIABLE_SEL = 56 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_08_VARIABLE_SEL_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_08_RESERVED_58_59 = 58 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_08_RESERVED_58_59_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_08_DDR_PARITY = 60 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_08_DDR_BANK_2 = 61 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_08_LOOP_BREAK_MODE = 62 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_08_LOOP_BREAK_MODE_LEN = 2 ; + +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_09_DDR_ADDRESS_0_13 = 0 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_09_DDR_ADDRESS_0_13_LEN = 14 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_09_DDR_ADDRESS_17 = 14 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_09_DDR_BANK_GROUP_1 = 15 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_09_DDR_RESETN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_09_DDR_BANK_0_1 = 17 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_09_DDR_BANK_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_09_DDR_BANK_GROUP_0 = 19 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_09_DDR_ACTN = 20 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_09_DDR_ADDRESS_16 = 21 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_09_DDR_ADDRESS_15 = 22 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_09_DDR_ADDRESS_14 = 23 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_09_DDR_CKE = 24 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_09_DDR_CKE_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_09_ADDRESS_OP = 28 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_09_ADDRESS_OP_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_09_RESERVED_30_31 = 30 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_09_RESERVED_30_31_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_09_DDR_CSN_0_1 = 32 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_09_DDR_CSN_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_09_DDR_CID_0_1 = 34 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_09_DDR_CID_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_09_DDR_CSN_2_3 = 36 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_09_DDR_CSN_2_3_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_09_DDR_CID_2 = 38 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_09_FORCE_DATA_IMMED = 39 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_09_NESTED_LOOP_CNT = 40 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_09_NESTED_LOOP_CNT_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_09_DDR_ODT = 48 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_09_DDR_ODT_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_09_RESERVED_52_54 = 52 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_09_RESERVED_52_54_LEN = 3 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_09_PAUSE_INSTR = 55 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_09_VARIABLE_SEL = 56 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_09_VARIABLE_SEL_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_09_RESERVED_58_59 = 58 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_09_RESERVED_58_59_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_09_DDR_PARITY = 60 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_09_DDR_BANK_2 = 61 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_09_LOOP_BREAK_MODE = 62 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_09_LOOP_BREAK_MODE_LEN = 2 ; + +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_10_DDR_ADDRESS_0_13 = 0 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_10_DDR_ADDRESS_0_13_LEN = 14 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_10_DDR_ADDRESS_17 = 14 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_10_DDR_BANK_GROUP_1 = 15 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_10_DDR_RESETN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_10_DDR_BANK_0_1 = 17 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_10_DDR_BANK_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_10_DDR_BANK_GROUP_0 = 19 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_10_DDR_ACTN = 20 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_10_DDR_ADDRESS_16 = 21 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_10_DDR_ADDRESS_15 = 22 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_10_DDR_ADDRESS_14 = 23 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_10_DDR_CKE = 24 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_10_DDR_CKE_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_10_ADDRESS_OP = 28 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_10_ADDRESS_OP_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_10_RESERVED_30_31 = 30 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_10_RESERVED_30_31_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_10_DDR_CSN_0_1 = 32 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_10_DDR_CSN_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_10_DDR_CID_0_1 = 34 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_10_DDR_CID_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_10_DDR_CSN_2_3 = 36 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_10_DDR_CSN_2_3_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_10_DDR_CID_2 = 38 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_10_FORCE_DATA_IMMED = 39 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_10_NESTED_LOOP_CNT = 40 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_10_NESTED_LOOP_CNT_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_10_DDR_ODT = 48 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_10_DDR_ODT_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_10_RESERVED_52_54 = 52 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_10_RESERVED_52_54_LEN = 3 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_10_PAUSE_INSTR = 55 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_10_VARIABLE_SEL = 56 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_10_VARIABLE_SEL_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_10_RESERVED_58_59 = 58 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_10_RESERVED_58_59_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_10_DDR_PARITY = 60 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_10_DDR_BANK_2 = 61 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_10_LOOP_BREAK_MODE = 62 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_10_LOOP_BREAK_MODE_LEN = 2 ; + +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_11_DDR_ADDRESS_0_13 = 0 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_11_DDR_ADDRESS_0_13_LEN = 14 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_11_DDR_ADDRESS_17 = 14 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_11_DDR_BANK_GROUP_1 = 15 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_11_DDR_RESETN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_11_DDR_BANK_0_1 = 17 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_11_DDR_BANK_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_11_DDR_BANK_GROUP_0 = 19 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_11_DDR_ACTN = 20 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_11_DDR_ADDRESS_16 = 21 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_11_DDR_ADDRESS_15 = 22 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_11_DDR_ADDRESS_14 = 23 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_11_DDR_CKE = 24 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_11_DDR_CKE_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_11_ADDRESS_OP = 28 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_11_ADDRESS_OP_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_11_RESERVED_30_31 = 30 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_11_RESERVED_30_31_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_11_DDR_CSN_0_1 = 32 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_11_DDR_CSN_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_11_DDR_CID_0_1 = 34 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_11_DDR_CID_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_11_DDR_CSN_2_3 = 36 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_11_DDR_CSN_2_3_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_11_DDR_CID_2 = 38 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_11_FORCE_DATA_IMMED = 39 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_11_NESTED_LOOP_CNT = 40 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_11_NESTED_LOOP_CNT_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_11_DDR_ODT = 48 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_11_DDR_ODT_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_11_RESERVED_52_54 = 52 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_11_RESERVED_52_54_LEN = 3 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_11_PAUSE_INSTR = 55 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_11_VARIABLE_SEL = 56 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_11_VARIABLE_SEL_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_11_RESERVED_58_59 = 58 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_11_RESERVED_58_59_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_11_DDR_PARITY = 60 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_11_DDR_BANK_2 = 61 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_11_LOOP_BREAK_MODE = 62 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_11_LOOP_BREAK_MODE_LEN = 2 ; + +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_12_DDR_ADDRESS_0_13 = 0 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_12_DDR_ADDRESS_0_13_LEN = 14 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_12_DDR_ADDRESS_17 = 14 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_12_DDR_BANK_GROUP_1 = 15 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_12_DDR_RESETN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_12_DDR_BANK_0_1 = 17 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_12_DDR_BANK_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_12_DDR_BANK_GROUP_0 = 19 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_12_DDR_ACTN = 20 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_12_DDR_ADDRESS_16 = 21 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_12_DDR_ADDRESS_15 = 22 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_12_DDR_ADDRESS_14 = 23 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_12_DDR_CKE = 24 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_12_DDR_CKE_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_12_ADDRESS_OP = 28 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_12_ADDRESS_OP_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_12_RESERVED_30_31 = 30 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_12_RESERVED_30_31_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_12_DDR_CSN_0_1 = 32 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_12_DDR_CSN_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_12_DDR_CID_0_1 = 34 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_12_DDR_CID_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_12_DDR_CSN_2_3 = 36 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_12_DDR_CSN_2_3_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_12_DDR_CID_2 = 38 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_12_FORCE_DATA_IMMED = 39 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_12_NESTED_LOOP_CNT = 40 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_12_NESTED_LOOP_CNT_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_12_DDR_ODT = 48 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_12_DDR_ODT_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_12_RESERVED_52_54 = 52 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_12_RESERVED_52_54_LEN = 3 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_12_PAUSE_INSTR = 55 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_12_VARIABLE_SEL = 56 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_12_VARIABLE_SEL_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_12_RESERVED_58_59 = 58 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_12_RESERVED_58_59_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_12_DDR_PARITY = 60 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_12_DDR_BANK_2 = 61 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_12_LOOP_BREAK_MODE = 62 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_12_LOOP_BREAK_MODE_LEN = 2 ; + +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_13_DDR_ADDRESS_0 = 0 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_13_DDR_ADDRESS_0_LEN = 14 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_13_DDR_ADDRESS_17 = 14 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_13_DDR_BANK_GROUP_1 = 15 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_13_DDR_RESETN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_13_DDR_BANK_0_1 = 17 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_13_DDR_BANK_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_13_DDR_BANK_GROUP_0 = 19 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_13_DDR_ACTN = 20 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_13_DDR_ADDRESS_16 = 21 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_13_DDR_ADDRESS_15 = 22 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_13_DDR_ADDRESS_14 = 23 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_13_DDR_CKE = 24 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_13_DDR_CKE_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_13_ADDRESS_OP = 28 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_13_ADDRESS_OP_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_13_RESERVED_30_31 = 30 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_13_RESERVED_30_31_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_13_DDR_CSN_0_1 = 32 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_13_DDR_CSN_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_13_DDR_CID_0_1 = 34 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_13_DDR_CID_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_13_DDR_CSN_2_3 = 36 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_13_DDR_CSN_2_3_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_13_DDR_CID_2 = 38 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_13_FORCE_DATA_IMMED = 39 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_13_NESTED_LOOP_CNT = 40 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_13_NESTED_LOOP_CNT_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_13_DDR_ODT = 48 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_13_DDR_ODT_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_13_RESERVED_52_54 = 52 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_13_RESERVED_52_54_LEN = 3 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_13_PAUSE_INSTR = 55 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_13_VARIABLE_SEL = 56 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_13_VARIABLE_SEL_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_13_RESERVED_58_59 = 58 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_13_RESERVED_58_59_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_13_DDR_PARITY = 60 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_13_DDR_BANK_2 = 61 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_13_LOOP_BREAK_MODE = 62 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_13_LOOP_BREAK_MODE_LEN = 2 ; + +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_14_DDR_ADDRESS_0_13 = 0 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_14_DDR_ADDRESS_0_13_LEN = 14 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_14_DDR_ADDRESS_17 = 14 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_14_DDR_BANK_GROUP_1 = 15 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_14_DDR_RESETN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_14_DDR_BANK_0_1 = 17 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_14_DDR_BANK_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_14_DDR_BANK_GROUP_0 = 19 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_14_DDR_ACTN = 20 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_14_DDR_ADDRESS_16 = 21 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_14_DDR_ADDRESS_15 = 22 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_14_DDR_ADDRESS = 23 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_14_DDR_CKE = 24 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_14_DDR_CKE_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_14_ADDRESS_OP = 28 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_14_ADDRESS_OP_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_14_RESERVED_30_31 = 30 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_14_RESERVED_30_31_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_14_DDR_CSN_0_1 = 32 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_14_DDR_CSN_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_14_DDR_CID_0_1 = 34 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_14_DDR_CID_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_14_DDR_CSN_2_3 = 36 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_14_DDR_CSN_2_3_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_14_DDR_CID_2 = 38 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_14_FORCE_DATA_IMMED = 39 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_14_NESTED_LOOP_CNT = 40 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_14_NESTED_LOOP_CNT_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_14_DDR_ODT = 48 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_14_DDR_ODT_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_14_RESERVED_52_54 = 52 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_14_RESERVED_52_54_LEN = 3 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_14_PAUSE_INSTR = 55 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_14_VARIABLE_SEL = 56 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_14_VARIABLE_SEL_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_14_RESERVED_58_59 = 58 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_14_RESERVED_58_59_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_14_DDR_PARITY = 60 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_14_DDR_BANK_2 = 61 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_14_LOOP_BREAK_MODE = 62 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_14_LOOP_BREAK_MODE_LEN = 2 ; + +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_15_DDR_ADDRESS_0_13 = 0 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_15_DDR_ADDRESS_0_13_LEN = 14 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_15_DDR_ADDRESS_17 = 14 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_15_DDR_BANK_GROUP_1 = 15 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_15_DDR_RESETN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_15_DDR_BANK_0_1 = 17 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_15_DDR_BANK_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_15_DDR_BANK_GROUP_0 = 19 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_15_DDR_ACTN = 20 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_15_DDR_ADDRESS_16 = 21 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_15_DDR_ADDRESS = 22 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_15_DDR_ADDRESS_14 = 23 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_15_DDR_CKE = 24 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_15_DDR_CKE_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_15_ADDRESS_OP = 28 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_15_ADDRESS_OP_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_15_RESERVED_30_31 = 30 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_15_RESERVED_30_31_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_15_DDR_CSN_0_1 = 32 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_15_DDR_CSN_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_15_DDR_CID_0_1 = 34 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_15_DDR_CID_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_15_DDR_CSN_2_3 = 36 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_15_DDR_CSN_2_3_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_15_DDR_CID_2 = 38 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_15_FORCE_DATA_IMMED = 39 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_15_NESTED_LOOP_CNT = 40 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_15_NESTED_LOOP_CNT_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_15_DDR_ODT = 48 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_15_DDR_ODT_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_15_RESERVED_52_54 = 52 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_15_RESERVED_52_54_LEN = 3 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_15_PAUSE_INSTR = 55 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_15_VARIABLE_SEL = 56 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_15_VARIABLE_SEL_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_15_RESERVED_58_59 = 58 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_15_RESERVED_58_59_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_15_DDR_PARITY = 60 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_15_DDR_BANK_2 = 61 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_15_LOOP_BREAK_MODE = 62 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_15_LOOP_BREAK_MODE_LEN = 2 ; + +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_16_DDR_ADDRESS_0_13 = 0 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_16_DDR_ADDRESS_0_13_LEN = 14 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_16_DDR_ADDRESS_17 = 14 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_16_DDR_BANK_GROUP_1 = 15 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_16_DDR_RESETN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_16_DDR_BANK_0_1 = 17 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_16_DDR_BANK_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_16_DDR_BANK_GROUP_0 = 19 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_16_DDR_ACTN = 20 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_16_DDR_ADDRESS = 21 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_16_DDR_ADDRESS_15 = 22 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_16_DDR_ADDRESS_14 = 23 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_16_DDR_CKE = 24 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_16_DDR_CKE_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_16_ADDRESS_OP = 28 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_16_ADDRESS_OP_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_16_RESERVED_30_31 = 30 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_16_RESERVED_30_31_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_16_DDR_CSN_0_1 = 32 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_16_DDR_CSN_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_16_DDR_CID_0_1 = 34 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_16_DDR_CID_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_16_DDR_CSN_2_3 = 36 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_16_DDR_CSN_2_3_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_16_DDR_CID_2 = 38 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_16_FORCE_DATA_IMMED = 39 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_16_NESTED_LOOP_CNT = 40 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_16_NESTED_LOOP_CNT_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_16_DDR_ODT = 48 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_16_DDR_ODT_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_16_RESERVED_52_54 = 52 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_16_RESERVED_52_54_LEN = 3 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_16_PAUSE_INSTR = 55 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_16_VARIABLE_SEL = 56 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_16_VARIABLE_SEL_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_16_RESERVED_58_59 = 58 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_16_RESERVED_58_59_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_16_DDR_PARITY = 60 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_16_DDR_BANK_2 = 61 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_16_LOOP_BREAK_MODE = 62 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_16_LOOP_BREAK_MODE_LEN = 2 ; + +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_17_DDR_ADDRESS_0_13 = 0 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_17_DDR_ADDRESS_0_13_LEN = 14 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_17_DDR_ADDRESS = 14 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_17_DDR_BANK_GROUP_1 = 15 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_17_DDR_RESETN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_17_DDR_BANK_0_1 = 17 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_17_DDR_BANK_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_17_DDR_BANK_GROUP_0 = 19 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_17_DDR_ACTN = 20 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_17_DDR_ADDRESS_16 = 21 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_17_DDR_ADDRESS_15 = 22 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_17_DDR_ADDRESS_14 = 23 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_17_DDR_CKE = 24 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_17_DDR_CKE_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_17_ADDRESS_OP = 28 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_17_ADDRESS_OP_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_17_RESERVED_30_31 = 30 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_17_RESERVED_30_31_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_17_DDR_CSN_0_1 = 32 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_17_DDR_CSN_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_17_DDR_CID_0_1 = 34 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_17_DDR_CID_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_17_DDR_CSN_2_3 = 36 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_17_DDR_CSN_2_3_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_17_DDR_CID_2 = 38 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_17_FORCE_DATA_IMMED = 39 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_17_NESTED_LOOP_CNT = 40 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_17_NESTED_LOOP_CNT_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_17_DDR_ODT = 48 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_17_DDR_ODT_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_17_RESERVED_52_54 = 52 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_17_RESERVED_52_54_LEN = 3 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_17_PAUSE_INSTR = 55 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_17_VARIABLE_SEL = 56 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_17_VARIABLE_SEL_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_17_RESERVED_58_59 = 58 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_17_RESERVED_58_59_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_17_DDR_PARITY = 60 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_17_DDR_BANK_2 = 61 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_17_LOOP_BREAK_MODE = 62 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_17_LOOP_BREAK_MODE_LEN = 2 ; + +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_18_DDR_ADDRESS_0_13 = 0 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_18_DDR_ADDRESS_0_13_LEN = 14 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_18_DDR_ADDRESS_17 = 14 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_18_DDR_BANK_GROUP_1 = 15 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_18_DDR_RESETN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_18_DDR_BANK_0_1 = 17 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_18_DDR_BANK_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_18_DDR_BANK_GROUP_0 = 19 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_18_DDR_ACTN = 20 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_18_DDR_ADDRESS_16 = 21 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_18_DDR_ADDRESS_15 = 22 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_18_DDR_ADDRESS_14 = 23 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_18_DDR_CKE = 24 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_18_DDR_CKE_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_18_ADDRESS_OP = 28 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_18_ADDRESS_OP_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_18_RESERVED_30_31 = 30 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_18_RESERVED_30_31_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_18_DDR_CSN_0_1 = 32 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_18_DDR_CSN_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_18_DDR_CID_0_1 = 34 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_18_DDR_CID_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_18_DDR_CSN_2_3 = 36 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_18_DDR_CSN_2_3_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_18_DDR_CID_2 = 38 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_18_FORCE_DATA_IMMED = 39 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_18_NESTED_LOOP_CNT = 40 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_18_NESTED_LOOP_CNT_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_18_DDR_ODT = 48 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_18_DDR_ODT_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_18_RESERVED_52_54 = 52 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_18_RESERVED_52_54_LEN = 3 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_18_PAUSE_INSTR = 55 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_18_VARIABLE_SEL = 56 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_18_VARIABLE_SEL_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_18_RESERVED_58_59 = 58 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_18_RESERVED_58_59_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_18_DDR_PARITY = 60 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_18_DDR_BANK_2 = 61 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_18_LOOP_BREAK_MODE = 62 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_18_LOOP_BREAK_MODE_LEN = 2 ; + +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_19_DDR_ADDRESS_0_13 = 0 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_19_DDR_ADDRESS_0_13_LEN = 14 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_19_DDR_ADDRESS_17 = 14 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_19_DDR_BANK_GROUP_1 = 15 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_19_DDR_RESETN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_19_DDR_BANK_0_1 = 17 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_19_DDR_BANK_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_19_DDR_BANK_GROUP_0 = 19 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_19_DDR_ACTN = 20 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_19_DDR_ADDRESS_16 = 21 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_19_DDR_ADDRESS_15 = 22 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_19_DDR_ADDRESS_14 = 23 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_19_DDR_CKE = 24 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_19_DDR_CKE_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_19_ADDRESS_OP = 28 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_19_ADDRESS_OP_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_19_RESERVED_30_31 = 30 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_19_RESERVED_30_31_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_19_DDR_CSN_0_1 = 32 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_19_DDR_CSN_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_19_DDR_CID_0_1 = 34 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_19_DDR_CID_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_19_DDR_CSN_2_3 = 36 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_19_DDR_CSN_2_3_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_19_DDR_CID_2 = 38 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_19_FORCE_DATA_IMMED = 39 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_19_NESTED_LOOP_CNT = 40 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_19_NESTED_LOOP_CNT_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_19_DDR_ODT = 48 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_19_DDR_ODT_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_19_RESERVED_52_54 = 52 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_19_RESERVED_52_54_LEN = 3 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_19_PAUSE_INSTR = 55 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_19_VARIABLE_SEL = 56 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_19_VARIABLE_SEL_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_19_RESERVED_58_59 = 58 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_19_RESERVED_58_59_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_19_DDR_PARITY = 60 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_19_DDR_BANK_2 = 61 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_19_LOOP_BREAK_MODE = 62 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_19_LOOP_BREAK_MODE_LEN = 2 ; + +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_20_DDR_ADDRESS_0_13 = 0 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_20_DDR_ADDRESS_0_13_LEN = 14 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_20_DDR_ADDRESS_17 = 14 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_20_DDR_BANK_GROUP_1 = 15 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_20_DDR_RESETN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_20_DDR_BANK_0_1 = 17 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_20_DDR_BANK_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_20_DDR_BANK_GROUP_0 = 19 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_20_DDR_ACTN = 20 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_20_DDR_ADDRESS_16 = 21 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_20_DDR_ADDRESS_15 = 22 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_20_DDR_ADDRESS_14 = 23 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_20_DDR_CKE = 24 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_20_DDR_CKE_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_20_ADDRESS_OP = 28 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_20_ADDRESS_OP_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_20_RESERVED_30_31 = 30 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_20_RESERVED_30_31_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_20_DDR_CSN_0_1 = 32 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_20_DDR_CSN_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_20_DDR_CID_0_1 = 34 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_20_DDR_CID_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_20_DDR_CSN_2_3 = 36 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_20_DDR_CSN_2_3_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_20_DDR_CID_2 = 38 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_20_FORCE_DATA_IMMED = 39 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_20_NESTED_LOOP_CNT = 40 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_20_NESTED_LOOP_CNT_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_20_DDR_ODT = 48 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_20_DDR_ODT_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_20_RESERVED_52_54 = 52 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_20_RESERVED_52_54_LEN = 3 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_20_PAUSE_INSTR = 55 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_20_VARIABLE_SEL = 56 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_20_VARIABLE_SEL_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_20_RESERVED_58_59 = 58 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_20_RESERVED_58_59_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_20_DDR_PARITY = 60 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_20_DDR_BANK_2 = 61 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_20_LOOP_BREAK_MODE = 62 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_20_LOOP_BREAK_MODE_LEN = 2 ; + +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_21_DDR_ADDRESS_0_13 = 0 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_21_DDR_ADDRESS_0_13_LEN = 14 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_21_DDR_ADDRESS_17 = 14 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_21_DDR_BANK_GROUP_1 = 15 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_21_DDR_RESETN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_21_DDR_BANK_0_1 = 17 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_21_DDR_BANK_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_21_DDR_BANK_GROUP_0 = 19 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_21_DDR_ACTN = 20 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_21_DDR_ADDRESS_16 = 21 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_21_DDR_ADDRESS_15 = 22 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_21_DDR_ADDRESS_14 = 23 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_21_DDR_CKE = 24 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_21_DDR_CKE_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_21_ADDRESS_OP = 28 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_21_ADDRESS_OP_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_21_RESERVED_30_31 = 30 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_21_RESERVED_30_31_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_21_DDR_CSN_0_1 = 32 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_21_DDR_CSN_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_21_DDR_CID_0_1 = 34 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_21_DDR_CID_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_21_DDR_CSN_2_3 = 36 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_21_DDR_CSN_2_3_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_21_DDR_CID_2 = 38 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_21_FORCE_DATA_IMMED = 39 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_21_NESTED_LOOP_CNT = 40 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_21_NESTED_LOOP_CNT_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_21_DDR_ODT = 48 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_21_DDR_ODT_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_21_RESERVED_52_54 = 52 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_21_RESERVED_52_54_LEN = 3 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_21_PAUSE_INSTR = 55 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_21_VARIABLE_SEL = 56 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_21_VARIABLE_SEL_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_21_RESERVED_58_59 = 58 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_21_RESERVED_58_59_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_21_DDR_PARITY = 60 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_21_DDR_BANK_2 = 61 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_21_LOOP_BREAK_MODE = 62 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_21_LOOP_BREAK_MODE_LEN = 2 ; + +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_22_DDR_ADDRESS_0_13 = 0 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_22_DDR_ADDRESS_0_13_LEN = 14 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_22_DDR_ADDRESS_17 = 14 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_22_DDR_BANK_GROUP_1 = 15 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_22_DDR_RESETN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_22_DDR_BANK_0_1 = 17 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_22_DDR_BANK_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_22_DDR_BANK_GROUP_0 = 19 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_22_DDR_ACTN = 20 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_22_DDR_ADDRESS_16 = 21 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_22_DDR_ADDRESS_15 = 22 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_22_DDR_ADDRESS_14 = 23 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_22_DDR_CKE = 24 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_22_DDR_CKE_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_22_ADDRESS_OP = 28 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_22_ADDRESS_OP_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_22_RESERVED_30_31 = 30 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_22_RESERVED_30_31_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_22_DDR_CSN_0_1 = 32 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_22_DDR_CSN_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_22_DDR_CID_0_1 = 34 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_22_DDR_CID_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_22_DDR_CSN_2_3 = 36 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_22_DDR_CSN_2_3_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_22_DDR_CID_2 = 38 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_22_FORCE_DATA_IMMED = 39 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_22_NESTED_LOOP_CNT = 40 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_22_NESTED_LOOP_CNT_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_22_DDR_ODT = 48 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_22_DDR_ODT_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_22_RESERVED_52_54 = 52 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_22_RESERVED_52_54_LEN = 3 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_22_PAUSE_INSTR = 55 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_22_VARIABLE_SEL = 56 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_22_VARIABLE_SEL_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_22_RESERVED_58_59 = 58 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_22_RESERVED_58_59_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_22_DDR_PARITY = 60 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_22_DDR_BANK_2 = 61 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_22_LOOP_BREAK_MODE = 62 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_22_LOOP_BREAK_MODE_LEN = 2 ; + +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_23_DDR_ADDRESS_0_13 = 0 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_23_DDR_ADDRESS_0_13_LEN = 14 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_23_DDR_ADDRESS_17 = 14 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_23_DDR_BANK_GROUP_1 = 15 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_23_DDR_RESETN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_23_DDR_BANK_0_1 = 17 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_23_DDR_BANK_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_23_DDR_BANK_GROUP_0 = 19 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_23_DDR_ACTN = 20 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_23_DDR_ADDRESS_16 = 21 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_23_DDR_ADDRESS_15 = 22 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_23_DDR_ADDRESS_14 = 23 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_23_DDR_CKE = 24 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_23_DDR_CKE_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_23_ADDRESS_OP = 28 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_23_ADDRESS_OP_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_23_RESERVED_30_31 = 30 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_23_RESERVED_30_31_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_23_DDR_CSN_0_1 = 32 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_23_DDR_CSN_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_23_DDR_CID_0_1 = 34 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_23_DDR_CID_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_23_DDR_CSN_2_3 = 36 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_23_DDR_CSN_2_3_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_23_DDR_CID_2 = 38 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_23_FORCE_DATA_IMMED = 39 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_23_NESTED_LOOP_CNT = 40 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_23_NESTED_LOOP_CNT_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_23_DDR_ODT = 48 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_23_DDR_ODT_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_23_RESERVED_52_54 = 52 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_23_RESERVED_52_54_LEN = 3 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_23_PAUSE_INSTR = 55 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_23_VARIABLE_SEL = 56 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_23_VARIABLE_SEL_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_23_RESERVED_58_59 = 58 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_23_RESERVED_58_59_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_23_DDR_PARITY = 60 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_23_DDR_BANK_2 = 61 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_23_LOOP_BREAK_MODE = 62 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_23_LOOP_BREAK_MODE_LEN = 2 ; + +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_24_DDR_ADDRESS_0_13 = 0 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_24_DDR_ADDRESS_0_13_LEN = 14 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_24_DDR_ADDRESS_17 = 14 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_24_DDR_BANK_GROUP_1 = 15 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_24_DDR_RESETN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_24_DDR_BANK_0_1 = 17 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_24_DDR_BANK_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_24_DDR_BANK_GROUP_0 = 19 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_24_DDR_ACTN = 20 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_24_DDR_ADDRESS_16 = 21 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_24_DDR_ADDRESS_15 = 22 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_24_DDR_ADDRESS_14 = 23 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_24_DDR_CKE = 24 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_24_DDR_CKE_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_24_ADDRESS_OP = 28 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_24_ADDRESS_OP_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_24_RESERVED_30_31 = 30 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_24_RESERVED_30_31_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_24_DDR_CSN_0_1 = 32 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_24_DDR_CSN_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_24_DDR_CID_0_1 = 34 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_24_DDR_CID_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_24_DDR_CSN_2_3 = 36 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_24_DDR_CSN_2_3_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_24_DDR_CID_2 = 38 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_24_FORCE_DATA_IMMED = 39 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_24_NESTED_LOOP_CNT = 40 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_24_NESTED_LOOP_CNT_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_24_DDR_ODT = 48 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_24_DDR_ODT_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_24_RESERVED_52_54 = 52 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_24_RESERVED_52_54_LEN = 3 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_24_PAUSE_INSTR = 55 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_24_VARIABLE_SEL = 56 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_24_VARIABLE_SEL_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_24_RESERVED_58_59 = 58 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_24_RESERVED_58_59_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_24_DDR_PARITY = 60 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_24_DDR_BANK_2 = 61 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_24_LOOP_BREAK_MODE = 62 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_24_LOOP_BREAK_MODE_LEN = 2 ; + +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_25_DDR_ADDRESS_0_13 = 0 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_25_DDR_ADDRESS_0_13_LEN = 14 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_25_DDR_ADDRESS_17 = 14 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_25_DDR_BANK_GROUP_1 = 15 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_25_DDR_RESETN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_25_DDR_BANK_0_1 = 17 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_25_DDR_BANK_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_25_DDR_BANK_GROUP_0 = 19 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_25_DDR_ACTN = 20 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_25_DDR_ADDRESS_16 = 21 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_25_DDR_ADDRESS_15 = 22 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_25_DDR_ADDRESS_14 = 23 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_25_DDR_CKE = 24 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_25_DDR_CKE_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_25_ADDRESS_OP = 28 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_25_ADDRESS_OP_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_25_RESERVED_30_31 = 30 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_25_RESERVED_30_31_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_25_DDR_CSN_0_1 = 32 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_25_DDR_CSN_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_25_DDR_CID_0_1 = 34 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_25_DDR_CID_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_25_DDR_CSN_2_3 = 36 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_25_DDR_CSN_2_3_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_25_DDR_CID_2 = 38 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_25_FORCE_DATA_IMMED = 39 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_25_NESTED_LOOP_CNT = 40 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_25_NESTED_LOOP_CNT_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_25_DDR_ODT = 48 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_25_DDR_ODT_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_25_RESERVED_52_54 = 52 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_25_RESERVED_52_54_LEN = 3 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_25_PAUSE_INSTR = 55 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_25_VARIABLE_SEL = 56 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_25_VARIABLE_SEL_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_25_RESERVED_58_59 = 58 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_25_RESERVED_58_59_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_25_DDR_PARITY = 60 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_25_DDR_BANK_2 = 61 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_25_LOOP_BREAK_MODE = 62 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_25_LOOP_BREAK_MODE_LEN = 2 ; + +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_26_DDR_ADDRESS_0_13 = 0 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_26_DDR_ADDRESS_0_13_LEN = 14 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_26_DDR_ADDRESS_17 = 14 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_26_DDR_BANK_GROUP_1 = 15 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_26_DDR_RESETN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_26_DDR_BANK_0_1 = 17 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_26_DDR_BANK_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_26_DDR_BANK_GROUP_0 = 19 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_26_DDR_ACTN = 20 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_26_DDR_ADDRESS_16 = 21 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_26_DDR_ADDRESS_15 = 22 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_26_DDR_ADDRESS_14 = 23 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_26_DDR_CKE = 24 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_26_DDR_CKE_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_26_ADDRESS_OP = 28 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_26_ADDRESS_OP_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_26_RESERVED_30_31 = 30 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_26_RESERVED_30_31_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_26_DDR_CSN_0_1 = 32 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_26_DDR_CSN_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_26_DDR_CID_0_1 = 34 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_26_DDR_CID_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_26_DDR_CSN_2_3 = 36 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_26_DDR_CSN_2_3_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_26_DDR_CID_2 = 38 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_26_FORCE_DATA_IMMED = 39 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_26_NESTED_LOOP_CNT = 40 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_26_NESTED_LOOP_CNT_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_26_DDR_ODT = 48 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_26_DDR_ODT_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_26_RESERVED_52_54 = 52 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_26_RESERVED_52_54_LEN = 3 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_26_PAUSE_INSTR = 55 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_26_VARIABLE_SEL = 56 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_26_VARIABLE_SEL_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_26_RESERVED_58_59 = 58 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_26_RESERVED_58_59_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_26_DDR_PARITY = 60 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_26_DDR_BANK_2 = 61 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_26_LOOP_BREAK_MODE = 62 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_26_LOOP_BREAK_MODE_LEN = 2 ; + +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_27_DDR_ADDRESS_0_13 = 0 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_27_DDR_ADDRESS_0_13_LEN = 14 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_27_DDR_ADDRESS_17 = 14 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_27_DDR_BANK_GROUP_1 = 15 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_27_DDR_RESETN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_27_DDR_BANK_0_1 = 17 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_27_DDR_BANK_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_27_DDR_BANK_GROUP_0 = 19 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_27_DDR_ACTN = 20 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_27_DDR_ADDRESS_16 = 21 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_27_DDR_ADDRESS_15 = 22 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_27_DDR_ADDRESS_14 = 23 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_27_DDR_CKE = 24 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_27_DDR_CKE_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_27_ADDRESS_OP = 28 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_27_ADDRESS_OP_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_27_RESERVED_30_31 = 30 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_27_RESERVED_30_31_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_27_DDR_CSN_0_1 = 32 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_27_DDR_CSN_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_27_DDR_CID_0_1 = 34 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_27_DDR_CID_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_27_DDR_CSN_2_3 = 36 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_27_DDR_CSN_2_3_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_27_DDR_CID_2 = 38 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_27_FORCE_DATA_IMMED = 39 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_27_NESTED_LOOP_CNT = 40 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_27_NESTED_LOOP_CNT_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_27_DDR_ODT = 48 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_27_DDR_ODT_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_27_RESERVED_52_54 = 52 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_27_RESERVED_52_54_LEN = 3 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_27_PAUSE_INSTR = 55 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_27_VARIABLE_SEL = 56 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_27_VARIABLE_SEL_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_27_RESERVED_58_59 = 58 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_27_RESERVED_58_59_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_27_DDR_PARITY = 60 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_27_DDR_BANK_2 = 61 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_27_LOOP_BREAK_MODE = 62 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_27_LOOP_BREAK_MODE_LEN = 2 ; + +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_28_DDR_ADDRESS_0_13 = 0 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_28_DDR_ADDRESS_0_13_LEN = 14 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_28_DDR_ADDRESS_17 = 14 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_28_DDR_BANK_GROUP_1 = 15 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_28_DDR_RESETN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_28_DDR_BANK_0_1 = 17 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_28_DDR_BANK_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_28_DDR_BANK_GROUP_0 = 19 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_28_DDR_ACTN = 20 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_28_DDR_ADDRESS_16 = 21 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_28_DDR_ADDRESS_15 = 22 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_28_DDR_ADDRESS_14 = 23 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_28_DDR_CKE = 24 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_28_DDR_CKE_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_28_ADDRESS_OP = 28 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_28_ADDRESS_OP_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_28_RESERVED_30_31 = 30 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_28_RESERVED_30_31_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_28_DDR_CSN_0_1 = 32 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_28_DDR_CSN_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_28_DDR_CID_0_1 = 34 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_28_DDR_CID_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_28_DDR_CSN_2_3 = 36 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_28_DDR_CSN_2_3_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_28_DDR_CID_2 = 38 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_28_FORCE_DATA_IMMED = 39 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_28_NESTED_LOOP_CNT = 40 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_28_NESTED_LOOP_CNT_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_28_DDR_ODT = 48 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_28_DDR_ODT_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_28_RESERVED_52_54 = 52 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_28_RESERVED_52_54_LEN = 3 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_28_PAUSE_INSTR = 55 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_28_VARIABLE_SEL = 56 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_28_VARIABLE_SEL_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_28_RESERVED_58_59 = 58 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_28_RESERVED_58_59_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_28_DDR_PARITY = 60 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_28_DDR_BANK_2 = 61 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_28_LOOP_BREAK_MODE = 62 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_28_LOOP_BREAK_MODE_LEN = 2 ; + +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_29_DDR_ADDRESS_0_13 = 0 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_29_DDR_ADDRESS_0_13_LEN = 14 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_29_DDR_ADDRESS_17 = 14 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_29_DDR_BANK_GROUP_1 = 15 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_29_DDR_RESETN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_29_DDR_BANK_0_1 = 17 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_29_DDR_BANK_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_29_DDR_BANK_GROUP_0 = 19 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_29_DDR_ACTN = 20 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_29_DDR_ADDRESS_16 = 21 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_29_DDR_ADDRESS_15 = 22 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_29_DDR_ADDRESS_14 = 23 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_29_DDR_CKE = 24 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_29_DDR_CKE_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_29_ADDRESS_OP = 28 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_29_ADDRESS_OP_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_29_RESERVED_30_31 = 30 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_29_RESERVED_30_31_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_29_DDR_CSN_0_1 = 32 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_29_DDR_CSN_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_29_DDR_CID_0_1 = 34 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_29_DDR_CID_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_29_DDR_CSN_2_3 = 36 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_29_DDR_CSN_2_3_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_29_DDR_CID_2 = 38 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_29_FORCE_DATA_IMMED = 39 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_29_NESTED_LOOP_CNT = 40 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_29_NESTED_LOOP_CNT_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_29_DDR_ODT = 48 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_29_DDR_ODT_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_29_RESERVED_52_54 = 52 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_29_RESERVED_52_54_LEN = 3 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_29_PAUSE_INSTR = 55 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_29_VARIABLE_SEL = 56 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_29_VARIABLE_SEL_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_29_RESERVED_58_59 = 58 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_29_RESERVED_58_59_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_29_DDR_PARITY = 60 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_29_DDR_BANK_2 = 61 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_29_LOOP_BREAK_MODE = 62 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_29_LOOP_BREAK_MODE_LEN = 2 ; + +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_30_DDR_ADDRESS_0_13 = 0 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_30_DDR_ADDRESS_0_13_LEN = 14 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_30_DDR_ADDRESS_17 = 14 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_30_DDR_BANK_GROUP_1 = 15 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_30_DDR_RESETN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_30_DDR_BANK_0_1 = 17 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_30_DDR_BANK_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_30_DDR_BANK_GROUP_0 = 19 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_30_DDR_ACTN = 20 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_30_DDR_ADDRESS_16 = 21 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_30_DDR_ADDRESS_15 = 22 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_30_DDR_ADDRESS_14 = 23 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_30_DDR_CKE = 24 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_30_DDR_CKE_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_30_ADDRESS_OP = 28 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_30_ADDRESS_OP_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_30_RESERVED_31 = 30 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_30_RESERVED_31_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_30_DDR_CSN_0_1 = 32 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_30_DDR_CSN_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_30_DDR_CID_0_1 = 34 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_30_DDR_CID_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_30_DDR_CSN_2_3 = 36 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_30_DDR_CSN_2_3_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_30_DDR_CID_2 = 38 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_30_FORCE_DATA_IMMED = 39 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_30_NESTED_LOOP_CNT = 40 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_30_NESTED_LOOP_CNT_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_30_DDR_ODT = 48 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_30_DDR_ODT_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_30_RESERVED_52_54 = 52 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_30_RESERVED_52_54_LEN = 3 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_30_PAUSE_INSTR = 55 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_30_VARIABLE_SEL = 56 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_30_VARIABLE_SEL_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_30_RESERVED_58_59 = 58 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_30_RESERVED_58_59_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_30_DDR_PARITY = 60 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_30_DDR_BANK_2 = 61 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_30_LOOP_BREAK_MODE = 62 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_30_LOOP_BREAK_MODE_LEN = 2 ; + +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_31_DDR_ADDRESS_0_13 = 0 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_31_DDR_ADDRESS_0_13_LEN = 14 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_31_DDR_ADDRESS_17 = 14 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_31_DDR_BANK_GROUP_1 = 15 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_31_DDR_RESETN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_31_DDR_BANK_0_1 = 17 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_31_DDR_BANK_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_31_DDR_BANK_GROUP_0 = 19 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_31_DDR_ACTN = 20 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_31_DDR_ADDRESS_16 = 21 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_31_DDR_ADDRESS_15 = 22 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_31_DDR_ADDRESS_14 = 23 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_31_DDR_CKE = 24 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_31_DDR_CKE_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_31_ADDRESS_OP = 28 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_31_ADDRESS_OP_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_31_RESERVED_30 = 30 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_31_RESERVED_30_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_31_DDR_CSN_0_1 = 32 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_31_DDR_CSN_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_31_DDR_CID_0_1 = 34 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_31_DDR_CID_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_31_DDR_CSN_2_3 = 36 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_31_DDR_CSN_2_3_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_31_DDR_CID_2 = 38 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_31_FORCE_DATA_IMMED = 39 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_31_NESTED_LOOP_CNT = 40 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_31_NESTED_LOOP_CNT_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_31_DDR_ODT = 48 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_31_DDR_ODT_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_31_RESERVED_52_54 = 52 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_31_RESERVED_52_54_LEN = 3 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_31_PAUSE_INSTR = 55 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_31_VARIABLE_SEL = 56 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_31_VARIABLE_SEL_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_31_RESERVED_58_59 = 58 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_31_RESERVED_58_59_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_31_DDR_PARITY = 60 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_31_DDR_BANK_2 = 61 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_31_LOOP_BREAK_MODE = 62 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR0_31_LOOP_BREAK_MODE_LEN = 2 ; + +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_00_IDLES = 0 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_00_IDLES_LEN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_00_REPEAT_CMD_CNT = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_00_REPEAT_CMD_CNT_LEN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_00_READ_OR_WRITE_DATA = 32 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_00_READ_OR_WRITE_DATA_LEN = 20 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_00_READ_COMPARE_REQUIRED = 52 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_00_VARIABLE_OP = 53 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_00_VARIABLE_OP_LEN = 5 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_00_END = 58 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_00_GOTO_CMD = 59 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_00_GOTO_CMD_LEN = 5 ; + +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_01_IDLES = 0 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_01_IDLES_LEN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_01_REPEAT_CMD_CNT = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_01_REPEAT_CMD_CNT_LEN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_01_READ_OR_WRITE_DATA = 32 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_01_READ_OR_WRITE_DATA_LEN = 20 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_01_READ_COMPARE_REQUIRED = 52 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_01_VARIABLE_OP = 53 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_01_VARIABLE_OP_LEN = 5 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_01_END = 58 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_01_GOTO_CMD = 59 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_01_GOTO_CMD_LEN = 5 ; + +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_02_IDLES = 0 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_02_IDLES_LEN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_02_REPEAT_CMD_CNT = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_02_REPEAT_CMD_CNT_LEN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_02_READ_OR_WRITE_DATA = 32 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_02_READ_OR_WRITE_DATA_LEN = 20 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_02_READ_COMPARE_REQUIRED = 52 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_02_VARIABLE_OP = 53 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_02_VARIABLE_OP_LEN = 5 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_02_END = 58 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_02_GOTO_CMD = 59 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_02_GOTO_CMD_LEN = 5 ; + +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_03_IDLES = 0 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_03_IDLES_LEN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_03_REPEAT_CMD_CNT = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_03_REPEAT_CMD_CNT_LEN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_03_READ_OR_WRITE_DATA = 32 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_03_READ_OR_WRITE_DATA_LEN = 20 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_03_READ_COMPARE_REQUIRED = 52 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_03_VARIABLE_OP = 53 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_03_VARIABLE_OP_LEN = 5 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_03_END = 58 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_03_GOTO_CMD = 59 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_03_GOTO_CMD_LEN = 5 ; + +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_04_IDLES = 0 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_04_IDLES_LEN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_04_REPEAT_CMD_CNT = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_04_REPEAT_CMD_CNT_LEN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_04_READ_OR_WRITE_DATA = 32 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_04_READ_OR_WRITE_DATA_LEN = 20 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_04_READ_COMPARE_REQUIRED = 52 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_04_VARIABLE_OP = 53 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_04_VARIABLE_OP_LEN = 5 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_04_END = 58 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_04_GOTO_CMD = 59 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_04_GOTO_CMD_LEN = 5 ; + +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_05_IDLES = 0 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_05_IDLES_LEN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_05_REPEAT_CMD_CNT = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_05_REPEAT_CMD_CNT_LEN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_05_READ_OR_WRITE_DATA = 32 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_05_READ_OR_WRITE_DATA_LEN = 20 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_05_READ_COMPARE_REQUIRED = 52 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_05_VARIABLE_OP = 53 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_05_VARIABLE_OP_LEN = 5 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_05_END = 58 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_05_GOTO_CMD = 59 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_05_GOTO_CMD_LEN = 5 ; + +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_06_IDLES = 0 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_06_IDLES_LEN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_06_REPEAT_CMD_CNT = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_06_REPEAT_CMD_CNT_LEN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_06_READ_OR_WRITE_DATA = 32 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_06_READ_OR_WRITE_DATA_LEN = 20 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_06_READ_COMPARE_REQUIRED = 52 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_06_VARIABLE_OP = 53 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_06_VARIABLE_OP_LEN = 5 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_06_END = 58 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_06_GOTO_CMD = 59 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_06_GOTO_CMD_LEN = 5 ; + +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_07_IDLES = 0 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_07_IDLES_LEN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_07_REPEAT_CMD_CNT = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_07_REPEAT_CMD_CNT_LEN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_07_READ_OR_WRITE_DATA = 32 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_07_READ_OR_WRITE_DATA_LEN = 20 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_07_READ_COMPARE_REQUIRED = 52 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_07_VARIABLE_OP = 53 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_07_VARIABLE_OP_LEN = 5 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_07_END = 58 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_07_GOTO_CMD = 59 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_07_GOTO_CMD_LEN = 5 ; + +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_08_IDLES = 0 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_08_IDLES_LEN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_08_REPEAT_CMD_CNT = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_08_REPEAT_CMD_CNT_LEN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_08_READ_OR_WRITE_DATA = 32 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_08_READ_OR_WRITE_DATA_LEN = 20 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_08_READ_COMPARE_REQUIRED = 52 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_08_VARIABLE_OP = 53 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_08_VARIABLE_OP_LEN = 5 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_08_END = 58 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_08_GOTO_CMD = 59 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_08_GOTO_CMD_LEN = 5 ; + +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_09_IDLES = 0 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_09_IDLES_LEN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_09_REPEAT_CMD_CNT = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_09_REPEAT_CMD_CNT_LEN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_09_READ_OR_WRITE_DATA = 32 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_09_READ_OR_WRITE_DATA_LEN = 20 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_09_READ_COMPARE_REQUIRED = 52 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_09_VARIABLE_OP = 53 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_09_VARIABLE_OP_LEN = 5 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_09_END = 58 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_09_GOTO_CMD = 59 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_09_GOTO_CMD_LEN = 5 ; + +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_10_IDLES = 0 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_10_IDLES_LEN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_10_REPEAT_CMD_CNT = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_10_REPEAT_CMD_CNT_LEN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_10_READ_OR_WRITE_DATA = 32 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_10_READ_OR_WRITE_DATA_LEN = 20 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_10_READ_COMPARE_REQUIRED = 52 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_10_VARIABLE_OP = 53 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_10_VARIABLE_OP_LEN = 5 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_10_END = 58 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_10_GOTO_CMD = 59 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_10_GOTO_CMD_LEN = 5 ; + +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_11_IDLES = 0 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_11_IDLES_LEN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_11_REPEAT_CMD_CNT = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_11_REPEAT_CMD_CNT_LEN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_11_READ_OR_WRITE_DATA = 32 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_11_READ_OR_WRITE_DATA_LEN = 20 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_11_READ_COMPARE_REQUIRED = 52 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_11_VARIABLE_OP = 53 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_11_VARIABLE_OP_LEN = 5 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_11_END = 58 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_11_GOTO_CMD = 59 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_11_GOTO_CMD_LEN = 5 ; + +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_12_IDLES = 0 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_12_IDLES_LEN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_12_REPEAT_CMD_CNT = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_12_REPEAT_CMD_CNT_LEN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_12_READ_OR_WRITE_DATA = 32 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_12_READ_OR_WRITE_DATA_LEN = 20 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_12_READ_COMPARE_REQUIRED = 52 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_12_VARIABLE_OP = 53 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_12_VARIABLE_OP_LEN = 5 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_12_END = 58 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_12_GOTO_CMD = 59 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_12_GOTO_CMD_LEN = 5 ; + +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_13_IDLES = 0 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_13_IDLES_LEN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_13_REPEAT_CMD_CNT = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_13_REPEAT_CMD_CNT_LEN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_13_READ_OR_WRITE_DATA = 32 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_13_READ_OR_WRITE_DATA_LEN = 20 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_13_READ_COMPARE_REQUIRED = 52 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_13_VARIABLE_OP = 53 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_13_VARIABLE_OP_LEN = 5 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_13_END = 58 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_13_GOTO_CMD = 59 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_13_GOTO_CMD_LEN = 5 ; + +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_14_IDLES = 0 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_14_IDLES_LEN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_14_REPEAT_CMD_CNT = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_14_REPEAT_CMD_CNT_LEN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_14_READ_OR_WRITE_DATA = 32 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_14_READ_OR_WRITE_DATA_LEN = 20 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_14_READ_COMPARE_REQUIRED = 52 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_14_VARIABLE_OP = 53 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_14_VARIABLE_OP_LEN = 5 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_14_END = 58 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_14_GOTO_CMD = 59 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_14_GOTO_CMD_LEN = 5 ; + +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_15_IDLES = 0 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_15_IDLES_LEN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_15_REPEAT_CMD_CNT = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_15_REPEAT_CMD_CNT_LEN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_15_READ_OR_WRITE_DATA = 32 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_15_READ_OR_WRITE_DATA_LEN = 20 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_15_READ_COMPARE_REQUIRED = 52 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_15_VARIABLE_OP = 53 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_15_VARIABLE_OP_LEN = 5 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_15_END = 58 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_15_GOTO_CMD = 59 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_15_GOTO_CMD_LEN = 5 ; + +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_16_IDLES = 0 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_16_IDLES_LEN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_16_REPEAT_CMD_CNT = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_16_REPEAT_CMD_CNT_LEN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_16_READ_OR_WRITE_DATA = 32 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_16_READ_OR_WRITE_DATA_LEN = 20 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_16_READ_COMPARE_REQUIRED = 52 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_16_VARIABLE_OP = 53 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_16_VARIABLE_OP_LEN = 5 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_16_END = 58 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_16_GOTO_CMD = 59 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_16_GOTO_CMD_LEN = 5 ; + +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_17_IDLES = 0 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_17_IDLES_LEN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_17_REPEAT_CMD_CNT = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_17_REPEAT_CMD_CNT_LEN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_17_READ_OR_WRITE_DATA = 32 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_17_READ_OR_WRITE_DATA_LEN = 20 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_17_READ_COMPARE_REQUIRED = 52 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_17_VARIABLE_OP = 53 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_17_VARIABLE_OP_LEN = 5 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_17_END = 58 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_17_GOTO_CMD = 59 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_17_GOTO_CMD_LEN = 5 ; + +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_18_IDLES = 0 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_18_IDLES_LEN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_18_REPEAT_CMD_CNT = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_18_REPEAT_CMD_CNT_LEN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_18_READ_OR_WRITE_DATA = 32 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_18_READ_OR_WRITE_DATA_LEN = 20 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_18_READ_COMPARE_REQUIRED = 52 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_18_VARIABLE_OP = 53 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_18_VARIABLE_OP_LEN = 5 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_18_END = 58 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_18_GOTO_CMD = 59 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_18_GOTO_CMD_LEN = 5 ; + +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_19_IDLES = 0 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_19_IDLES_LEN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_19_REPEAT_CMD_CNT = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_19_REPEAT_CMD_CNT_LEN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_19_READ_OR_WRITE_DATA = 32 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_19_READ_OR_WRITE_DATA_LEN = 20 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_19_READ_COMPARE_REQUIRED = 52 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_19_VARIABLE_OP = 53 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_19_VARIABLE_OP_LEN = 5 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_19_END = 58 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_19_GOTO_CMD = 59 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_19_GOTO_CMD_LEN = 5 ; + +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_20_IDLES = 0 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_20_IDLES_LEN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_20_REPEAT_CMD_CNT = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_20_REPEAT_CMD_CNT_LEN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_20_READ_OR_WRITE_DATA = 32 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_20_READ_OR_WRITE_DATA_LEN = 20 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_20_READ_COMPARE_REQUIRED = 52 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_20_VARIABLE_OP = 53 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_20_VARIABLE_OP_LEN = 5 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_20_END = 58 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_20_GOTO_CMD = 59 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_20_GOTO_CMD_LEN = 5 ; + +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_21_IDLES = 0 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_21_IDLES_LEN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_21_REPEAT_CMD_CNT = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_21_REPEAT_CMD_CNT_LEN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_21_READ_OR_WRITE_DATA = 32 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_21_READ_OR_WRITE_DATA_LEN = 20 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_21_READ_COMPARE_REQUIRED = 52 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_21_VARIABLE_OP = 53 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_21_VARIABLE_OP_LEN = 5 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_21_END = 58 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_21_GOTO_CMD = 59 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_21_GOTO_CMD_LEN = 5 ; + +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_22_IDLES = 0 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_22_IDLES_LEN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_22_REPEAT_CMD_CNT = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_22_REPEAT_CMD_CNT_LEN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_22_READ_OR_WRITE_DATA = 32 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_22_READ_OR_WRITE_DATA_LEN = 20 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_22_READ_COMPARE_REQUIRED = 52 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_22_VARIABLE_OP = 53 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_22_VARIABLE_OP_LEN = 5 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_22_END = 58 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_22_GOTO_CMD = 59 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_22_GOTO_CMD_LEN = 5 ; + +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_23_IDLES = 0 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_23_IDLES_LEN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_23_REPEAT_CMD_CNT = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_23_REPEAT_CMD_CNT_LEN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_23_READ_OR_WRITE_DATA = 32 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_23_READ_OR_WRITE_DATA_LEN = 20 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_23_READ_COMPARE_REQUIRED = 52 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_23_VARIABLE_OP = 53 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_23_VARIABLE_OP_LEN = 5 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_23_END = 58 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_23_GOTO_CMD = 59 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_23_GOTO_CMD_LEN = 5 ; + +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_24_IDLES = 0 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_24_IDLES_LEN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_24_REPEAT_CMD_CNT = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_24_REPEAT_CMD_CNT_LEN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_24_READ_OR_WRITE_DATA = 32 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_24_READ_OR_WRITE_DATA_LEN = 20 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_24_READ_COMPARE_REQUIRED = 52 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_24_VARIABLE_OP = 53 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_24_VARIABLE_OP_LEN = 5 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_24_END = 58 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_24_GOTO_CMD = 59 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_24_GOTO_CMD_LEN = 5 ; + +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_25_IDLES = 0 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_25_IDLES_LEN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_25_REPEAT_CMD_CNT = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_25_REPEAT_CMD_CNT_LEN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_25_READ_OR_WRITE_DATA = 32 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_25_READ_OR_WRITE_DATA_LEN = 20 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_25_READ_COMPARE_REQUIRED = 52 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_25_VARIABLE_OP = 53 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_25_VARIABLE_OP_LEN = 5 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_25_END = 58 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_25_GOTO_CMD = 59 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_25_GOTO_CMD_LEN = 5 ; + +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_26_IDLES = 0 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_26_IDLES_LEN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_26_REPEAT_CMD_CNT = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_26_REPEAT_CMD_CNT_LEN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_26_READ_OR_WRITE_DATA = 32 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_26_READ_OR_WRITE_DATA_LEN = 20 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_26_READ_COMPARE_REQUIRED = 52 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_26_VARIABLE_OP = 53 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_26_VARIABLE_OP_LEN = 5 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_26_END = 58 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_26_GOTO_CMD = 59 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_26_GOTO_CMD_LEN = 5 ; + +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_27_IDLES = 0 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_27_IDLES_LEN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_27_REPEAT_CMD_CNT = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_27_REPEAT_CMD_CNT_LEN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_27_READ_OR_WRITE_DATA = 32 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_27_READ_OR_WRITE_DATA_LEN = 20 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_27_READ_COMPARE_REQUIRED = 52 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_27_VARIABLE_OP = 53 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_27_VARIABLE_OP_LEN = 5 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_27_END = 58 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_27_GOTO_CMD = 59 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_27_GOTO_CMD_LEN = 5 ; + +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_28_IDLES = 0 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_28_IDLES_LEN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_28_REPEAT_CMD_CNT = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_28_REPEAT_CMD_CNT_LEN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_28_READ_OR_WRITE_DATA = 32 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_28_READ_OR_WRITE_DATA_LEN = 20 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_28_READ_COMPARE_REQUIRED = 52 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_28_VARIABLE_OP = 53 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_28_VARIABLE_OP_LEN = 5 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_28_END = 58 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_28_GOTO_CMD = 59 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_28_GOTO_CMD_LEN = 5 ; + +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_29_IDLES = 0 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_29_IDLES_LEN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_29_REPEAT_CMD_CNT = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_29_REPEAT_CMD_CNT_LEN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_29_READ_OR_WRITE_DATA = 32 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_29_READ_OR_WRITE_DATA_LEN = 20 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_29_READ_COMPARE_REQUIRED = 52 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_29_VARIABLE_OP = 53 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_29_VARIABLE_OP_LEN = 5 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_29_END = 58 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_29_GOTO_CMD = 59 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_29_GOTO_CMD_LEN = 5 ; + +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_30_IDLES = 0 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_30_IDLES_LEN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_30_REPEAT_CMD_CNT = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_30_REPEAT_CMD_CNT_LEN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_30_READ_OR_WRITE_DATA = 32 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_30_READ_OR_WRITE_DATA_LEN = 20 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_30_READ_COMPARE_REQUIRED = 52 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_30_VARIABLE_OP = 53 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_30_VARIABLE_OP_LEN = 5 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_30_END = 58 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_30_GOTO_CMD = 59 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_30_GOTO_CMD_LEN = 5 ; + +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_31_IDLES = 0 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_31_IDLES_LEN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_31_REPEAT_CMD_CNT = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_31_REPEAT_CMD_CNT_LEN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_31_READ_OR_WRITE_DATA = 32 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_31_READ_OR_WRITE_DATA_LEN = 20 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_31_READ_COMPARE_REQUIRED = 52 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_31_VARIABLE_OP = 53 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_31_VARIABLE_OP_LEN = 5 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_31_END = 58 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_31_GOTO_CMD = 59 ; +static const uint8_t EXPLR_MCBIST_CCS_INST_ARR1_31_GOTO_CMD_LEN = 5 ; + +static const uint8_t EXPLR_MCBIST_CCS_MODEQ_STOP_ON_ERR = 0 ; +static const uint8_t EXPLR_MCBIST_CCS_MODEQ_UE_DISABLE = 1 ; +static const uint8_t EXPLR_MCBIST_CCS_MODEQ_DATA_COMPARE_BURST_SEL = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_MODEQ_DATA_COMPARE_BURST_SEL_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_MODEQ_RESERVED_4_6 = 4 ; +static const uint8_t EXPLR_MCBIST_CCS_MODEQ_RESERVED_4_6_LEN = 3 ; +static const uint8_t EXPLR_MCBIST_CCS_MODEQ_TRACE_SELECT_DQBYPASS = 7 ; +static const uint8_t EXPLR_MCBIST_CCS_MODEQ_RESERVED_8_23 = 8 ; +static const uint8_t EXPLR_MCBIST_CCS_MODEQ_RESERVED_8_23_LEN = 16 ; +static const uint8_t EXPLR_MCBIST_CCS_MODEQ_CFG_PARITY_AFTER_CMD = 24 ; +static const uint8_t EXPLR_MCBIST_CCS_MODEQ_NESTED_LOOP_ENABLE = 25 ; +static const uint8_t EXPLR_MCBIST_CCS_MODEQ_COPY_CKE_TO_SPARE_CKE = 26 ; +static const uint8_t EXPLR_MCBIST_CCS_MODEQ_DISABLE_ECC_ARRAY_CHK = 27 ; +static const uint8_t EXPLR_MCBIST_CCS_MODEQ_DISABLE_ECC_ARRAY_CORRECTION = 28 ; +static const uint8_t EXPLR_MCBIST_CCS_MODEQ_CFG_DGEN_FIXED_MODE = 29 ; +static const uint8_t EXPLR_MCBIST_CCS_MODEQ_RESERVED_30_31 = 30 ; +static const uint8_t EXPLR_MCBIST_CCS_MODEQ_RESERVED_30_31_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_MODEQ_IDLE_PAT_ADDRESS_0_13 = 32 ; +static const uint8_t EXPLR_MCBIST_CCS_MODEQ_IDLE_PAT_ADDRESS_0_13_LEN = 14 ; +static const uint8_t EXPLR_MCBIST_CCS_MODEQ_IDLE_PAT_ADDRESS_17 = 46 ; +static const uint8_t EXPLR_MCBIST_CCS_MODEQ_IDLE_PAT_BANK_GROUP_1 = 47 ; +static const uint8_t EXPLR_MCBIST_CCS_MODEQ_IDLE_PAT_BANK_0_1 = 48 ; +static const uint8_t EXPLR_MCBIST_CCS_MODEQ_IDLE_PAT_BANK_0_1_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_MODEQ_IDLE_PAT_BANK_GROUP_0 = 50 ; +static const uint8_t EXPLR_MCBIST_CCS_MODEQ_IDLE_PAT_ACTN = 51 ; +static const uint8_t EXPLR_MCBIST_CCS_MODEQ_IDLE_PAT_ADDRESS_16 = 52 ; +static const uint8_t EXPLR_MCBIST_CCS_MODEQ_IDLE_PAT_ADDRESS_15 = 53 ; +static const uint8_t EXPLR_MCBIST_CCS_MODEQ_IDLE_PAT_ADDRESS_14 = 54 ; +static const uint8_t EXPLR_MCBIST_CCS_MODEQ_NTTM_MODE = 55 ; +static const uint8_t EXPLR_MCBIST_CCS_MODEQ_NTTM_RW_DATA_DLY = 56 ; +static const uint8_t EXPLR_MCBIST_CCS_MODEQ_NTTM_RW_DATA_DLY_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_CCS_MODEQ_IDLE_PAT_BANK_2 = 60 ; +static const uint8_t EXPLR_MCBIST_CCS_MODEQ_DDR_PARITY_ENABLE = 61 ; +static const uint8_t EXPLR_MCBIST_CCS_MODEQ_IDLE_PAT_PARITY = 62 ; +static const uint8_t EXPLR_MCBIST_CCS_MODEQ_PAUSE_DISABLE = 63 ; + +static const uint8_t EXPLR_MCBIST_CCS_STATQ_IP = 0 ; +static const uint8_t EXPLR_MCBIST_CCS_STATQ_DONE = 1 ; +static const uint8_t EXPLR_MCBIST_CCS_STATQ_FAIL = 2 ; +static const uint8_t EXPLR_MCBIST_CCS_STATQ_FAIL_TYPE = 3 ; +static const uint8_t EXPLR_MCBIST_CCS_STATQ_FAIL_TYPE_LEN = 3 ; +static const uint8_t EXPLR_MCBIST_CCS_STATQ_MCBIST_SUBTEST_IP = 6 ; +static const uint8_t EXPLR_MCBIST_CCS_STATQ_FAIL_RCD = 7 ; +static const uint8_t EXPLR_MCBIST_CCS_STATQ_PAUSED = 8 ; +static const uint8_t EXPLR_MCBIST_CCS_STATQ_CE = 9 ; + +static const uint8_t EXPLR_MCBIST_DBGCFG0Q_CFG_DBG_ENABLE = 0 ; +static const uint8_t EXPLR_MCBIST_DBGCFG0Q_CFG_DBG_PICK_ASYNC_PORT01 = 1 ; +static const uint8_t EXPLR_MCBIST_DBGCFG0Q_CFG_DBG_PICK_ASYNC_PORT01_LEN = 11 ; +static const uint8_t EXPLR_MCBIST_DBGCFG0Q_CFG_DBG_PICK_ASYNC_PORT23 = 12 ; +static const uint8_t EXPLR_MCBIST_DBGCFG0Q_CFG_DBG_PICK_ASYNC_PORT23_LEN = 11 ; +static const uint8_t EXPLR_MCBIST_DBGCFG0Q_CFG_DBG_PICK_MCBIST01 = 23 ; +static const uint8_t EXPLR_MCBIST_DBGCFG0Q_CFG_DBG_PICK_MCBIST01_LEN = 11 ; +static const uint8_t EXPLR_MCBIST_DBGCFG0Q_CFG_DBG_PICK_MCBIST23 = 34 ; +static const uint8_t EXPLR_MCBIST_DBGCFG0Q_CFG_DBG_PICK_MCBIST23_LEN = 11 ; +static const uint8_t EXPLR_MCBIST_DBGCFG0Q_SCOM_SET_WAT_EXT_TRIGGER = 45 ; +static const uint8_t EXPLR_MCBIST_DBGCFG0Q_SCOM_SET_WAT_EXT_RESET = 46 ; +static const uint8_t EXPLR_MCBIST_DBGCFG0Q_SCOM_SET_WAT_EXT_ARM = 47 ; + +static const uint8_t EXPLR_MCBIST_DBGCFG1Q_CFG_WAT_ENABLE = 0 ; +static const uint8_t EXPLR_MCBIST_DBGCFG1Q_CFG_WAT_EXT_EVENT_TO_INT = 1 ; +static const uint8_t EXPLR_MCBIST_DBGCFG1Q_CFG_WAT_EXT_EVENT_TO_INT_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_DBGCFG1Q_CFG_WAT_EXT_TRIGGER_SEL = 3 ; +static const uint8_t EXPLR_MCBIST_DBGCFG1Q_CFG_WAT_EXT_TRIGGER_SEL_LEN = 20 ; +static const uint8_t EXPLR_MCBIST_DBGCFG1Q_CFG_WAT_EXT_RESET_SEL = 23 ; +static const uint8_t EXPLR_MCBIST_DBGCFG1Q_CFG_WAT_EXT_RESET_SEL_LEN = 20 ; +static const uint8_t EXPLR_MCBIST_DBGCFG1Q_CFG_WAT_EXT_ARM_SEL = 43 ; +static const uint8_t EXPLR_MCBIST_DBGCFG1Q_CFG_WAT_EXT_ARM_SEL_LEN = 20 ; +static const uint8_t EXPLR_MCBIST_DBGCFG1Q_RESERVED_63 = 63 ; + +static const uint8_t EXPLR_MCBIST_DBGCFG2Q_CFG_WAT_LOC_EVENT0_SEL = 0 ; +static const uint8_t EXPLR_MCBIST_DBGCFG2Q_CFG_WAT_LOC_EVENT0_SEL_LEN = 20 ; +static const uint8_t EXPLR_MCBIST_DBGCFG2Q_CFG_WAT_LOC_EVENT1_SEL = 20 ; +static const uint8_t EXPLR_MCBIST_DBGCFG2Q_CFG_WAT_LOC_EVENT1_SEL_LEN = 20 ; +static const uint8_t EXPLR_MCBIST_DBGCFG2Q_CFG_WAT_LOC_EVENT2_SEL = 40 ; +static const uint8_t EXPLR_MCBIST_DBGCFG2Q_CFG_WAT_LOC_EVENT2_SEL_LEN = 20 ; +static const uint8_t EXPLR_MCBIST_DBGCFG2Q_RESERVED_60_63 = 60 ; +static const uint8_t EXPLR_MCBIST_DBGCFG2Q_RESERVED_60_63_LEN = 4 ; + +static const uint8_t EXPLR_MCBIST_DBGCFG3Q_CFG_WAT_LOC_EVENT3_SEL = 0 ; +static const uint8_t EXPLR_MCBIST_DBGCFG3Q_CFG_WAT_LOC_EVENT3_SEL_LEN = 20 ; +static const uint8_t EXPLR_MCBIST_DBGCFG3Q_CFG_WAT_GLOB_EVENT0_SEL = 20 ; +static const uint8_t EXPLR_MCBIST_DBGCFG3Q_CFG_WAT_GLOB_EVENT0_SEL_LEN = 3 ; +static const uint8_t EXPLR_MCBIST_DBGCFG3Q_CFG_WAT_GLOB_EVENT1_SEL = 23 ; +static const uint8_t EXPLR_MCBIST_DBGCFG3Q_CFG_WAT_GLOB_EVENT1_SEL_LEN = 3 ; +static const uint8_t EXPLR_MCBIST_DBGCFG3Q_CFG_WAT_GLOB_EVENT2_SEL = 26 ; +static const uint8_t EXPLR_MCBIST_DBGCFG3Q_CFG_WAT_GLOB_EVENT2_SEL_LEN = 3 ; +static const uint8_t EXPLR_MCBIST_DBGCFG3Q_CFG_WAT_GLOB_EVENT3_SEL = 29 ; +static const uint8_t EXPLR_MCBIST_DBGCFG3Q_CFG_WAT_GLOB_EVENT3_SEL_LEN = 3 ; +static const uint8_t EXPLR_MCBIST_DBGCFG3Q_CFG_WAT_OUTPUT_PULSE = 32 ; +static const uint8_t EXPLR_MCBIST_DBGCFG3Q_CFG_WAT_ACT_MNT_GO_IDLE_PULSE = 33 ; +static const uint8_t EXPLR_MCBIST_DBGCFG3Q_CFG_WAT_ACT_MNT_GO_IDLE_PULSE_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_DBGCFG3Q_CFG_WAT_ACT_SET_SPATTN_PULSE = 37 ; +static const uint8_t EXPLR_MCBIST_DBGCFG3Q_CFG_WAT_ACT_SET_SPATTN_PULSE_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_DBGCFG3Q_CFG_WAT_ACT_FRC_TB_PULSE_PULSE = 41 ; +static const uint8_t EXPLR_MCBIST_DBGCFG3Q_CFG_WAT_ACT_FRC_TB_PULSE_PULSE_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_DBGCFG3Q_CFG_WAT_CNT_VALUE = 45 ; +static const uint8_t EXPLR_MCBIST_DBGCFG3Q_CFG_WAT_CNT_VALUE_LEN = 6 ; +static const uint8_t EXPLR_MCBIST_DBGCFG3Q_CFG_WAT_TMR_VALUE = 51 ; +static const uint8_t EXPLR_MCBIST_DBGCFG3Q_CFG_WAT_TMR_VALUE_LEN = 8 ; + +static const uint8_t EXPLR_MCBIST_DBG_BUS_CFGQ_TRACE_SEL0_A = 0 ; +static const uint8_t EXPLR_MCBIST_DBG_BUS_CFGQ_TRACE_SEL0_A_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_DBG_BUS_CFGQ_TRACE_SEL0_B = 4 ; +static const uint8_t EXPLR_MCBIST_DBG_BUS_CFGQ_TRACE_SEL0_B_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_DBG_BUS_CFGQ_TRACE_SEL0_C = 8 ; +static const uint8_t EXPLR_MCBIST_DBG_BUS_CFGQ_TRACE_SEL0_C_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_DBG_BUS_CFGQ_TRACE_SEL0_D = 12 ; +static const uint8_t EXPLR_MCBIST_DBG_BUS_CFGQ_TRACE_SEL0_D_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_DBG_BUS_CFGQ_TRACE_SEL1_A = 16 ; +static const uint8_t EXPLR_MCBIST_DBG_BUS_CFGQ_TRACE_SEL1_A_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_DBG_BUS_CFGQ_TRACE_SEL1_B = 20 ; +static const uint8_t EXPLR_MCBIST_DBG_BUS_CFGQ_TRACE_SEL1_B_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_DBG_BUS_CFGQ_TRACE_SEL1_C = 24 ; +static const uint8_t EXPLR_MCBIST_DBG_BUS_CFGQ_TRACE_SEL1_C_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_DBG_BUS_CFGQ_TRACE_SEL1_D = 28 ; +static const uint8_t EXPLR_MCBIST_DBG_BUS_CFGQ_TRACE_SEL1_D_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_DBG_BUS_CFGQ_TLXR_SHIFT_SEL = 32 ; +static const uint8_t EXPLR_MCBIST_DBG_BUS_CFGQ_TLXT_SHIFT_SEL = 33 ; +static const uint8_t EXPLR_MCBIST_DBG_BUS_CFGQ_WDF_SHIFT_SEL = 34 ; +static const uint8_t EXPLR_MCBIST_DBG_BUS_CFGQ_RDF_SHIFT_SEL = 35 ; +static const uint8_t EXPLR_MCBIST_DBG_BUS_CFGQ_SRQ_SHIFT_SEL = 36 ; +static const uint8_t EXPLR_MCBIST_DBG_BUS_CFGQ_MCB_SHIFT_SEL = 37 ; +static const uint8_t EXPLR_MCBIST_DBG_BUS_CFGQ_MMIO_SHIFT_SEL = 38 ; +static const uint8_t EXPLR_MCBIST_DBG_BUS_CFGQ_DLX_SHIFT_SEL = 39 ; +static const uint8_t EXPLR_MCBIST_DBG_BUS_CFGQ_TRACE0_TRACE_ERR_SEL = 40 ; +static const uint8_t EXPLR_MCBIST_DBG_BUS_CFGQ_TRACE0_TRACE_ERR_SEL_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_DBG_BUS_CFGQ_TRACE1_TRACE_ERR_SEL = 44 ; +static const uint8_t EXPLR_MCBIST_DBG_BUS_CFGQ_TRACE1_TRACE_ERR_SEL_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_DBG_BUS_CFGQ_DFI_SLICE_SEL_A = 48 ; +static const uint8_t EXPLR_MCBIST_DBG_BUS_CFGQ_DFI_SLICE_SEL_A_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_DBG_BUS_CFGQ_DFI_SLICE_SEL_B = 52 ; +static const uint8_t EXPLR_MCBIST_DBG_BUS_CFGQ_DFI_SLICE_SEL_B_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_DBG_BUS_CFGQ_RESERVED_56 = 56 ; +static const uint8_t EXPLR_MCBIST_DBG_BUS_CFGQ_DFI_GROUP_SEL0 = 57 ; +static const uint8_t EXPLR_MCBIST_DBG_BUS_CFGQ_DFI_GROUP_SEL0_LEN = 3 ; +static const uint8_t EXPLR_MCBIST_DBG_BUS_CFGQ_RESERVED_60 = 60 ; +static const uint8_t EXPLR_MCBIST_DBG_BUS_CFGQ_DFI_GROUP_SEL1 = 61 ; +static const uint8_t EXPLR_MCBIST_DBG_BUS_CFGQ_DFI_GROUP_SEL1_LEN = 3 ; + +static const uint8_t EXPLR_MCBIST_ERR_HOLD_LAT_FIR_MASK_PAR = 0 ; +static const uint8_t EXPLR_MCBIST_ERR_HOLD_LAT_FIR_ACTION0_PAR = 1 ; +static const uint8_t EXPLR_MCBIST_ERR_HOLD_LAT_FIR_ACTION1_PAR = 2 ; + +static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MBECTLQ_PE = 0 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_CCS_STATQ_PE = 1 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_CCS_MODEQ_PE = 2 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_RCD_LRDIM_CNTL_WORD0_15Q_PE = 3 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_CCSARRERRINJQ_PE = 4 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_CCS_FIXED_DATA0Q_PE = 5 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_CCS_FIXED_DATA1Q_PE = 6 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MCBAMR0A0Q_PE = 7 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MCBAMR1A0Q_PE = 8 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MCBAMR2A0Q_PE = 9 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MCBAMR3A0Q_PE = 10 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MCBSA0Q_PE = 11 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MCBSA1Q_PE = 12 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MCBEA0Q_PE = 13 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MCBEA1Q_PE = 14 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MCBSA2Q_PE = 15 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MCBSA3Q_PE = 16 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MCBEA2Q_PE = 17 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MCBEA3Q_PE = 18 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MCBLFSRA0Q_PE = 19 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MCBACQ_PE = 20 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MCBAGRAQ_PE = 21 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MCBRDS0Q_PE = 22 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MCBRDS1Q_PE = 23 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MCBDRSRQ_PE = 24 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MCBDRCRQ_PE = 25 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MCBFD0Q_PE = 26 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MCBFD1Q_PE = 27 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MCBFD2Q_PE = 28 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MCBFD3Q_PE = 29 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MCBFD4Q_PE = 30 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MCBFD5Q_PE = 31 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MCBFD6Q_PE = 32 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MCBFD7Q_PE = 33 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MCBFDSPQ_PE = 34 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MCBFDQ_PE = 35 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MCBPARMQ_PE = 36 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_RUNTIMECTRQ_PE = 37 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MCBRCRQ_PE = 38 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MCB_CNTLSTATQ_PE = 39 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MCBCFGQ_PE = 40 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MCBMCATQ_PE = 41 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MBSEC0Q_PE = 42 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MBSEC1Q_PE = 43 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MBSTRQ_PE = 44 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MBSSYMEC0Q_PE = 45 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MBSSYMEC1Q_PE = 46 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MBSSYMEC2Q_PE = 47 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MBSSYMEC3Q_PE = 48 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MBSSYMEC4Q_PE = 49 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MBSSYMEC5Q_PE = 50 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MBSSYMEC6Q_PE = 51 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MBSSYMEC7Q_PE = 52 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MBSSYMEC8Q_PE = 53 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MBSMODESQ_PE = 54 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MCBSTATQ_PE = 55 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MBSMSECQ_PE = 56 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MBNCER0Q_PE = 57 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MBRCER0Q_PE = 58 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MBMPER0Q_PE = 59 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MBUER0Q_PE = 60 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MBAUER0Q_PE = 61 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_DBG_BUS_CFGQ_PE = 62 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK0Q_MASK1Q_PE = 63 ; + +static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_MASK0Q_PE = 0 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_MBSEVR0Q_PE = 1 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_DBGCFG0Q_PE = 2 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_DBGCFG1Q_PE = 3 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_DBGCFG2Q_PE = 4 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_DBGCFG3Q_PE = 5 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_WATCFG0AQ_PE = 6 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_WATCFG0BQ_PE = 7 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_WATCFG0CQ_PE = 8 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_WATCFG0DQ_PE = 9 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_WATCFG0EQ_PE = 10 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_WATCFG1AQ_PE = 11 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_WATCFG1BQ_PE = 12 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_WATCFG1CQ_PE = 13 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_WATCFG1DQ_PE = 14 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_WATCFG1EQ_PE = 15 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_WATCFG2AQ_PE = 16 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_WATCFG2BQ_PE = 17 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_WATCFG2CQ_PE = 18 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_WATCFG2DQ_PE = 19 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_WATCFG2EQ_PE = 20 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_WATCFG3AQ_PE = 21 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_WATCFG3BQ_PE = 22 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_WATCFG3CQ_PE = 23 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_WATCFG3DQ_PE = 24 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_WATCFG3EQ_PE = 25 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_MCBMR0Q_PE = 26 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_MCBMR1Q_PE = 27 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_MCBMR2Q_PE = 28 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_MCBMR3Q_PE = 29 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_MCBMR4Q_PE = 30 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_MCBMR5Q_PE = 31 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_MCBMR6Q_PE = 32 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_MCBMR7Q_PE = 33 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_MBXLT0Q_PE = 34 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_MBXLT1Q_PE = 35 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_MBXLT2Q_PE = 36 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_CCS_CNTLQ_PE = 37 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_MCB_CNTLQ_PE = 38 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_MCB_FIR_CCS = 39 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_MCB_FIR_MCBFSM = 40 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_CCS_ARRAY_UNCORRECTED_CE = 41 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_CCS_ARRAY_UE = 42 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_CCS_ARRAY_SCOM_ECC = 43 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_MBSSYMEC9Q_PE = 44 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_RESERVED_45_63 = 45 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK1Q_RESERVED_45_63_LEN = 19 ; + +static const uint8_t EXPLR_MCBIST_ERR_MASK_LAT_FIR_PAR = 0 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK_LAT_FIR_ACTION0_PAR = 1 ; +static const uint8_t EXPLR_MCBIST_ERR_MASK_LAT_FIR_ACTION1_PAR = 2 ; + +static const uint8_t EXPLR_MCBIST_MBAUER0Q_PORT_0_MAINLINE_AUE_ADDR_TRAP = 0 ; +static const uint8_t EXPLR_MCBIST_MBAUER0Q_PORT_0_MAINLINE_AUE_ADDR_TRAP_LEN = 38 ; +static const uint8_t EXPLR_MCBIST_MBAUER0Q_RESERVED_38_39 = 38 ; +static const uint8_t EXPLR_MCBIST_MBAUER0Q_RESERVED_38_39_LEN = 2 ; + +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MBECTLQ_PE = 0 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_CCS_STATQ_PE = 1 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_CCS_MODEQ_PE = 2 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_RCD_LRDIM_CNTL_WORD0_15Q_PE = 3 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_CCSARRERRINJQ_PE = 4 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_CCS_FIXED_DATA0Q_PE = 5 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_CCS_FIXED_DATA1Q_PE = 6 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MCBAMR0A0Q_PE = 7 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MCBAMR1A0Q_PE = 8 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MCBAMR2A0Q_PE = 9 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MCBAMR3A0Q_PE = 10 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MCBSA0Q_PE = 11 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MCBSA1Q_PE = 12 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MCBEA0Q_PE = 13 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MCBEA1Q_PE = 14 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MCBSA2Q_PE = 15 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MCBSA3Q_PE = 16 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MCBEA2Q_PE = 17 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MCBEA3Q_PE = 18 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MCBLFSRA0Q_PE = 19 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MCBACQ_PE = 20 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MCBAGRAQ_PE = 21 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MCBRDS0Q_PE = 22 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MCBRDS1Q_PE = 23 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MCBDRSRQ_PE = 24 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MCBDRCRQ_PE = 25 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MCBFD0Q_PE = 26 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MCBFD1Q_PE = 27 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MCBFD2Q_PE = 28 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MCBFD3Q_PE = 29 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MCBFD4Q_PE = 30 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MCBFD5Q_PE = 31 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MCBFD6Q_PE = 32 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MCBFD7Q_PE = 33 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MCBFDSPQ_PE = 34 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MCBFDQ_PE = 35 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MCBPARMQ_PE = 36 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_RUNTIMECTRQ_PE = 37 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MCBRCRQ_PE = 38 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MCB_CNTLSTATQ_PE = 39 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MCBCFGQ_PE = 40 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MCBMCATQ_PE = 41 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MBSEC0Q_PE = 42 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MBSEC1Q_PE = 43 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MBSTRQ_PE = 44 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MBSSYMEC0Q_PE = 45 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MBSSYMEC1Q_PE = 46 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MBSSYMEC2Q_PE = 47 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MBSSYMEC3Q_PE = 48 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MBSSYMEC4Q_PE = 49 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MBSSYMEC5Q_PE = 50 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MBSSYMEC6Q_PE = 51 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MBSSYMEC7Q_PE = 52 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MBSSYMEC8Q_PE = 53 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MBSMODESQ_PE = 54 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MCBSTATQ_PE = 55 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MBSMSECQ_PE = 56 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MBNCER0Q_PE = 57 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MBRCER0Q_PE = 58 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MBMPER0Q_PE = 59 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MBUER0Q_PE = 60 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_MBAUER0Q_PE = 61 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_DBG_BUS_CFGQ_PE = 62 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT0Q_ERR_MASK1Q_PE = 63 ; + +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_ERR_MASK0Q_PE = 0 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_MBSEVR0Q_PE = 1 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_DBGCFG0Q_PE = 2 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_DBGCFG1Q_PE = 3 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_DBGCFG2Q_PE = 4 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_DBGCFG3Q_PE = 5 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_WATCFG0AQ_PE = 6 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_WATCFG0BQ_PE = 7 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_WATCFG0CQ_PE = 8 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_WATCFG0DQ_PE = 9 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_WATCFG0EQ_PE = 10 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_WATCFG1AQ_PE = 11 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_WATCFG1BQ_PE = 12 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_WATCFG1CQ_PE = 13 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_WATCFG1DQ_PE = 14 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_WATCFG1EQ_PE = 15 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_WATCFG2AQ_PE = 16 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_WATCFG2BQ_PE = 17 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_WATCFG2CQ_PE = 18 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_WATCFG2DQ_PE = 19 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_WATCFG2EQ_PE = 20 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_WATCFG3AQ_PE = 21 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_WATCFG3BQ_PE = 22 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_WATCFG3CQ_PE = 23 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_WATCFG3DQ_PE = 24 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_WATCFG3EQ_PE = 25 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_MCBMR0Q_PE = 26 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_MCBMR1Q_PE = 27 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_MCBMR2Q_PE = 28 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_MCBMR3Q_PE = 29 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_MCBMR4Q_PE = 30 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_MCBMR5Q_PE = 31 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_MCBMR6Q_PE = 32 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_MCBMR7Q_PE = 33 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_MBXLT0Q_PE = 34 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_MBXLT1Q_PE = 35 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_MBXLT2Q_PE = 36 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_CCS_CNTLQ_PE = 37 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_MCB_CNTLQ_PE = 38 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_MCB_FIR_CCS_ERR = 39 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_MCB_FIR_MCBFSM_ERR = 40 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_CCS_ARRAY_UNCORRECTED_CE_ERR = 41 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_CCS_ARRAY_UE_ERR = 42 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_CCS_ARRAY_SCOM_ECC_ERR = 43 ; +static const uint8_t EXPLR_MCBIST_MBA_MCBERRPT1Q_MBSSYMEC9Q_PE = 44 ; + +static const uint8_t EXPLR_MCBIST_MBECTLQ_ATOMIC_ALT_CE_INJ = 0 ; +static const uint8_t EXPLR_MCBIST_MBECTLQ_ATOMIC_ALT_CHIP_KILL_INJ = 1 ; +static const uint8_t EXPLR_MCBIST_MBECTLQ_ATOMIC_ALT_UE_INJ = 2 ; +static const uint8_t EXPLR_MCBIST_MBECTLQ_ATOMIC_ALT_SUE_INJ = 3 ; +static const uint8_t EXPLR_MCBIST_MBECTLQ_ATOMIC_ALT_INJ_SYM_SEL = 4 ; +static const uint8_t EXPLR_MCBIST_MBECTLQ_ATOMIC_ALT_INJ_SYM_SEL_LEN = 7 ; +static const uint8_t EXPLR_MCBIST_MBECTLQ_RESERVE_11 = 11 ; +static const uint8_t EXPLR_MCBIST_MBECTLQ_SCOM_CMD_REG_INJ_MODE = 12 ; +static const uint8_t EXPLR_MCBIST_MBECTLQ_SCOM_CMD_REG_INJ = 13 ; +static const uint8_t EXPLR_MCBIST_MBECTLQ_MCBIST_FSM_INJ_MODE = 14 ; +static const uint8_t EXPLR_MCBIST_MBECTLQ_MCBIST_FSM_INJ_REG = 15 ; +static const uint8_t EXPLR_MCBIST_MBECTLQ_CCS_FSM_INJ_MODE = 16 ; +static const uint8_t EXPLR_MCBIST_MBECTLQ_CCS_FSM_INJ_REG = 17 ; +static const uint8_t EXPLR_MCBIST_MBECTLQ_RESERVED_18_31 = 18 ; +static const uint8_t EXPLR_MCBIST_MBECTLQ_RESERVED_18_31_LEN = 14 ; + +static const uint8_t EXPLR_MCBIST_MBMPER0Q_PORT_0_MAINLINE_MPE_ADDR_TRAP = 0 ; +static const uint8_t EXPLR_MCBIST_MBMPER0Q_PORT_0_MAINLINE_MPE_ADDR_TRAP_LEN = 38 ; +static const uint8_t EXPLR_MCBIST_MBMPER0Q_PORT_0_MAINLINE_MPE_ON_RCE = 38 ; +static const uint8_t EXPLR_MCBIST_MBMPER0Q_RESERVED_39 = 39 ; + +static const uint8_t EXPLR_MCBIST_MBNCER0Q_PORT_0_MAINLINE_NCE_ADDR_TRAP = 0 ; +static const uint8_t EXPLR_MCBIST_MBNCER0Q_PORT_0_MAINLINE_NCE_ADDR_TRAP_LEN = 38 ; +static const uint8_t EXPLR_MCBIST_MBNCER0Q_PORT_0_MAINLINE_NCE_ON_RCE = 38 ; +static const uint8_t EXPLR_MCBIST_MBNCER0Q_PORT_0_MAINLINE_NCE_IS_TCE = 39 ; + +static const uint8_t EXPLR_MCBIST_MBRCER0Q_PORT_0_MAINLINE_RCE_ADDR_TRAP = 0 ; +static const uint8_t EXPLR_MCBIST_MBRCER0Q_PORT_0_MAINLINE_RCE_ADDR_TRAP_LEN = 38 ; +static const uint8_t EXPLR_MCBIST_MBRCER0Q_RESERVED_38_39 = 38 ; +static const uint8_t EXPLR_MCBIST_MBRCER0Q_RESERVED_38_39_LEN = 2 ; + +static const uint8_t EXPLR_MCBIST_MBSEC0Q_INTERMITTENT_CE_COUNT = 0 ; +static const uint8_t EXPLR_MCBIST_MBSEC0Q_INTERMITTENT_CE_COUNT_LEN = 12 ; +static const uint8_t EXPLR_MCBIST_MBSEC0Q_SOFT_CE_COUNT = 12 ; +static const uint8_t EXPLR_MCBIST_MBSEC0Q_SOFT_CE_COUNT_LEN = 12 ; +static const uint8_t EXPLR_MCBIST_MBSEC0Q_HARD_CE_COUNT = 24 ; +static const uint8_t EXPLR_MCBIST_MBSEC0Q_HARD_CE_COUNT_LEN = 12 ; +static const uint8_t EXPLR_MCBIST_MBSEC0Q_INTERMITTENT_MCE_COUNT = 36 ; +static const uint8_t EXPLR_MCBIST_MBSEC0Q_INTERMITTENT_MCE_COUNT_LEN = 12 ; +static const uint8_t EXPLR_MCBIST_MBSEC0Q_SOFT_MCE_COUNT = 48 ; +static const uint8_t EXPLR_MCBIST_MBSEC0Q_SOFT_MCE_COUNT_LEN = 12 ; + +static const uint8_t EXPLR_MCBIST_MBSEC1Q_HARD_MCE_COUNT = 0 ; +static const uint8_t EXPLR_MCBIST_MBSEC1Q_HARD_MCE_COUNT_LEN = 12 ; +static const uint8_t EXPLR_MCBIST_MBSEC1Q_ICE_COUNT = 12 ; +static const uint8_t EXPLR_MCBIST_MBSEC1Q_ICE_COUNT_LEN = 12 ; +static const uint8_t EXPLR_MCBIST_MBSEC1Q_UE_COUNT = 24 ; +static const uint8_t EXPLR_MCBIST_MBSEC1Q_UE_COUNT_LEN = 12 ; +static const uint8_t EXPLR_MCBIST_MBSEC1Q_AUE = 36 ; +static const uint8_t EXPLR_MCBIST_MBSEC1Q_AUE_LEN = 12 ; +static const uint8_t EXPLR_MCBIST_MBSEC1Q_RCE_COUNT = 48 ; +static const uint8_t EXPLR_MCBIST_MBSEC1Q_RCE_COUNT_LEN = 12 ; + +static const uint8_t EXPLR_MCBIST_MBSEVR0Q_PORT_0_MAINLINE_NCE_GALOIS_FIELD = 0 ; static const uint8_t EXPLR_MCBIST_MBSEVR0Q_PORT_0_MAINLINE_NCE_GALOIS_FIELD_LEN = 8 ; static const uint8_t EXPLR_MCBIST_MBSEVR0Q_PORT_0_MAINLINE_NCE_MAGNITUDE_FIELD = 8 ; static const uint8_t EXPLR_MCBIST_MBSEVR0Q_PORT_0_MAINLINE_NCE_MAGNITUDE_FIELD_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_MBSEVR0Q_PORT_0_MAINLINE_TCE_GALOIS_FIELD = 16 ; +static const uint8_t EXPLR_MCBIST_MBSEVR0Q_PORT_0_MAINLINE_TCE_GALOIS_FIELD = 16 ; static const uint8_t EXPLR_MCBIST_MBSEVR0Q_PORT_0_MAINLINE_TCE_GALOIS_FIELD_LEN = 8 ; static const uint8_t EXPLR_MCBIST_MBSEVR0Q_PORT_0_MAINLINE_TCE_MAGNITUDE_FIELD = 24 ; static const uint8_t EXPLR_MCBIST_MBSEVR0Q_PORT_0_MAINLINE_TCE_MAGNITUDE_FIELD_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_MBSEVR0Q_RESERVED_32_63 = 32 ; -static const uint8_t EXPLR_MCBIST_MBSEVR0Q_RESERVED_32_63_LEN = 32 ; +static const uint8_t EXPLR_MCBIST_MBSEVR0Q_RESERVED_32_63 = 32 ; +static const uint8_t EXPLR_MCBIST_MBSEVR0Q_RESERVED_32_63_LEN = 32 ; -static const uint8_t EXPLR_MCBIST_MBSMODESQ_CFG_DDR4E_BLIND_STEER_MODE = 0 ; +static const uint8_t EXPLR_MCBIST_MBSMODESQ_CFG_DDR4E_BLIND_STEER_MODE = 0 ; static const uint8_t EXPLR_MCBIST_MBSMODESQ_CFG_MCB_NIB_CNT_PORT_AGNOSTIC_MASK_DIS = 1 ; -static const uint8_t EXPLR_MCBIST_MBSMODESQ_RESERVE_2_15 = 2 ; -static const uint8_t EXPLR_MCBIST_MBSMODESQ_RESERVE_2_15_LEN = 14 ; - -static const uint8_t EXPLR_MCBIST_MBSMSECQ_MCE_SYMBOL0_COUNT = 0 ; -static const uint8_t EXPLR_MCBIST_MBSMSECQ_MCE_SYMBOL0_COUNT_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_MBSMSECQ_MCE_SYMBOL1_COUNT = 8 ; -static const uint8_t EXPLR_MCBIST_MBSMSECQ_MCE_SYMBOL1_COUNT_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_MBSMSECQ_MCE_SYMBOL2_COUNT = 16 ; -static const uint8_t EXPLR_MCBIST_MBSMSECQ_MCE_SYMBOL2_COUNT_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_MBSMSECQ_MCE_SYMBOL3_COUNT = 24 ; -static const uint8_t EXPLR_MCBIST_MBSMSECQ_MCE_SYMBOL3_COUNT_LEN = 8 ; - -static const uint8_t EXPLR_MCBIST_MBSSYMEC0Q_MODAL_SYMBOL_COUNTER_00 = 0 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC0Q_MODAL_SYMBOL_COUNTER_00_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC0Q_MODAL_SYMBOL_COUNTER_01 = 8 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC0Q_MODAL_SYMBOL_COUNTER_01_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC0Q_MODAL_SYMBOL_COUNTER_02 = 16 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC0Q_MODAL_SYMBOL_COUNTER_02_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC0Q_MODAL_SYMBOL_COUNTER_03 = 24 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC0Q_MODAL_SYMBOL_COUNTER_03_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC0Q_MODAL_SYMBOL_COUNTER_04 = 32 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC0Q_MODAL_SYMBOL_COUNTER_04_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC0Q_MODAL_SYMBOL_COUNTER_05 = 40 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC0Q_MODAL_SYMBOL_COUNTER_05_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC0Q_MODAL_SYMBOL_COUNTER_06 = 48 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC0Q_MODAL_SYMBOL_COUNTER_06_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC0Q_MODAL_SYMBOL_COUNTER_07 = 56 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC0Q_MODAL_SYMBOL_COUNTER_07_LEN = 8 ; - -static const uint8_t EXPLR_MCBIST_MBSSYMEC1Q_MODAL_SYMBOL_COUNTER_08 = 0 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC1Q_MODAL_SYMBOL_COUNTER_08_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC1Q_MODAL_SYMBOL_COUNTER_09 = 8 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC1Q_MODAL_SYMBOL_COUNTER_09_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC1Q_MODAL_SYMBOL_COUNTER_10 = 16 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC1Q_MODAL_SYMBOL_COUNTER_10_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC1Q_MODAL_SYMBOL_COUNTER_11 = 24 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC1Q_MODAL_SYMBOL_COUNTER_11_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC1Q_MODAL_SYMBOL_COUNTER_12 = 32 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC1Q_MODAL_SYMBOL_COUNTER_12_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC1Q_MODAL_SYMBOL_COUNTER_13 = 40 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC1Q_MODAL_SYMBOL_COUNTER_13_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC1Q_MODAL_SYMBOL_COUNTER_14 = 48 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC1Q_MODAL_SYMBOL_COUNTER_14_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC1Q_MODAL_SYMBOL_COUNTER_15 = 56 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC1Q_MODAL_SYMBOL_COUNTER_15_LEN = 8 ; - -static const uint8_t EXPLR_MCBIST_MBSSYMEC2Q_MODAL_SYMBOL_COUNTER_16 = 0 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC2Q_MODAL_SYMBOL_COUNTER_16_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC2Q_MODAL_SYMBOL_COUNTER_17 = 8 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC2Q_MODAL_SYMBOL_COUNTER_17_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC2Q_MODAL_SYMBOL_COUNTER_18 = 16 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC2Q_MODAL_SYMBOL_COUNTER_18_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC2Q_MODAL_SYMBOL_COUNTER_19 = 24 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC2Q_MODAL_SYMBOL_COUNTER_19_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC2Q_MODAL_SYMBOL_COUNTER_20 = 32 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC2Q_MODAL_SYMBOL_COUNTER_20_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC2Q_MODAL_SYMBOL_COUNTER_21 = 40 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC2Q_MODAL_SYMBOL_COUNTER_21_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC2Q_MODAL_SYMBOL_COUNTER_22 = 48 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC2Q_MODAL_SYMBOL_COUNTER_22_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC2Q_MODAL_SYMBOL_COUNTER_23 = 56 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC2Q_MODAL_SYMBOL_COUNTER_23_LEN = 8 ; - -static const uint8_t EXPLR_MCBIST_MBSSYMEC3Q_MODAL_SYMBOL_COUNTER_24 = 0 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC3Q_MODAL_SYMBOL_COUNTER_24_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC3Q_MODAL_SYMBOL_COUNTER_25 = 8 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC3Q_MODAL_SYMBOL_COUNTER_25_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC3Q_MODAL_SYMBOL_COUNTER_26 = 16 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC3Q_MODAL_SYMBOL_COUNTER_26_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC3Q_MODAL_SYMBOL_COUNTER_27 = 24 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC3Q_MODAL_SYMBOL_COUNTER_27_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC3Q_MODAL_SYMBOL_COUNTER_28 = 32 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC3Q_MODAL_SYMBOL_COUNTER_28_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC3Q_MODAL_SYMBOL_COUNTER_29 = 40 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC3Q_MODAL_SYMBOL_COUNTER_29_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC3Q_MODAL_SYMBOL_COUNTER_30 = 48 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC3Q_MODAL_SYMBOL_COUNTER_30_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC3Q_MODAL_SYMBOL_COUNTER_31 = 56 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC3Q_MODAL_SYMBOL_COUNTER_31_LEN = 8 ; - -static const uint8_t EXPLR_MCBIST_MBSSYMEC4Q_MODAL_SYMBOL_COUNTER_32 = 0 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC4Q_MODAL_SYMBOL_COUNTER_32_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC4Q_MODAL_SYMBOL_COUNTER_33 = 8 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC4Q_MODAL_SYMBOL_COUNTER_33_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC4Q_MODAL_SYMBOL_COUNTER_34 = 16 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC4Q_MODAL_SYMBOL_COUNTER_34_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC4Q_MODAL_SYMBOL_COUNTER_35 = 24 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC4Q_MODAL_SYMBOL_COUNTER_35_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC4Q_MODAL_SYMBOL_COUNTER_36 = 32 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC4Q_MODAL_SYMBOL_COUNTER_36_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC4Q_MODAL_SYMBOL_COUNTER_37 = 40 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC4Q_MODAL_SYMBOL_COUNTER_37_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC4Q_MODAL_SYMBOL_COUNTER_38 = 48 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC4Q_MODAL_SYMBOL_COUNTER_38_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC4Q_MODAL_SYMBOL_COUNTER_39 = 56 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC4Q_MODAL_SYMBOL_COUNTER_39_LEN = 8 ; - -static const uint8_t EXPLR_MCBIST_MBSSYMEC5Q_MODAL_SYMBOL_COUNTER_40 = 0 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC5Q_MODAL_SYMBOL_COUNTER_40_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC5Q_MODAL_SYMBOL_COUNTER_41 = 8 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC5Q_MODAL_SYMBOL_COUNTER_41_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC5Q_MODAL_SYMBOL_COUNTER_42 = 16 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC5Q_MODAL_SYMBOL_COUNTER_42_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC5Q_MODAL_SYMBOL_COUNTER_43 = 24 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC5Q_MODAL_SYMBOL_COUNTER_43_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC5Q_MODAL_SYMBOL_COUNTER_44 = 32 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC5Q_MODAL_SYMBOL_COUNTER_44_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC5Q_MODAL_SYMBOL_COUNTER_45 = 40 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC5Q_MODAL_SYMBOL_COUNTER_45_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC5Q_MODAL_SYMBOL_COUNTER_46 = 48 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC5Q_MODAL_SYMBOL_COUNTER_46_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC5Q_MODAL_SYMBOL_COUNTER_47 = 56 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC5Q_MODAL_SYMBOL_COUNTER_47_LEN = 8 ; - -static const uint8_t EXPLR_MCBIST_MBSSYMEC6Q_MODAL_SYMBOL_COUNTER_48 = 0 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC6Q_MODAL_SYMBOL_COUNTER_48_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC6Q_MODAL_SYMBOL_COUNTER_49 = 8 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC6Q_MODAL_SYMBOL_COUNTER_49_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC6Q_MODAL_SYMBOL_COUNTER_50 = 16 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC6Q_MODAL_SYMBOL_COUNTER_50_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC6Q_MODAL_SYMBOL_COUNTER_51 = 24 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC6Q_MODAL_SYMBOL_COUNTER_51_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC6Q_MODAL_SYMBOL_COUNTER_52 = 32 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC6Q_MODAL_SYMBOL_COUNTER_52_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC6Q_MODAL_SYMBOL_COUNTER_53 = 40 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC6Q_MODAL_SYMBOL_COUNTER_53_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC6Q_MODAL_SYMBOL_COUNTER_54 = 48 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC6Q_MODAL_SYMBOL_COUNTER_54_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC6Q_MODAL_SYMBOL_COUNTER_55 = 56 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC6Q_MODAL_SYMBOL_COUNTER_55_LEN = 8 ; - -static const uint8_t EXPLR_MCBIST_MBSSYMEC7Q_MODAL_SYMBOL_COUNTER_56 = 0 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC7Q_MODAL_SYMBOL_COUNTER_56_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC7Q_MODAL_SYMBOL_COUNTER_57 = 8 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC7Q_MODAL_SYMBOL_COUNTER_57_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC7Q_MODAL_SYMBOL_COUNTER_58 = 16 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC7Q_MODAL_SYMBOL_COUNTER_58_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC7Q_MODAL_SYMBOL_COUNTER_59 = 24 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC7Q_MODAL_SYMBOL_COUNTER_59_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC7Q_MODAL_SYMBOL_COUNTER_60 = 32 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC7Q_MODAL_SYMBOL_COUNTER_60_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC7Q_MODAL_SYMBOL_COUNTER_61 = 40 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC7Q_MODAL_SYMBOL_COUNTER_61_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC7Q_MODAL_SYMBOL_COUNTER_62 = 48 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC7Q_MODAL_SYMBOL_COUNTER_62_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC7Q_MODAL_SYMBOL_COUNTER_63 = 56 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC7Q_MODAL_SYMBOL_COUNTER_63_LEN = 8 ; - -static const uint8_t EXPLR_MCBIST_MBSSYMEC8Q_MODAL_SYMBOL_COUNTER_64 = 0 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC8Q_MODAL_SYMBOL_COUNTER_64_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC8Q_MODAL_SYMBOL_COUNTER_65 = 8 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC8Q_MODAL_SYMBOL_COUNTER_65_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC8Q_MODAL_SYMBOL_COUNTER_66 = 16 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC8Q_MODAL_SYMBOL_COUNTER_66_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC8Q_MODAL_SYMBOL_COUNTER_67 = 24 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC8Q_MODAL_SYMBOL_COUNTER_67_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC8Q_MODAL_SYMBOL_COUNTER_68 = 32 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC8Q_MODAL_SYMBOL_COUNTER_68_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC8Q_MODAL_SYMBOL_COUNTER_69 = 40 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC8Q_MODAL_SYMBOL_COUNTER_69_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC8Q_MODAL_SYMBOL_COUNTER_70 = 48 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC8Q_MODAL_SYMBOL_COUNTER_70_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC8Q_MODAL_SYMBOL_COUNTER_71 = 56 ; -static const uint8_t EXPLR_MCBIST_MBSSYMEC8Q_MODAL_SYMBOL_COUNTER_71_LEN = 8 ; - -static const uint8_t EXPLR_MCBIST_MBSTRQ_CFG_THRESH_MAG_NCE_INT = 0 ; -static const uint8_t EXPLR_MCBIST_MBSTRQ_CFG_THRESH_MAG_NCE_INT_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_MBSTRQ_CFG_THRESH_MAG_NCE_SOFT = 4 ; -static const uint8_t EXPLR_MCBIST_MBSTRQ_CFG_THRESH_MAG_NCE_SOFT_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_MBSTRQ_CFG_THRESH_MAG_NCE_HARD = 8 ; -static const uint8_t EXPLR_MCBIST_MBSTRQ_CFG_THRESH_MAG_NCE_HARD_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_MBSTRQ_CFG_THRESH_MAG_RCE = 12 ; -static const uint8_t EXPLR_MCBIST_MBSTRQ_CFG_THRESH_MAG_RCE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_MBSTRQ_CFG_THRESH_MAG_ICE = 16 ; -static const uint8_t EXPLR_MCBIST_MBSTRQ_CFG_THRESH_MAG_ICE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_MBSTRQ_CFG_THRESH_MAG_MCE_INT = 20 ; -static const uint8_t EXPLR_MCBIST_MBSTRQ_CFG_THRESH_MAG_MCE_INT_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_MBSTRQ_CFG_THRESH_MAG_MCE_SOFT = 24 ; -static const uint8_t EXPLR_MCBIST_MBSTRQ_CFG_THRESH_MAG_MCE_SOFT_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_MBSTRQ_CFG_THRESH_MAG_MCE_HARD = 28 ; -static const uint8_t EXPLR_MCBIST_MBSTRQ_CFG_THRESH_MAG_MCE_HARD_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_MBSTRQ_CFG_PAUSE_ON_SCE = 32 ; -static const uint8_t EXPLR_MCBIST_MBSTRQ_RESERVED_33 = 33 ; -static const uint8_t EXPLR_MCBIST_MBSTRQ_CFG_PAUSE_ON_MPE = 34 ; -static const uint8_t EXPLR_MCBIST_MBSTRQ_CFG_PAUSE_ON_UE = 35 ; -static const uint8_t EXPLR_MCBIST_MBSTRQ_CFG_PAUSE_ON_SUE = 36 ; -static const uint8_t EXPLR_MCBIST_MBSTRQ_CFG_PAUSE_ON_AUE = 37 ; -static const uint8_t EXPLR_MCBIST_MBSTRQ_CFG_PAUSE_ON_RCD = 38 ; -static const uint8_t EXPLR_MCBIST_MBSTRQ_RESERVE_39_52 = 39 ; -static const uint8_t EXPLR_MCBIST_MBSTRQ_RESERVE_39_52_LEN = 14 ; -static const uint8_t EXPLR_MCBIST_MBSTRQ_CFG_SYMBOL_COUNTER_MODE = 53 ; -static const uint8_t EXPLR_MCBIST_MBSTRQ_CFG_SYMBOL_COUNTER_MODE_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_MBSTRQ_CFG_NCE_SOFT_SYMBOL_COUNT_ENABLE = 55 ; -static const uint8_t EXPLR_MCBIST_MBSTRQ_CFG_NCE_INTER_SYMBOL_COUNT_ENABLE = 56 ; -static const uint8_t EXPLR_MCBIST_MBSTRQ_CFG_NCE_HARD_SYMBOL_COUNT_ENABLE = 57 ; -static const uint8_t EXPLR_MCBIST_MBSTRQ_CFG_PAUSE_MCB_ERROR = 58 ; -static const uint8_t EXPLR_MCBIST_MBSTRQ_CFG_PAUSE_MCB_LOG_FULL = 59 ; -static const uint8_t EXPLR_MCBIST_MBSTRQ_CFG_MAINT_RCE_WITH_CE = 60 ; -static const uint8_t EXPLR_MCBIST_MBSTRQ_CFG_MCE_SOFT_SYMBOL_COUNT_ENABLE = 61 ; -static const uint8_t EXPLR_MCBIST_MBSTRQ_CFG_MCE_INTER_SYMBOL_COUNT_ENABLE = 62 ; -static const uint8_t EXPLR_MCBIST_MBSTRQ_CFG_MCE_HARD_SYMBOL_COUNT_ENABLE = 63 ; - -static const uint8_t EXPLR_MCBIST_MBUER0Q_PORT_0_MAINLINE_UE_ADDR_TRAP = 0 ; -static const uint8_t EXPLR_MCBIST_MBUER0Q_PORT_0_MAINLINE_UE_ADDR_TRAP_LEN = 38 ; -static const uint8_t EXPLR_MCBIST_MBUER0Q_RESERVED_38_39 = 38 ; -static const uint8_t EXPLR_MCBIST_MBUER0Q_RESERVED_38_39_LEN = 2 ; - -static const uint8_t EXPLR_MCBIST_MBXLT0Q_SLOT0_VALID = 0 ; -static const uint8_t EXPLR_MCBIST_MBXLT0Q_SLOT0_D_VALUE = 1 ; -static const uint8_t EXPLR_MCBIST_MBXLT0Q_12GB_ENABLE = 2 ; -static const uint8_t EXPLR_MCBIST_MBXLT0Q_RESERVED_3_4 = 3 ; -static const uint8_t EXPLR_MCBIST_MBXLT0Q_RESERVED_3_4_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_MBXLT0Q_SLOT0_M0_VALID = 5 ; -static const uint8_t EXPLR_MCBIST_MBXLT0Q_SLOT0_M1_VALID = 6 ; -static const uint8_t EXPLR_MCBIST_MBXLT0Q_RESERVED_7_8 = 7 ; -static const uint8_t EXPLR_MCBIST_MBXLT0Q_RESERVED_7_8_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_MBXLT0Q_SLOT0_S0_VALID = 9 ; -static const uint8_t EXPLR_MCBIST_MBXLT0Q_SLOT0_S1_VALID = 10 ; -static const uint8_t EXPLR_MCBIST_MBXLT0Q_SLOT0_S2_VALID = 11 ; -static const uint8_t EXPLR_MCBIST_MBXLT0Q_SLOT0_B2_VALID = 12 ; -static const uint8_t EXPLR_MCBIST_MBXLT0Q_SLOT0_ROW15_VALID = 13 ; -static const uint8_t EXPLR_MCBIST_MBXLT0Q_SLOT0_ROW16_VALID = 14 ; -static const uint8_t EXPLR_MCBIST_MBXLT0Q_SLOT0_ROW17_VALID = 15 ; -static const uint8_t EXPLR_MCBIST_MBXLT0Q_SLOT1_VALID = 16 ; -static const uint8_t EXPLR_MCBIST_MBXLT0Q_SLOT1_D_VALUE = 17 ; -static const uint8_t EXPLR_MCBIST_MBXLT0Q_RESERVED_18_20 = 18 ; -static const uint8_t EXPLR_MCBIST_MBXLT0Q_RESERVED_18_20_LEN = 3 ; -static const uint8_t EXPLR_MCBIST_MBXLT0Q_SLOT1_M0_VALID = 21 ; -static const uint8_t EXPLR_MCBIST_MBXLT0Q_SLOT1_M1_VALID = 22 ; -static const uint8_t EXPLR_MCBIST_MBXLT0Q_RESERVED_23_24 = 23 ; -static const uint8_t EXPLR_MCBIST_MBXLT0Q_RESERVED_23_24_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_MBXLT0Q_SLOT1_S0_VALID = 25 ; -static const uint8_t EXPLR_MCBIST_MBXLT0Q_SLOT1_S1_VALID = 26 ; -static const uint8_t EXPLR_MCBIST_MBXLT0Q_SLOT1_S2_VALID = 27 ; -static const uint8_t EXPLR_MCBIST_MBXLT0Q_SLOT1_B2_VALID = 28 ; -static const uint8_t EXPLR_MCBIST_MBXLT0Q_SLOT1_ROW15_VALID = 29 ; -static const uint8_t EXPLR_MCBIST_MBXLT0Q_SLOT1_ROW16_VALID = 30 ; -static const uint8_t EXPLR_MCBIST_MBXLT0Q_SLOT1_ROW17_VALID = 31 ; -static const uint8_t EXPLR_MCBIST_MBXLT0Q_ENAB_ROW_ADDR_HASH = 32 ; -static const uint8_t EXPLR_MCBIST_MBXLT0Q_D_BIT_MAP = 33 ; -static const uint8_t EXPLR_MCBIST_MBXLT0Q_D_BIT_MAP_LEN = 5 ; -static const uint8_t EXPLR_MCBIST_MBXLT0Q_M0_BIT_MAP = 38 ; -static const uint8_t EXPLR_MCBIST_MBXLT0Q_M0_BIT_MAP_LEN = 5 ; -static const uint8_t EXPLR_MCBIST_MBXLT0Q_M1_BIT_MAP = 43 ; -static const uint8_t EXPLR_MCBIST_MBXLT0Q_M1_BIT_MAP_LEN = 5 ; -static const uint8_t EXPLR_MCBIST_MBXLT0Q_RESERVED_48 = 48 ; -static const uint8_t EXPLR_MCBIST_MBXLT0Q_R17_BIT_MAP = 49 ; -static const uint8_t EXPLR_MCBIST_MBXLT0Q_R17_BIT_MAP_LEN = 5 ; -static const uint8_t EXPLR_MCBIST_MBXLT0Q_R16_BIT_MAP = 54 ; -static const uint8_t EXPLR_MCBIST_MBXLT0Q_R16_BIT_MAP_LEN = 5 ; -static const uint8_t EXPLR_MCBIST_MBXLT0Q_R15_BIT_MAP = 59 ; -static const uint8_t EXPLR_MCBIST_MBXLT0Q_R15_BIT_MAP_LEN = 5 ; - -static const uint8_t EXPLR_MCBIST_MBXLT1_RESERVED_0_2 = 0 ; -static const uint8_t EXPLR_MCBIST_MBXLT1_RESERVED_0_2_LEN = 3 ; -static const uint8_t EXPLR_MCBIST_MBXLT1_S0_BIT_MAP = 3 ; -static const uint8_t EXPLR_MCBIST_MBXLT1_S0_BIT_MAP_LEN = 5 ; -static const uint8_t EXPLR_MCBIST_MBXLT1_RESERVED_8_10 = 8 ; -static const uint8_t EXPLR_MCBIST_MBXLT1_RESERVED_8_10_LEN = 3 ; -static const uint8_t EXPLR_MCBIST_MBXLT1_S1_BIT_MAP = 11 ; -static const uint8_t EXPLR_MCBIST_MBXLT1_S1_BIT_MAP_LEN = 5 ; -static const uint8_t EXPLR_MCBIST_MBXLT1_RESERVED_16_18 = 16 ; -static const uint8_t EXPLR_MCBIST_MBXLT1_RESERVED_16_18_LEN = 3 ; -static const uint8_t EXPLR_MCBIST_MBXLT1_S2_BIT_MAP = 19 ; -static const uint8_t EXPLR_MCBIST_MBXLT1_S2_BIT_MAP_LEN = 5 ; -static const uint8_t EXPLR_MCBIST_MBXLT1_RESERVED_24_29 = 24 ; -static const uint8_t EXPLR_MCBIST_MBXLT1_RESERVED_24_29_LEN = 6 ; -static const uint8_t EXPLR_MCBIST_MBXLT1_COL3_BIT_MAP = 30 ; -static const uint8_t EXPLR_MCBIST_MBXLT1_COL3_BIT_MAP_LEN = 5 ; -static const uint8_t EXPLR_MCBIST_MBXLT1_COL4_BIT_MAP = 35 ; -static const uint8_t EXPLR_MCBIST_MBXLT1_COL4_BIT_MAP_LEN = 5 ; -static const uint8_t EXPLR_MCBIST_MBXLT1_RESERVED_40_42 = 40 ; -static const uint8_t EXPLR_MCBIST_MBXLT1_RESERVED_40_42_LEN = 3 ; -static const uint8_t EXPLR_MCBIST_MBXLT1_COL5_BIT_MAP = 43 ; -static const uint8_t EXPLR_MCBIST_MBXLT1_COL5_BIT_MAP_LEN = 5 ; -static const uint8_t EXPLR_MCBIST_MBXLT1_RESERVED_48_50 = 48 ; -static const uint8_t EXPLR_MCBIST_MBXLT1_RESERVED_48_50_LEN = 3 ; -static const uint8_t EXPLR_MCBIST_MBXLT1_COL6_BIT_MAP = 51 ; -static const uint8_t EXPLR_MCBIST_MBXLT1_COL6_BIT_MAP_LEN = 5 ; -static const uint8_t EXPLR_MCBIST_MBXLT1_RESERVED_56_58 = 56 ; -static const uint8_t EXPLR_MCBIST_MBXLT1_RESERVED_56_58_LEN = 3 ; -static const uint8_t EXPLR_MCBIST_MBXLT1_COL7_BIT_MAP = 59 ; -static const uint8_t EXPLR_MCBIST_MBXLT1_COL7_BIT_MAP_LEN = 5 ; - -static const uint8_t EXPLR_MCBIST_MBXLT2_RESERVED_0_2 = 0 ; -static const uint8_t EXPLR_MCBIST_MBXLT2_RESERVED_0_2_LEN = 3 ; -static const uint8_t EXPLR_MCBIST_MBXLT2_COL8_BIT_MAP = 3 ; -static const uint8_t EXPLR_MCBIST_MBXLT2_COL8_BIT_MAP_LEN = 5 ; -static const uint8_t EXPLR_MCBIST_MBXLT2_RESERVED_8_10 = 8 ; -static const uint8_t EXPLR_MCBIST_MBXLT2_RESERVED_8_10_LEN = 3 ; -static const uint8_t EXPLR_MCBIST_MBXLT2_COL9_BIT_MAP = 11 ; -static const uint8_t EXPLR_MCBIST_MBXLT2_COL9_BIT_MAP_LEN = 5 ; -static const uint8_t EXPLR_MCBIST_MBXLT2_RESERVED_16_18 = 16 ; -static const uint8_t EXPLR_MCBIST_MBXLT2_RESERVED_16_18_LEN = 3 ; -static const uint8_t EXPLR_MCBIST_MBXLT2_BANK0_BIT_MAP = 19 ; -static const uint8_t EXPLR_MCBIST_MBXLT2_BANK0_BIT_MAP_LEN = 5 ; -static const uint8_t EXPLR_MCBIST_MBXLT2_RESERVED_24_26 = 24 ; -static const uint8_t EXPLR_MCBIST_MBXLT2_RESERVED_24_26_LEN = 3 ; -static const uint8_t EXPLR_MCBIST_MBXLT2_BANK1_BIT_MAP = 27 ; -static const uint8_t EXPLR_MCBIST_MBXLT2_BANK1_BIT_MAP_LEN = 5 ; -static const uint8_t EXPLR_MCBIST_MBXLT2_RESERVED_32_34 = 32 ; -static const uint8_t EXPLR_MCBIST_MBXLT2_RESERVED_32_34_LEN = 3 ; -static const uint8_t EXPLR_MCBIST_MBXLT2_BANK2_BIT_MAP = 35 ; -static const uint8_t EXPLR_MCBIST_MBXLT2_BANK2_BIT_MAP_LEN = 5 ; -static const uint8_t EXPLR_MCBIST_MBXLT2_RESERVED_40_42 = 40 ; -static const uint8_t EXPLR_MCBIST_MBXLT2_RESERVED_40_42_LEN = 3 ; -static const uint8_t EXPLR_MCBIST_MBXLT2_BANK_GROUP0_BIT_MAP = 43 ; -static const uint8_t EXPLR_MCBIST_MBXLT2_BANK_GROUP0_BIT_MAP_LEN = 5 ; -static const uint8_t EXPLR_MCBIST_MBXLT2_RESERVED_48_50 = 48 ; -static const uint8_t EXPLR_MCBIST_MBXLT2_RESERVED_48_50_LEN = 3 ; -static const uint8_t EXPLR_MCBIST_MBXLT2_BANK_GROUP1_BIT_MAP = 51 ; -static const uint8_t EXPLR_MCBIST_MBXLT2_BANK_GROUP1_BIT_MAP_LEN = 5 ; -static const uint8_t EXPLR_MCBIST_MBXLT2_RESERVED_56_63 = 56 ; -static const uint8_t EXPLR_MCBIST_MBXLT2_RESERVED_56_63_LEN = 8 ; - -static const uint8_t EXPLR_MCBIST_MCBACQ_CFG_ADDRESS_COUNTER = 0 ; -static const uint8_t EXPLR_MCBIST_MCBACQ_CFG_ADDRESS_COUNTER_LEN = 38 ; - -static const uint8_t EXPLR_MCBIST_MCBAGRAQ_CFG_FIXED_WIDTH = 0 ; -static const uint8_t EXPLR_MCBIST_MCBAGRAQ_CFG_FIXED_WIDTH_LEN = 6 ; -static const uint8_t EXPLR_MCBIST_MCBAGRAQ_CFG_ADDR_COUNTER_MODE = 6 ; -static const uint8_t EXPLR_MCBIST_MCBAGRAQ_CFG_ADDR_COUNTER_MODE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_MCBAGRAQ_CFG_MAINT_ADDR_MODE_EN = 10 ; -static const uint8_t EXPLR_MCBIST_MCBAGRAQ_RESERVED_11 = 11 ; -static const uint8_t EXPLR_MCBIST_MCBAGRAQ_CFG_MAINT_DETECT_SRANK_BOUNDARIES = 12 ; -static const uint8_t EXPLR_MCBIST_MCBAGRAQ_RESERVED_13_31 = 13 ; -static const uint8_t EXPLR_MCBIST_MCBAGRAQ_RESERVED_13_31_LEN = 19 ; - -static const uint8_t EXPLR_MCBIST_MCBAMR0A0Q_CFG_AMAP_DIMM_SELECT = 0 ; -static const uint8_t EXPLR_MCBIST_MCBAMR0A0Q_CFG_AMAP_DIMM_SELECT_LEN = 6 ; -static const uint8_t EXPLR_MCBIST_MCBAMR0A0Q_CFG_AMAP_MRANK0 = 6 ; -static const uint8_t EXPLR_MCBIST_MCBAMR0A0Q_CFG_AMAP_MRANK0_LEN = 6 ; -static const uint8_t EXPLR_MCBIST_MCBAMR0A0Q_CFG_AMAP_MRANK1 = 12 ; -static const uint8_t EXPLR_MCBIST_MCBAMR0A0Q_CFG_AMAP_MRANK1_LEN = 6 ; -static const uint8_t EXPLR_MCBIST_MCBAMR0A0Q_RESERVED_18_23 = 18 ; -static const uint8_t EXPLR_MCBIST_MCBAMR0A0Q_RESERVED_18_23_LEN = 6 ; -static const uint8_t EXPLR_MCBIST_MCBAMR0A0Q_CFG_AMAP_SRANK0 = 24 ; -static const uint8_t EXPLR_MCBIST_MCBAMR0A0Q_CFG_AMAP_SRANK0_LEN = 6 ; -static const uint8_t EXPLR_MCBIST_MCBAMR0A0Q_CFG_AMAP_SRANK1 = 30 ; -static const uint8_t EXPLR_MCBIST_MCBAMR0A0Q_CFG_AMAP_SRANK1_LEN = 6 ; -static const uint8_t EXPLR_MCBIST_MCBAMR0A0Q_CFG_AMAP_SRANK2 = 36 ; -static const uint8_t EXPLR_MCBIST_MCBAMR0A0Q_CFG_AMAP_SRANK2_LEN = 6 ; -static const uint8_t EXPLR_MCBIST_MCBAMR0A0Q_CFG_AMAP_BANK2 = 42 ; -static const uint8_t EXPLR_MCBIST_MCBAMR0A0Q_CFG_AMAP_BANK2_LEN = 6 ; -static const uint8_t EXPLR_MCBIST_MCBAMR0A0Q_CFG_AMAP_BANK1 = 48 ; -static const uint8_t EXPLR_MCBIST_MCBAMR0A0Q_CFG_AMAP_BANK1_LEN = 6 ; -static const uint8_t EXPLR_MCBIST_MCBAMR0A0Q_CFG_AMAP_BANK0 = 54 ; -static const uint8_t EXPLR_MCBIST_MCBAMR0A0Q_CFG_AMAP_BANK0_LEN = 6 ; -static const uint8_t EXPLR_MCBIST_MCBAMR0A0Q_RESERVED_60_63 = 60 ; -static const uint8_t EXPLR_MCBIST_MCBAMR0A0Q_RESERVED_60_63_LEN = 4 ; - -static const uint8_t EXPLR_MCBIST_MCBAMR1A0Q_CFG_AMAP_BANK_GROUP1 = 0 ; -static const uint8_t EXPLR_MCBIST_MCBAMR1A0Q_CFG_AMAP_BANK_GROUP1_LEN = 6 ; -static const uint8_t EXPLR_MCBIST_MCBAMR1A0Q_CFG_AMAP_BANK_GROUP0 = 6 ; -static const uint8_t EXPLR_MCBIST_MCBAMR1A0Q_CFG_AMAP_BANK_GROUP0_LEN = 6 ; -static const uint8_t EXPLR_MCBIST_MCBAMR1A0Q_CFG_AMAP_ROW17 = 12 ; -static const uint8_t EXPLR_MCBIST_MCBAMR1A0Q_CFG_AMAP_ROW17_LEN = 6 ; -static const uint8_t EXPLR_MCBIST_MCBAMR1A0Q_CFG_AMAP_ROW16 = 18 ; -static const uint8_t EXPLR_MCBIST_MCBAMR1A0Q_CFG_AMAP_ROW16_LEN = 6 ; -static const uint8_t EXPLR_MCBIST_MCBAMR1A0Q_CFG_AMAP_ROW15 = 24 ; -static const uint8_t EXPLR_MCBIST_MCBAMR1A0Q_CFG_AMAP_ROW15_LEN = 6 ; -static const uint8_t EXPLR_MCBIST_MCBAMR1A0Q_CFG_AMAP_ROW14 = 30 ; -static const uint8_t EXPLR_MCBIST_MCBAMR1A0Q_CFG_AMAP_ROW14_LEN = 6 ; -static const uint8_t EXPLR_MCBIST_MCBAMR1A0Q_CFG_AMAP_ROW13 = 36 ; -static const uint8_t EXPLR_MCBIST_MCBAMR1A0Q_CFG_AMAP_ROW13_LEN = 6 ; -static const uint8_t EXPLR_MCBIST_MCBAMR1A0Q_CFG_AMAP_ROW12 = 42 ; -static const uint8_t EXPLR_MCBIST_MCBAMR1A0Q_CFG_AMAP_ROW12_LEN = 6 ; -static const uint8_t EXPLR_MCBIST_MCBAMR1A0Q_CFG_AMAP_ROW11 = 48 ; -static const uint8_t EXPLR_MCBIST_MCBAMR1A0Q_CFG_AMAP_ROW11_LEN = 6 ; -static const uint8_t EXPLR_MCBIST_MCBAMR1A0Q_CFG_AMAP_ROW10 = 54 ; -static const uint8_t EXPLR_MCBIST_MCBAMR1A0Q_CFG_AMAP_ROW10_LEN = 6 ; -static const uint8_t EXPLR_MCBIST_MCBAMR1A0Q_RESERVED_60_63 = 60 ; -static const uint8_t EXPLR_MCBIST_MCBAMR1A0Q_RESERVED_60_63_LEN = 4 ; - -static const uint8_t EXPLR_MCBIST_MCBAMR2A0Q_CFG_AMAP_ROW9 = 0 ; -static const uint8_t EXPLR_MCBIST_MCBAMR2A0Q_CFG_AMAP_ROW9_LEN = 6 ; -static const uint8_t EXPLR_MCBIST_MCBAMR2A0Q_CFG_AMAP_ROW8 = 6 ; -static const uint8_t EXPLR_MCBIST_MCBAMR2A0Q_CFG_AMAP_ROW8_LEN = 6 ; -static const uint8_t EXPLR_MCBIST_MCBAMR2A0Q_CFG_AMAP_ROW7 = 12 ; -static const uint8_t EXPLR_MCBIST_MCBAMR2A0Q_CFG_AMAP_ROW7_LEN = 6 ; -static const uint8_t EXPLR_MCBIST_MCBAMR2A0Q_CFG_AMAP_ROW6 = 18 ; -static const uint8_t EXPLR_MCBIST_MCBAMR2A0Q_CFG_AMAP_ROW6_LEN = 6 ; -static const uint8_t EXPLR_MCBIST_MCBAMR2A0Q_CFG_AMAP_ROW5 = 24 ; -static const uint8_t EXPLR_MCBIST_MCBAMR2A0Q_CFG_AMAP_ROW5_LEN = 6 ; -static const uint8_t EXPLR_MCBIST_MCBAMR2A0Q_CFG_AMAP_ROW4 = 30 ; -static const uint8_t EXPLR_MCBIST_MCBAMR2A0Q_CFG_AMAP_ROW4_LEN = 6 ; -static const uint8_t EXPLR_MCBIST_MCBAMR2A0Q_CFG_AMAP_ROW3 = 36 ; -static const uint8_t EXPLR_MCBIST_MCBAMR2A0Q_CFG_AMAP_ROW3_LEN = 6 ; -static const uint8_t EXPLR_MCBIST_MCBAMR2A0Q_CFG_AMAP_ROW2 = 42 ; -static const uint8_t EXPLR_MCBIST_MCBAMR2A0Q_CFG_AMAP_ROW2_LEN = 6 ; -static const uint8_t EXPLR_MCBIST_MCBAMR2A0Q_CFG_AMAP_ROW1 = 48 ; -static const uint8_t EXPLR_MCBIST_MCBAMR2A0Q_CFG_AMAP_ROW1_LEN = 6 ; -static const uint8_t EXPLR_MCBIST_MCBAMR2A0Q_CFG_AMAP_ROW0 = 54 ; -static const uint8_t EXPLR_MCBIST_MCBAMR2A0Q_CFG_AMAP_ROW0_LEN = 6 ; -static const uint8_t EXPLR_MCBIST_MCBAMR2A0Q_RESERVED_60_63 = 60 ; -static const uint8_t EXPLR_MCBIST_MCBAMR2A0Q_RESERVED_60_63_LEN = 4 ; - -static const uint8_t EXPLR_MCBIST_MCBAMR3A0Q_CFG_AMAP_COL9 = 0 ; -static const uint8_t EXPLR_MCBIST_MCBAMR3A0Q_CFG_AMAP_COL9_LEN = 6 ; -static const uint8_t EXPLR_MCBIST_MCBAMR3A0Q_CFG_AMAP_COL8 = 6 ; -static const uint8_t EXPLR_MCBIST_MCBAMR3A0Q_CFG_AMAP_COL8_LEN = 6 ; -static const uint8_t EXPLR_MCBIST_MCBAMR3A0Q_CFG_AMAP_COL7 = 12 ; -static const uint8_t EXPLR_MCBIST_MCBAMR3A0Q_CFG_AMAP_COL7_LEN = 6 ; -static const uint8_t EXPLR_MCBIST_MCBAMR3A0Q_CFG_AMAP_COL6 = 18 ; -static const uint8_t EXPLR_MCBIST_MCBAMR3A0Q_CFG_AMAP_COL6_LEN = 6 ; -static const uint8_t EXPLR_MCBIST_MCBAMR3A0Q_CFG_AMAP_COL5 = 24 ; -static const uint8_t EXPLR_MCBIST_MCBAMR3A0Q_CFG_AMAP_COL5_LEN = 6 ; -static const uint8_t EXPLR_MCBIST_MCBAMR3A0Q_CFG_AMAP_COL4 = 30 ; -static const uint8_t EXPLR_MCBIST_MCBAMR3A0Q_CFG_AMAP_COL4_LEN = 6 ; -static const uint8_t EXPLR_MCBIST_MCBAMR3A0Q_CFG_AMAP_COL3 = 36 ; -static const uint8_t EXPLR_MCBIST_MCBAMR3A0Q_CFG_AMAP_COL3_LEN = 6 ; -static const uint8_t EXPLR_MCBIST_MCBAMR3A0Q_CFG_AMAP_COL2 = 42 ; -static const uint8_t EXPLR_MCBIST_MCBAMR3A0Q_CFG_AMAP_COL2_LEN = 6 ; -static const uint8_t EXPLR_MCBIST_MCBAMR3A0Q_RESERVED_48_63 = 48 ; -static const uint8_t EXPLR_MCBIST_MCBAMR3A0Q_RESERVED_48_63_LEN = 16 ; - -static const uint8_t EXPLR_MCBIST_MCBCFGQ_RESERVED_0_7 = 0 ; -static const uint8_t EXPLR_MCBIST_MCBCFGQ_RESERVED_0_7_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_MCBCFGQ_CFG_CMD_TIMEOUT_MODE = 8 ; -static const uint8_t EXPLR_MCBIST_MCBCFGQ_CFG_CMD_TIMEOUT_MODE_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_MCBCFGQ_RESET_KEEPER = 10 ; -static const uint8_t EXPLR_MCBIST_MCBCFGQ_CFG_CURRENT_ADDR_TRAP_UPDATE_DIS = 11 ; -static const uint8_t EXPLR_MCBIST_MCBCFGQ_CFG_CCS_RETRY_DIS = 12 ; -static const uint8_t EXPLR_MCBIST_MCBCFGQ_RESERVED_13_33 = 13 ; -static const uint8_t EXPLR_MCBIST_MCBCFGQ_RESERVED_13_33_LEN = 21 ; -static const uint8_t EXPLR_MCBIST_MCBCFGQ_MCBIST_CFG_FORCE_PAUSE_AFTER_RANK = 34 ; -static const uint8_t EXPLR_MCBIST_MCBCFGQ_CFG_RESET_CNTS_START_OF_RANK = 35 ; -static const uint8_t EXPLR_MCBIST_MCBCFGQ_CFG_LOG_COUNTS_IN_TRACE = 36 ; -static const uint8_t EXPLR_MCBIST_MCBCFGQ_SKIP_INVALID_ADDR_DIMM_DIS = 37 ; -static const uint8_t EXPLR_MCBIST_MCBCFGQ_REFRESH_ONLY_SUBTEST_EN = 38 ; -static const uint8_t EXPLR_MCBIST_MCBCFGQ_REFRESH_ONLY_SUBTEST_TIMEBASE_SEL = 39 ; +static const uint8_t EXPLR_MCBIST_MBSMODESQ_RESERVE_2_15 = 2 ; +static const uint8_t EXPLR_MCBIST_MBSMODESQ_RESERVE_2_15_LEN = 14 ; + +static const uint8_t EXPLR_MCBIST_MBSMSECQ_MCE_SYMBOL0_COUNT = 0 ; +static const uint8_t EXPLR_MCBIST_MBSMSECQ_MCE_SYMBOL0_COUNT_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_MBSMSECQ_MCE_SYMBOL1_COUNT = 8 ; +static const uint8_t EXPLR_MCBIST_MBSMSECQ_MCE_SYMBOL1_COUNT_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_MBSMSECQ_MCE_SYMBOL2_COUNT = 16 ; +static const uint8_t EXPLR_MCBIST_MBSMSECQ_MCE_SYMBOL2_COUNT_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_MBSMSECQ_MCE_SYMBOL3_COUNT = 24 ; +static const uint8_t EXPLR_MCBIST_MBSMSECQ_MCE_SYMBOL3_COUNT_LEN = 8 ; + +static const uint8_t EXPLR_MCBIST_MBSSYMEC0Q_MODAL_SYMBOL_COUNTER_00 = 0 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC0Q_MODAL_SYMBOL_COUNTER_00_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC0Q_MODAL_SYMBOL_COUNTER_01 = 8 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC0Q_MODAL_SYMBOL_COUNTER_01_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC0Q_MODAL_SYMBOL_COUNTER_02 = 16 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC0Q_MODAL_SYMBOL_COUNTER_02_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC0Q_MODAL_SYMBOL_COUNTER_03 = 24 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC0Q_MODAL_SYMBOL_COUNTER_03_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC0Q_MODAL_SYMBOL_COUNTER_04 = 32 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC0Q_MODAL_SYMBOL_COUNTER_04_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC0Q_MODAL_SYMBOL_COUNTER_05 = 40 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC0Q_MODAL_SYMBOL_COUNTER_05_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC0Q_MODAL_SYMBOL_COUNTER_06 = 48 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC0Q_MODAL_SYMBOL_COUNTER_06_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC0Q_MODAL_SYMBOL_COUNTER_07 = 56 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC0Q_MODAL_SYMBOL_COUNTER_07_LEN = 8 ; + +static const uint8_t EXPLR_MCBIST_MBSSYMEC1Q_MODAL_SYMBOL_COUNTER_08 = 0 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC1Q_MODAL_SYMBOL_COUNTER_08_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC1Q_MODAL_SYMBOL_COUNTER_09 = 8 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC1Q_MODAL_SYMBOL_COUNTER_09_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC1Q_MODAL_SYMBOL_COUNTER_10 = 16 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC1Q_MODAL_SYMBOL_COUNTER_10_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC1Q_MODAL_SYMBOL_COUNTER_11 = 24 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC1Q_MODAL_SYMBOL_COUNTER_11_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC1Q_MODAL_SYMBOL_COUNTER_12 = 32 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC1Q_MODAL_SYMBOL_COUNTER_12_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC1Q_MODAL_SYMBOL_COUNTER_13 = 40 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC1Q_MODAL_SYMBOL_COUNTER_13_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC1Q_MODAL_SYMBOL_COUNTER_14 = 48 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC1Q_MODAL_SYMBOL_COUNTER_14_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC1Q_MODAL_SYMBOL_COUNTER_15 = 56 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC1Q_MODAL_SYMBOL_COUNTER_15_LEN = 8 ; + +static const uint8_t EXPLR_MCBIST_MBSSYMEC2Q_MODAL_SYMBOL_COUNTER_16 = 0 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC2Q_MODAL_SYMBOL_COUNTER_16_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC2Q_MODAL_SYMBOL_COUNTER_17 = 8 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC2Q_MODAL_SYMBOL_COUNTER_17_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC2Q_MODAL_SYMBOL_COUNTER_18 = 16 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC2Q_MODAL_SYMBOL_COUNTER_18_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC2Q_MODAL_SYMBOL_COUNTER_19 = 24 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC2Q_MODAL_SYMBOL_COUNTER_19_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC2Q_MODAL_SYMBOL_COUNTER_20 = 32 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC2Q_MODAL_SYMBOL_COUNTER_20_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC2Q_MODAL_SYMBOL_COUNTER_21 = 40 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC2Q_MODAL_SYMBOL_COUNTER_21_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC2Q_MODAL_SYMBOL_COUNTER_22 = 48 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC2Q_MODAL_SYMBOL_COUNTER_22_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC2Q_MODAL_SYMBOL_COUNTER_23 = 56 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC2Q_MODAL_SYMBOL_COUNTER_23_LEN = 8 ; + +static const uint8_t EXPLR_MCBIST_MBSSYMEC3Q_MODAL_SYMBOL_COUNTER_24 = 0 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC3Q_MODAL_SYMBOL_COUNTER_24_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC3Q_MODAL_SYMBOL_COUNTER_25 = 8 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC3Q_MODAL_SYMBOL_COUNTER_25_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC3Q_MODAL_SYMBOL_COUNTER_26 = 16 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC3Q_MODAL_SYMBOL_COUNTER_26_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC3Q_MODAL_SYMBOL_COUNTER_27 = 24 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC3Q_MODAL_SYMBOL_COUNTER_27_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC3Q_MODAL_SYMBOL_COUNTER_28 = 32 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC3Q_MODAL_SYMBOL_COUNTER_28_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC3Q_MODAL_SYMBOL_COUNTER_29 = 40 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC3Q_MODAL_SYMBOL_COUNTER_29_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC3Q_MODAL_SYMBOL_COUNTER_30 = 48 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC3Q_MODAL_SYMBOL_COUNTER_30_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC3Q_MODAL_SYMBOL_COUNTER_31 = 56 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC3Q_MODAL_SYMBOL_COUNTER_31_LEN = 8 ; + +static const uint8_t EXPLR_MCBIST_MBSSYMEC4Q_MODAL_SYMBOL_COUNTER_32 = 0 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC4Q_MODAL_SYMBOL_COUNTER_32_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC4Q_MODAL_SYMBOL_COUNTER_33 = 8 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC4Q_MODAL_SYMBOL_COUNTER_33_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC4Q_MODAL_SYMBOL_COUNTER_34 = 16 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC4Q_MODAL_SYMBOL_COUNTER_34_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC4Q_MODAL_SYMBOL_COUNTER_35 = 24 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC4Q_MODAL_SYMBOL_COUNTER_35_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC4Q_MODAL_SYMBOL_COUNTER_36 = 32 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC4Q_MODAL_SYMBOL_COUNTER_36_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC4Q_MODAL_SYMBOL_COUNTER_37 = 40 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC4Q_MODAL_SYMBOL_COUNTER_37_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC4Q_MODAL_SYMBOL_COUNTER_38 = 48 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC4Q_MODAL_SYMBOL_COUNTER_38_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC4Q_MODAL_SYMBOL_COUNTER_39 = 56 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC4Q_MODAL_SYMBOL_COUNTER_39_LEN = 8 ; + +static const uint8_t EXPLR_MCBIST_MBSSYMEC5Q_MODAL_SYMBOL_COUNTER_40 = 0 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC5Q_MODAL_SYMBOL_COUNTER_40_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC5Q_MODAL_SYMBOL_COUNTER_41 = 8 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC5Q_MODAL_SYMBOL_COUNTER_41_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC5Q_MODAL_SYMBOL_COUNTER_42 = 16 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC5Q_MODAL_SYMBOL_COUNTER_42_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC5Q_MODAL_SYMBOL_COUNTER_43 = 24 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC5Q_MODAL_SYMBOL_COUNTER_43_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC5Q_MODAL_SYMBOL_COUNTER_44 = 32 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC5Q_MODAL_SYMBOL_COUNTER_44_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC5Q_MODAL_SYMBOL_COUNTER_45 = 40 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC5Q_MODAL_SYMBOL_COUNTER_45_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC5Q_MODAL_SYMBOL_COUNTER_46 = 48 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC5Q_MODAL_SYMBOL_COUNTER_46_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC5Q_MODAL_SYMBOL_COUNTER_47 = 56 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC5Q_MODAL_SYMBOL_COUNTER_47_LEN = 8 ; + +static const uint8_t EXPLR_MCBIST_MBSSYMEC6Q_MODAL_SYMBOL_COUNTER_48 = 0 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC6Q_MODAL_SYMBOL_COUNTER_48_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC6Q_MODAL_SYMBOL_COUNTER_49 = 8 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC6Q_MODAL_SYMBOL_COUNTER_49_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC6Q_MODAL_SYMBOL_COUNTER_50 = 16 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC6Q_MODAL_SYMBOL_COUNTER_50_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC6Q_MODAL_SYMBOL_COUNTER_51 = 24 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC6Q_MODAL_SYMBOL_COUNTER_51_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC6Q_MODAL_SYMBOL_COUNTER_52 = 32 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC6Q_MODAL_SYMBOL_COUNTER_52_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC6Q_MODAL_SYMBOL_COUNTER_53 = 40 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC6Q_MODAL_SYMBOL_COUNTER_53_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC6Q_MODAL_SYMBOL_COUNTER_54 = 48 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC6Q_MODAL_SYMBOL_COUNTER_54_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC6Q_MODAL_SYMBOL_COUNTER_55 = 56 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC6Q_MODAL_SYMBOL_COUNTER_55_LEN = 8 ; + +static const uint8_t EXPLR_MCBIST_MBSSYMEC7Q_MODAL_SYMBOL_COUNTER_56 = 0 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC7Q_MODAL_SYMBOL_COUNTER_56_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC7Q_MODAL_SYMBOL_COUNTER_57 = 8 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC7Q_MODAL_SYMBOL_COUNTER_57_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC7Q_MODAL_SYMBOL_COUNTER_58 = 16 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC7Q_MODAL_SYMBOL_COUNTER_58_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC7Q_MODAL_SYMBOL_COUNTER_59 = 24 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC7Q_MODAL_SYMBOL_COUNTER_59_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC7Q_MODAL_SYMBOL_COUNTER_60 = 32 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC7Q_MODAL_SYMBOL_COUNTER_60_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC7Q_MODAL_SYMBOL_COUNTER_61 = 40 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC7Q_MODAL_SYMBOL_COUNTER_61_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC7Q_MODAL_SYMBOL_COUNTER_62 = 48 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC7Q_MODAL_SYMBOL_COUNTER_62_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC7Q_MODAL_SYMBOL_COUNTER_63 = 56 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC7Q_MODAL_SYMBOL_COUNTER_63_LEN = 8 ; + +static const uint8_t EXPLR_MCBIST_MBSSYMEC8Q_MODAL_SYMBOL_COUNTER_64 = 0 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC8Q_MODAL_SYMBOL_COUNTER_64_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC8Q_MODAL_SYMBOL_COUNTER_65 = 8 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC8Q_MODAL_SYMBOL_COUNTER_65_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC8Q_MODAL_SYMBOL_COUNTER_66 = 16 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC8Q_MODAL_SYMBOL_COUNTER_66_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC8Q_MODAL_SYMBOL_COUNTER_67 = 24 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC8Q_MODAL_SYMBOL_COUNTER_67_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC8Q_MODAL_SYMBOL_COUNTER_68 = 32 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC8Q_MODAL_SYMBOL_COUNTER_68_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC8Q_MODAL_SYMBOL_COUNTER_69 = 40 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC8Q_MODAL_SYMBOL_COUNTER_69_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC8Q_MODAL_SYMBOL_COUNTER_70 = 48 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC8Q_MODAL_SYMBOL_COUNTER_70_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC8Q_MODAL_SYMBOL_COUNTER_71 = 56 ; +static const uint8_t EXPLR_MCBIST_MBSSYMEC8Q_MODAL_SYMBOL_COUNTER_71_LEN = 8 ; + +static const uint8_t EXPLR_MCBIST_MBSTRQ_CFG_THRESH_MAG_NCE_INT = 0 ; +static const uint8_t EXPLR_MCBIST_MBSTRQ_CFG_THRESH_MAG_NCE_INT_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_MBSTRQ_CFG_THRESH_MAG_NCE_SOFT = 4 ; +static const uint8_t EXPLR_MCBIST_MBSTRQ_CFG_THRESH_MAG_NCE_SOFT_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_MBSTRQ_CFG_THRESH_MAG_NCE_HARD = 8 ; +static const uint8_t EXPLR_MCBIST_MBSTRQ_CFG_THRESH_MAG_NCE_HARD_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_MBSTRQ_CFG_THRESH_MAG_RCE = 12 ; +static const uint8_t EXPLR_MCBIST_MBSTRQ_CFG_THRESH_MAG_RCE_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_MBSTRQ_CFG_THRESH_MAG_ICE = 16 ; +static const uint8_t EXPLR_MCBIST_MBSTRQ_CFG_THRESH_MAG_ICE_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_MBSTRQ_CFG_THRESH_MAG_MCE_INT = 20 ; +static const uint8_t EXPLR_MCBIST_MBSTRQ_CFG_THRESH_MAG_MCE_INT_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_MBSTRQ_CFG_THRESH_MAG_MCE_SOFT = 24 ; +static const uint8_t EXPLR_MCBIST_MBSTRQ_CFG_THRESH_MAG_MCE_SOFT_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_MBSTRQ_CFG_THRESH_MAG_MCE_HARD = 28 ; +static const uint8_t EXPLR_MCBIST_MBSTRQ_CFG_THRESH_MAG_MCE_HARD_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_MBSTRQ_CFG_PAUSE_ON_SCE = 32 ; +static const uint8_t EXPLR_MCBIST_MBSTRQ_RESERVED_33 = 33 ; +static const uint8_t EXPLR_MCBIST_MBSTRQ_CFG_PAUSE_ON_MPE = 34 ; +static const uint8_t EXPLR_MCBIST_MBSTRQ_CFG_PAUSE_ON_UE = 35 ; +static const uint8_t EXPLR_MCBIST_MBSTRQ_CFG_PAUSE_ON_SUE = 36 ; +static const uint8_t EXPLR_MCBIST_MBSTRQ_CFG_PAUSE_ON_AUE = 37 ; +static const uint8_t EXPLR_MCBIST_MBSTRQ_CFG_PAUSE_ON_RCD = 38 ; +static const uint8_t EXPLR_MCBIST_MBSTRQ_RESERVE_39_52 = 39 ; +static const uint8_t EXPLR_MCBIST_MBSTRQ_RESERVE_39_52_LEN = 14 ; +static const uint8_t EXPLR_MCBIST_MBSTRQ_CFG_SYMBOL_COUNTER_MODE = 53 ; +static const uint8_t EXPLR_MCBIST_MBSTRQ_CFG_SYMBOL_COUNTER_MODE_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_MBSTRQ_CFG_NCE_SOFT_SYMBOL_COUNT_ENABLE = 55 ; +static const uint8_t EXPLR_MCBIST_MBSTRQ_CFG_NCE_INTER_SYMBOL_COUNT_ENABLE = 56 ; +static const uint8_t EXPLR_MCBIST_MBSTRQ_CFG_NCE_HARD_SYMBOL_COUNT_ENABLE = 57 ; +static const uint8_t EXPLR_MCBIST_MBSTRQ_CFG_PAUSE_MCB_ERROR = 58 ; +static const uint8_t EXPLR_MCBIST_MBSTRQ_CFG_PAUSE_MCB_LOG_FULL = 59 ; +static const uint8_t EXPLR_MCBIST_MBSTRQ_CFG_MAINT_RCE_WITH_CE = 60 ; +static const uint8_t EXPLR_MCBIST_MBSTRQ_CFG_MCE_SOFT_SYMBOL_COUNT_ENABLE = 61 ; +static const uint8_t EXPLR_MCBIST_MBSTRQ_CFG_MCE_INTER_SYMBOL_COUNT_ENABLE = 62 ; +static const uint8_t EXPLR_MCBIST_MBSTRQ_CFG_MCE_HARD_SYMBOL_COUNT_ENABLE = 63 ; + +static const uint8_t EXPLR_MCBIST_MBUER0Q_PORT_0_MAINLINE_UE_ADDR_TRAP = 0 ; +static const uint8_t EXPLR_MCBIST_MBUER0Q_PORT_0_MAINLINE_UE_ADDR_TRAP_LEN = 38 ; +static const uint8_t EXPLR_MCBIST_MBUER0Q_RESERVED_38_39 = 38 ; +static const uint8_t EXPLR_MCBIST_MBUER0Q_RESERVED_38_39_LEN = 2 ; + +static const uint8_t EXPLR_MCBIST_MBXLT0Q_SLOT0_VALID = 0 ; +static const uint8_t EXPLR_MCBIST_MBXLT0Q_SLOT0_D_VALUE = 1 ; +static const uint8_t EXPLR_MCBIST_MBXLT0Q_12GB_ENABLE = 2 ; +static const uint8_t EXPLR_MCBIST_MBXLT0Q_RESERVED_3_4 = 3 ; +static const uint8_t EXPLR_MCBIST_MBXLT0Q_RESERVED_3_4_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_MBXLT0Q_SLOT0_M0_VALID = 5 ; +static const uint8_t EXPLR_MCBIST_MBXLT0Q_SLOT0_M1_VALID = 6 ; +static const uint8_t EXPLR_MCBIST_MBXLT0Q_RESERVED_7_8 = 7 ; +static const uint8_t EXPLR_MCBIST_MBXLT0Q_RESERVED_7_8_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_MBXLT0Q_SLOT0_S0_VALID = 9 ; +static const uint8_t EXPLR_MCBIST_MBXLT0Q_SLOT0_S1_VALID = 10 ; +static const uint8_t EXPLR_MCBIST_MBXLT0Q_SLOT0_S2_VALID = 11 ; +static const uint8_t EXPLR_MCBIST_MBXLT0Q_SLOT0_B2_VALID = 12 ; +static const uint8_t EXPLR_MCBIST_MBXLT0Q_SLOT0_ROW15_VALID = 13 ; +static const uint8_t EXPLR_MCBIST_MBXLT0Q_SLOT0_ROW16_VALID = 14 ; +static const uint8_t EXPLR_MCBIST_MBXLT0Q_SLOT0_ROW17_VALID = 15 ; +static const uint8_t EXPLR_MCBIST_MBXLT0Q_SLOT1_VALID = 16 ; +static const uint8_t EXPLR_MCBIST_MBXLT0Q_SLOT1_D_VALUE = 17 ; +static const uint8_t EXPLR_MCBIST_MBXLT0Q_RESERVED_18_20 = 18 ; +static const uint8_t EXPLR_MCBIST_MBXLT0Q_RESERVED_18_20_LEN = 3 ; +static const uint8_t EXPLR_MCBIST_MBXLT0Q_SLOT1_M0_VALID = 21 ; +static const uint8_t EXPLR_MCBIST_MBXLT0Q_SLOT1_M1_VALID = 22 ; +static const uint8_t EXPLR_MCBIST_MBXLT0Q_RESERVED_23_24 = 23 ; +static const uint8_t EXPLR_MCBIST_MBXLT0Q_RESERVED_23_24_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_MBXLT0Q_SLOT1_S0_VALID = 25 ; +static const uint8_t EXPLR_MCBIST_MBXLT0Q_SLOT1_S1_VALID = 26 ; +static const uint8_t EXPLR_MCBIST_MBXLT0Q_SLOT1_S2_VALID = 27 ; +static const uint8_t EXPLR_MCBIST_MBXLT0Q_SLOT1_B2_VALID = 28 ; +static const uint8_t EXPLR_MCBIST_MBXLT0Q_SLOT1_ROW15_VALID = 29 ; +static const uint8_t EXPLR_MCBIST_MBXLT0Q_SLOT1_ROW16_VALID = 30 ; +static const uint8_t EXPLR_MCBIST_MBXLT0Q_SLOT1_ROW17_VALID = 31 ; +static const uint8_t EXPLR_MCBIST_MBXLT0Q_ENAB_ROW_ADDR_HASH = 32 ; +static const uint8_t EXPLR_MCBIST_MBXLT0Q_D_BIT_MAP = 33 ; +static const uint8_t EXPLR_MCBIST_MBXLT0Q_D_BIT_MAP_LEN = 5 ; +static const uint8_t EXPLR_MCBIST_MBXLT0Q_M0_BIT_MAP = 38 ; +static const uint8_t EXPLR_MCBIST_MBXLT0Q_M0_BIT_MAP_LEN = 5 ; +static const uint8_t EXPLR_MCBIST_MBXLT0Q_M1_BIT_MAP = 43 ; +static const uint8_t EXPLR_MCBIST_MBXLT0Q_M1_BIT_MAP_LEN = 5 ; +static const uint8_t EXPLR_MCBIST_MBXLT0Q_RESERVED_48 = 48 ; +static const uint8_t EXPLR_MCBIST_MBXLT0Q_R17_BIT_MAP = 49 ; +static const uint8_t EXPLR_MCBIST_MBXLT0Q_R17_BIT_MAP_LEN = 5 ; +static const uint8_t EXPLR_MCBIST_MBXLT0Q_R16_BIT_MAP = 54 ; +static const uint8_t EXPLR_MCBIST_MBXLT0Q_R16_BIT_MAP_LEN = 5 ; +static const uint8_t EXPLR_MCBIST_MBXLT0Q_R15_BIT_MAP = 59 ; +static const uint8_t EXPLR_MCBIST_MBXLT0Q_R15_BIT_MAP_LEN = 5 ; + +static const uint8_t EXPLR_MCBIST_MBXLT1_RESERVED_0_2 = 0 ; +static const uint8_t EXPLR_MCBIST_MBXLT1_RESERVED_0_2_LEN = 3 ; +static const uint8_t EXPLR_MCBIST_MBXLT1_S0_BIT_MAP = 3 ; +static const uint8_t EXPLR_MCBIST_MBXLT1_S0_BIT_MAP_LEN = 5 ; +static const uint8_t EXPLR_MCBIST_MBXLT1_RESERVED_8_10 = 8 ; +static const uint8_t EXPLR_MCBIST_MBXLT1_RESERVED_8_10_LEN = 3 ; +static const uint8_t EXPLR_MCBIST_MBXLT1_S1_BIT_MAP = 11 ; +static const uint8_t EXPLR_MCBIST_MBXLT1_S1_BIT_MAP_LEN = 5 ; +static const uint8_t EXPLR_MCBIST_MBXLT1_RESERVED_16_18 = 16 ; +static const uint8_t EXPLR_MCBIST_MBXLT1_RESERVED_16_18_LEN = 3 ; +static const uint8_t EXPLR_MCBIST_MBXLT1_S2_BIT_MAP = 19 ; +static const uint8_t EXPLR_MCBIST_MBXLT1_S2_BIT_MAP_LEN = 5 ; +static const uint8_t EXPLR_MCBIST_MBXLT1_RESERVED_24_29 = 24 ; +static const uint8_t EXPLR_MCBIST_MBXLT1_RESERVED_24_29_LEN = 6 ; +static const uint8_t EXPLR_MCBIST_MBXLT1_COL3_BIT_MAP = 30 ; +static const uint8_t EXPLR_MCBIST_MBXLT1_COL3_BIT_MAP_LEN = 5 ; +static const uint8_t EXPLR_MCBIST_MBXLT1_COL4_BIT_MAP = 35 ; +static const uint8_t EXPLR_MCBIST_MBXLT1_COL4_BIT_MAP_LEN = 5 ; +static const uint8_t EXPLR_MCBIST_MBXLT1_RESERVED_40_42 = 40 ; +static const uint8_t EXPLR_MCBIST_MBXLT1_RESERVED_40_42_LEN = 3 ; +static const uint8_t EXPLR_MCBIST_MBXLT1_COL5_BIT_MAP = 43 ; +static const uint8_t EXPLR_MCBIST_MBXLT1_COL5_BIT_MAP_LEN = 5 ; +static const uint8_t EXPLR_MCBIST_MBXLT1_RESERVED_48_50 = 48 ; +static const uint8_t EXPLR_MCBIST_MBXLT1_RESERVED_48_50_LEN = 3 ; +static const uint8_t EXPLR_MCBIST_MBXLT1_COL6_BIT_MAP = 51 ; +static const uint8_t EXPLR_MCBIST_MBXLT1_COL6_BIT_MAP_LEN = 5 ; +static const uint8_t EXPLR_MCBIST_MBXLT1_RESERVED_56_58 = 56 ; +static const uint8_t EXPLR_MCBIST_MBXLT1_RESERVED_56_58_LEN = 3 ; +static const uint8_t EXPLR_MCBIST_MBXLT1_COL7_BIT_MAP = 59 ; +static const uint8_t EXPLR_MCBIST_MBXLT1_COL7_BIT_MAP_LEN = 5 ; + +static const uint8_t EXPLR_MCBIST_MBXLT2_RESERVED_0_2 = 0 ; +static const uint8_t EXPLR_MCBIST_MBXLT2_RESERVED_0_2_LEN = 3 ; +static const uint8_t EXPLR_MCBIST_MBXLT2_COL8_BIT_MAP = 3 ; +static const uint8_t EXPLR_MCBIST_MBXLT2_COL8_BIT_MAP_LEN = 5 ; +static const uint8_t EXPLR_MCBIST_MBXLT2_RESERVED_8_10 = 8 ; +static const uint8_t EXPLR_MCBIST_MBXLT2_RESERVED_8_10_LEN = 3 ; +static const uint8_t EXPLR_MCBIST_MBXLT2_COL9_BIT_MAP = 11 ; +static const uint8_t EXPLR_MCBIST_MBXLT2_COL9_BIT_MAP_LEN = 5 ; +static const uint8_t EXPLR_MCBIST_MBXLT2_RESERVED_16_18 = 16 ; +static const uint8_t EXPLR_MCBIST_MBXLT2_RESERVED_16_18_LEN = 3 ; +static const uint8_t EXPLR_MCBIST_MBXLT2_BANK0_BIT_MAP = 19 ; +static const uint8_t EXPLR_MCBIST_MBXLT2_BANK0_BIT_MAP_LEN = 5 ; +static const uint8_t EXPLR_MCBIST_MBXLT2_RESERVED_24_26 = 24 ; +static const uint8_t EXPLR_MCBIST_MBXLT2_RESERVED_24_26_LEN = 3 ; +static const uint8_t EXPLR_MCBIST_MBXLT2_BANK1_BIT_MAP = 27 ; +static const uint8_t EXPLR_MCBIST_MBXLT2_BANK1_BIT_MAP_LEN = 5 ; +static const uint8_t EXPLR_MCBIST_MBXLT2_RESERVED_32_34 = 32 ; +static const uint8_t EXPLR_MCBIST_MBXLT2_RESERVED_32_34_LEN = 3 ; +static const uint8_t EXPLR_MCBIST_MBXLT2_BANK2_BIT_MAP = 35 ; +static const uint8_t EXPLR_MCBIST_MBXLT2_BANK2_BIT_MAP_LEN = 5 ; +static const uint8_t EXPLR_MCBIST_MBXLT2_RESERVED_40_42 = 40 ; +static const uint8_t EXPLR_MCBIST_MBXLT2_RESERVED_40_42_LEN = 3 ; +static const uint8_t EXPLR_MCBIST_MBXLT2_BANK_GROUP0_BIT_MAP = 43 ; +static const uint8_t EXPLR_MCBIST_MBXLT2_BANK_GROUP0_BIT_MAP_LEN = 5 ; +static const uint8_t EXPLR_MCBIST_MBXLT2_RESERVED_48_50 = 48 ; +static const uint8_t EXPLR_MCBIST_MBXLT2_RESERVED_48_50_LEN = 3 ; +static const uint8_t EXPLR_MCBIST_MBXLT2_BANK_GROUP1_BIT_MAP = 51 ; +static const uint8_t EXPLR_MCBIST_MBXLT2_BANK_GROUP1_BIT_MAP_LEN = 5 ; +static const uint8_t EXPLR_MCBIST_MBXLT2_RESERVED_56_63 = 56 ; +static const uint8_t EXPLR_MCBIST_MBXLT2_RESERVED_56_63_LEN = 8 ; + +static const uint8_t EXPLR_MCBIST_MCBACQ_CFG_ADDRESS_COUNTER = 0 ; +static const uint8_t EXPLR_MCBIST_MCBACQ_CFG_ADDRESS_COUNTER_LEN = 38 ; + +static const uint8_t EXPLR_MCBIST_MCBAGRAQ_CFG_FIXED_WIDTH = 0 ; +static const uint8_t EXPLR_MCBIST_MCBAGRAQ_CFG_FIXED_WIDTH_LEN = 6 ; +static const uint8_t EXPLR_MCBIST_MCBAGRAQ_CFG_ADDR_COUNTER_MODE = 6 ; +static const uint8_t EXPLR_MCBIST_MCBAGRAQ_CFG_ADDR_COUNTER_MODE_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_MCBAGRAQ_CFG_MAINT_ADDR_MODE_EN = 10 ; +static const uint8_t EXPLR_MCBIST_MCBAGRAQ_RESERVED_11 = 11 ; +static const uint8_t EXPLR_MCBIST_MCBAGRAQ_CFG_MAINT_DETECT_SRANK_BOUNDARIES = 12 ; +static const uint8_t EXPLR_MCBIST_MCBAGRAQ_RESERVED_13_31 = 13 ; +static const uint8_t EXPLR_MCBIST_MCBAGRAQ_RESERVED_13_31_LEN = 19 ; + +static const uint8_t EXPLR_MCBIST_MCBAMR0A0Q_CFG_AMAP_DIMM_SELECT = 0 ; +static const uint8_t EXPLR_MCBIST_MCBAMR0A0Q_CFG_AMAP_DIMM_SELECT_LEN = 6 ; +static const uint8_t EXPLR_MCBIST_MCBAMR0A0Q_CFG_AMAP_MRANK0 = 6 ; +static const uint8_t EXPLR_MCBIST_MCBAMR0A0Q_CFG_AMAP_MRANK0_LEN = 6 ; +static const uint8_t EXPLR_MCBIST_MCBAMR0A0Q_CFG_AMAP_MRANK1 = 12 ; +static const uint8_t EXPLR_MCBIST_MCBAMR0A0Q_CFG_AMAP_MRANK1_LEN = 6 ; +static const uint8_t EXPLR_MCBIST_MCBAMR0A0Q_RESERVED_18_23 = 18 ; +static const uint8_t EXPLR_MCBIST_MCBAMR0A0Q_RESERVED_18_23_LEN = 6 ; +static const uint8_t EXPLR_MCBIST_MCBAMR0A0Q_CFG_AMAP_SRANK0 = 24 ; +static const uint8_t EXPLR_MCBIST_MCBAMR0A0Q_CFG_AMAP_SRANK0_LEN = 6 ; +static const uint8_t EXPLR_MCBIST_MCBAMR0A0Q_CFG_AMAP_SRANK1 = 30 ; +static const uint8_t EXPLR_MCBIST_MCBAMR0A0Q_CFG_AMAP_SRANK1_LEN = 6 ; +static const uint8_t EXPLR_MCBIST_MCBAMR0A0Q_CFG_AMAP_SRANK2 = 36 ; +static const uint8_t EXPLR_MCBIST_MCBAMR0A0Q_CFG_AMAP_SRANK2_LEN = 6 ; +static const uint8_t EXPLR_MCBIST_MCBAMR0A0Q_CFG_AMAP_BANK2 = 42 ; +static const uint8_t EXPLR_MCBIST_MCBAMR0A0Q_CFG_AMAP_BANK2_LEN = 6 ; +static const uint8_t EXPLR_MCBIST_MCBAMR0A0Q_CFG_AMAP_BANK1 = 48 ; +static const uint8_t EXPLR_MCBIST_MCBAMR0A0Q_CFG_AMAP_BANK1_LEN = 6 ; +static const uint8_t EXPLR_MCBIST_MCBAMR0A0Q_CFG_AMAP_BANK0 = 54 ; +static const uint8_t EXPLR_MCBIST_MCBAMR0A0Q_CFG_AMAP_BANK0_LEN = 6 ; +static const uint8_t EXPLR_MCBIST_MCBAMR0A0Q_RESERVED_60_63 = 60 ; +static const uint8_t EXPLR_MCBIST_MCBAMR0A0Q_RESERVED_60_63_LEN = 4 ; + +static const uint8_t EXPLR_MCBIST_MCBAMR1A0Q_CFG_AMAP_BANK_GROUP1 = 0 ; +static const uint8_t EXPLR_MCBIST_MCBAMR1A0Q_CFG_AMAP_BANK_GROUP1_LEN = 6 ; +static const uint8_t EXPLR_MCBIST_MCBAMR1A0Q_CFG_AMAP_BANK_GROUP0 = 6 ; +static const uint8_t EXPLR_MCBIST_MCBAMR1A0Q_CFG_AMAP_BANK_GROUP0_LEN = 6 ; +static const uint8_t EXPLR_MCBIST_MCBAMR1A0Q_CFG_AMAP_ROW17 = 12 ; +static const uint8_t EXPLR_MCBIST_MCBAMR1A0Q_CFG_AMAP_ROW17_LEN = 6 ; +static const uint8_t EXPLR_MCBIST_MCBAMR1A0Q_CFG_AMAP_ROW16 = 18 ; +static const uint8_t EXPLR_MCBIST_MCBAMR1A0Q_CFG_AMAP_ROW16_LEN = 6 ; +static const uint8_t EXPLR_MCBIST_MCBAMR1A0Q_CFG_AMAP_ROW15 = 24 ; +static const uint8_t EXPLR_MCBIST_MCBAMR1A0Q_CFG_AMAP_ROW15_LEN = 6 ; +static const uint8_t EXPLR_MCBIST_MCBAMR1A0Q_CFG_AMAP_ROW14 = 30 ; +static const uint8_t EXPLR_MCBIST_MCBAMR1A0Q_CFG_AMAP_ROW14_LEN = 6 ; +static const uint8_t EXPLR_MCBIST_MCBAMR1A0Q_CFG_AMAP_ROW13 = 36 ; +static const uint8_t EXPLR_MCBIST_MCBAMR1A0Q_CFG_AMAP_ROW13_LEN = 6 ; +static const uint8_t EXPLR_MCBIST_MCBAMR1A0Q_CFG_AMAP_ROW12 = 42 ; +static const uint8_t EXPLR_MCBIST_MCBAMR1A0Q_CFG_AMAP_ROW12_LEN = 6 ; +static const uint8_t EXPLR_MCBIST_MCBAMR1A0Q_CFG_AMAP_ROW11 = 48 ; +static const uint8_t EXPLR_MCBIST_MCBAMR1A0Q_CFG_AMAP_ROW11_LEN = 6 ; +static const uint8_t EXPLR_MCBIST_MCBAMR1A0Q_CFG_AMAP_ROW10 = 54 ; +static const uint8_t EXPLR_MCBIST_MCBAMR1A0Q_CFG_AMAP_ROW10_LEN = 6 ; +static const uint8_t EXPLR_MCBIST_MCBAMR1A0Q_RESERVED_60_63 = 60 ; +static const uint8_t EXPLR_MCBIST_MCBAMR1A0Q_RESERVED_60_63_LEN = 4 ; + +static const uint8_t EXPLR_MCBIST_MCBAMR2A0Q_CFG_AMAP_ROW9 = 0 ; +static const uint8_t EXPLR_MCBIST_MCBAMR2A0Q_CFG_AMAP_ROW9_LEN = 6 ; +static const uint8_t EXPLR_MCBIST_MCBAMR2A0Q_CFG_AMAP_ROW8 = 6 ; +static const uint8_t EXPLR_MCBIST_MCBAMR2A0Q_CFG_AMAP_ROW8_LEN = 6 ; +static const uint8_t EXPLR_MCBIST_MCBAMR2A0Q_CFG_AMAP_ROW7 = 12 ; +static const uint8_t EXPLR_MCBIST_MCBAMR2A0Q_CFG_AMAP_ROW7_LEN = 6 ; +static const uint8_t EXPLR_MCBIST_MCBAMR2A0Q_CFG_AMAP_ROW6 = 18 ; +static const uint8_t EXPLR_MCBIST_MCBAMR2A0Q_CFG_AMAP_ROW6_LEN = 6 ; +static const uint8_t EXPLR_MCBIST_MCBAMR2A0Q_CFG_AMAP_ROW5 = 24 ; +static const uint8_t EXPLR_MCBIST_MCBAMR2A0Q_CFG_AMAP_ROW5_LEN = 6 ; +static const uint8_t EXPLR_MCBIST_MCBAMR2A0Q_CFG_AMAP_ROW4 = 30 ; +static const uint8_t EXPLR_MCBIST_MCBAMR2A0Q_CFG_AMAP_ROW4_LEN = 6 ; +static const uint8_t EXPLR_MCBIST_MCBAMR2A0Q_CFG_AMAP_ROW3 = 36 ; +static const uint8_t EXPLR_MCBIST_MCBAMR2A0Q_CFG_AMAP_ROW3_LEN = 6 ; +static const uint8_t EXPLR_MCBIST_MCBAMR2A0Q_CFG_AMAP_ROW2 = 42 ; +static const uint8_t EXPLR_MCBIST_MCBAMR2A0Q_CFG_AMAP_ROW2_LEN = 6 ; +static const uint8_t EXPLR_MCBIST_MCBAMR2A0Q_CFG_AMAP_ROW1 = 48 ; +static const uint8_t EXPLR_MCBIST_MCBAMR2A0Q_CFG_AMAP_ROW1_LEN = 6 ; +static const uint8_t EXPLR_MCBIST_MCBAMR2A0Q_CFG_AMAP_ROW0 = 54 ; +static const uint8_t EXPLR_MCBIST_MCBAMR2A0Q_CFG_AMAP_ROW0_LEN = 6 ; +static const uint8_t EXPLR_MCBIST_MCBAMR2A0Q_RESERVED_60_63 = 60 ; +static const uint8_t EXPLR_MCBIST_MCBAMR2A0Q_RESERVED_60_63_LEN = 4 ; + +static const uint8_t EXPLR_MCBIST_MCBAMR3A0Q_CFG_AMAP_COL9 = 0 ; +static const uint8_t EXPLR_MCBIST_MCBAMR3A0Q_CFG_AMAP_COL9_LEN = 6 ; +static const uint8_t EXPLR_MCBIST_MCBAMR3A0Q_CFG_AMAP_COL8 = 6 ; +static const uint8_t EXPLR_MCBIST_MCBAMR3A0Q_CFG_AMAP_COL8_LEN = 6 ; +static const uint8_t EXPLR_MCBIST_MCBAMR3A0Q_CFG_AMAP_COL7 = 12 ; +static const uint8_t EXPLR_MCBIST_MCBAMR3A0Q_CFG_AMAP_COL7_LEN = 6 ; +static const uint8_t EXPLR_MCBIST_MCBAMR3A0Q_CFG_AMAP_COL6 = 18 ; +static const uint8_t EXPLR_MCBIST_MCBAMR3A0Q_CFG_AMAP_COL6_LEN = 6 ; +static const uint8_t EXPLR_MCBIST_MCBAMR3A0Q_CFG_AMAP_COL5 = 24 ; +static const uint8_t EXPLR_MCBIST_MCBAMR3A0Q_CFG_AMAP_COL5_LEN = 6 ; +static const uint8_t EXPLR_MCBIST_MCBAMR3A0Q_CFG_AMAP_COL4 = 30 ; +static const uint8_t EXPLR_MCBIST_MCBAMR3A0Q_CFG_AMAP_COL4_LEN = 6 ; +static const uint8_t EXPLR_MCBIST_MCBAMR3A0Q_CFG_AMAP_COL3 = 36 ; +static const uint8_t EXPLR_MCBIST_MCBAMR3A0Q_CFG_AMAP_COL3_LEN = 6 ; +static const uint8_t EXPLR_MCBIST_MCBAMR3A0Q_CFG_AMAP_COL2 = 42 ; +static const uint8_t EXPLR_MCBIST_MCBAMR3A0Q_CFG_AMAP_COL2_LEN = 6 ; +static const uint8_t EXPLR_MCBIST_MCBAMR3A0Q_RESERVED_48_63 = 48 ; +static const uint8_t EXPLR_MCBIST_MCBAMR3A0Q_RESERVED_48_63_LEN = 16 ; + +static const uint8_t EXPLR_MCBIST_MCBCFGQ_RESERVED_0_7 = 0 ; +static const uint8_t EXPLR_MCBIST_MCBCFGQ_RESERVED_0_7_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_MCBCFGQ_CFG_CMD_TIMEOUT_MODE = 8 ; +static const uint8_t EXPLR_MCBIST_MCBCFGQ_CFG_CMD_TIMEOUT_MODE_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_MCBCFGQ_RESET_KEEPER = 10 ; +static const uint8_t EXPLR_MCBIST_MCBCFGQ_CFG_CURRENT_ADDR_TRAP_UPDATE_DIS = 11 ; +static const uint8_t EXPLR_MCBIST_MCBCFGQ_CFG_CCS_RETRY_DIS = 12 ; +static const uint8_t EXPLR_MCBIST_MCBCFGQ_RESERVED_13_33 = 13 ; +static const uint8_t EXPLR_MCBIST_MCBCFGQ_RESERVED_13_33_LEN = 21 ; +static const uint8_t EXPLR_MCBIST_MCBCFGQ_MCBIST_CFG_FORCE_PAUSE_AFTER_RANK = 34 ; +static const uint8_t EXPLR_MCBIST_MCBCFGQ_CFG_RESET_CNTS_START_OF_RANK = 35 ; +static const uint8_t EXPLR_MCBIST_MCBCFGQ_CFG_LOG_COUNTS_IN_TRACE = 36 ; +static const uint8_t EXPLR_MCBIST_MCBCFGQ_SKIP_INVALID_ADDR_DIMM_DIS = 37 ; +static const uint8_t EXPLR_MCBIST_MCBCFGQ_REFRESH_ONLY_SUBTEST_EN = 38 ; +static const uint8_t EXPLR_MCBIST_MCBCFGQ_REFRESH_ONLY_SUBTEST_TIMEBASE_SEL = 39 ; static const uint8_t EXPLR_MCBIST_MCBCFGQ_REFRESH_ONLY_SUBTEST_TIMEBASE_SEL_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_MCBCFGQ_RAND_ADDR_ALL_ADDR_MODE_EN = 41 ; -static const uint8_t EXPLR_MCBIST_MCBCFGQ_MCBIST_CFG_REF_WAIT_TIME = 42 ; -static const uint8_t EXPLR_MCBIST_MCBCFGQ_MCBIST_CFG_REF_WAIT_TIME_LEN = 14 ; -static const uint8_t EXPLR_MCBIST_MCBCFGQ_CFG_MCB_LEN64 = 56 ; -static const uint8_t EXPLR_MCBIST_MCBCFGQ_CFG_PAUSE_ON_ERROR_MODE = 57 ; -static const uint8_t EXPLR_MCBIST_MCBCFGQ_CFG_PAUSE_ON_ERROR_MODE_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_MCBCFGQ_MCBIST_CFG_PAUSE_AFTER_CCS_SUBTEST = 59 ; -static const uint8_t EXPLR_MCBIST_MCBCFGQ_MCBIST_CFG_FORCE_PAUSE_AFTER_ADDR = 60 ; +static const uint8_t EXPLR_MCBIST_MCBCFGQ_RAND_ADDR_ALL_ADDR_MODE_EN = 41 ; +static const uint8_t EXPLR_MCBIST_MCBCFGQ_MCBIST_CFG_REF_WAIT_TIME = 42 ; +static const uint8_t EXPLR_MCBIST_MCBCFGQ_MCBIST_CFG_REF_WAIT_TIME_LEN = 14 ; +static const uint8_t EXPLR_MCBIST_MCBCFGQ_CFG_MCB_LEN64 = 56 ; +static const uint8_t EXPLR_MCBIST_MCBCFGQ_CFG_PAUSE_ON_ERROR_MODE = 57 ; +static const uint8_t EXPLR_MCBIST_MCBCFGQ_CFG_PAUSE_ON_ERROR_MODE_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_MCBCFGQ_MCBIST_CFG_PAUSE_AFTER_CCS_SUBTEST = 59 ; +static const uint8_t EXPLR_MCBIST_MCBCFGQ_MCBIST_CFG_FORCE_PAUSE_AFTER_ADDR = 60 ; static const uint8_t EXPLR_MCBIST_MCBCFGQ_MCBIST_CFG_FORCE_PAUSE_AFTER_SUBTEST = 61 ; -static const uint8_t EXPLR_MCBIST_MCBCFGQ_RESERVED_62_63 = 62 ; -static const uint8_t EXPLR_MCBIST_MCBCFGQ_RESERVED_62_63_LEN = 2 ; - -static const uint8_t EXPLR_MCBIST_MCBDRCRQ_CFG_DATA_ROT = 0 ; -static const uint8_t EXPLR_MCBIST_MCBDRCRQ_CFG_DATA_ROT_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_MCBDRCRQ_CFG_DATA_ROT_SEED = 4 ; -static const uint8_t EXPLR_MCBIST_MCBDRCRQ_CFG_DATA_ROT_SEED_LEN = 16 ; -static const uint8_t EXPLR_MCBIST_MCBDRCRQ_RESERVED_20 = 20 ; -static const uint8_t EXPLR_MCBIST_MCBDRCRQ_CFG_DATA_SEED_MODE = 21 ; -static const uint8_t EXPLR_MCBIST_MCBDRCRQ_CFG_DATA_SEED_MODE_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_MCBDRCRQ_RESERVED_23_63 = 23 ; -static const uint8_t EXPLR_MCBIST_MCBDRCRQ_RESERVED_23_63_LEN = 41 ; - -static const uint8_t EXPLR_MCBIST_MCBDRSRQ_CFG_DATA_ROT_SEED = 0 ; -static const uint8_t EXPLR_MCBIST_MCBDRSRQ_CFG_DATA_ROT_SEED_LEN = 64 ; - -static const uint8_t EXPLR_MCBIST_MCBEA0Q_CFG_END_ADDR_0 = 0 ; -static const uint8_t EXPLR_MCBIST_MCBEA0Q_CFG_END_ADDR_0_LEN = 38 ; - -static const uint8_t EXPLR_MCBIST_MCBEA1Q_CFG_END_ADDR_1 = 0 ; -static const uint8_t EXPLR_MCBIST_MCBEA1Q_CFG_END_ADDR_1_LEN = 38 ; - -static const uint8_t EXPLR_MCBIST_MCBEA2Q_CFG_END_ADDR_2 = 0 ; -static const uint8_t EXPLR_MCBIST_MCBEA2Q_CFG_END_ADDR_2_LEN = 38 ; - -static const uint8_t EXPLR_MCBIST_MCBEA3Q_CFG_END_ADDR_3 = 0 ; -static const uint8_t EXPLR_MCBIST_MCBEA3Q_CFG_END_ADDR_3_LEN = 38 ; - -static const uint8_t EXPLR_MCBIST_MCBFD0Q_CFG_FIXED_SEED = 0 ; -static const uint8_t EXPLR_MCBIST_MCBFD0Q_CFG_FIXED_SEED_LEN = 64 ; - -static const uint8_t EXPLR_MCBIST_MCBFD1Q_CFG_FIXED_SEED = 0 ; -static const uint8_t EXPLR_MCBIST_MCBFD1Q_CFG_FIXED_SEED_LEN = 64 ; - -static const uint8_t EXPLR_MCBIST_MCBFD2Q_CFG_FIXED_SEED = 0 ; -static const uint8_t EXPLR_MCBIST_MCBFD2Q_CFG_FIXED_SEED_LEN = 64 ; - -static const uint8_t EXPLR_MCBIST_MCBFD3Q_CFG_FIXED_SEED = 0 ; -static const uint8_t EXPLR_MCBIST_MCBFD3Q_CFG_FIXED_SEED_LEN = 64 ; - -static const uint8_t EXPLR_MCBIST_MCBFD4Q_CFG_FIXED_SEED = 0 ; -static const uint8_t EXPLR_MCBIST_MCBFD4Q_CFG_FIXED_SEED_LEN = 64 ; - -static const uint8_t EXPLR_MCBIST_MCBFD5Q_CFG_FIXED_SEED = 0 ; -static const uint8_t EXPLR_MCBIST_MCBFD5Q_CFG_FIXED_SEED_LEN = 64 ; - -static const uint8_t EXPLR_MCBIST_MCBFD6Q_CFG_FIXED_SEED = 0 ; -static const uint8_t EXPLR_MCBIST_MCBFD6Q_CFG_FIXED_SEED_LEN = 64 ; - -static const uint8_t EXPLR_MCBIST_MCBFD7Q_CFG_FIXED_SEED = 0 ; -static const uint8_t EXPLR_MCBIST_MCBFD7Q_CFG_FIXED_SEED_LEN = 64 ; - -static const uint8_t EXPLR_MCBIST_MCBFDQ_CFG_FIXED_SEED1 = 0 ; -static const uint8_t EXPLR_MCBIST_MCBFDQ_CFG_FIXED_SEED1_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_MCBFDQ_CFG_FIXED_SEED2 = 8 ; -static const uint8_t EXPLR_MCBIST_MCBFDQ_CFG_FIXED_SEED2_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_MCBFDQ_CFG_FIXED_SEED3 = 16 ; -static const uint8_t EXPLR_MCBIST_MCBFDQ_CFG_FIXED_SEED3_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_MCBFDQ_CFG_FIXED_SEED4 = 24 ; -static const uint8_t EXPLR_MCBIST_MCBFDQ_CFG_FIXED_SEED4_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_MCBFDQ_CFG_FIXED_SEED5 = 32 ; -static const uint8_t EXPLR_MCBIST_MCBFDQ_CFG_FIXED_SEED5_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_MCBFDQ_CFG_FIXED_SEED6 = 40 ; -static const uint8_t EXPLR_MCBIST_MCBFDQ_CFG_FIXED_SEED6_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_MCBFDQ_CFG_FIXED_SEED7 = 48 ; -static const uint8_t EXPLR_MCBIST_MCBFDQ_CFG_FIXED_SEED7_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_MCBFDQ_CFG_FIXED_SEED8 = 56 ; -static const uint8_t EXPLR_MCBIST_MCBFDQ_CFG_FIXED_SEED8_LEN = 8 ; - -static const uint8_t EXPLR_MCBIST_MCBFDSPQ_CFG_FIXED_SEED1 = 0 ; -static const uint8_t EXPLR_MCBIST_MCBFDSPQ_CFG_FIXED_SEED1_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_MCBFDSPQ_CFG_FIXED_SEED2 = 8 ; -static const uint8_t EXPLR_MCBIST_MCBFDSPQ_CFG_FIXED_SEED2_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_MCBFDSPQ_CFG_FIXED_SEED3 = 16 ; -static const uint8_t EXPLR_MCBIST_MCBFDSPQ_CFG_FIXED_SEED3_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_MCBFDSPQ_CFG_FIXED_SEED4 = 24 ; -static const uint8_t EXPLR_MCBIST_MCBFDSPQ_CFG_FIXED_SEED4_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_MCBFDSPQ_CFG_FIXED_SEED5 = 32 ; -static const uint8_t EXPLR_MCBIST_MCBFDSPQ_CFG_FIXED_SEED5_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_MCBFDSPQ_CFG_FIXED_SEED6 = 40 ; -static const uint8_t EXPLR_MCBIST_MCBFDSPQ_CFG_FIXED_SEED6_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_MCBFDSPQ_CFG_FIXED_SEED7 = 48 ; -static const uint8_t EXPLR_MCBIST_MCBFDSPQ_CFG_FIXED_SEED7_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_MCBFDSPQ_CFG_FIXED_SEED8 = 56 ; -static const uint8_t EXPLR_MCBIST_MCBFDSPQ_CFG_FIXED_SEED8_LEN = 8 ; - -static const uint8_t EXPLR_MCBIST_MCBISTFIRACT0_FIR_ACTION0 = 0 ; -static const uint8_t EXPLR_MCBIST_MCBISTFIRACT0_FIR_ACTION0_LEN = 20 ; - -static const uint8_t EXPLR_MCBIST_MCBISTFIRACT1_FIR_ACTION1 = 0 ; -static const uint8_t EXPLR_MCBIST_MCBISTFIRACT1_FIR_ACTION1_LEN = 20 ; - -static const uint8_t EXPLR_MCBIST_MCBISTFIRMASK_FIR_MASK = 0 ; -static const uint8_t EXPLR_MCBIST_MCBISTFIRMASK_FIR_MASK_LEN = 20 ; - -static const uint8_t EXPLR_MCBIST_MCBISTFIRQ_INVALID_MAINT_ADDRESS = 0 ; -static const uint8_t EXPLR_MCBIST_MCBISTFIRQ_COMMAND_ADDRESS_TIMEOUT = 1 ; -static const uint8_t EXPLR_MCBIST_MCBISTFIRQ_INTERNAL_FSM_ERROR = 2 ; -static const uint8_t EXPLR_MCBIST_MCBISTFIRQ_CCS_ARRAY_UNCORRECT_CE_OR_UE = 3 ; -static const uint8_t EXPLR_MCBIST_MCBISTFIRQ_MCBIST_DATA_ERROR = 4 ; -static const uint8_t EXPLR_MCBIST_MCBISTFIRQ_HARD_NCE_ETE_ATTN = 5 ; -static const uint8_t EXPLR_MCBIST_MCBISTFIRQ_SOFT_NCE_ETE_ATTN = 6 ; -static const uint8_t EXPLR_MCBIST_MCBISTFIRQ_INT_NCE_ETE_ATTN = 7 ; -static const uint8_t EXPLR_MCBIST_MCBISTFIRQ_RCE_ETE_ATTN = 8 ; -static const uint8_t EXPLR_MCBIST_MCBISTFIRQ_ICE_ETE_ATTN = 9 ; -static const uint8_t EXPLR_MCBIST_MCBISTFIRQ_MCBIST_PROGRAM_COMPLETE = 10 ; -static const uint8_t EXPLR_MCBIST_MCBISTFIRQ_MCBIST_CCS_SUBTEST_DONE = 11 ; -static const uint8_t EXPLR_MCBIST_MCBISTFIRQ_WAT_DEBUG_ATTN = 12 ; -static const uint8_t EXPLR_MCBIST_MCBISTFIRQ_SCOM_RECOVERABLE_REG_PE = 13 ; -static const uint8_t EXPLR_MCBIST_MCBISTFIRQ_SCOM_FATAL_REG_PE = 14 ; -static const uint8_t EXPLR_MCBIST_MCBISTFIRQ_WAT_DEBUG_REG_PE = 15 ; -static const uint8_t EXPLR_MCBIST_MCBISTFIRQ_RESERVED_16 = 16 ; -static const uint8_t EXPLR_MCBIST_MCBISTFIRQ_RESERVED_17 = 17 ; -static const uint8_t EXPLR_MCBIST_MCBISTFIRQ_INTERNAL_SCOM_ERROR = 18 ; -static const uint8_t EXPLR_MCBIST_MCBISTFIRQ_INTERNAL_SCOM_ERROR_CLONE = 19 ; - -static const uint8_t EXPLR_MCBIST_MCBISTFIRWOF_FIR_WOF = 0 ; -static const uint8_t EXPLR_MCBIST_MCBISTFIRWOF_FIR_WOF_LEN = 20 ; - -static const uint8_t EXPLR_MCBIST_MCBLFSRA0Q_CFG_LFSR_MASK_A0 = 0 ; -static const uint8_t EXPLR_MCBIST_MCBLFSRA0Q_CFG_LFSR_MASK_A0_LEN = 38 ; -static const uint8_t EXPLR_MCBIST_MCBLFSRA0Q_RESERVED_38_63 = 38 ; -static const uint8_t EXPLR_MCBIST_MCBLFSRA0Q_RESERVED_38_63_LEN = 26 ; - -static const uint8_t EXPLR_MCBIST_MCBMCATQ_CFG_CURRENT_ADDR_TRAP = 0 ; -static const uint8_t EXPLR_MCBIST_MCBMCATQ_CFG_CURRENT_ADDR_TRAP_LEN = 38 ; -static const uint8_t EXPLR_MCBIST_MCBMCATQ_CFG_CURRENT_PORT_TRAP = 38 ; -static const uint8_t EXPLR_MCBIST_MCBMCATQ_CFG_CURRENT_PORT_TRAP_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_MCBMCATQ_CFG_CURRENT_DIMM_TRAP = 40 ; - -static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST00_OP_TYPE = 0 ; -static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST00_OP_TYPE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST00_COMPL_1ST_CMD = 4 ; -static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST00_COMPL_2ND_CMD = 5 ; -static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST00_COMPL_3RD_CMD = 6 ; -static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST00_ADDR_REV_MODE = 7 ; -static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST00_ADDR_RAND_MODE = 8 ; -static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST00_DATA_MODE = 9 ; -static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST00_DATA_MODE_LEN = 3 ; -static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST00_ECC_MODE = 12 ; -static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST00_DONE = 13 ; -static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST00_ADDR_SEL = 14 ; -static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST00_ADDR_SEL_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST01_OP_TYPE = 16 ; -static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST01_OP_TYPE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST01_COMPL_1ST_CMD = 20 ; -static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST01_COMPL_2ND_CMD = 21 ; -static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST01_COMPL_3RD_CMD = 22 ; -static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST01_ADDR_REV_MODE = 23 ; -static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST01_ADDR_RAND_MODE = 24 ; -static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST01_DATA_MODE = 25 ; -static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST01_DATA_MODE_LEN = 3 ; -static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST01_ECC_MODE = 28 ; -static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST01_DONE = 29 ; -static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST01_ADDR_SEL = 30 ; -static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST01_ADDR_SEL_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST02_OP_TYPE = 32 ; -static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST02_OP_TYPE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST02_COMPL_1ST_CMD = 36 ; -static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST02_COMPL_2ND_CMD = 37 ; -static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST02_COMPL_3RD_CMD = 38 ; -static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST02_ADDR_REV_MODE = 39 ; -static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST02_ADDR_RAND_MODE = 40 ; -static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST02_DATA_MODE = 41 ; -static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST02_DATA_MODE_LEN = 3 ; -static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST02_ECC_MODE = 44 ; -static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST02_DONE = 45 ; -static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST02_ADDR_SEL = 46 ; -static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST02_ADDR_SEL_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST03_OP_TYPE = 48 ; -static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST03_OP_TYPE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST03_COMPL_1ST_CMD = 52 ; -static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST03_COMPL_2ND_CMD = 53 ; -static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST03_COMPL_3RD_CMD = 54 ; -static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST03_ADDR_REV_MODE = 55 ; -static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST03_ADDR_RAND_MODE = 56 ; -static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST03_DATA_MODE = 57 ; -static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST03_DATA_MODE_LEN = 3 ; -static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST03_ECC_MODE = 60 ; -static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST03_DONE = 61 ; -static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST03_ADDR_SEL = 62 ; -static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST03_ADDR_SEL_LEN = 2 ; - -static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST04_OP_TYPE = 0 ; -static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST04_OP_TYPE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST04_COMPL_1ST_CMD = 4 ; -static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST04_COMPL_2ND_CMD = 5 ; -static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST04_COMPL_3RD_CMD = 6 ; -static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST04_ADDR_REV_MODE = 7 ; -static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST04_ADDR_RAND_MODE = 8 ; -static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST04_DATA_MODE = 9 ; -static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST04_DATA_MODE_LEN = 3 ; -static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST04_ECC_MODE = 12 ; -static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST04_DONE = 13 ; -static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST04_ADDR_SEL = 14 ; -static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST04_ADDR_SEL_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST05_OP_TYPE = 16 ; -static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST05_OP_TYPE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST05_COMPL_1ST_CMD = 20 ; -static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST05_COMPL_2ND_CMD = 21 ; -static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST05_COMPL_3RD_CMD = 22 ; -static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST05_ADDR_REV_MODE = 23 ; -static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST05_ADDR_RAND_MODE = 24 ; -static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST05_DATA_MODE = 25 ; -static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST05_DATA_MODE_LEN = 3 ; -static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST05_ECC_MODE = 28 ; -static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST05_DONE = 29 ; -static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST05_ADDR_SEL = 30 ; -static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST05_ADDR_SEL_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST06_OP_TYPE = 32 ; -static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST06_OP_TYPE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST06_COMPL_1ST_CMD = 36 ; -static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST06_COMPL_2ND_CMD = 37 ; -static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST06_COMPL_3RD_CMD = 38 ; -static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST06_ADDR_REV_MODE = 39 ; -static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST06_ADDR_RAND_MODE = 40 ; -static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST06_DATA_MODE = 41 ; -static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST06_DATA_MODE_LEN = 3 ; -static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST06_ECC_MODE = 44 ; -static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST06_DONE = 45 ; -static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST06_ADDR_SEL = 46 ; -static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST06_ADDR_SEL_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST07_OP_TYPE = 48 ; -static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST07_OP_TYPE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST07_COMPL_1ST_CMD = 52 ; -static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST07_COMPL_2ND_CMD = 53 ; -static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST07_COMPL_3RD_CMD = 54 ; -static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST07_ADDR_REV_MODE = 55 ; -static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST07_ADDR_RAND_MODE = 56 ; -static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST07_DATA_MODE = 57 ; -static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST07_DATA_MODE_LEN = 3 ; -static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST07_ECC_MODE = 60 ; -static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST07_DONE = 61 ; -static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST07_ADDR_SEL = 62 ; -static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST07_ADDR_SEL_LEN = 2 ; - -static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST08_OP_TYPE = 0 ; -static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST08_OP_TYPE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST08_COMPL_1ST_CMD = 4 ; -static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST08_COMPL_2ND_CMD = 5 ; -static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST08_COMPL_3RD_CMD = 6 ; -static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST08_ADDR_REV_MODE = 7 ; -static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST08_ADDR_RAND_MODE = 8 ; -static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST08_DATA_MODE = 9 ; -static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST08_DATA_MODE_LEN = 3 ; -static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST08_ECC_MODE = 12 ; -static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST08_DONE = 13 ; -static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST08_ADDR_SEL = 14 ; -static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST08_ADDR_SEL_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST09_OP_TYPE = 16 ; -static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST09_OP_TYPE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST09_COMPL_1ST_CMD = 20 ; -static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST09_COMPL_2ND_CMD = 21 ; -static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST09_COMPL_3RD_CMD = 22 ; -static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST09_ADDR_REV_MODE = 23 ; -static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST09_ADDR_RAND_MODE = 24 ; -static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST09_DATA_MODE = 25 ; -static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST09_DATA_MODE_LEN = 3 ; -static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST09_ECC_MODE = 28 ; -static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST09_DONE = 29 ; -static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST09_ADDR_SEL = 30 ; -static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST09_ADDR_SEL_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST10_OP_TYPE = 32 ; -static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST10_OP_TYPE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST10_COMPL_1ST_CMD = 36 ; -static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST10_COMPL_2ND_CMD = 37 ; -static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST10_COMPL_3RD_CMD = 38 ; -static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST10_ADDR_REV_MODE = 39 ; -static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST10_ADDR_RAND_MODE = 40 ; -static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST10_DATA_MODE = 41 ; -static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST10_DATA_MODE_LEN = 3 ; -static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST10_ECC_MODE = 44 ; -static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST10_DONE = 45 ; -static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST10_ADDR_SEL = 46 ; -static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST10_ADDR_SEL_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST11_OP_TYPE = 48 ; -static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST11_OP_TYPE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST11_COMPL_1ST_CMD = 52 ; -static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST11_COMPL_2ND_CMD = 53 ; -static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST11_COMPL_3RD_CMD = 54 ; -static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST11_ADDR_REV_MODE = 55 ; -static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST11_ADDR_RAND_MODE = 56 ; -static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST11_DATA_MODE = 57 ; -static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST11_DATA_MODE_LEN = 3 ; -static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST11_ECC_MODE = 60 ; -static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST11_DONE = 61 ; -static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST11_ADDR_SEL = 62 ; -static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST11_ADDR_SEL_LEN = 2 ; - -static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST12_OP_TYPE = 0 ; -static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST12_OP_TYPE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST12_COMPL_1ST_CMD = 4 ; -static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST12_COMPL_2ND_CMD = 5 ; -static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST12_COMPL_3RD_CMD = 6 ; -static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST12_ADDR_REV_MODE = 7 ; -static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST12_ADDR_RAND_MODE = 8 ; -static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST12_DATA_MODE = 9 ; -static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST12_DATA_MODE_LEN = 3 ; -static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST12_ECC_MODE = 12 ; -static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST12_DONE = 13 ; -static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST12_ADDR_SEL = 14 ; -static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST12_ADDR_SEL_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST13_OP_TYPE = 16 ; -static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST13_OP_TYPE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST13_COMPL_1ST_CMD = 20 ; -static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST13_COMPL_2ND_CMD = 21 ; -static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST13_COMPL_3RD_CMD = 22 ; -static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST13_ADDR_REV_MODE = 23 ; -static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST13_ADDR_RAND_MODE = 24 ; -static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST13_DATA_MODE = 25 ; -static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST13_DATA_MODE_LEN = 3 ; -static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST13_ECC_MODE = 28 ; -static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST13_DONE = 29 ; -static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST13_ADDR_SEL = 30 ; -static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST13_ADDR_SEL_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST14_OP_TYPE = 32 ; -static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST14_OP_TYPE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST14_COMPL_1ST_CMD = 36 ; -static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST14_COMPL_2ND_CMD = 37 ; -static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST14_COMPL_3RD_CMD = 38 ; -static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST14_ADDR_REV_MODE = 39 ; -static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST14_ADDR_RAND_MODE = 40 ; -static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST14_DATA_MODE = 41 ; -static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST14_DATA_MODE_LEN = 3 ; -static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST14_ECC_MODE = 44 ; -static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST14_DONE = 45 ; -static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST14_ADDR_SEL = 46 ; -static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST14_ADDR_SEL_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST15_OP_TYPE = 48 ; -static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST15_OP_TYPE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST15_COMPL_1ST_CMD = 52 ; -static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST15_COMPL_2ND_CMD = 53 ; -static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST15_COMPL_3RD_CMD = 54 ; -static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST15_ADDR_REV_MODE = 55 ; -static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST15_ADDR_RAND_MODE = 56 ; -static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST15_DATA_MODE = 57 ; -static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST15_DATA_MODE_LEN = 3 ; -static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST15_ECC_MODE = 60 ; -static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST15_DONE = 61 ; -static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST15_ADDR_SEL = 62 ; -static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST15_ADDR_SEL_LEN = 2 ; - -static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST16_OP_TYPE = 0 ; -static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST16_OP_TYPE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST16_COMPL_1ST_CMD = 4 ; -static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST16_COMPL_2ND_CMD = 5 ; -static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST16_COMPL_3RD_CMD = 6 ; -static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST16_ADDR_REV_MODE = 7 ; -static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST16_ADDR_RAND_MODE = 8 ; -static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST16_DATA_MODE = 9 ; -static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST16_DATA_MODE_LEN = 3 ; -static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST16_ECC_MODE = 12 ; -static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST16_DONE = 13 ; -static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST16_ADDR_SEL = 14 ; -static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST16_ADDR_SEL_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST17_OP_TYPE = 16 ; -static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST17_OP_TYPE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST17_COMPL_1ST_CMD = 20 ; -static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST17_COMPL_2ND_CMD = 21 ; -static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST17_COMPL_3RD_CMD = 22 ; -static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST17_ADDR_REV_MODE = 23 ; -static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST17_ADDR_RAND_MODE = 24 ; -static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST17_DATA_MODE = 25 ; -static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST17_DATA_MODE_LEN = 3 ; -static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST17_ECC_MODE = 28 ; -static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST17_DONE = 29 ; -static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST17_ADDR_SEL = 30 ; -static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST17_ADDR_SEL_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST18_OP_TYPE = 32 ; -static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST18_OP_TYPE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST18_COMPL_1ST_CMD = 36 ; -static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST18_COMPL_2ND_CMD = 37 ; -static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST18_COMPL_3RD_CMD = 38 ; -static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST18_ADDR_REV_MODE = 39 ; -static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST18_ADDR_RAND_MODE = 40 ; -static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST18_DATA_MODE = 41 ; -static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST18_DATA_MODE_LEN = 3 ; -static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST18_ECC_MODE = 44 ; -static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST18_DONE = 45 ; -static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST18_ADDR_SEL = 46 ; -static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST18_ADDR_SEL_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST19_OP_TYPE = 48 ; -static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST19_OP_TYPE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST19_COMPL_1ST_CMD = 52 ; -static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST19_COMPL_2ND_CMD = 53 ; -static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST19_COMPL_3RD_CMD = 54 ; -static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST19_ADDR_REV_MODE = 55 ; -static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST19_ADDR_RAND_MODE = 56 ; -static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST19_DATA_MODE = 57 ; -static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST19_DATA_MODE_LEN = 3 ; -static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST19_ECC_MODE = 60 ; -static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST19_DONE = 61 ; -static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST19_ADDR_SEL = 62 ; -static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST19_ADDR_SEL_LEN = 2 ; - -static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST20_OP_TYPE = 0 ; -static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST20_OP_TYPE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST20_COMPL_1ST_CMD = 4 ; -static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST20_COMPL_2ND_CMD = 5 ; -static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST20_COMPL_3RD_CMD = 6 ; -static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST20_ADDR_REV_MODE = 7 ; -static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST20_ADDR_RAND_MODE = 8 ; -static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST20_DATA_MODE = 9 ; -static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST20_DATA_MODE_LEN = 3 ; -static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST20_ECC_MODE = 12 ; -static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST20_DONE = 13 ; -static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST20_ADDR_SEL = 14 ; -static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST20_ADDR_SEL_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST21_OP_TYPE = 16 ; -static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST21_OP_TYPE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST21_COMPL_1ST_CMD = 20 ; -static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST21_COMPL_2ND_CMD = 21 ; -static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST21_COMPL_3RD_CMD = 22 ; -static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST21_ADDR_REV_MODE = 23 ; -static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST21_ADDR_RAND_MODE = 24 ; -static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST21_DATA_MODE = 25 ; -static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST21_DATA_MODE_LEN = 3 ; -static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST21_ECC_MODE = 28 ; -static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST21_DONE = 29 ; -static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST21_ADDR_SEL = 30 ; -static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST21_ADDR_SEL_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST22_OP_TYPE = 32 ; -static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST22_OP_TYPE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST22_COMPL_1ST_CMD = 36 ; -static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST22_COMPL_2ND_CMD = 37 ; -static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST22_COMPL_3RD_CMD = 38 ; -static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST22_ADDR_REV_MODE = 39 ; -static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST22_ADDR_RAND_MODE = 40 ; -static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST22_DATA_MODE = 41 ; -static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST22_DATA_MODE_LEN = 3 ; -static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST22_ECC_MODE = 44 ; -static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST22_DONE = 45 ; -static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST22_ADDR_SEL = 46 ; -static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST22_ADDR_SEL_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST23_OP_TYPE = 48 ; -static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST23_OP_TYPE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST23_COMPL_1ST_CMD = 52 ; -static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST23_COMPL_2ND_CMD = 53 ; -static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST23_COMPL_3RD_CMD = 54 ; -static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST23_ADDR_REV_MODE = 55 ; -static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST23_ADDR_RAND_MODE = 56 ; -static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST23_DATA_MODE = 57 ; -static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST23_DATA_MODE_LEN = 3 ; -static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST23_ECC_MODE = 60 ; -static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST23_DONE = 61 ; -static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST23_ADDR_SEL = 62 ; -static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST23_ADDR_SEL_LEN = 2 ; - -static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST24_OP_TYPE = 0 ; -static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST24_OP_TYPE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST24_COMPL_1ST_CMD = 4 ; -static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST24_COMPL_2ND_CMD = 5 ; -static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST24_COMPL_3RD_CMD = 6 ; -static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST24_ADDR_REV_MODE = 7 ; -static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST24_ADDR_RAND_MODE = 8 ; -static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST24_DATA_MODE = 9 ; -static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST24_DATA_MODE_LEN = 3 ; -static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST24_ECC_MODE = 12 ; -static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST24_DONE = 13 ; -static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST24_ADDR_SEL = 14 ; -static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST24_ADDR_SEL_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST25_OP_TYPE = 16 ; -static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST25_OP_TYPE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST25_COMPL_1ST_CMD = 20 ; -static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST25_COMPL_2ND_CMD = 21 ; -static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST25_COMPL_3RD_CMD = 22 ; -static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST25_ADDR_REV_MODE = 23 ; -static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST25_ADDR_RAND_MODE = 24 ; -static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST25_DATA_MODE = 25 ; -static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST25_DATA_MODE_LEN = 3 ; -static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST25_ECC_MODE = 28 ; -static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST25_DONE = 29 ; -static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST25_ADDR_SEL = 30 ; -static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST25_ADDR_SEL_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST26_OP_TYPE = 32 ; -static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST26_OP_TYPE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST26_COMPL_1ST_CMD = 36 ; -static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST26_COMPL_2ND_CMD = 37 ; -static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST26_COMPL_3RD_CMD = 38 ; -static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST26_ADDR_REV_MODE = 39 ; -static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST26_ADDR_RAND_MODE = 40 ; -static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST26_DATA_MODE = 41 ; -static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST26_DATA_MODE_LEN = 3 ; -static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST26_ECC_MODE = 44 ; -static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST26_DONE = 45 ; -static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST26_ADDR_SEL = 46 ; -static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST26_ADDR_SEL_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST27_OP_TYPE = 48 ; -static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST27_OP_TYPE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST27_COMPL_1ST_CMD = 52 ; -static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST27_COMPL_2ND_CMD = 53 ; -static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST27_COMPL_3RD_CMD = 54 ; -static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST27_ADDR_REV_MODE = 55 ; -static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST27_ADDR_RAND_MODE = 56 ; -static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST27_DATA_MODE = 57 ; -static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST27_DATA_MODE_LEN = 3 ; -static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST27_ECC_MODE = 60 ; -static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST27_DONE = 61 ; -static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST27_ADDR_SEL = 62 ; -static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST27_ADDR_SEL_LEN = 2 ; - -static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST28_OP_TYPE = 0 ; -static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST28_OP_TYPE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST28_COMPL_1ST_CMD = 4 ; -static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST28_COMPL_2ND_CMD = 5 ; -static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST28_COMPL_3RD_CMD = 6 ; -static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST28_ADDR_REV_MODE = 7 ; -static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST28_ADDR_RAND_MODE = 8 ; -static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST28_DATA_MODE = 9 ; -static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST28_DATA_MODE_LEN = 3 ; -static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST28_ECC_MODE = 12 ; -static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST28_DONE = 13 ; -static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST28_ADDR_SEL = 14 ; -static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST28_ADDR_SEL_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST29_OP_TYPE = 16 ; -static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST29_OP_TYPE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST29_COMPL_1ST_CMD = 20 ; -static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST29_COMPL_2ND_CMD = 21 ; -static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST29_COMPL_3RD_CMD = 22 ; -static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST29_ADDR_REV_MODE = 23 ; -static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST29_ADDR_RAND_MODE = 24 ; -static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST29_DATA_MODE = 25 ; -static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST29_DATA_MODE_LEN = 3 ; -static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST29_ECC_MODE = 28 ; -static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST29_DONE = 29 ; -static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST29_ADDR_SEL = 30 ; -static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST29_ADDR_SEL_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST30_OP_TYPE = 32 ; -static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST30_OP_TYPE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST30_COMPL_1ST_CMD = 36 ; -static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST30_COMPL_2ND_CMD = 37 ; -static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST30_COMPL_3RD_CMD = 38 ; -static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST30_ADDR_REV_MODE = 39 ; -static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST30_ADDR_RAND_MODE = 40 ; -static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST30_DATA_MODE = 41 ; -static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST30_DATA_MODE_LEN = 3 ; -static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST30_ECC_MODE = 44 ; -static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST30_DONE = 45 ; -static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST30_ADDR_SEL = 46 ; -static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST30_ADDR_SEL_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST31_OP_TYPE = 48 ; -static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST31_OP_TYPE_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST31_COMPL_1ST_CMD = 52 ; -static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST31_COMPL_2ND_CMD = 53 ; -static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST31_COMPL_3RD_CMD = 54 ; -static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST31_ADDR_REV_MODE = 55 ; -static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST31_ADDR_RAND_MODE = 56 ; -static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST31_DATA_MODE = 57 ; -static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST31_DATA_MODE_LEN = 3 ; -static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST31_ECC_MODE = 60 ; -static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST31_DONE = 61 ; -static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST31_ADDR_SEL = 62 ; -static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST31_ADDR_SEL_LEN = 2 ; - -static const uint8_t EXPLR_MCBIST_MCBPARMQ_CFG_MIN_CMD_GAP = 0 ; -static const uint8_t EXPLR_MCBIST_MCBPARMQ_CFG_MIN_CMD_GAP_LEN = 12 ; -static const uint8_t EXPLR_MCBIST_MCBPARMQ_CFG_MIN_GAP_TIMEBASE = 12 ; -static const uint8_t EXPLR_MCBIST_MCBPARMQ_CFG_MIN_CMD_GAP_BLIND_STEER = 13 ; -static const uint8_t EXPLR_MCBIST_MCBPARMQ_CFG_MIN_CMD_GAP_BLIND_STEER_LEN = 12 ; -static const uint8_t EXPLR_MCBIST_MCBPARMQ_CFG_MIN_GAP_TIMEBASE_BLIND_STEER = 25 ; -static const uint8_t EXPLR_MCBIST_MCBPARMQ_RESERVED_26_49 = 26 ; -static const uint8_t EXPLR_MCBIST_MCBPARMQ_RESERVED_26_49_LEN = 24 ; -static const uint8_t EXPLR_MCBIST_MCBPARMQ_CFG_RANDCMD_WGT = 50 ; -static const uint8_t EXPLR_MCBIST_MCBPARMQ_CFG_RANDCMD_WGT_LEN = 3 ; -static const uint8_t EXPLR_MCBIST_MCBPARMQ_RESERVED_53_59 = 53 ; -static const uint8_t EXPLR_MCBIST_MCBPARMQ_RESERVED_53_59_LEN = 7 ; -static const uint8_t EXPLR_MCBIST_MCBPARMQ_CFG_EN_RANDCMD_GAP = 60 ; -static const uint8_t EXPLR_MCBIST_MCBPARMQ_CFG_RANDGAP_WGT = 61 ; -static const uint8_t EXPLR_MCBIST_MCBPARMQ_CFG_RANDGAP_WGT_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_MCBPARMQ_CFG_BC4_EN = 63 ; - -static const uint8_t EXPLR_MCBIST_MCBRCRQ_RESERVED_0_31 = 0 ; -static const uint8_t EXPLR_MCBIST_MCBRCRQ_RESERVED_0_31_LEN = 32 ; -static const uint8_t EXPLR_MCBIST_MCBRCRQ_CFG_RUNTIME_MCBALL = 32 ; -static const uint8_t EXPLR_MCBIST_MCBRCRQ_CFG_RUNTIME_SUBTEST = 33 ; -static const uint8_t EXPLR_MCBIST_MCBRCRQ_CFG_RUNTIME_SUBTEST_LEN = 5 ; -static const uint8_t EXPLR_MCBIST_MCBRCRQ_CFG_RUNTIME_OVERHEAD = 38 ; -static const uint8_t EXPLR_MCBIST_MCBRCRQ_RESERVED_39 = 39 ; - -static const uint8_t EXPLR_MCBIST_MCBRDS0Q_DGEN_RNDD_SEED0 = 0 ; -static const uint8_t EXPLR_MCBIST_MCBRDS0Q_DGEN_RNDD_SEED0_LEN = 24 ; -static const uint8_t EXPLR_MCBIST_MCBRDS0Q_DGEN_RNDD_SEED1 = 24 ; -static const uint8_t EXPLR_MCBIST_MCBRDS0Q_DGEN_RNDD_SEED1_LEN = 24 ; - -static const uint8_t EXPLR_MCBIST_MCBRDS1Q_DGEN_RNDD_SEED2 = 0 ; -static const uint8_t EXPLR_MCBIST_MCBRDS1Q_DGEN_RNDD_SEED2_LEN = 24 ; -static const uint8_t EXPLR_MCBIST_MCBRDS1Q_DGEN_RNDD_DATA_MAPPING = 24 ; -static const uint8_t EXPLR_MCBIST_MCBRDS1Q_DGEN_RNDD_DATA_MAPPING_LEN = 40 ; - -static const uint8_t EXPLR_MCBIST_MCBSA0Q_CFG_START_ADDR_0 = 0 ; -static const uint8_t EXPLR_MCBIST_MCBSA0Q_CFG_START_ADDR_0_LEN = 38 ; - -static const uint8_t EXPLR_MCBIST_MCBSA1Q_CFG_START_ADDR_1 = 0 ; -static const uint8_t EXPLR_MCBIST_MCBSA1Q_CFG_START_ADDR_1_LEN = 38 ; - -static const uint8_t EXPLR_MCBIST_MCBSA2Q_CFG_START_ADDR_2 = 0 ; -static const uint8_t EXPLR_MCBIST_MCBSA2Q_CFG_START_ADDR_2_LEN = 38 ; - -static const uint8_t EXPLR_MCBIST_MCBSA3Q_CFG_START_ADDR_3 = 0 ; -static const uint8_t EXPLR_MCBIST_MCBSA3Q_CFG_START_ADDR_3_LEN = 38 ; +static const uint8_t EXPLR_MCBIST_MCBCFGQ_RESERVED_62_63 = 62 ; +static const uint8_t EXPLR_MCBIST_MCBCFGQ_RESERVED_62_63_LEN = 2 ; + +static const uint8_t EXPLR_MCBIST_MCBDRCRQ_CFG_DATA_ROT = 0 ; +static const uint8_t EXPLR_MCBIST_MCBDRCRQ_CFG_DATA_ROT_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_MCBDRCRQ_CFG_DATA_ROT_SEED = 4 ; +static const uint8_t EXPLR_MCBIST_MCBDRCRQ_CFG_DATA_ROT_SEED_LEN = 16 ; +static const uint8_t EXPLR_MCBIST_MCBDRCRQ_RESERVED_20 = 20 ; +static const uint8_t EXPLR_MCBIST_MCBDRCRQ_CFG_DATA_SEED_MODE = 21 ; +static const uint8_t EXPLR_MCBIST_MCBDRCRQ_CFG_DATA_SEED_MODE_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_MCBDRCRQ_RESERVED_23_63 = 23 ; +static const uint8_t EXPLR_MCBIST_MCBDRCRQ_RESERVED_23_63_LEN = 41 ; + +static const uint8_t EXPLR_MCBIST_MCBDRSRQ_CFG_DATA_ROT_SEED = 0 ; +static const uint8_t EXPLR_MCBIST_MCBDRSRQ_CFG_DATA_ROT_SEED_LEN = 64 ; + +static const uint8_t EXPLR_MCBIST_MCBEA0Q_CFG_END_ADDR_0 = 0 ; +static const uint8_t EXPLR_MCBIST_MCBEA0Q_CFG_END_ADDR_0_LEN = 38 ; + +static const uint8_t EXPLR_MCBIST_MCBEA1Q_CFG_END_ADDR_1 = 0 ; +static const uint8_t EXPLR_MCBIST_MCBEA1Q_CFG_END_ADDR_1_LEN = 38 ; + +static const uint8_t EXPLR_MCBIST_MCBEA2Q_CFG_END_ADDR_2 = 0 ; +static const uint8_t EXPLR_MCBIST_MCBEA2Q_CFG_END_ADDR_2_LEN = 38 ; + +static const uint8_t EXPLR_MCBIST_MCBEA3Q_CFG_END_ADDR_3 = 0 ; +static const uint8_t EXPLR_MCBIST_MCBEA3Q_CFG_END_ADDR_3_LEN = 38 ; + +static const uint8_t EXPLR_MCBIST_MCBFD0Q_CFG_FIXED_SEED = 0 ; +static const uint8_t EXPLR_MCBIST_MCBFD0Q_CFG_FIXED_SEED_LEN = 64 ; + +static const uint8_t EXPLR_MCBIST_MCBFD1Q_CFG_FIXED_SEED = 0 ; +static const uint8_t EXPLR_MCBIST_MCBFD1Q_CFG_FIXED_SEED_LEN = 64 ; + +static const uint8_t EXPLR_MCBIST_MCBFD2Q_CFG_FIXED_SEED = 0 ; +static const uint8_t EXPLR_MCBIST_MCBFD2Q_CFG_FIXED_SEED_LEN = 64 ; + +static const uint8_t EXPLR_MCBIST_MCBFD3Q_CFG_FIXED_SEED = 0 ; +static const uint8_t EXPLR_MCBIST_MCBFD3Q_CFG_FIXED_SEED_LEN = 64 ; + +static const uint8_t EXPLR_MCBIST_MCBFD4Q_CFG_FIXED_SEED = 0 ; +static const uint8_t EXPLR_MCBIST_MCBFD4Q_CFG_FIXED_SEED_LEN = 64 ; + +static const uint8_t EXPLR_MCBIST_MCBFD5Q_CFG_FIXED_SEED = 0 ; +static const uint8_t EXPLR_MCBIST_MCBFD5Q_CFG_FIXED_SEED_LEN = 64 ; + +static const uint8_t EXPLR_MCBIST_MCBFD6Q_CFG_FIXED_SEED = 0 ; +static const uint8_t EXPLR_MCBIST_MCBFD6Q_CFG_FIXED_SEED_LEN = 64 ; + +static const uint8_t EXPLR_MCBIST_MCBFD7Q_CFG_FIXED_SEED = 0 ; +static const uint8_t EXPLR_MCBIST_MCBFD7Q_CFG_FIXED_SEED_LEN = 64 ; + +static const uint8_t EXPLR_MCBIST_MCBFDQ_CFG_FIXED_SEED1 = 0 ; +static const uint8_t EXPLR_MCBIST_MCBFDQ_CFG_FIXED_SEED1_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_MCBFDQ_CFG_FIXED_SEED2 = 8 ; +static const uint8_t EXPLR_MCBIST_MCBFDQ_CFG_FIXED_SEED2_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_MCBFDQ_CFG_FIXED_SEED3 = 16 ; +static const uint8_t EXPLR_MCBIST_MCBFDQ_CFG_FIXED_SEED3_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_MCBFDQ_CFG_FIXED_SEED4 = 24 ; +static const uint8_t EXPLR_MCBIST_MCBFDQ_CFG_FIXED_SEED4_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_MCBFDQ_CFG_FIXED_SEED5 = 32 ; +static const uint8_t EXPLR_MCBIST_MCBFDQ_CFG_FIXED_SEED5_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_MCBFDQ_CFG_FIXED_SEED6 = 40 ; +static const uint8_t EXPLR_MCBIST_MCBFDQ_CFG_FIXED_SEED6_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_MCBFDQ_CFG_FIXED_SEED7 = 48 ; +static const uint8_t EXPLR_MCBIST_MCBFDQ_CFG_FIXED_SEED7_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_MCBFDQ_CFG_FIXED_SEED8 = 56 ; +static const uint8_t EXPLR_MCBIST_MCBFDQ_CFG_FIXED_SEED8_LEN = 8 ; + +static const uint8_t EXPLR_MCBIST_MCBFDSPQ_CFG_FIXED_SEED1 = 0 ; +static const uint8_t EXPLR_MCBIST_MCBFDSPQ_CFG_FIXED_SEED1_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_MCBFDSPQ_CFG_FIXED_SEED2 = 8 ; +static const uint8_t EXPLR_MCBIST_MCBFDSPQ_CFG_FIXED_SEED2_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_MCBFDSPQ_CFG_FIXED_SEED3 = 16 ; +static const uint8_t EXPLR_MCBIST_MCBFDSPQ_CFG_FIXED_SEED3_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_MCBFDSPQ_CFG_FIXED_SEED4 = 24 ; +static const uint8_t EXPLR_MCBIST_MCBFDSPQ_CFG_FIXED_SEED4_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_MCBFDSPQ_CFG_FIXED_SEED5 = 32 ; +static const uint8_t EXPLR_MCBIST_MCBFDSPQ_CFG_FIXED_SEED5_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_MCBFDSPQ_CFG_FIXED_SEED6 = 40 ; +static const uint8_t EXPLR_MCBIST_MCBFDSPQ_CFG_FIXED_SEED6_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_MCBFDSPQ_CFG_FIXED_SEED7 = 48 ; +static const uint8_t EXPLR_MCBIST_MCBFDSPQ_CFG_FIXED_SEED7_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_MCBFDSPQ_CFG_FIXED_SEED8 = 56 ; +static const uint8_t EXPLR_MCBIST_MCBFDSPQ_CFG_FIXED_SEED8_LEN = 8 ; + +static const uint8_t EXPLR_MCBIST_MCBISTFIRACT0_FIR_ACTION0 = 0 ; +static const uint8_t EXPLR_MCBIST_MCBISTFIRACT0_FIR_ACTION0_LEN = 20 ; + +static const uint8_t EXPLR_MCBIST_MCBISTFIRACT1_FIR_ACTION1 = 0 ; +static const uint8_t EXPLR_MCBIST_MCBISTFIRACT1_FIR_ACTION1_LEN = 20 ; + +static const uint8_t EXPLR_MCBIST_MCBISTFIRMASK_FIR_MASK = 0 ; +static const uint8_t EXPLR_MCBIST_MCBISTFIRMASK_FIR_MASK_LEN = 20 ; + +static const uint8_t EXPLR_MCBIST_MCBISTFIRQ_INVALID_MAINT_ADDRESS = 0 ; +static const uint8_t EXPLR_MCBIST_MCBISTFIRQ_COMMAND_ADDRESS_TIMEOUT = 1 ; +static const uint8_t EXPLR_MCBIST_MCBISTFIRQ_INTERNAL_FSM_ERROR = 2 ; +static const uint8_t EXPLR_MCBIST_MCBISTFIRQ_CCS_ARRAY_UNCORRECT_CE_OR_UE = 3 ; +static const uint8_t EXPLR_MCBIST_MCBISTFIRQ_MCBIST_DATA_ERROR = 4 ; +static const uint8_t EXPLR_MCBIST_MCBISTFIRQ_HARD_NCE_ETE_ATTN = 5 ; +static const uint8_t EXPLR_MCBIST_MCBISTFIRQ_SOFT_NCE_ETE_ATTN = 6 ; +static const uint8_t EXPLR_MCBIST_MCBISTFIRQ_INT_NCE_ETE_ATTN = 7 ; +static const uint8_t EXPLR_MCBIST_MCBISTFIRQ_RCE_ETE_ATTN = 8 ; +static const uint8_t EXPLR_MCBIST_MCBISTFIRQ_ICE_ETE_ATTN = 9 ; +static const uint8_t EXPLR_MCBIST_MCBISTFIRQ_MCBIST_PROGRAM_COMPLETE = 10 ; +static const uint8_t EXPLR_MCBIST_MCBISTFIRQ_MCBIST_CCS_SUBTEST_DONE = 11 ; +static const uint8_t EXPLR_MCBIST_MCBISTFIRQ_WAT_DEBUG_ATTN = 12 ; +static const uint8_t EXPLR_MCBIST_MCBISTFIRQ_SCOM_RECOVERABLE_REG_PE = 13 ; +static const uint8_t EXPLR_MCBIST_MCBISTFIRQ_SCOM_FATAL_REG_PE = 14 ; +static const uint8_t EXPLR_MCBIST_MCBISTFIRQ_WAT_DEBUG_REG_PE = 15 ; +static const uint8_t EXPLR_MCBIST_MCBISTFIRQ_RESERVED_16 = 16 ; +static const uint8_t EXPLR_MCBIST_MCBISTFIRQ_RESERVED_17 = 17 ; +static const uint8_t EXPLR_MCBIST_MCBISTFIRQ_INTERNAL_SCOM_ERROR = 18 ; +static const uint8_t EXPLR_MCBIST_MCBISTFIRQ_INTERNAL_SCOM_ERROR_CLONE = 19 ; + +static const uint8_t EXPLR_MCBIST_MCBISTFIRWOF_FIR_WOF = 0 ; +static const uint8_t EXPLR_MCBIST_MCBISTFIRWOF_FIR_WOF_LEN = 20 ; + +static const uint8_t EXPLR_MCBIST_MCBLFSRA0Q_CFG_LFSR_MASK_A0 = 0 ; +static const uint8_t EXPLR_MCBIST_MCBLFSRA0Q_CFG_LFSR_MASK_A0_LEN = 38 ; +static const uint8_t EXPLR_MCBIST_MCBLFSRA0Q_RESERVED_38_63 = 38 ; +static const uint8_t EXPLR_MCBIST_MCBLFSRA0Q_RESERVED_38_63_LEN = 26 ; + +static const uint8_t EXPLR_MCBIST_MCBMCATQ_CFG_CURRENT_ADDR_TRAP = 0 ; +static const uint8_t EXPLR_MCBIST_MCBMCATQ_CFG_CURRENT_ADDR_TRAP_LEN = 38 ; +static const uint8_t EXPLR_MCBIST_MCBMCATQ_CFG_CURRENT_PORT_TRAP = 38 ; +static const uint8_t EXPLR_MCBIST_MCBMCATQ_CFG_CURRENT_PORT_TRAP_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_MCBMCATQ_CFG_CURRENT_DIMM_TRAP = 40 ; + +static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST00_OP_TYPE = 0 ; +static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST00_OP_TYPE_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST00_COMPL_1ST_CMD = 4 ; +static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST00_COMPL_2ND_CMD = 5 ; +static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST00_COMPL_3RD_CMD = 6 ; +static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST00_ADDR_REV_MODE = 7 ; +static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST00_ADDR_RAND_MODE = 8 ; +static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST00_DATA_MODE = 9 ; +static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST00_DATA_MODE_LEN = 3 ; +static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST00_ECC_MODE = 12 ; +static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST00_DONE = 13 ; +static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST00_ADDR_SEL = 14 ; +static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST00_ADDR_SEL_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST01_OP_TYPE = 16 ; +static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST01_OP_TYPE_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST01_COMPL_1ST_CMD = 20 ; +static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST01_COMPL_2ND_CMD = 21 ; +static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST01_COMPL_3RD_CMD = 22 ; +static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST01_ADDR_REV_MODE = 23 ; +static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST01_ADDR_RAND_MODE = 24 ; +static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST01_DATA_MODE = 25 ; +static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST01_DATA_MODE_LEN = 3 ; +static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST01_ECC_MODE = 28 ; +static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST01_DONE = 29 ; +static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST01_ADDR_SEL = 30 ; +static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST01_ADDR_SEL_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST02_OP_TYPE = 32 ; +static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST02_OP_TYPE_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST02_COMPL_1ST_CMD = 36 ; +static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST02_COMPL_2ND_CMD = 37 ; +static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST02_COMPL_3RD_CMD = 38 ; +static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST02_ADDR_REV_MODE = 39 ; +static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST02_ADDR_RAND_MODE = 40 ; +static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST02_DATA_MODE = 41 ; +static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST02_DATA_MODE_LEN = 3 ; +static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST02_ECC_MODE = 44 ; +static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST02_DONE = 45 ; +static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST02_ADDR_SEL = 46 ; +static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST02_ADDR_SEL_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST03_OP_TYPE = 48 ; +static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST03_OP_TYPE_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST03_COMPL_1ST_CMD = 52 ; +static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST03_COMPL_2ND_CMD = 53 ; +static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST03_COMPL_3RD_CMD = 54 ; +static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST03_ADDR_REV_MODE = 55 ; +static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST03_ADDR_RAND_MODE = 56 ; +static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST03_DATA_MODE = 57 ; +static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST03_DATA_MODE_LEN = 3 ; +static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST03_ECC_MODE = 60 ; +static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST03_DONE = 61 ; +static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST03_ADDR_SEL = 62 ; +static const uint8_t EXPLR_MCBIST_MCBMR0Q_MCBIST_CFG_TEST03_ADDR_SEL_LEN = 2 ; + +static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST04_OP_TYPE = 0 ; +static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST04_OP_TYPE_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST04_COMPL_1ST_CMD = 4 ; +static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST04_COMPL_2ND_CMD = 5 ; +static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST04_COMPL_3RD_CMD = 6 ; +static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST04_ADDR_REV_MODE = 7 ; +static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST04_ADDR_RAND_MODE = 8 ; +static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST04_DATA_MODE = 9 ; +static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST04_DATA_MODE_LEN = 3 ; +static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST04_ECC_MODE = 12 ; +static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST04_DONE = 13 ; +static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST04_ADDR_SEL = 14 ; +static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST04_ADDR_SEL_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST05_OP_TYPE = 16 ; +static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST05_OP_TYPE_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST05_COMPL_1ST_CMD = 20 ; +static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST05_COMPL_2ND_CMD = 21 ; +static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST05_COMPL_3RD_CMD = 22 ; +static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST05_ADDR_REV_MODE = 23 ; +static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST05_ADDR_RAND_MODE = 24 ; +static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST05_DATA_MODE = 25 ; +static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST05_DATA_MODE_LEN = 3 ; +static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST05_ECC_MODE = 28 ; +static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST05_DONE = 29 ; +static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST05_ADDR_SEL = 30 ; +static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST05_ADDR_SEL_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST06_OP_TYPE = 32 ; +static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST06_OP_TYPE_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST06_COMPL_1ST_CMD = 36 ; +static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST06_COMPL_2ND_CMD = 37 ; +static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST06_COMPL_3RD_CMD = 38 ; +static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST06_ADDR_REV_MODE = 39 ; +static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST06_ADDR_RAND_MODE = 40 ; +static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST06_DATA_MODE = 41 ; +static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST06_DATA_MODE_LEN = 3 ; +static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST06_ECC_MODE = 44 ; +static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST06_DONE = 45 ; +static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST06_ADDR_SEL = 46 ; +static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST06_ADDR_SEL_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST07_OP_TYPE = 48 ; +static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST07_OP_TYPE_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST07_COMPL_1ST_CMD = 52 ; +static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST07_COMPL_2ND_CMD = 53 ; +static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST07_COMPL_3RD_CMD = 54 ; +static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST07_ADDR_REV_MODE = 55 ; +static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST07_ADDR_RAND_MODE = 56 ; +static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST07_DATA_MODE = 57 ; +static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST07_DATA_MODE_LEN = 3 ; +static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST07_ECC_MODE = 60 ; +static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST07_DONE = 61 ; +static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST07_ADDR_SEL = 62 ; +static const uint8_t EXPLR_MCBIST_MCBMR1Q_MCBIST_CFG_TEST07_ADDR_SEL_LEN = 2 ; + +static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST08_OP_TYPE = 0 ; +static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST08_OP_TYPE_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST08_COMPL_1ST_CMD = 4 ; +static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST08_COMPL_2ND_CMD = 5 ; +static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST08_COMPL_3RD_CMD = 6 ; +static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST08_ADDR_REV_MODE = 7 ; +static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST08_ADDR_RAND_MODE = 8 ; +static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST08_DATA_MODE = 9 ; +static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST08_DATA_MODE_LEN = 3 ; +static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST08_ECC_MODE = 12 ; +static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST08_DONE = 13 ; +static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST08_ADDR_SEL = 14 ; +static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST08_ADDR_SEL_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST09_OP_TYPE = 16 ; +static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST09_OP_TYPE_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST09_COMPL_1ST_CMD = 20 ; +static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST09_COMPL_2ND_CMD = 21 ; +static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST09_COMPL_3RD_CMD = 22 ; +static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST09_ADDR_REV_MODE = 23 ; +static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST09_ADDR_RAND_MODE = 24 ; +static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST09_DATA_MODE = 25 ; +static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST09_DATA_MODE_LEN = 3 ; +static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST09_ECC_MODE = 28 ; +static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST09_DONE = 29 ; +static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST09_ADDR_SEL = 30 ; +static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST09_ADDR_SEL_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST10_OP_TYPE = 32 ; +static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST10_OP_TYPE_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST10_COMPL_1ST_CMD = 36 ; +static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST10_COMPL_2ND_CMD = 37 ; +static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST10_COMPL_3RD_CMD = 38 ; +static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST10_ADDR_REV_MODE = 39 ; +static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST10_ADDR_RAND_MODE = 40 ; +static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST10_DATA_MODE = 41 ; +static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST10_DATA_MODE_LEN = 3 ; +static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST10_ECC_MODE = 44 ; +static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST10_DONE = 45 ; +static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST10_ADDR_SEL = 46 ; +static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST10_ADDR_SEL_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST11_OP_TYPE = 48 ; +static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST11_OP_TYPE_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST11_COMPL_1ST_CMD = 52 ; +static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST11_COMPL_2ND_CMD = 53 ; +static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST11_COMPL_3RD_CMD = 54 ; +static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST11_ADDR_REV_MODE = 55 ; +static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST11_ADDR_RAND_MODE = 56 ; +static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST11_DATA_MODE = 57 ; +static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST11_DATA_MODE_LEN = 3 ; +static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST11_ECC_MODE = 60 ; +static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST11_DONE = 61 ; +static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST11_ADDR_SEL = 62 ; +static const uint8_t EXPLR_MCBIST_MCBMR2Q_MCBIST_CFG_TEST11_ADDR_SEL_LEN = 2 ; + +static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST12_OP_TYPE = 0 ; +static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST12_OP_TYPE_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST12_COMPL_1ST_CMD = 4 ; +static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST12_COMPL_2ND_CMD = 5 ; +static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST12_COMPL_3RD_CMD = 6 ; +static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST12_ADDR_REV_MODE = 7 ; +static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST12_ADDR_RAND_MODE = 8 ; +static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST12_DATA_MODE = 9 ; +static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST12_DATA_MODE_LEN = 3 ; +static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST12_ECC_MODE = 12 ; +static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST12_DONE = 13 ; +static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST12_ADDR_SEL = 14 ; +static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST12_ADDR_SEL_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST13_OP_TYPE = 16 ; +static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST13_OP_TYPE_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST13_COMPL_1ST_CMD = 20 ; +static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST13_COMPL_2ND_CMD = 21 ; +static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST13_COMPL_3RD_CMD = 22 ; +static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST13_ADDR_REV_MODE = 23 ; +static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST13_ADDR_RAND_MODE = 24 ; +static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST13_DATA_MODE = 25 ; +static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST13_DATA_MODE_LEN = 3 ; +static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST13_ECC_MODE = 28 ; +static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST13_DONE = 29 ; +static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST13_ADDR_SEL = 30 ; +static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST13_ADDR_SEL_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST14_OP_TYPE = 32 ; +static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST14_OP_TYPE_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST14_COMPL_1ST_CMD = 36 ; +static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST14_COMPL_2ND_CMD = 37 ; +static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST14_COMPL_3RD_CMD = 38 ; +static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST14_ADDR_REV_MODE = 39 ; +static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST14_ADDR_RAND_MODE = 40 ; +static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST14_DATA_MODE = 41 ; +static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST14_DATA_MODE_LEN = 3 ; +static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST14_ECC_MODE = 44 ; +static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST14_DONE = 45 ; +static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST14_ADDR_SEL = 46 ; +static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST14_ADDR_SEL_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST15_OP_TYPE = 48 ; +static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST15_OP_TYPE_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST15_COMPL_1ST_CMD = 52 ; +static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST15_COMPL_2ND_CMD = 53 ; +static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST15_COMPL_3RD_CMD = 54 ; +static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST15_ADDR_REV_MODE = 55 ; +static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST15_ADDR_RAND_MODE = 56 ; +static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST15_DATA_MODE = 57 ; +static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST15_DATA_MODE_LEN = 3 ; +static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST15_ECC_MODE = 60 ; +static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST15_DONE = 61 ; +static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST15_ADDR_SEL = 62 ; +static const uint8_t EXPLR_MCBIST_MCBMR3Q_MCBIST_CFG_TEST15_ADDR_SEL_LEN = 2 ; + +static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST16_OP_TYPE = 0 ; +static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST16_OP_TYPE_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST16_COMPL_1ST_CMD = 4 ; +static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST16_COMPL_2ND_CMD = 5 ; +static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST16_COMPL_3RD_CMD = 6 ; +static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST16_ADDR_REV_MODE = 7 ; +static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST16_ADDR_RAND_MODE = 8 ; +static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST16_DATA_MODE = 9 ; +static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST16_DATA_MODE_LEN = 3 ; +static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST16_ECC_MODE = 12 ; +static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST16_DONE = 13 ; +static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST16_ADDR_SEL = 14 ; +static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST16_ADDR_SEL_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST17_OP_TYPE = 16 ; +static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST17_OP_TYPE_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST17_COMPL_1ST_CMD = 20 ; +static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST17_COMPL_2ND_CMD = 21 ; +static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST17_COMPL_3RD_CMD = 22 ; +static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST17_ADDR_REV_MODE = 23 ; +static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST17_ADDR_RAND_MODE = 24 ; +static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST17_DATA_MODE = 25 ; +static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST17_DATA_MODE_LEN = 3 ; +static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST17_ECC_MODE = 28 ; +static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST17_DONE = 29 ; +static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST17_ADDR_SEL = 30 ; +static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST17_ADDR_SEL_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST18_OP_TYPE = 32 ; +static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST18_OP_TYPE_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST18_COMPL_1ST_CMD = 36 ; +static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST18_COMPL_2ND_CMD = 37 ; +static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST18_COMPL_3RD_CMD = 38 ; +static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST18_ADDR_REV_MODE = 39 ; +static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST18_ADDR_RAND_MODE = 40 ; +static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST18_DATA_MODE = 41 ; +static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST18_DATA_MODE_LEN = 3 ; +static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST18_ECC_MODE = 44 ; +static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST18_DONE = 45 ; +static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST18_ADDR_SEL = 46 ; +static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST18_ADDR_SEL_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST19_OP_TYPE = 48 ; +static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST19_OP_TYPE_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST19_COMPL_1ST_CMD = 52 ; +static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST19_COMPL_2ND_CMD = 53 ; +static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST19_COMPL_3RD_CMD = 54 ; +static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST19_ADDR_REV_MODE = 55 ; +static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST19_ADDR_RAND_MODE = 56 ; +static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST19_DATA_MODE = 57 ; +static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST19_DATA_MODE_LEN = 3 ; +static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST19_ECC_MODE = 60 ; +static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST19_DONE = 61 ; +static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST19_ADDR_SEL = 62 ; +static const uint8_t EXPLR_MCBIST_MCBMR4Q_MCBIST_CFG_TEST19_ADDR_SEL_LEN = 2 ; + +static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST20_OP_TYPE = 0 ; +static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST20_OP_TYPE_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST20_COMPL_1ST_CMD = 4 ; +static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST20_COMPL_2ND_CMD = 5 ; +static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST20_COMPL_3RD_CMD = 6 ; +static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST20_ADDR_REV_MODE = 7 ; +static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST20_ADDR_RAND_MODE = 8 ; +static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST20_DATA_MODE = 9 ; +static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST20_DATA_MODE_LEN = 3 ; +static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST20_ECC_MODE = 12 ; +static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST20_DONE = 13 ; +static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST20_ADDR_SEL = 14 ; +static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST20_ADDR_SEL_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST21_OP_TYPE = 16 ; +static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST21_OP_TYPE_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST21_COMPL_1ST_CMD = 20 ; +static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST21_COMPL_2ND_CMD = 21 ; +static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST21_COMPL_3RD_CMD = 22 ; +static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST21_ADDR_REV_MODE = 23 ; +static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST21_ADDR_RAND_MODE = 24 ; +static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST21_DATA_MODE = 25 ; +static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST21_DATA_MODE_LEN = 3 ; +static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST21_ECC_MODE = 28 ; +static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST21_DONE = 29 ; +static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST21_ADDR_SEL = 30 ; +static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST21_ADDR_SEL_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST22_OP_TYPE = 32 ; +static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST22_OP_TYPE_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST22_COMPL_1ST_CMD = 36 ; +static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST22_COMPL_2ND_CMD = 37 ; +static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST22_COMPL_3RD_CMD = 38 ; +static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST22_ADDR_REV_MODE = 39 ; +static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST22_ADDR_RAND_MODE = 40 ; +static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST22_DATA_MODE = 41 ; +static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST22_DATA_MODE_LEN = 3 ; +static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST22_ECC_MODE = 44 ; +static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST22_DONE = 45 ; +static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST22_ADDR_SEL = 46 ; +static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST22_ADDR_SEL_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST23_OP_TYPE = 48 ; +static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST23_OP_TYPE_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST23_COMPL_1ST_CMD = 52 ; +static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST23_COMPL_2ND_CMD = 53 ; +static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST23_COMPL_3RD_CMD = 54 ; +static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST23_ADDR_REV_MODE = 55 ; +static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST23_ADDR_RAND_MODE = 56 ; +static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST23_DATA_MODE = 57 ; +static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST23_DATA_MODE_LEN = 3 ; +static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST23_ECC_MODE = 60 ; +static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST23_DONE = 61 ; +static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST23_ADDR_SEL = 62 ; +static const uint8_t EXPLR_MCBIST_MCBMR5Q_MCBIST_CFG_TEST23_ADDR_SEL_LEN = 2 ; + +static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST24_OP_TYPE = 0 ; +static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST24_OP_TYPE_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST24_COMPL_1ST_CMD = 4 ; +static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST24_COMPL_2ND_CMD = 5 ; +static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST24_COMPL_3RD_CMD = 6 ; +static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST24_ADDR_REV_MODE = 7 ; +static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST24_ADDR_RAND_MODE = 8 ; +static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST24_DATA_MODE = 9 ; +static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST24_DATA_MODE_LEN = 3 ; +static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST24_ECC_MODE = 12 ; +static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST24_DONE = 13 ; +static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST24_ADDR_SEL = 14 ; +static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST24_ADDR_SEL_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST25_OP_TYPE = 16 ; +static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST25_OP_TYPE_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST25_COMPL_1ST_CMD = 20 ; +static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST25_COMPL_2ND_CMD = 21 ; +static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST25_COMPL_3RD_CMD = 22 ; +static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST25_ADDR_REV_MODE = 23 ; +static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST25_ADDR_RAND_MODE = 24 ; +static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST25_DATA_MODE = 25 ; +static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST25_DATA_MODE_LEN = 3 ; +static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST25_ECC_MODE = 28 ; +static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST25_DONE = 29 ; +static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST25_ADDR_SEL = 30 ; +static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST25_ADDR_SEL_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST26_OP_TYPE = 32 ; +static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST26_OP_TYPE_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST26_COMPL_1ST_CMD = 36 ; +static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST26_COMPL_2ND_CMD = 37 ; +static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST26_COMPL_3RD_CMD = 38 ; +static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST26_ADDR_REV_MODE = 39 ; +static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST26_ADDR_RAND_MODE = 40 ; +static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST26_DATA_MODE = 41 ; +static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST26_DATA_MODE_LEN = 3 ; +static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST26_ECC_MODE = 44 ; +static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST26_DONE = 45 ; +static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST26_ADDR_SEL = 46 ; +static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST26_ADDR_SEL_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST27_OP_TYPE = 48 ; +static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST27_OP_TYPE_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST27_COMPL_1ST_CMD = 52 ; +static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST27_COMPL_2ND_CMD = 53 ; +static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST27_COMPL_3RD_CMD = 54 ; +static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST27_ADDR_REV_MODE = 55 ; +static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST27_ADDR_RAND_MODE = 56 ; +static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST27_DATA_MODE = 57 ; +static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST27_DATA_MODE_LEN = 3 ; +static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST27_ECC_MODE = 60 ; +static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST27_DONE = 61 ; +static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST27_ADDR_SEL = 62 ; +static const uint8_t EXPLR_MCBIST_MCBMR6Q_MCBIST_CFG_TEST27_ADDR_SEL_LEN = 2 ; + +static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST28_OP_TYPE = 0 ; +static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST28_OP_TYPE_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST28_COMPL_1ST_CMD = 4 ; +static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST28_COMPL_2ND_CMD = 5 ; +static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST28_COMPL_3RD_CMD = 6 ; +static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST28_ADDR_REV_MODE = 7 ; +static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST28_ADDR_RAND_MODE = 8 ; +static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST28_DATA_MODE = 9 ; +static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST28_DATA_MODE_LEN = 3 ; +static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST28_ECC_MODE = 12 ; +static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST28_DONE = 13 ; +static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST28_ADDR_SEL = 14 ; +static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST28_ADDR_SEL_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST29_OP_TYPE = 16 ; +static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST29_OP_TYPE_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST29_COMPL_1ST_CMD = 20 ; +static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST29_COMPL_2ND_CMD = 21 ; +static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST29_COMPL_3RD_CMD = 22 ; +static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST29_ADDR_REV_MODE = 23 ; +static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST29_ADDR_RAND_MODE = 24 ; +static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST29_DATA_MODE = 25 ; +static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST29_DATA_MODE_LEN = 3 ; +static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST29_ECC_MODE = 28 ; +static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST29_DONE = 29 ; +static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST29_ADDR_SEL = 30 ; +static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST29_ADDR_SEL_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST30_OP_TYPE = 32 ; +static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST30_OP_TYPE_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST30_COMPL_1ST_CMD = 36 ; +static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST30_COMPL_2ND_CMD = 37 ; +static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST30_COMPL_3RD_CMD = 38 ; +static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST30_ADDR_REV_MODE = 39 ; +static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST30_ADDR_RAND_MODE = 40 ; +static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST30_DATA_MODE = 41 ; +static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST30_DATA_MODE_LEN = 3 ; +static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST30_ECC_MODE = 44 ; +static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST30_DONE = 45 ; +static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST30_ADDR_SEL = 46 ; +static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST30_ADDR_SEL_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST31_OP_TYPE = 48 ; +static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST31_OP_TYPE_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST31_COMPL_1ST_CMD = 52 ; +static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST31_COMPL_2ND_CMD = 53 ; +static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST31_COMPL_3RD_CMD = 54 ; +static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST31_ADDR_REV_MODE = 55 ; +static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST31_ADDR_RAND_MODE = 56 ; +static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST31_DATA_MODE = 57 ; +static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST31_DATA_MODE_LEN = 3 ; +static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST31_ECC_MODE = 60 ; +static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST31_DONE = 61 ; +static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST31_ADDR_SEL = 62 ; +static const uint8_t EXPLR_MCBIST_MCBMR7Q_MCBIST_CFG_TEST31_ADDR_SEL_LEN = 2 ; + +static const uint8_t EXPLR_MCBIST_MCBPARMQ_CFG_MIN_CMD_GAP = 0 ; +static const uint8_t EXPLR_MCBIST_MCBPARMQ_CFG_MIN_CMD_GAP_LEN = 12 ; +static const uint8_t EXPLR_MCBIST_MCBPARMQ_CFG_MIN_GAP_TIMEBASE = 12 ; +static const uint8_t EXPLR_MCBIST_MCBPARMQ_CFG_MIN_CMD_GAP_BLIND_STEER = 13 ; +static const uint8_t EXPLR_MCBIST_MCBPARMQ_CFG_MIN_CMD_GAP_BLIND_STEER_LEN = 12 ; +static const uint8_t EXPLR_MCBIST_MCBPARMQ_CFG_MIN_GAP_TIMEBASE_BLIND_STEER = 25 ; +static const uint8_t EXPLR_MCBIST_MCBPARMQ_RESERVED_26_49 = 26 ; +static const uint8_t EXPLR_MCBIST_MCBPARMQ_RESERVED_26_49_LEN = 24 ; +static const uint8_t EXPLR_MCBIST_MCBPARMQ_CFG_RANDCMD_WGT = 50 ; +static const uint8_t EXPLR_MCBIST_MCBPARMQ_CFG_RANDCMD_WGT_LEN = 3 ; +static const uint8_t EXPLR_MCBIST_MCBPARMQ_RESERVED_53_59 = 53 ; +static const uint8_t EXPLR_MCBIST_MCBPARMQ_RESERVED_53_59_LEN = 7 ; +static const uint8_t EXPLR_MCBIST_MCBPARMQ_CFG_EN_RANDCMD_GAP = 60 ; +static const uint8_t EXPLR_MCBIST_MCBPARMQ_CFG_RANDGAP_WGT = 61 ; +static const uint8_t EXPLR_MCBIST_MCBPARMQ_CFG_RANDGAP_WGT_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_MCBPARMQ_CFG_BC4_EN = 63 ; + +static const uint8_t EXPLR_MCBIST_MCBRCRQ_RESERVED_0_31 = 0 ; +static const uint8_t EXPLR_MCBIST_MCBRCRQ_RESERVED_0_31_LEN = 32 ; +static const uint8_t EXPLR_MCBIST_MCBRCRQ_CFG_RUNTIME_MCBALL = 32 ; +static const uint8_t EXPLR_MCBIST_MCBRCRQ_CFG_RUNTIME_SUBTEST = 33 ; +static const uint8_t EXPLR_MCBIST_MCBRCRQ_CFG_RUNTIME_SUBTEST_LEN = 5 ; +static const uint8_t EXPLR_MCBIST_MCBRCRQ_CFG_RUNTIME_OVERHEAD = 38 ; +static const uint8_t EXPLR_MCBIST_MCBRCRQ_RESERVED_39 = 39 ; + +static const uint8_t EXPLR_MCBIST_MCBRDS0Q_DGEN_RNDD_SEED0 = 0 ; +static const uint8_t EXPLR_MCBIST_MCBRDS0Q_DGEN_RNDD_SEED0_LEN = 24 ; +static const uint8_t EXPLR_MCBIST_MCBRDS0Q_DGEN_RNDD_SEED1 = 24 ; +static const uint8_t EXPLR_MCBIST_MCBRDS0Q_DGEN_RNDD_SEED1_LEN = 24 ; + +static const uint8_t EXPLR_MCBIST_MCBRDS1Q_DGEN_RNDD_SEED2 = 0 ; +static const uint8_t EXPLR_MCBIST_MCBRDS1Q_DGEN_RNDD_SEED2_LEN = 24 ; +static const uint8_t EXPLR_MCBIST_MCBRDS1Q_DGEN_RNDD_DATA_MAPPING = 24 ; +static const uint8_t EXPLR_MCBIST_MCBRDS1Q_DGEN_RNDD_DATA_MAPPING_LEN = 40 ; + +static const uint8_t EXPLR_MCBIST_MCBSA0Q_CFG_START_ADDR_0 = 0 ; +static const uint8_t EXPLR_MCBIST_MCBSA0Q_CFG_START_ADDR_0_LEN = 38 ; + +static const uint8_t EXPLR_MCBIST_MCBSA1Q_CFG_START_ADDR_1 = 0 ; +static const uint8_t EXPLR_MCBIST_MCBSA1Q_CFG_START_ADDR_1_LEN = 38 ; + +static const uint8_t EXPLR_MCBIST_MCBSA2Q_CFG_START_ADDR_2 = 0 ; +static const uint8_t EXPLR_MCBIST_MCBSA2Q_CFG_START_ADDR_2_LEN = 38 ; + +static const uint8_t EXPLR_MCBIST_MCBSA3Q_CFG_START_ADDR_3 = 0 ; +static const uint8_t EXPLR_MCBIST_MCBSA3Q_CFG_START_ADDR_3_LEN = 38 ; static const uint8_t EXPLR_MCBIST_MCBSTATQ_MCBIST_LOGGED_ERROR_ON_PORT_INDICATOR = 0 ; -static const uint8_t EXPLR_MCBIST_MCBSTATQ_RESERVED_1_3 = 1 ; -static const uint8_t EXPLR_MCBIST_MCBSTATQ_RESERVED_1_3_LEN = 3 ; -static const uint8_t EXPLR_MCBIST_MCBSTATQ_MCBIST_SUBTEST_NUM_INDICATOR = 4 ; -static const uint8_t EXPLR_MCBIST_MCBSTATQ_MCBIST_SUBTEST_NUM_INDICATOR_LEN = 5 ; -static const uint8_t EXPLR_MCBIST_MCBSTATQ_RESERVED_9_15 = 9 ; -static const uint8_t EXPLR_MCBIST_MCBSTATQ_RESERVED_9_15_LEN = 7 ; - -static const uint8_t EXPLR_MCBIST_MCB_CNTLQ_START = 0 ; -static const uint8_t EXPLR_MCBIST_MCB_CNTLQ_STOP = 1 ; -static const uint8_t EXPLR_MCBIST_MCB_CNTLQ_RESERVED_2_5 = 2 ; -static const uint8_t EXPLR_MCBIST_MCB_CNTLQ_RESERVED_2_5_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_MCB_CNTLQ_RESET_TRAP_CNFG = 6 ; -static const uint8_t EXPLR_MCBIST_MCB_CNTLQ_RESET_ERROR_LOGS = 7 ; -static const uint8_t EXPLR_MCBIST_MCB_CNTLQ_RESUME_FROM_PAUSE = 8 ; - -static const uint8_t EXPLR_MCBIST_MCB_CNTLSTATQ_IP = 0 ; -static const uint8_t EXPLR_MCBIST_MCB_CNTLSTATQ_DONE = 1 ; -static const uint8_t EXPLR_MCBIST_MCB_CNTLSTATQ_FAIL = 2 ; - -static const uint8_t EXPLR_MCBIST_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM = 0 ; -static const uint8_t EXPLR_MCBIST_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD1 = 4 ; -static const uint8_t EXPLR_MCBIST_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD1_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD2 = 8 ; -static const uint8_t EXPLR_MCBIST_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD2_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD3 = 12 ; -static const uint8_t EXPLR_MCBIST_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD3_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD4 = 16 ; -static const uint8_t EXPLR_MCBIST_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD4_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD5 = 20 ; -static const uint8_t EXPLR_MCBIST_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD5_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD6 = 24 ; -static const uint8_t EXPLR_MCBIST_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD6_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD7 = 28 ; -static const uint8_t EXPLR_MCBIST_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD7_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD8 = 32 ; -static const uint8_t EXPLR_MCBIST_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD8_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD9 = 36 ; -static const uint8_t EXPLR_MCBIST_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD9_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD10 = 40 ; -static const uint8_t EXPLR_MCBIST_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD10_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD11 = 44 ; -static const uint8_t EXPLR_MCBIST_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD11_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD12 = 48 ; -static const uint8_t EXPLR_MCBIST_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD12_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD13 = 52 ; -static const uint8_t EXPLR_MCBIST_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD13_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD14 = 56 ; -static const uint8_t EXPLR_MCBIST_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD14_LEN = 4 ; -static const uint8_t EXPLR_MCBIST_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD15 = 60 ; -static const uint8_t EXPLR_MCBIST_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD15_LEN = 4 ; - -static const uint8_t EXPLR_MCBIST_RUNTIMECTRQ_CFG_RUNTIME_CTR = 0 ; -static const uint8_t EXPLR_MCBIST_RUNTIMECTRQ_CFG_RUNTIME_CTR_LEN = 37 ; - -static const uint8_t EXPLR_MCBIST_WATCFG0AQ_CFG_WAT_EVENT_ASEL = 0 ; -static const uint8_t EXPLR_MCBIST_WATCFG0AQ_CFG_WAT_EVENT_ASEL_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_WATCFG0AQ_CFG_WAT_EVENT_BSEL = 8 ; -static const uint8_t EXPLR_MCBIST_WATCFG0AQ_CFG_WAT_EVENT_BSEL_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_WATCFG0AQ_CFG_WAT_EVENT_ABSEL = 16 ; -static const uint8_t EXPLR_MCBIST_WATCFG0AQ_CFG_WAT_EVENT_ABSEL_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_WATCFG0AQ_CFG_WAT_EVENT_ETSEL = 24 ; -static const uint8_t EXPLR_MCBIST_WATCFG0AQ_CFG_WAT_EVENT_ETSEL_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_WATCFG0AQ_CFG_WAT_EVENT_CMSEL = 32 ; -static const uint8_t EXPLR_MCBIST_WATCFG0AQ_CFG_WAT_EVENT_CMSEL_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_WATCFG0AQ_CFG_WAT_EVENT_CYSEL = 40 ; -static const uint8_t EXPLR_MCBIST_WATCFG0AQ_CFG_WAT_EVENT_CYSEL_LEN = 8 ; - -static const uint8_t EXPLR_MCBIST_WATCFG0BQ_CFG_WAT_MSKA = 0 ; -static const uint8_t EXPLR_MCBIST_WATCFG0BQ_CFG_WAT_MSKA_LEN = 44 ; -static const uint8_t EXPLR_MCBIST_WATCFG0BQ_CFG_WAT_ENABLE = 44 ; -static const uint8_t EXPLR_MCBIST_WATCFG0BQ_CFG_INT_ARM_MODE = 45 ; -static const uint8_t EXPLR_MCBIST_WATCFG0BQ_CFG_EXT_ARM_MODE = 46 ; -static const uint8_t EXPLR_MCBIST_WATCFG0BQ_CFG_TIMER_STATE_MODE = 47 ; -static const uint8_t EXPLR_MCBIST_WATCFG0BQ_CFG_SET_LEVEL_ON_PULSE = 48 ; -static const uint8_t EXPLR_MCBIST_WATCFG0BQ_CFG_RESET_LEVEL_ON_PULSE = 49 ; -static const uint8_t EXPLR_MCBIST_WATCFG0BQ_CFG_ENABLE_EXT_RESET_LEVEL = 50 ; -static const uint8_t EXPLR_MCBIST_WATCFG0BQ_CFG_STATE_SET_DOM = 51 ; -static const uint8_t EXPLR_MCBIST_WATCFG0BQ_CFG_STATE_FOLLOW_LEVEL = 52 ; -static const uint8_t EXPLR_MCBIST_WATCFG0BQ_CFG_NOT_PATA_MODE = 53 ; -static const uint8_t EXPLR_MCBIST_WATCFG0BQ_CFG_NOT_PATB_MODE = 54 ; -static const uint8_t EXPLR_MCBIST_WATCFG0BQ_CFG_NOT_PATA_MODE2 = 55 ; -static const uint8_t EXPLR_MCBIST_WATCFG0BQ_CFG_NOT_PATB_MODE2 = 56 ; -static const uint8_t EXPLR_MCBIST_WATCFG0BQ_CFG_SLIDE_TRIG = 57 ; -static const uint8_t EXPLR_MCBIST_WATCFG0BQ_CFG_TRIGB_DELAY_SEL = 58 ; -static const uint8_t EXPLR_MCBIST_WATCFG0BQ_CFG_TRIGB_DELAY_SEL_LEN = 2 ; -static const uint8_t EXPLR_MCBIST_WATCFG0BQ_CFG_FORCE_TEST_MODE = 60 ; - -static const uint8_t EXPLR_MCBIST_WATCFG0CQ_CFG_WAT_MSKB = 0 ; -static const uint8_t EXPLR_MCBIST_WATCFG0CQ_CFG_WAT_MSKB_LEN = 44 ; - -static const uint8_t EXPLR_MCBIST_WATCFG0DQ_CFG_WAT_PATA = 0 ; -static const uint8_t EXPLR_MCBIST_WATCFG0DQ_CFG_WAT_PATA_LEN = 44 ; - -static const uint8_t EXPLR_MCBIST_WATCFG0EQ_CFG_WAT_PATB = 0 ; -static const uint8_t EXPLR_MCBIST_WATCFG0EQ_CFG_WAT_PATB_LEN = 44 ; - -static const uint8_t EXPLR_MCBIST_WATCFG1AQ_CFG_WAT_EVENT_ASEL = 0 ; -static const uint8_t EXPLR_MCBIST_WATCFG1AQ_CFG_WAT_EVENT_ASEL_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_WATCFG1AQ_CFG_WAT_EVENT_BSEL = 8 ; -static const uint8_t EXPLR_MCBIST_WATCFG1AQ_CFG_WAT_EVENT_BSEL_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_WATCFG1AQ_CFG_WAT_EVENT_ABSEL = 16 ; -static const uint8_t EXPLR_MCBIST_WATCFG1AQ_CFG_WAT_EVENT_ABSEL_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_WATCFG1AQ_CFG_WAT_EVENT_ETSEL = 24 ; -static const uint8_t EXPLR_MCBIST_WATCFG1AQ_CFG_WAT_EVENT_ETSEL_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_WATCFG1AQ_CFG_WAT_EVENT_CMSEL = 32 ; -static const uint8_t EXPLR_MCBIST_WATCFG1AQ_CFG_WAT_EVENT_CMSEL_LEN = 8 ; -static const uint8_t EXPLR_MCBIST_WATCFG1AQ_CFG_WAT_EVENT_CYSEL = 40 ; -static const uint8_t EXPLR_MCBIST_WATCFG1AQ_CFG_WAT_EVENT_CYSEL_LEN = 8 ; - -static const uint8_t EXPLR_MCBIST_WATCFG1BQ_CFG_WAT_MSKA = 0 ; -static const uint8_t EXPLR_MCBIST_WATCFG1BQ_CFG_WAT_MSKA_LEN = 44 ; -static const uint8_t EXPLR_MCBIST_WATCFG1BQ_CFG_WAT_CNTL = 44 ; -static const uint8_t EXPLR_MCBIST_WATCFG1BQ_CFG_WAT_CNTL_LEN = 17 ; - -static const uint8_t EXPLR_MCBIST_WATCFG1CQ_CFG_WAT_MSKB = 0 ; -static const uint8_t EXPLR_MCBIST_WATCFG1CQ_CFG_WAT_MSKB_LEN = 44 ; - -static const uint8_t EXPLR_MCBIST_WATCFG1DQ_CFG_WAT_PATA = 0 ; -static const uint8_t EXPLR_MCBIST_WATCFG1DQ_CFG_WAT_PATA_LEN = 44 ; - -static const uint8_t EXPLR_MCBIST_WATCFG1EQ_CFG_WAT_PATB = 0 ; -static const uint8_t EXPLR_MCBIST_WATCFG1EQ_CFG_WAT_PATB_LEN = 44 ; - -static const uint8_t EXPLR_MCBIST_WATCFG2AQ_CFG_WAT_EVENT_SEL = 0 ; -static const uint8_t EXPLR_MCBIST_WATCFG2AQ_CFG_WAT_EVENT_SEL_LEN = 48 ; - -static const uint8_t EXPLR_MCBIST_WATCFG2BQ_CFG_WAT_MSKA = 0 ; -static const uint8_t EXPLR_MCBIST_WATCFG2BQ_CFG_WAT_MSKA_LEN = 44 ; -static const uint8_t EXPLR_MCBIST_WATCFG2BQ_CFG_WAT_CNTL = 44 ; -static const uint8_t EXPLR_MCBIST_WATCFG2BQ_CFG_WAT_CNTL_LEN = 17 ; - -static const uint8_t EXPLR_MCBIST_WATCFG2CQ_CFG_WAT_MSKB = 0 ; -static const uint8_t EXPLR_MCBIST_WATCFG2CQ_CFG_WAT_MSKB_LEN = 44 ; - -static const uint8_t EXPLR_MCBIST_WATCFG2DQ_CFG_WAT_PATA = 0 ; -static const uint8_t EXPLR_MCBIST_WATCFG2DQ_CFG_WAT_PATA_LEN = 44 ; - -static const uint8_t EXPLR_MCBIST_WATCFG2EQ_CFG_WAT_PATB = 0 ; -static const uint8_t EXPLR_MCBIST_WATCFG2EQ_CFG_WAT_PATB_LEN = 44 ; - -static const uint8_t EXPLR_MCBIST_WATCFG3AQ_CFG_WAT_EVENT_SEL = 0 ; -static const uint8_t EXPLR_MCBIST_WATCFG3AQ_CFG_WAT_EVENT_SEL_LEN = 48 ; - -static const uint8_t EXPLR_MCBIST_WATCFG3BQ_CFG_WAT_MSKA = 0 ; -static const uint8_t EXPLR_MCBIST_WATCFG3BQ_CFG_WAT_MSKA_LEN = 44 ; -static const uint8_t EXPLR_MCBIST_WATCFG3BQ_CFG_WAT_CNTL = 44 ; -static const uint8_t EXPLR_MCBIST_WATCFG3BQ_CFG_WAT_CNTL_LEN = 17 ; - -static const uint8_t EXPLR_MCBIST_WATCFG3CQ_CFG_WAT_MSKB = 0 ; -static const uint8_t EXPLR_MCBIST_WATCFG3CQ_CFG_WAT_MSKB_LEN = 44 ; - -static const uint8_t EXPLR_MCBIST_WATCFG3DQ_CFG_WAT_PATA = 0 ; -static const uint8_t EXPLR_MCBIST_WATCFG3DQ_CFG_WAT_PATA_LEN = 44 ; - -static const uint8_t EXPLR_MCBIST_WATCFG3EQ_CFG_WAT_PATB = 0 ; -static const uint8_t EXPLR_MCBIST_WATCFG3EQ_CFG_WAT_PATB_LEN = 44 ; - -static const uint8_t EXPLR_MMIO_MCFGERR_RESP_CODE = 16 ; -static const uint8_t EXPLR_MMIO_MCFGERR_RESP_CODE_LEN = 4 ; -static const uint8_t EXPLR_MMIO_MCFGERR_BDI = 20 ; -static const uint8_t EXPLR_MMIO_MCFGERR_ERROR_TYPE = 21 ; -static const uint8_t EXPLR_MMIO_MCFGERR_ERROR_TYPE_LEN = 3 ; -static const uint8_t EXPLR_MMIO_MCFGERR_DEVICE = 24 ; -static const uint8_t EXPLR_MMIO_MCFGERR_DEVICE_LEN = 5 ; -static const uint8_t EXPLR_MMIO_MCFGERR_FUNCTION = 29 ; -static const uint8_t EXPLR_MMIO_MCFGERR_FUNCTION_LEN = 3 ; -static const uint8_t EXPLR_MMIO_MCFGERR_DEV_FUNC_MISMATCH = 32 ; -static const uint8_t EXPLR_MMIO_MCFGERR_DETECT_BAD_OP = 33 ; -static const uint8_t EXPLR_MMIO_MCFGERR_TBIT_IS_1 = 34 ; -static const uint8_t EXPLR_MMIO_MCFGERR_DATA_IS_BAD = 35 ; -static const uint8_t EXPLR_MMIO_MCFGERR_PL_IS_INVALID = 36 ; -static const uint8_t EXPLR_MMIO_MCFGERR_BAD_OP_OR_ALIGN = 37 ; -static const uint8_t EXPLR_MMIO_MCFGERR_ADDR_NO_IMPLEMENTED = 38 ; -static const uint8_t EXPLR_MMIO_MCFGERR_RDATA_VLD = 39 ; -static const uint8_t EXPLR_MMIO_MCFGERR_TBIT = 40 ; -static const uint8_t EXPLR_MMIO_MCFGERR_PLEN = 41 ; -static const uint8_t EXPLR_MMIO_MCFGERR_PLEN_LEN = 3 ; -static const uint8_t EXPLR_MMIO_MCFGERR_PORTNUM = 44 ; -static const uint8_t EXPLR_MMIO_MCFGERR_PORTNUM_LEN = 2 ; -static const uint8_t EXPLR_MMIO_MCFGERR_DL = 46 ; -static const uint8_t EXPLR_MMIO_MCFGERR_DL_LEN = 2 ; -static const uint8_t EXPLR_MMIO_MCFGERR_CAPPTAG = 48 ; -static const uint8_t EXPLR_MMIO_MCFGERR_CAPPTAG_LEN = 16 ; - -static const uint8_t EXPLR_MMIO_MCFGERRA_ADDR = 0 ; -static const uint8_t EXPLR_MMIO_MCFGERRA_ADDR_LEN = 64 ; - -static const uint8_t EXPLR_MMIO_MCHOLD_FIR_MASK_PAR_ERR = 0 ; -static const uint8_t EXPLR_MMIO_MCHOLD_FIR_ACTION0_PAR_ERR = 1 ; -static const uint8_t EXPLR_MMIO_MCHOLD_FIR_ACTION1_PAR_ERR = 2 ; - -static const uint8_t EXPLR_MMIO_MCMASK_MASK_FIR_MASK_PAR_ERR = 0 ; -static const uint8_t EXPLR_MMIO_MCMASK_MASK_FIR_ACTION0_PAR_ERR = 1 ; -static const uint8_t EXPLR_MMIO_MCMASK_MASK_FIR_ACTION1_PAR_ERR = 2 ; - -static const uint8_t EXPLR_MMIO_MDBELL_MDBELL = 0 ; - -static const uint8_t EXPLR_MMIO_MDBELLC_MDBELL_MDBELL = 0 ; - -static const uint8_t EXPLR_MMIO_MDEBUG0_DBGBUS_64_87 = 0 ; -static const uint8_t EXPLR_MMIO_MDEBUG0_DBGBUS_64_87_LEN = 24 ; -static const uint8_t EXPLR_MMIO_MDEBUG0_SPARE = 24 ; -static const uint8_t EXPLR_MMIO_MDEBUG0_SPARE_LEN = 8 ; -static const uint8_t EXPLR_MMIO_MDEBUG0_DBGSEL7 = 32 ; -static const uint8_t EXPLR_MMIO_MDEBUG0_DBGSEL7_LEN = 4 ; -static const uint8_t EXPLR_MMIO_MDEBUG0_DBGSEL6 = 36 ; -static const uint8_t EXPLR_MMIO_MDEBUG0_DBGSEL6_LEN = 4 ; -static const uint8_t EXPLR_MMIO_MDEBUG0_DBGSEL5 = 40 ; -static const uint8_t EXPLR_MMIO_MDEBUG0_DBGSEL5_LEN = 4 ; -static const uint8_t EXPLR_MMIO_MDEBUG0_DBGSEL4 = 44 ; -static const uint8_t EXPLR_MMIO_MDEBUG0_DBGSEL4_LEN = 4 ; -static const uint8_t EXPLR_MMIO_MDEBUG0_DBGSEL3 = 48 ; -static const uint8_t EXPLR_MMIO_MDEBUG0_DBGSEL3_LEN = 4 ; -static const uint8_t EXPLR_MMIO_MDEBUG0_DBGSEL2 = 52 ; -static const uint8_t EXPLR_MMIO_MDEBUG0_DBGSEL2_LEN = 4 ; -static const uint8_t EXPLR_MMIO_MDEBUG0_DBGSEL1 = 56 ; -static const uint8_t EXPLR_MMIO_MDEBUG0_DBGSEL1_LEN = 4 ; -static const uint8_t EXPLR_MMIO_MDEBUG0_DBGSEL0 = 60 ; -static const uint8_t EXPLR_MMIO_MDEBUG0_DBGSEL0_LEN = 4 ; - -static const uint8_t EXPLR_MMIO_MDEBUG1_DBGBUS_0_63 = 0 ; -static const uint8_t EXPLR_MMIO_MDEBUG1_DBGBUS_0_63_LEN = 64 ; - -static const uint8_t EXPLR_MMIO_MENTERP_MMIO_ENTERPRISE_MODE = 0 ; -static const uint8_t EXPLR_MMIO_MENTERP_HALF_DIMM_MODE = 1 ; -static const uint8_t EXPLR_MMIO_MENTERP_CFG_ENTERPRISE_MODE = 2 ; - -static const uint8_t EXPLR_MMIO_MERRCTL_MODE_BITS = 0 ; -static const uint8_t EXPLR_MMIO_MERRCTL_MODE_BITS_LEN = 44 ; -static const uint8_t EXPLR_MMIO_MERRCTL_MODE_BITS_44_46 = 44 ; -static const uint8_t EXPLR_MMIO_MERRCTL_MODE_BITS_44_46_LEN = 3 ; -static const uint8_t EXPLR_MMIO_MERRCTL_PASID_CHK_DIS = 47 ; -static const uint8_t EXPLR_MMIO_MERRCTL_ACTAG_CHK_DIS = 48 ; -static const uint8_t EXPLR_MMIO_MERRCTL_MSCC_RNGE_CHK_DIS = 49 ; -static const uint8_t EXPLR_MMIO_MERRCTL_MODE_BIT_50 = 50 ; -static const uint8_t EXPLR_MMIO_MERRCTL_HOLD_ACUM = 51 ; -static const uint8_t EXPLR_MMIO_MERRCTL_SNSC_MASTER_ENABLE = 52 ; -static const uint8_t EXPLR_MMIO_MERRCTL_TRAP_CLEAR = 53 ; -static const uint8_t EXPLR_MMIO_MERRCTL_WDATA_P = 54 ; -static const uint8_t EXPLR_MMIO_MERRCTL_RNW = 55 ; -static const uint8_t EXPLR_MMIO_MERRCTL_ADDR = 56 ; -static const uint8_t EXPLR_MMIO_MERRCTL_ADDR_LEN = 8 ; - -static const uint8_t EXPLR_MMIO_MFIR_AFU_DESC_UNIMP = 0 ; -static const uint8_t EXPLR_MMIO_MFIR_MMIO_ERR = 1 ; -static const uint8_t EXPLR_MMIO_MFIR_SCOM_ERR = 2 ; -static const uint8_t EXPLR_MMIO_MFIR_FSM_PERR = 3 ; -static const uint8_t EXPLR_MMIO_MFIR_FIFO_OVERFLOW = 4 ; -static const uint8_t EXPLR_MMIO_MFIR_CTL_REG_PERR = 5 ; -static const uint8_t EXPLR_MMIO_MFIR_INFO_REG_PERR = 6 ; -static const uint8_t EXPLR_MMIO_MFIR_SNSC_BOTH_STARTS_ERR = 7 ; -static const uint8_t EXPLR_MMIO_MFIR_SNSC_MULT_SEQ_PERR = 8 ; -static const uint8_t EXPLR_MMIO_MFIR_SNSC_FSM_PERR = 9 ; -static const uint8_t EXPLR_MMIO_MFIR_SNSC_REG_PERR = 10 ; -static const uint8_t EXPLR_MMIO_MFIR_ACTAG_PASID_CFG_ERR = 11 ; - -static const uint8_t EXPLR_MMIO_MFIRACT0_FIR_ACTION0 = 0 ; -static const uint8_t EXPLR_MMIO_MFIRACT0_FIR_ACTION0_LEN = 12 ; - -static const uint8_t EXPLR_MMIO_MFIRACT1_FIR_ACTION1 = 0 ; -static const uint8_t EXPLR_MMIO_MFIRACT1_FIR_ACTION1_LEN = 12 ; - -static const uint8_t EXPLR_MMIO_MFIRMASK_FIR_MASK = 0 ; -static const uint8_t EXPLR_MMIO_MFIRMASK_FIR_MASK_LEN = 12 ; - -static const uint8_t EXPLR_MMIO_MFIRWOF_FIR_WOF = 0 ; -static const uint8_t EXPLR_MMIO_MFIRWOF_FIR_WOF_LEN = 12 ; - -static const uint8_t EXPLR_MMIO_MHOLD0_O0MBIT_O0DID_PERR = 0 ; -static const uint8_t EXPLR_MMIO_MHOLD0_O0CCD_PERR = 1 ; -static const uint8_t EXPLR_MMIO_MHOLD0_O0BAR0_PERR = 2 ; -static const uint8_t EXPLR_MMIO_MHOLD0_O0BAR1_PERR = 3 ; -static const uint8_t EXPLR_MMIO_MHOLD0_O0BAR2_PERR = 4 ; -static const uint8_t EXPLR_MMIO_MHOLD0_O0SSYSID_PERR = 5 ; -static const uint8_t EXPLR_MMIO_MHOLD0_O0CAPPTR_O0ROMBAR_PERR = 6 ; -static const uint8_t EXPLR_MMIO_MHOLD0_OVPD_PERR = 7 ; -static const uint8_t EXPLR_MMIO_MHOLD0_ODSNLO_ODSNCAP_PERR = 8 ; -static const uint8_t EXPLR_MMIO_MHOLD0_ODSNHI_PERR = 9 ; -static const uint8_t EXPLR_MMIO_MHOLD0_OTLVID_OTLCAP_PERR = 10 ; -static const uint8_t EXPLR_MMIO_MHOLD0_OVERCAP_OTLID_PERR = 11 ; -static const uint8_t EXPLR_MMIO_MHOLD0_OVERCFG_PERR = 12 ; -static const uint8_t EXPLR_MMIO_MHOLD0_ORTCAP_PERR = 13 ; -static const uint8_t EXPLR_MMIO_MHOLD0_OTTCFG_PERR = 14 ; -static const uint8_t EXPLR_MMIO_MHOLD0_ORRCAP10_PERR = 15 ; -static const uint8_t EXPLR_MMIO_MHOLD0_ORRCAP32_PERR = 16 ; -static const uint8_t EXPLR_MMIO_MHOLD0_ORRCAP54_PERR = 17 ; -static const uint8_t EXPLR_MMIO_MHOLD0_ORRCAP76_PERR = 18 ; -static const uint8_t EXPLR_MMIO_MHOLD0_OTRCFG10_PERR = 19 ; -static const uint8_t EXPLR_MMIO_MHOLD0_OTRCFG32_PERR = 20 ; -static const uint8_t EXPLR_MMIO_MHOLD0_OTRCFG54_PERR = 21 ; -static const uint8_t EXPLR_MMIO_MHOLD0_OTRCFG76_PERR = 22 ; -static const uint8_t EXPLR_MMIO_MHOLD0_O0FNVID_O0FNCAP_PERR = 23 ; -static const uint8_t EXPLR_MMIO_MHOLD0_O0ACTAG_O0FNID_PERR = 24 ; -static const uint8_t EXPLR_MMIO_MHOLD0_O0VSVID_O0VSCAP_PERR = 25 ; -static const uint8_t EXPLR_MMIO_MHOLD0_O0VSID_PERR = 26 ; -static const uint8_t EXPLR_MMIO_MHOLD0_O1MBIT_O1DID_PERR = 27 ; -static const uint8_t EXPLR_MMIO_MHOLD0_O1CCD_PERR = 28 ; -static const uint8_t EXPLR_MMIO_MHOLD0_O1BAR0_PERR = 29 ; -static const uint8_t EXPLR_MMIO_MHOLD0_O1BAR1_PERR = 30 ; -static const uint8_t EXPLR_MMIO_MHOLD0_O1BAR2_PERR = 31 ; -static const uint8_t EXPLR_MMIO_MHOLD0_O1SSYSID_PERR = 32 ; -static const uint8_t EXPLR_MMIO_MHOLD0_O1CAPPTR_O1ROMBAR_PERR = 33 ; -static const uint8_t EXPLR_MMIO_MHOLD0_OPASID_PERR = 34 ; -static const uint8_t EXPLR_MMIO_MHOLD0_O1FNVID_O1FNCAP_PERR = 35 ; -static const uint8_t EXPLR_MMIO_MHOLD0_O1ACTAG_O1FNID_PERR = 36 ; -static const uint8_t EXPLR_MMIO_MHOLD0_O1INFVID_O1INFCAP_PERR = 37 ; -static const uint8_t EXPLR_MMIO_MHOLD0_O1INFOFF_O1INFID_PERR = 38 ; -static const uint8_t EXPLR_MMIO_MHOLD0_O1INFDAT_PERR = 39 ; -static const uint8_t EXPLR_MMIO_MHOLD0_OCTRLVID_OCTRLCAP_PERR = 40 ; -static const uint8_t EXPLR_MMIO_MHOLD0_OCTRLENB_OCTRLID_PERR = 41 ; -static const uint8_t EXPLR_MMIO_MHOLD0_OCTRLPID_PERR = 42 ; -static const uint8_t EXPLR_MMIO_MHOLD0_OCTRLTAG_PERR = 43 ; -static const uint8_t EXPLR_MMIO_MHOLD0_O1VSVID_O1VSCAP_PERR = 44 ; -static const uint8_t EXPLR_MMIO_MHOLD0_O1VSID_PERR = 45 ; -static const uint8_t EXPLR_MMIO_MHOLD0_AFU_DESC_UNIMP = 46 ; -static const uint8_t EXPLR_MMIO_MHOLD0_MMIO_ERR = 47 ; -static const uint8_t EXPLR_MMIO_MHOLD0_SCOM_ERR = 48 ; -static const uint8_t EXPLR_MMIO_MHOLD0_SCOM_CCMD_FSMPERR = 49 ; -static const uint8_t EXPLR_MMIO_MHOLD0_SCOM_CRESP_FSMPERR = 50 ; -static const uint8_t EXPLR_MMIO_MHOLD0_CTL_MMIO_FSMPERR = 51 ; -static const uint8_t EXPLR_MMIO_MHOLD0_CTL_CCMD_FSMPERR = 52 ; -static const uint8_t EXPLR_MMIO_MHOLD0_CTL_CRESP_FSMPERR = 53 ; -static const uint8_t EXPLR_MMIO_MHOLD0_PIB_FSMPERR = 54 ; -static const uint8_t EXPLR_MMIO_MHOLD0_CMUX_ARBPERR = 55 ; -static const uint8_t EXPLR_MMIO_MHOLD0_CFG_CMDFIFO_OVRFLOW = 56 ; -static const uint8_t EXPLR_MMIO_MHOLD0_CFG_RESPFIFO_OVRFLOW = 57 ; -static const uint8_t EXPLR_MMIO_MHOLD0_CFGP_FIFO_OVRFLOW = 58 ; -static const uint8_t EXPLR_MMIO_MHOLD0_MERRCTL_PERR = 59 ; -static const uint8_t EXPLR_MMIO_MHOLD0_MHOLD1_PERR = 60 ; -static const uint8_t EXPLR_MMIO_MHOLD0_MMASK1_PERR = 61 ; -static const uint8_t EXPLR_MMIO_MHOLD0_MDBELL_PERR = 62 ; -static const uint8_t EXPLR_MMIO_MHOLD0_MSCCRNGE_PERR = 63 ; - -static const uint8_t EXPLR_MMIO_MHOLD1_ONAME0_ODESCTML_PERR = 0 ; -static const uint8_t EXPLR_MMIO_MHOLD1_ONAME21_PERR = 1 ; -static const uint8_t EXPLR_MMIO_MHOLD1_ONAME43_PERR = 2 ; -static const uint8_t EXPLR_MMIO_MHOLD1_OAFUVER_ONAME5_PERR = 3 ; -static const uint8_t EXPLR_MMIO_MHOLD1_OGMMIOOF_PERR = 4 ; -static const uint8_t EXPLR_MMIO_MHOLD1_OGMMIOSZ_PERR = 5 ; -static const uint8_t EXPLR_MMIO_MHOLD1_OPMMIOOOF_PERR = 6 ; -static const uint8_t EXPLR_MMIO_MHOLD1_OPMMIOST_PERR = 7 ; -static const uint8_t EXPLR_MMIO_MHOLD1_OMEMADDR_PERR = 8 ; -static const uint8_t EXPLR_MMIO_MHOLD1_OWWID10_PERR = 9 ; -static const uint8_t EXPLR_MMIO_MHOLD1_OWWID32_PERR = 10 ; -static const uint8_t EXPLR_MMIO_MHOLD1_MHOLD0_PERR = 11 ; -static const uint8_t EXPLR_MMIO_MHOLD1_MMASK0_PERR = 12 ; -static const uint8_t EXPLR_MMIO_MHOLD1_MMIOERR_PERR = 13 ; -static const uint8_t EXPLR_MMIO_MHOLD1_MMIOEWD_PERR = 14 ; -static const uint8_t EXPLR_MMIO_MHOLD1_SCOMEWD_PERR = 15 ; -static const uint8_t EXPLR_MMIO_MHOLD1_MCFGERRA_PERR = 16 ; -static const uint8_t EXPLR_MMIO_MHOLD1_MCFGERRB_PERR = 17 ; -static const uint8_t EXPLR_MMIO_MHOLD1_SNSC_BOTH_STARTS_ERR = 18 ; -static const uint8_t EXPLR_MMIO_MHOLD1_SNSC_MULT_SEQ_PERR = 19 ; -static const uint8_t EXPLR_MMIO_MHOLD1_SNSC_FSM_PERR = 20 ; -static const uint8_t EXPLR_MMIO_MHOLD1_SNSC_OCTHERM_PERR = 21 ; -static const uint8_t EXPLR_MMIO_MHOLD1_SNSC_D0THERM_PERR = 22 ; -static const uint8_t EXPLR_MMIO_MHOLD1_SNSC_D1THERM_PERR = 23 ; -static const uint8_t EXPLR_MMIO_MHOLD1_SNSC_RDWR_PERR = 24 ; -static const uint8_t EXPLR_MMIO_MHOLD1_SNSC_ACTPWRUP_PERR = 25 ; -static const uint8_t EXPLR_MMIO_MHOLD1_SNSC_FRAMESR_PERR = 26 ; -static const uint8_t EXPLR_MMIO_MHOLD1_SNSC_HISTOBASELOW_PERR = 27 ; -static const uint8_t EXPLR_MMIO_MHOLD1_SNSC_HISTOBASEHIGH_PERR = 28 ; -static const uint8_t EXPLR_MMIO_MHOLD1_O0VSTLXA_PERR = 29 ; -static const uint8_t EXPLR_MMIO_MHOLD1_O0VSTLXB_PERR = 30 ; -static const uint8_t EXPLR_MMIO_MHOLD1_O0VSDLXA_PERR = 31 ; -static const uint8_t EXPLR_MMIO_MHOLD1_O0VSDLXB_PERR = 32 ; -static const uint8_t EXPLR_MMIO_MHOLD1_O0VSFLSH_PERR = 33 ; -static const uint8_t EXPLR_MMIO_MHOLD1_BAD_FUNC_ACTAG_LENGTH = 34 ; -static const uint8_t EXPLR_MMIO_MHOLD1_BAD_AFU_ACTAG_LENGTH = 35 ; -static const uint8_t EXPLR_MMIO_MHOLD1_BAD_FUNC_PASID_LENGTH = 36 ; -static const uint8_t EXPLR_MMIO_MHOLD1_BAD_AFU_PASID_LENGTH = 37 ; -static const uint8_t EXPLR_MMIO_MHOLD1_MENTRP_PERR = 38 ; -static const uint8_t EXPLR_MMIO_MHOLD1_OSYSMEML_PERR = 39 ; -static const uint8_t EXPLR_MMIO_MHOLD1_MDEBUG0_PERR = 40 ; -static const uint8_t EXPLR_MMIO_MHOLD1_MDEBUG1_PERR = 41 ; - -static const uint8_t EXPLR_MMIO_MMASK0_MSK = 0 ; -static const uint8_t EXPLR_MMIO_MMASK0_MSK_LEN = 64 ; - -static const uint8_t EXPLR_MMIO_MMASK1_MSK = 0 ; -static const uint8_t EXPLR_MMIO_MMASK1_MSK_LEN = 42 ; - -static const uint8_t EXPLR_MMIO_MMIOERR_WDATA_P = 0 ; -static const uint8_t EXPLR_MMIO_MMIOERR_WDATA_P_LEN = 8 ; -static const uint8_t EXPLR_MMIO_MMIOERR_INFO = 8 ; -static const uint8_t EXPLR_MMIO_MMIOERR_INFO_LEN = 16 ; -static const uint8_t EXPLR_MMIO_MMIOERR_PLEN = 25 ; -static const uint8_t EXPLR_MMIO_MMIOERR_PLEN_LEN = 3 ; -static const uint8_t EXPLR_MMIO_MMIOERR_RNW = 28 ; -static const uint8_t EXPLR_MMIO_MMIOERR_ADDR = 29 ; -static const uint8_t EXPLR_MMIO_MMIOERR_ADDR_LEN = 35 ; - -static const uint8_t EXPLR_MMIO_MMIOEWD_WDATA = 0 ; -static const uint8_t EXPLR_MMIO_MMIOEWD_WDATA_LEN = 64 ; - -static const uint8_t EXPLR_MMIO_MPIBERR0_ERRINFO = 0 ; -static const uint8_t EXPLR_MMIO_MPIBERR0_ERRINFO_LEN = 64 ; - -static const uint8_t EXPLR_MMIO_MPIBERR1_ERRINFO = 0 ; -static const uint8_t EXPLR_MMIO_MPIBERR1_ERRINFO_LEN = 64 ; - -static const uint8_t EXPLR_MMIO_MPIBERR2_ERRINFO = 0 ; -static const uint8_t EXPLR_MMIO_MPIBERR2_ERRINFO_LEN = 64 ; - -static const uint8_t EXPLR_MMIO_MPIBERR3_ERRINFO = 0 ; -static const uint8_t EXPLR_MMIO_MPIBERR3_ERRINFO_LEN = 64 ; - -static const uint8_t EXPLR_MMIO_MSCCRNGE_LOWER = 0 ; -static const uint8_t EXPLR_MMIO_MSCCRNGE_LOWER_LEN = 29 ; -static const uint8_t EXPLR_MMIO_MSCCRNGE_UPPER = 32 ; -static const uint8_t EXPLR_MMIO_MSCCRNGE_UPPER_LEN = 32 ; - -static const uint8_t EXPLR_MMIO_O0ACTAG_O0FNID_ACTAG_BASE = 4 ; -static const uint8_t EXPLR_MMIO_O0ACTAG_O0FNID_ACTAG_BASE_LEN = 12 ; -static const uint8_t EXPLR_MMIO_O0ACTAG_O0FNID_ACTAG_LENGTH = 20 ; -static const uint8_t EXPLR_MMIO_O0ACTAG_O0FNID_ACTAG_LENGTH_LEN = 12 ; -static const uint8_t EXPLR_MMIO_O0ACTAG_O0FNID_AFU_PRESENT = 32 ; -static const uint8_t EXPLR_MMIO_O0ACTAG_O0FNID_MAX_AFU_INDEX = 34 ; -static const uint8_t EXPLR_MMIO_O0ACTAG_O0FNID_MAX_AFU_INDEX_LEN = 6 ; -static const uint8_t EXPLR_MMIO_O0ACTAG_O0FNID_FUNCTION_RESET = 40 ; -static const uint8_t EXPLR_MMIO_O0ACTAG_O0FNID_DVSEC_ID = 48 ; -static const uint8_t EXPLR_MMIO_O0ACTAG_O0FNID_DVSEC_ID_LEN = 16 ; - -static const uint8_t EXPLR_MMIO_O0BAR0_BAR_ADDRESS = 0 ; -static const uint8_t EXPLR_MMIO_O0BAR0_BAR_ADDRESS_LEN = 60 ; -static const uint8_t EXPLR_MMIO_O0BAR0_PREFETCHABLE = 60 ; -static const uint8_t EXPLR_MMIO_O0BAR0_TYPE = 61 ; -static const uint8_t EXPLR_MMIO_O0BAR0_TYPE_LEN = 2 ; -static const uint8_t EXPLR_MMIO_O0BAR0_ADDRESS_SPACE = 63 ; - -static const uint8_t EXPLR_MMIO_O0BAR1_BAR_ADDRESS = 0 ; -static const uint8_t EXPLR_MMIO_O0BAR1_BAR_ADDRESS_LEN = 60 ; -static const uint8_t EXPLR_MMIO_O0BAR1_PREFETCHABLE = 60 ; -static const uint8_t EXPLR_MMIO_O0BAR1_TYPE = 61 ; -static const uint8_t EXPLR_MMIO_O0BAR1_TYPE_LEN = 2 ; -static const uint8_t EXPLR_MMIO_O0BAR1_ADDRESS_SPACE = 63 ; - -static const uint8_t EXPLR_MMIO_O0BAR2_BAR_ADDRESS = 0 ; -static const uint8_t EXPLR_MMIO_O0BAR2_BAR_ADDRESS_LEN = 60 ; -static const uint8_t EXPLR_MMIO_O0BAR2_PREFETCHABLE = 60 ; -static const uint8_t EXPLR_MMIO_O0BAR2_TYPE = 61 ; -static const uint8_t EXPLR_MMIO_O0BAR2_TYPE_LEN = 2 ; -static const uint8_t EXPLR_MMIO_O0BAR2_ADDRESS_SPACE = 63 ; - -static const uint8_t EXPLR_MMIO_O0CAPPTR_O0ROMBAR_ROM_BASE = 32 ; -static const uint8_t EXPLR_MMIO_O0CAPPTR_O0ROMBAR_ROM_BASE_LEN = 21 ; -static const uint8_t EXPLR_MMIO_O0CAPPTR_O0ROMBAR_ROM_ENABLE = 63 ; - -static const uint8_t EXPLR_MMIO_O0CCD_MULTI_FUNCTION = 8 ; -static const uint8_t EXPLR_MMIO_O0CCD_CLASS_CODE = 32 ; -static const uint8_t EXPLR_MMIO_O0CCD_CLASS_CODE_LEN = 24 ; -static const uint8_t EXPLR_MMIO_O0CCD_REVISION_ID = 56 ; -static const uint8_t EXPLR_MMIO_O0CCD_REVISION_ID_LEN = 8 ; - -static const uint8_t EXPLR_MMIO_O0MBIT_O0DID_CAPABILITIES_LIST = 11 ; -static const uint8_t EXPLR_MMIO_O0MBIT_O0DID_MEMORY_SPACE = 30 ; -static const uint8_t EXPLR_MMIO_O0MBIT_O0DID_DEVICE_ID = 32 ; -static const uint8_t EXPLR_MMIO_O0MBIT_O0DID_DEVICE_ID_LEN = 16 ; -static const uint8_t EXPLR_MMIO_O0MBIT_O0DID_VENDOR_ID = 48 ; -static const uint8_t EXPLR_MMIO_O0MBIT_O0DID_VENDOR_ID_LEN = 16 ; - -static const uint8_t EXPLR_MMIO_O0SSYSID_SUBSYSTEM_ID = 0 ; -static const uint8_t EXPLR_MMIO_O0SSYSID_SUBSYSTEM_ID_LEN = 16 ; -static const uint8_t EXPLR_MMIO_O0SSYSID_SUBSYSTEM_VENDOR_ID = 16 ; -static const uint8_t EXPLR_MMIO_O0SSYSID_SUBSYSTEM_VENDOR_ID_LEN = 16 ; - -static const uint8_t EXPLR_MMIO_O0VSDLXA_DLX_PORT1 = 0 ; -static const uint8_t EXPLR_MMIO_O0VSDLXA_DLX_PORT1_LEN = 32 ; -static const uint8_t EXPLR_MMIO_O0VSDLXA_DLX_PORT0 = 32 ; -static const uint8_t EXPLR_MMIO_O0VSDLXA_DLX_PORT0_LEN = 32 ; - -static const uint8_t EXPLR_MMIO_O0VSDLXB_DLX_PORT3 = 0 ; -static const uint8_t EXPLR_MMIO_O0VSDLXB_DLX_PORT3_LEN = 32 ; -static const uint8_t EXPLR_MMIO_O0VSDLXB_DLX_PORT2 = 32 ; -static const uint8_t EXPLR_MMIO_O0VSDLXB_DLX_PORT2_LEN = 32 ; - -static const uint8_t EXPLR_MMIO_O0VSFLSH_DATA = 0 ; -static const uint8_t EXPLR_MMIO_O0VSFLSH_DATA_LEN = 32 ; -static const uint8_t EXPLR_MMIO_O0VSFLSH_CONTROL = 44 ; -static const uint8_t EXPLR_MMIO_O0VSFLSH_CONTROL_LEN = 20 ; - -static const uint8_t EXPLR_MMIO_O0VSID_VENDOR_UNIQUE = 32 ; -static const uint8_t EXPLR_MMIO_O0VSID_VENDOR_UNIQUE_LEN = 16 ; -static const uint8_t EXPLR_MMIO_O0VSID_DVSEC_ID = 48 ; -static const uint8_t EXPLR_MMIO_O0VSID_DVSEC_ID_LEN = 16 ; - -static const uint8_t EXPLR_MMIO_O0VSTLXA_TLX_PORT1 = 0 ; -static const uint8_t EXPLR_MMIO_O0VSTLXA_TLX_PORT1_LEN = 32 ; -static const uint8_t EXPLR_MMIO_O0VSTLXA_TLX_PORT0 = 32 ; -static const uint8_t EXPLR_MMIO_O0VSTLXA_TLX_PORT0_LEN = 32 ; - -static const uint8_t EXPLR_MMIO_O0VSTLXB_TLX_PORT3 = 0 ; -static const uint8_t EXPLR_MMIO_O0VSTLXB_TLX_PORT3_LEN = 32 ; -static const uint8_t EXPLR_MMIO_O0VSTLXB_TLX_PORT2 = 32 ; -static const uint8_t EXPLR_MMIO_O0VSTLXB_TLX_PORT2_LEN = 32 ; - -static const uint8_t EXPLR_MMIO_O1ACTAG_O1FNID_ACTAG_BASE = 4 ; -static const uint8_t EXPLR_MMIO_O1ACTAG_O1FNID_ACTAG_BASE_LEN = 12 ; -static const uint8_t EXPLR_MMIO_O1ACTAG_O1FNID_ACTAG_LENGTH = 20 ; -static const uint8_t EXPLR_MMIO_O1ACTAG_O1FNID_ACTAG_LENGTH_LEN = 12 ; -static const uint8_t EXPLR_MMIO_O1ACTAG_O1FNID_AFU_PRESENT = 32 ; -static const uint8_t EXPLR_MMIO_O1ACTAG_O1FNID_MAX_AFU_INDEX = 34 ; -static const uint8_t EXPLR_MMIO_O1ACTAG_O1FNID_MAX_AFU_INDEX_LEN = 6 ; -static const uint8_t EXPLR_MMIO_O1ACTAG_O1FNID_FUNCTION_RESET = 40 ; -static const uint8_t EXPLR_MMIO_O1ACTAG_O1FNID_DVSEC_ID = 48 ; -static const uint8_t EXPLR_MMIO_O1ACTAG_O1FNID_DVSEC_ID_LEN = 16 ; - -static const uint8_t EXPLR_MMIO_O1BAR0_BAR_ADDRESS = 0 ; -static const uint8_t EXPLR_MMIO_O1BAR0_BAR_ADDRESS_LEN = 29 ; -static const uint8_t EXPLR_MMIO_O1BAR0_PREFETCHABLE = 60 ; -static const uint8_t EXPLR_MMIO_O1BAR0_TYPE = 61 ; -static const uint8_t EXPLR_MMIO_O1BAR0_TYPE_LEN = 2 ; -static const uint8_t EXPLR_MMIO_O1BAR0_ADDRESS_SPACE = 63 ; - -static const uint8_t EXPLR_MMIO_O1BAR1_BAR_ADDRESS = 0 ; -static const uint8_t EXPLR_MMIO_O1BAR1_BAR_ADDRESS_LEN = 60 ; -static const uint8_t EXPLR_MMIO_O1BAR1_PREFETCHABLE = 60 ; -static const uint8_t EXPLR_MMIO_O1BAR1_TYPE = 61 ; -static const uint8_t EXPLR_MMIO_O1BAR1_TYPE_LEN = 2 ; -static const uint8_t EXPLR_MMIO_O1BAR1_ADDRESS_SPACE = 63 ; - -static const uint8_t EXPLR_MMIO_O1BAR2_BAR_ADDRESS = 0 ; -static const uint8_t EXPLR_MMIO_O1BAR2_BAR_ADDRESS_LEN = 60 ; -static const uint8_t EXPLR_MMIO_O1BAR2_PREFETCHABLE = 60 ; -static const uint8_t EXPLR_MMIO_O1BAR2_TYPE = 61 ; -static const uint8_t EXPLR_MMIO_O1BAR2_TYPE_LEN = 2 ; -static const uint8_t EXPLR_MMIO_O1BAR2_ADDRESS_SPACE = 63 ; - -static const uint8_t EXPLR_MMIO_O1CAPPTR_O1ROMBAR_ROM_BASE = 32 ; -static const uint8_t EXPLR_MMIO_O1CAPPTR_O1ROMBAR_ROM_BASE_LEN = 21 ; -static const uint8_t EXPLR_MMIO_O1CAPPTR_O1ROMBAR_ROM_ENABLE = 63 ; - -static const uint8_t EXPLR_MMIO_O1CCD_MULTI_FUNCTION = 8 ; -static const uint8_t EXPLR_MMIO_O1CCD_CLASS_CODE = 32 ; -static const uint8_t EXPLR_MMIO_O1CCD_CLASS_CODE_LEN = 24 ; -static const uint8_t EXPLR_MMIO_O1CCD_REVISION_ID = 56 ; -static const uint8_t EXPLR_MMIO_O1CCD_REVISION_ID_LEN = 8 ; - -static const uint8_t EXPLR_MMIO_O1INFDAT_AFU_DESCRIPTOR_DATA = 32 ; -static const uint8_t EXPLR_MMIO_O1INFDAT_AFU_DESCRIPTOR_DATA_LEN = 32 ; - -static const uint8_t EXPLR_MMIO_O1INFOFF_O1INFID_DATA_VALID = 0 ; -static const uint8_t EXPLR_MMIO_O1INFOFF_O1INFID_AFU_DESCRIPTOR_OFFSET = 1 ; -static const uint8_t EXPLR_MMIO_O1INFOFF_O1INFID_AFU_DESCRIPTOR_OFFSET_LEN = 31 ; -static const uint8_t EXPLR_MMIO_O1INFOFF_O1INFID_AFU_INFO_INDEX = 42 ; -static const uint8_t EXPLR_MMIO_O1INFOFF_O1INFID_AFU_INFO_INDEX_LEN = 6 ; -static const uint8_t EXPLR_MMIO_O1INFOFF_O1INFID_DVSEC_ID = 48 ; -static const uint8_t EXPLR_MMIO_O1INFOFF_O1INFID_DVSEC_ID_LEN = 16 ; - -static const uint8_t EXPLR_MMIO_O1MBIT_O1DID_CAPABILITIES_LIST = 11 ; -static const uint8_t EXPLR_MMIO_O1MBIT_O1DID_MEMORY_SPACE = 30 ; -static const uint8_t EXPLR_MMIO_O1MBIT_O1DID_DEVICE_ID = 32 ; -static const uint8_t EXPLR_MMIO_O1MBIT_O1DID_DEVICE_ID_LEN = 16 ; -static const uint8_t EXPLR_MMIO_O1MBIT_O1DID_VENDOR_ID = 48 ; -static const uint8_t EXPLR_MMIO_O1MBIT_O1DID_VENDOR_ID_LEN = 16 ; - -static const uint8_t EXPLR_MMIO_O1SSYSID_SUBSYSTEM_ID = 0 ; -static const uint8_t EXPLR_MMIO_O1SSYSID_SUBSYSTEM_ID_LEN = 16 ; -static const uint8_t EXPLR_MMIO_O1SSYSID_SUBSYSTEM_VENDOR_ID = 16 ; -static const uint8_t EXPLR_MMIO_O1SSYSID_SUBSYSTEM_VENDOR_ID_LEN = 16 ; - -static const uint8_t EXPLR_MMIO_O1VSID_VENDOR_UNIQUE = 32 ; -static const uint8_t EXPLR_MMIO_O1VSID_VENDOR_UNIQUE_LEN = 16 ; -static const uint8_t EXPLR_MMIO_O1VSID_DVSEC_ID = 48 ; -static const uint8_t EXPLR_MMIO_O1VSID_DVSEC_ID_LEN = 16 ; - -static const uint8_t EXPLR_MMIO_OAFUVER_ONAME5_AFU_VERSION_MAJOR = 0 ; -static const uint8_t EXPLR_MMIO_OAFUVER_ONAME5_AFU_VERSION_MAJOR_LEN = 8 ; -static const uint8_t EXPLR_MMIO_OAFUVER_ONAME5_AFU_VERSION_MINOR = 8 ; -static const uint8_t EXPLR_MMIO_OAFUVER_ONAME5_AFU_VERSION_MINOR_LEN = 8 ; -static const uint8_t EXPLR_MMIO_OAFUVER_ONAME5_AFU_C_TYPE = 16 ; -static const uint8_t EXPLR_MMIO_OAFUVER_ONAME5_AFU_C_TYPE_LEN = 3 ; -static const uint8_t EXPLR_MMIO_OAFUVER_ONAME5_AFU_M_TYPE = 19 ; -static const uint8_t EXPLR_MMIO_OAFUVER_ONAME5_AFU_M_TYPE_LEN = 3 ; -static const uint8_t EXPLR_MMIO_OAFUVER_ONAME5_PROFILE = 24 ; -static const uint8_t EXPLR_MMIO_OAFUVER_ONAME5_PROFILE_LEN = 8 ; -static const uint8_t EXPLR_MMIO_OAFUVER_ONAME5_NAME_SPACE_23 = 32 ; -static const uint8_t EXPLR_MMIO_OAFUVER_ONAME5_NAME_SPACE_23_LEN = 8 ; -static const uint8_t EXPLR_MMIO_OAFUVER_ONAME5_NAME_SPACE_22 = 40 ; -static const uint8_t EXPLR_MMIO_OAFUVER_ONAME5_NAME_SPACE_22_LEN = 8 ; -static const uint8_t EXPLR_MMIO_OAFUVER_ONAME5_NAME_SPACE_21 = 48 ; -static const uint8_t EXPLR_MMIO_OAFUVER_ONAME5_NAME_SPACE_21_LEN = 8 ; -static const uint8_t EXPLR_MMIO_OAFUVER_ONAME5_NAME_SPACE_20 = 56 ; -static const uint8_t EXPLR_MMIO_OAFUVER_ONAME5_NAME_SPACE_20_LEN = 8 ; - -static const uint8_t EXPLR_MMIO_OCTRLENB_OCTRLID_AFU_UNIQUE = 0 ; -static const uint8_t EXPLR_MMIO_OCTRLENB_OCTRLID_AFU_UNIQUE_LEN = 4 ; -static const uint8_t EXPLR_MMIO_OCTRLENB_OCTRLID_FENCE_AFU = 6 ; -static const uint8_t EXPLR_MMIO_OCTRLENB_OCTRLID_ENABLE_AFU = 7 ; -static const uint8_t EXPLR_MMIO_OCTRLENB_OCTRLID_RESET_AFU = 8 ; -static const uint8_t EXPLR_MMIO_OCTRLENB_OCTRLID_TERMINATE_VALID = 11 ; -static const uint8_t EXPLR_MMIO_OCTRLENB_OCTRLID_PASID_TERMINATION_VALUE = 12 ; -static const uint8_t EXPLR_MMIO_OCTRLENB_OCTRLID_PASID_TERMINATION_VALUE_LEN = 20 ; -static const uint8_t EXPLR_MMIO_OCTRLENB_OCTRLID_AFU_CONTROL_INDEX = 42 ; -static const uint8_t EXPLR_MMIO_OCTRLENB_OCTRLID_AFU_CONTROL_INDEX_LEN = 6 ; -static const uint8_t EXPLR_MMIO_OCTRLENB_OCTRLID_DVSEC_ID = 48 ; -static const uint8_t EXPLR_MMIO_OCTRLENB_OCTRLID_DVSEC_ID_LEN = 16 ; - -static const uint8_t EXPLR_MMIO_OCTRLPID_METADATA_SUPPORTED = 0 ; -static const uint8_t EXPLR_MMIO_OCTRLPID_METADATA_ENABLED = 1 ; -static const uint8_t EXPLR_MMIO_OCTRLPID_HTRL = 2 ; -static const uint8_t EXPLR_MMIO_OCTRLPID_HTRL_LEN = 3 ; -static const uint8_t EXPLR_MMIO_OCTRLPID_PASID_BASE = 12 ; -static const uint8_t EXPLR_MMIO_OCTRLPID_PASID_BASE_LEN = 20 ; -static const uint8_t EXPLR_MMIO_OCTRLPID_PASID_LENGTH_ENABLED = 51 ; -static const uint8_t EXPLR_MMIO_OCTRLPID_PASID_LENGTH_ENABLED_LEN = 5 ; -static const uint8_t EXPLR_MMIO_OCTRLPID_PASID_LENGTH_SUPPORTED = 59 ; -static const uint8_t EXPLR_MMIO_OCTRLPID_PASID_LENGTH_SUPPORTED_LEN = 5 ; - -static const uint8_t EXPLR_MMIO_OCTRLTAG_AFU_ACTAG_BASE = 20 ; -static const uint8_t EXPLR_MMIO_OCTRLTAG_AFU_ACTAG_BASE_LEN = 12 ; -static const uint8_t EXPLR_MMIO_OCTRLTAG_AFU_ACTAG_LENGTH_ENABLED = 36 ; -static const uint8_t EXPLR_MMIO_OCTRLTAG_AFU_ACTAG_LENGTH_ENABLED_LEN = 12 ; -static const uint8_t EXPLR_MMIO_OCTRLTAG_AFU_ACTAG_LENGTH_SUPPORTED = 52 ; -static const uint8_t EXPLR_MMIO_OCTRLTAG_AFU_ACTAG_LENGTH_SUPPORTED_LEN = 12 ; - -static const uint8_t EXPLR_MMIO_ODSNHI_DSN_HIGH = 32 ; -static const uint8_t EXPLR_MMIO_ODSNHI_DSN_HIGH_LEN = 32 ; - -static const uint8_t EXPLR_MMIO_ODSNLO_ODSNCAP_DSN_LOW = 0 ; -static const uint8_t EXPLR_MMIO_ODSNLO_ODSNCAP_DSN_LOW_LEN = 32 ; - -static const uint8_t EXPLR_MMIO_OGMMIOOF_OFFSET = 0 ; -static const uint8_t EXPLR_MMIO_OGMMIOOF_OFFSET_LEN = 48 ; -static const uint8_t EXPLR_MMIO_OGMMIOOF_BAR = 61 ; -static const uint8_t EXPLR_MMIO_OGMMIOOF_BAR_LEN = 3 ; - -static const uint8_t EXPLR_MMIO_OGMMIOSZ_SIZE = 32 ; -static const uint8_t EXPLR_MMIO_OGMMIOSZ_SIZE_LEN = 32 ; - -static const uint8_t EXPLR_MMIO_OMEMADDR_ADDR = 0 ; -static const uint8_t EXPLR_MMIO_OMEMADDR_ADDR_LEN = 64 ; - -static const uint8_t EXPLR_MMIO_ONAME0_ODESCTML_NAME_SPACE_3 = 0 ; -static const uint8_t EXPLR_MMIO_ONAME0_ODESCTML_NAME_SPACE_3_LEN = 8 ; -static const uint8_t EXPLR_MMIO_ONAME0_ODESCTML_NAME_SPACE_2 = 8 ; -static const uint8_t EXPLR_MMIO_ONAME0_ODESCTML_NAME_SPACE_2_LEN = 8 ; -static const uint8_t EXPLR_MMIO_ONAME0_ODESCTML_NAME_SPACE_1 = 16 ; -static const uint8_t EXPLR_MMIO_ONAME0_ODESCTML_NAME_SPACE_1_LEN = 8 ; -static const uint8_t EXPLR_MMIO_ONAME0_ODESCTML_NAME_SPACE_0 = 24 ; -static const uint8_t EXPLR_MMIO_ONAME0_ODESCTML_NAME_SPACE_0_LEN = 8 ; - -static const uint8_t EXPLR_MMIO_ONAME21_NAME_SPACE_11 = 0 ; -static const uint8_t EXPLR_MMIO_ONAME21_NAME_SPACE_11_LEN = 8 ; -static const uint8_t EXPLR_MMIO_ONAME21_NAME_SPACE_10 = 8 ; -static const uint8_t EXPLR_MMIO_ONAME21_NAME_SPACE_10_LEN = 8 ; -static const uint8_t EXPLR_MMIO_ONAME21_NAME_SPACE_9 = 16 ; -static const uint8_t EXPLR_MMIO_ONAME21_NAME_SPACE_9_LEN = 8 ; -static const uint8_t EXPLR_MMIO_ONAME21_NAME_SPACE_8 = 24 ; -static const uint8_t EXPLR_MMIO_ONAME21_NAME_SPACE_8_LEN = 8 ; -static const uint8_t EXPLR_MMIO_ONAME21_NAME_SPACE_7 = 32 ; -static const uint8_t EXPLR_MMIO_ONAME21_NAME_SPACE_7_LEN = 8 ; -static const uint8_t EXPLR_MMIO_ONAME21_NAME_SPACE_6 = 40 ; -static const uint8_t EXPLR_MMIO_ONAME21_NAME_SPACE_6_LEN = 8 ; -static const uint8_t EXPLR_MMIO_ONAME21_NAME_SPACE_5 = 48 ; -static const uint8_t EXPLR_MMIO_ONAME21_NAME_SPACE_5_LEN = 8 ; -static const uint8_t EXPLR_MMIO_ONAME21_NAME_SPACE_4 = 56 ; -static const uint8_t EXPLR_MMIO_ONAME21_NAME_SPACE_4_LEN = 8 ; - -static const uint8_t EXPLR_MMIO_ONAME43_NAME_SPACE_19 = 0 ; -static const uint8_t EXPLR_MMIO_ONAME43_NAME_SPACE_19_LEN = 8 ; -static const uint8_t EXPLR_MMIO_ONAME43_NAME_SPACE_18 = 8 ; -static const uint8_t EXPLR_MMIO_ONAME43_NAME_SPACE_18_LEN = 8 ; -static const uint8_t EXPLR_MMIO_ONAME43_NAME_SPACE_17 = 16 ; -static const uint8_t EXPLR_MMIO_ONAME43_NAME_SPACE_17_LEN = 8 ; -static const uint8_t EXPLR_MMIO_ONAME43_NAME_SPACE_16 = 24 ; -static const uint8_t EXPLR_MMIO_ONAME43_NAME_SPACE_16_LEN = 8 ; -static const uint8_t EXPLR_MMIO_ONAME43_NAME_SPACE_15 = 32 ; -static const uint8_t EXPLR_MMIO_ONAME43_NAME_SPACE_15_LEN = 8 ; -static const uint8_t EXPLR_MMIO_ONAME43_NAME_SPACE_14 = 40 ; -static const uint8_t EXPLR_MMIO_ONAME43_NAME_SPACE_14_LEN = 8 ; -static const uint8_t EXPLR_MMIO_ONAME43_NAME_SPACE_13 = 48 ; -static const uint8_t EXPLR_MMIO_ONAME43_NAME_SPACE_13_LEN = 8 ; -static const uint8_t EXPLR_MMIO_ONAME43_NAME_SPACE_12 = 56 ; -static const uint8_t EXPLR_MMIO_ONAME43_NAME_SPACE_12_LEN = 8 ; - -static const uint8_t EXPLR_MMIO_OPASID_MAX_PASID_WIDTH = 19 ; -static const uint8_t EXPLR_MMIO_OPASID_MAX_PASID_WIDTH_LEN = 5 ; - -static const uint8_t EXPLR_MMIO_OPMMIOOF_OFFSET = 0 ; -static const uint8_t EXPLR_MMIO_OPMMIOOF_OFFSET_LEN = 48 ; -static const uint8_t EXPLR_MMIO_OPMMIOOF_BAR = 61 ; -static const uint8_t EXPLR_MMIO_OPMMIOOF_BAR_LEN = 3 ; - -static const uint8_t EXPLR_MMIO_OPMMIOST_MEM_SIZE = 24 ; -static const uint8_t EXPLR_MMIO_OPMMIOST_MEM_SIZE_LEN = 8 ; -static const uint8_t EXPLR_MMIO_OPMMIOST_STRIDE = 32 ; -static const uint8_t EXPLR_MMIO_OPMMIOST_STRIDE_LEN = 16 ; - -static const uint8_t EXPLR_MMIO_ORRCAP10_TEMPLATE_55 = 0 ; -static const uint8_t EXPLR_MMIO_ORRCAP10_TEMPLATE_55_LEN = 4 ; -static const uint8_t EXPLR_MMIO_ORRCAP10_TEMPLATE_54 = 4 ; -static const uint8_t EXPLR_MMIO_ORRCAP10_TEMPLATE_54_LEN = 4 ; -static const uint8_t EXPLR_MMIO_ORRCAP10_TEMPLATE_53 = 8 ; -static const uint8_t EXPLR_MMIO_ORRCAP10_TEMPLATE_53_LEN = 4 ; -static const uint8_t EXPLR_MMIO_ORRCAP10_TEMPLATE_52 = 12 ; -static const uint8_t EXPLR_MMIO_ORRCAP10_TEMPLATE_52_LEN = 4 ; -static const uint8_t EXPLR_MMIO_ORRCAP10_TEMPLATE_51 = 16 ; -static const uint8_t EXPLR_MMIO_ORRCAP10_TEMPLATE_51_LEN = 4 ; -static const uint8_t EXPLR_MMIO_ORRCAP10_TEMPLATE_50 = 20 ; -static const uint8_t EXPLR_MMIO_ORRCAP10_TEMPLATE_50_LEN = 4 ; -static const uint8_t EXPLR_MMIO_ORRCAP10_TEMPLATE_49 = 24 ; -static const uint8_t EXPLR_MMIO_ORRCAP10_TEMPLATE_49_LEN = 4 ; -static const uint8_t EXPLR_MMIO_ORRCAP10_TEMPLATE_48 = 28 ; -static const uint8_t EXPLR_MMIO_ORRCAP10_TEMPLATE_48_LEN = 4 ; -static const uint8_t EXPLR_MMIO_ORRCAP10_TEMPLATE_63 = 32 ; -static const uint8_t EXPLR_MMIO_ORRCAP10_TEMPLATE_63_LEN = 4 ; -static const uint8_t EXPLR_MMIO_ORRCAP10_TEMPLATE_62 = 36 ; -static const uint8_t EXPLR_MMIO_ORRCAP10_TEMPLATE_62_LEN = 4 ; -static const uint8_t EXPLR_MMIO_ORRCAP10_TEMPLATE_61 = 40 ; -static const uint8_t EXPLR_MMIO_ORRCAP10_TEMPLATE_61_LEN = 4 ; -static const uint8_t EXPLR_MMIO_ORRCAP10_TEMPLATE_60 = 44 ; -static const uint8_t EXPLR_MMIO_ORRCAP10_TEMPLATE_60_LEN = 4 ; -static const uint8_t EXPLR_MMIO_ORRCAP10_TEMPLATE_59 = 48 ; -static const uint8_t EXPLR_MMIO_ORRCAP10_TEMPLATE_59_LEN = 4 ; -static const uint8_t EXPLR_MMIO_ORRCAP10_TEMPLATE_58 = 52 ; -static const uint8_t EXPLR_MMIO_ORRCAP10_TEMPLATE_58_LEN = 4 ; -static const uint8_t EXPLR_MMIO_ORRCAP10_TEMPLATE_57 = 56 ; -static const uint8_t EXPLR_MMIO_ORRCAP10_TEMPLATE_57_LEN = 4 ; -static const uint8_t EXPLR_MMIO_ORRCAP10_TEMPLATE_56 = 60 ; -static const uint8_t EXPLR_MMIO_ORRCAP10_TEMPLATE_56_LEN = 4 ; - -static const uint8_t EXPLR_MMIO_ORRCAP32_TEMPLATE_39 = 0 ; -static const uint8_t EXPLR_MMIO_ORRCAP32_TEMPLATE_39_LEN = 4 ; -static const uint8_t EXPLR_MMIO_ORRCAP32_TEMPLATE_38 = 4 ; -static const uint8_t EXPLR_MMIO_ORRCAP32_TEMPLATE_38_LEN = 4 ; -static const uint8_t EXPLR_MMIO_ORRCAP32_TEMPLATE_37 = 8 ; -static const uint8_t EXPLR_MMIO_ORRCAP32_TEMPLATE_37_LEN = 4 ; -static const uint8_t EXPLR_MMIO_ORRCAP32_TEMPLATE_36 = 12 ; -static const uint8_t EXPLR_MMIO_ORRCAP32_TEMPLATE_36_LEN = 4 ; -static const uint8_t EXPLR_MMIO_ORRCAP32_TEMPLATE_35 = 16 ; -static const uint8_t EXPLR_MMIO_ORRCAP32_TEMPLATE_35_LEN = 4 ; -static const uint8_t EXPLR_MMIO_ORRCAP32_TEMPLATE_34 = 20 ; -static const uint8_t EXPLR_MMIO_ORRCAP32_TEMPLATE_34_LEN = 4 ; -static const uint8_t EXPLR_MMIO_ORRCAP32_TEMPLATE_33 = 24 ; -static const uint8_t EXPLR_MMIO_ORRCAP32_TEMPLATE_33_LEN = 4 ; -static const uint8_t EXPLR_MMIO_ORRCAP32_TEMPLATE_32 = 28 ; -static const uint8_t EXPLR_MMIO_ORRCAP32_TEMPLATE_32_LEN = 4 ; -static const uint8_t EXPLR_MMIO_ORRCAP32_TEMPLATE_47 = 32 ; -static const uint8_t EXPLR_MMIO_ORRCAP32_TEMPLATE_47_LEN = 4 ; -static const uint8_t EXPLR_MMIO_ORRCAP32_TEMPLATE_46 = 36 ; -static const uint8_t EXPLR_MMIO_ORRCAP32_TEMPLATE_46_LEN = 4 ; -static const uint8_t EXPLR_MMIO_ORRCAP32_TEMPLATE_45 = 40 ; -static const uint8_t EXPLR_MMIO_ORRCAP32_TEMPLATE_45_LEN = 4 ; -static const uint8_t EXPLR_MMIO_ORRCAP32_TEMPLATE_44 = 44 ; -static const uint8_t EXPLR_MMIO_ORRCAP32_TEMPLATE_44_LEN = 4 ; -static const uint8_t EXPLR_MMIO_ORRCAP32_TEMPLATE_43 = 48 ; -static const uint8_t EXPLR_MMIO_ORRCAP32_TEMPLATE_43_LEN = 4 ; -static const uint8_t EXPLR_MMIO_ORRCAP32_TEMPLATE_42 = 52 ; -static const uint8_t EXPLR_MMIO_ORRCAP32_TEMPLATE_42_LEN = 4 ; -static const uint8_t EXPLR_MMIO_ORRCAP32_TEMPLATE_41 = 56 ; -static const uint8_t EXPLR_MMIO_ORRCAP32_TEMPLATE_41_LEN = 4 ; -static const uint8_t EXPLR_MMIO_ORRCAP32_TEMPLATE_40 = 60 ; -static const uint8_t EXPLR_MMIO_ORRCAP32_TEMPLATE_40_LEN = 4 ; - -static const uint8_t EXPLR_MMIO_ORRCAP54_TEMPLATE_23 = 0 ; -static const uint8_t EXPLR_MMIO_ORRCAP54_TEMPLATE_23_LEN = 4 ; -static const uint8_t EXPLR_MMIO_ORRCAP54_TEMPLATE_22 = 4 ; -static const uint8_t EXPLR_MMIO_ORRCAP54_TEMPLATE_22_LEN = 4 ; -static const uint8_t EXPLR_MMIO_ORRCAP54_TEMPLATE_21 = 8 ; -static const uint8_t EXPLR_MMIO_ORRCAP54_TEMPLATE_21_LEN = 4 ; -static const uint8_t EXPLR_MMIO_ORRCAP54_TEMPLATE_20 = 12 ; -static const uint8_t EXPLR_MMIO_ORRCAP54_TEMPLATE_20_LEN = 4 ; -static const uint8_t EXPLR_MMIO_ORRCAP54_TEMPLATE_19 = 16 ; -static const uint8_t EXPLR_MMIO_ORRCAP54_TEMPLATE_19_LEN = 4 ; -static const uint8_t EXPLR_MMIO_ORRCAP54_TEMPLATE_18 = 20 ; -static const uint8_t EXPLR_MMIO_ORRCAP54_TEMPLATE_18_LEN = 4 ; -static const uint8_t EXPLR_MMIO_ORRCAP54_TEMPLATE_17 = 24 ; -static const uint8_t EXPLR_MMIO_ORRCAP54_TEMPLATE_17_LEN = 4 ; -static const uint8_t EXPLR_MMIO_ORRCAP54_TEMPLATE_16 = 28 ; -static const uint8_t EXPLR_MMIO_ORRCAP54_TEMPLATE_16_LEN = 4 ; -static const uint8_t EXPLR_MMIO_ORRCAP54_TEMPLATE_31 = 32 ; -static const uint8_t EXPLR_MMIO_ORRCAP54_TEMPLATE_31_LEN = 4 ; -static const uint8_t EXPLR_MMIO_ORRCAP54_TEMPLATE_30 = 36 ; -static const uint8_t EXPLR_MMIO_ORRCAP54_TEMPLATE_30_LEN = 4 ; -static const uint8_t EXPLR_MMIO_ORRCAP54_TEMPLATE_29 = 40 ; -static const uint8_t EXPLR_MMIO_ORRCAP54_TEMPLATE_29_LEN = 4 ; -static const uint8_t EXPLR_MMIO_ORRCAP54_TEMPLATE_28 = 44 ; -static const uint8_t EXPLR_MMIO_ORRCAP54_TEMPLATE_28_LEN = 4 ; -static const uint8_t EXPLR_MMIO_ORRCAP54_TEMPLATE_27 = 48 ; -static const uint8_t EXPLR_MMIO_ORRCAP54_TEMPLATE_27_LEN = 4 ; -static const uint8_t EXPLR_MMIO_ORRCAP54_TEMPLATE_26 = 52 ; -static const uint8_t EXPLR_MMIO_ORRCAP54_TEMPLATE_26_LEN = 4 ; -static const uint8_t EXPLR_MMIO_ORRCAP54_TEMPLATE_25 = 56 ; -static const uint8_t EXPLR_MMIO_ORRCAP54_TEMPLATE_25_LEN = 4 ; -static const uint8_t EXPLR_MMIO_ORRCAP54_TEMPLATE_24 = 60 ; -static const uint8_t EXPLR_MMIO_ORRCAP54_TEMPLATE_24_LEN = 4 ; - -static const uint8_t EXPLR_MMIO_ORRCAP76_TEMPLATE_7 = 0 ; -static const uint8_t EXPLR_MMIO_ORRCAP76_TEMPLATE_7_LEN = 4 ; -static const uint8_t EXPLR_MMIO_ORRCAP76_TEMPLATE_6 = 4 ; -static const uint8_t EXPLR_MMIO_ORRCAP76_TEMPLATE_6_LEN = 4 ; -static const uint8_t EXPLR_MMIO_ORRCAP76_TEMPLATE_5 = 8 ; -static const uint8_t EXPLR_MMIO_ORRCAP76_TEMPLATE_5_LEN = 4 ; -static const uint8_t EXPLR_MMIO_ORRCAP76_TEMPLATE_4 = 12 ; -static const uint8_t EXPLR_MMIO_ORRCAP76_TEMPLATE_4_LEN = 4 ; -static const uint8_t EXPLR_MMIO_ORRCAP76_TEMPLATE_3 = 16 ; -static const uint8_t EXPLR_MMIO_ORRCAP76_TEMPLATE_3_LEN = 4 ; -static const uint8_t EXPLR_MMIO_ORRCAP76_TEMPLATE_2 = 20 ; -static const uint8_t EXPLR_MMIO_ORRCAP76_TEMPLATE_2_LEN = 4 ; -static const uint8_t EXPLR_MMIO_ORRCAP76_TEMPLATE_1 = 24 ; -static const uint8_t EXPLR_MMIO_ORRCAP76_TEMPLATE_1_LEN = 4 ; -static const uint8_t EXPLR_MMIO_ORRCAP76_TEMPLATE_0 = 28 ; -static const uint8_t EXPLR_MMIO_ORRCAP76_TEMPLATE_0_LEN = 4 ; -static const uint8_t EXPLR_MMIO_ORRCAP76_TEMPLATE_15 = 32 ; -static const uint8_t EXPLR_MMIO_ORRCAP76_TEMPLATE_15_LEN = 4 ; -static const uint8_t EXPLR_MMIO_ORRCAP76_TEMPLATE_14 = 36 ; -static const uint8_t EXPLR_MMIO_ORRCAP76_TEMPLATE_14_LEN = 4 ; -static const uint8_t EXPLR_MMIO_ORRCAP76_TEMPLATE_13 = 40 ; -static const uint8_t EXPLR_MMIO_ORRCAP76_TEMPLATE_13_LEN = 4 ; -static const uint8_t EXPLR_MMIO_ORRCAP76_TEMPLATE_12 = 44 ; -static const uint8_t EXPLR_MMIO_ORRCAP76_TEMPLATE_12_LEN = 4 ; -static const uint8_t EXPLR_MMIO_ORRCAP76_TEMPLATE_11 = 48 ; -static const uint8_t EXPLR_MMIO_ORRCAP76_TEMPLATE_11_LEN = 4 ; -static const uint8_t EXPLR_MMIO_ORRCAP76_TEMPLATE_10 = 52 ; -static const uint8_t EXPLR_MMIO_ORRCAP76_TEMPLATE_10_LEN = 4 ; -static const uint8_t EXPLR_MMIO_ORRCAP76_TEMPLATE_9 = 56 ; -static const uint8_t EXPLR_MMIO_ORRCAP76_TEMPLATE_9_LEN = 4 ; -static const uint8_t EXPLR_MMIO_ORRCAP76_TEMPLATE_8 = 60 ; -static const uint8_t EXPLR_MMIO_ORRCAP76_TEMPLATE_8_LEN = 4 ; - -static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_31 = 0 ; -static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_30 = 1 ; -static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_29 = 2 ; -static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_28 = 3 ; -static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_27 = 4 ; -static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_26 = 5 ; -static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_25 = 6 ; -static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_24 = 7 ; -static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_23 = 8 ; -static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_22 = 9 ; -static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_21 = 10 ; -static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_20 = 11 ; -static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_19 = 12 ; -static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_18 = 13 ; -static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_17 = 14 ; -static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_16 = 15 ; -static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_15 = 16 ; -static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_14 = 17 ; -static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_13 = 18 ; -static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_12 = 19 ; -static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_11 = 20 ; -static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_10 = 21 ; -static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_9 = 22 ; -static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_8 = 23 ; -static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_7 = 24 ; -static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_6 = 25 ; -static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_5 = 26 ; -static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_4 = 27 ; -static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_3 = 28 ; -static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_2 = 29 ; -static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_1 = 30 ; -static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_0 = 31 ; -static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_63 = 32 ; -static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_62 = 33 ; -static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_61 = 34 ; -static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_60 = 35 ; -static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_59 = 36 ; -static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_58 = 37 ; -static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_57 = 38 ; -static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_56 = 39 ; -static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_55 = 40 ; -static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_54 = 41 ; -static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_53 = 42 ; -static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_52 = 43 ; -static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_51 = 44 ; -static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_50 = 45 ; -static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_49 = 46 ; -static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_48 = 47 ; -static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_47 = 48 ; -static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_46 = 49 ; -static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_45 = 50 ; -static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_44 = 51 ; -static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_43 = 52 ; -static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_42 = 53 ; -static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_41 = 54 ; -static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_40 = 55 ; -static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_39 = 56 ; -static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_38 = 57 ; -static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_37 = 58 ; -static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_36 = 59 ; -static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_35 = 60 ; -static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_34 = 61 ; -static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_33 = 62 ; -static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_32 = 63 ; - -static const uint8_t EXPLR_MMIO_OSYSMEML_SYSLEN = 0 ; -static const uint8_t EXPLR_MMIO_OSYSMEML_SYSLEN_LEN = 48 ; - -static const uint8_t EXPLR_MMIO_OTRCFG10_TEMPLATE_55 = 0 ; -static const uint8_t EXPLR_MMIO_OTRCFG10_TEMPLATE_55_LEN = 4 ; -static const uint8_t EXPLR_MMIO_OTRCFG10_TEMPLATE_54 = 4 ; -static const uint8_t EXPLR_MMIO_OTRCFG10_TEMPLATE_54_LEN = 4 ; -static const uint8_t EXPLR_MMIO_OTRCFG10_TEMPLATE_53 = 8 ; -static const uint8_t EXPLR_MMIO_OTRCFG10_TEMPLATE_53_LEN = 4 ; -static const uint8_t EXPLR_MMIO_OTRCFG10_TEMPLATE_52 = 12 ; -static const uint8_t EXPLR_MMIO_OTRCFG10_TEMPLATE_52_LEN = 4 ; -static const uint8_t EXPLR_MMIO_OTRCFG10_TEMPLATE_51 = 16 ; -static const uint8_t EXPLR_MMIO_OTRCFG10_TEMPLATE_51_LEN = 4 ; -static const uint8_t EXPLR_MMIO_OTRCFG10_TEMPLATE_50 = 20 ; -static const uint8_t EXPLR_MMIO_OTRCFG10_TEMPLATE_50_LEN = 4 ; -static const uint8_t EXPLR_MMIO_OTRCFG10_TEMPLATE_49 = 24 ; -static const uint8_t EXPLR_MMIO_OTRCFG10_TEMPLATE_49_LEN = 4 ; -static const uint8_t EXPLR_MMIO_OTRCFG10_TEMPLATE_48 = 28 ; -static const uint8_t EXPLR_MMIO_OTRCFG10_TEMPLATE_48_LEN = 4 ; -static const uint8_t EXPLR_MMIO_OTRCFG10_TEMPLATE_63 = 32 ; -static const uint8_t EXPLR_MMIO_OTRCFG10_TEMPLATE_63_LEN = 4 ; -static const uint8_t EXPLR_MMIO_OTRCFG10_TEMPLATE_62 = 36 ; -static const uint8_t EXPLR_MMIO_OTRCFG10_TEMPLATE_62_LEN = 4 ; -static const uint8_t EXPLR_MMIO_OTRCFG10_TEMPLATE_61 = 40 ; -static const uint8_t EXPLR_MMIO_OTRCFG10_TEMPLATE_61_LEN = 4 ; -static const uint8_t EXPLR_MMIO_OTRCFG10_TEMPLATE_60 = 44 ; -static const uint8_t EXPLR_MMIO_OTRCFG10_TEMPLATE_60_LEN = 4 ; -static const uint8_t EXPLR_MMIO_OTRCFG10_TEMPLATE_59 = 48 ; -static const uint8_t EXPLR_MMIO_OTRCFG10_TEMPLATE_59_LEN = 4 ; -static const uint8_t EXPLR_MMIO_OTRCFG10_TEMPLATE_58 = 52 ; -static const uint8_t EXPLR_MMIO_OTRCFG10_TEMPLATE_58_LEN = 4 ; -static const uint8_t EXPLR_MMIO_OTRCFG10_TEMPLATE_57 = 56 ; -static const uint8_t EXPLR_MMIO_OTRCFG10_TEMPLATE_57_LEN = 4 ; -static const uint8_t EXPLR_MMIO_OTRCFG10_TEMPLATE_56 = 60 ; -static const uint8_t EXPLR_MMIO_OTRCFG10_TEMPLATE_56_LEN = 4 ; - -static const uint8_t EXPLR_MMIO_OTRCFG32_TEMPLATE_39 = 0 ; -static const uint8_t EXPLR_MMIO_OTRCFG32_TEMPLATE_39_LEN = 4 ; -static const uint8_t EXPLR_MMIO_OTRCFG32_TEMPLATE_38 = 4 ; -static const uint8_t EXPLR_MMIO_OTRCFG32_TEMPLATE_38_LEN = 4 ; -static const uint8_t EXPLR_MMIO_OTRCFG32_TEMPLATE_37 = 8 ; -static const uint8_t EXPLR_MMIO_OTRCFG32_TEMPLATE_37_LEN = 4 ; -static const uint8_t EXPLR_MMIO_OTRCFG32_TEMPLATE_36 = 12 ; -static const uint8_t EXPLR_MMIO_OTRCFG32_TEMPLATE_36_LEN = 4 ; -static const uint8_t EXPLR_MMIO_OTRCFG32_TEMPLATE_35 = 16 ; -static const uint8_t EXPLR_MMIO_OTRCFG32_TEMPLATE_35_LEN = 4 ; -static const uint8_t EXPLR_MMIO_OTRCFG32_TEMPLATE_34 = 20 ; -static const uint8_t EXPLR_MMIO_OTRCFG32_TEMPLATE_34_LEN = 4 ; -static const uint8_t EXPLR_MMIO_OTRCFG32_TEMPLATE_33 = 24 ; -static const uint8_t EXPLR_MMIO_OTRCFG32_TEMPLATE_33_LEN = 4 ; -static const uint8_t EXPLR_MMIO_OTRCFG32_TEMPLATE_32 = 28 ; -static const uint8_t EXPLR_MMIO_OTRCFG32_TEMPLATE_32_LEN = 4 ; -static const uint8_t EXPLR_MMIO_OTRCFG32_TEMPLATE_47 = 32 ; -static const uint8_t EXPLR_MMIO_OTRCFG32_TEMPLATE_47_LEN = 4 ; -static const uint8_t EXPLR_MMIO_OTRCFG32_TEMPLATE_46 = 36 ; -static const uint8_t EXPLR_MMIO_OTRCFG32_TEMPLATE_46_LEN = 4 ; -static const uint8_t EXPLR_MMIO_OTRCFG32_TEMPLATE_45 = 40 ; -static const uint8_t EXPLR_MMIO_OTRCFG32_TEMPLATE_45_LEN = 4 ; -static const uint8_t EXPLR_MMIO_OTRCFG32_TEMPLATE_44 = 44 ; -static const uint8_t EXPLR_MMIO_OTRCFG32_TEMPLATE_44_LEN = 4 ; -static const uint8_t EXPLR_MMIO_OTRCFG32_TEMPLATE_43 = 48 ; -static const uint8_t EXPLR_MMIO_OTRCFG32_TEMPLATE_43_LEN = 4 ; -static const uint8_t EXPLR_MMIO_OTRCFG32_TEMPLATE_42 = 52 ; -static const uint8_t EXPLR_MMIO_OTRCFG32_TEMPLATE_42_LEN = 4 ; -static const uint8_t EXPLR_MMIO_OTRCFG32_TEMPLATE_41 = 56 ; -static const uint8_t EXPLR_MMIO_OTRCFG32_TEMPLATE_41_LEN = 4 ; -static const uint8_t EXPLR_MMIO_OTRCFG32_TEMPLATE_40 = 60 ; -static const uint8_t EXPLR_MMIO_OTRCFG32_TEMPLATE_40_LEN = 4 ; - -static const uint8_t EXPLR_MMIO_OTRCFG54_TEMPLATE_23 = 0 ; -static const uint8_t EXPLR_MMIO_OTRCFG54_TEMPLATE_23_LEN = 4 ; -static const uint8_t EXPLR_MMIO_OTRCFG54_TEMPLATE_22 = 4 ; -static const uint8_t EXPLR_MMIO_OTRCFG54_TEMPLATE_22_LEN = 4 ; -static const uint8_t EXPLR_MMIO_OTRCFG54_TEMPLATE_21 = 8 ; -static const uint8_t EXPLR_MMIO_OTRCFG54_TEMPLATE_21_LEN = 4 ; -static const uint8_t EXPLR_MMIO_OTRCFG54_TEMPLATE_20 = 12 ; -static const uint8_t EXPLR_MMIO_OTRCFG54_TEMPLATE_20_LEN = 4 ; -static const uint8_t EXPLR_MMIO_OTRCFG54_TEMPLATE_19 = 16 ; -static const uint8_t EXPLR_MMIO_OTRCFG54_TEMPLATE_19_LEN = 4 ; -static const uint8_t EXPLR_MMIO_OTRCFG54_TEMPLATE_18 = 20 ; -static const uint8_t EXPLR_MMIO_OTRCFG54_TEMPLATE_18_LEN = 4 ; -static const uint8_t EXPLR_MMIO_OTRCFG54_TEMPLATE_17 = 24 ; -static const uint8_t EXPLR_MMIO_OTRCFG54_TEMPLATE_17_LEN = 4 ; -static const uint8_t EXPLR_MMIO_OTRCFG54_TEMPLATE_16 = 28 ; -static const uint8_t EXPLR_MMIO_OTRCFG54_TEMPLATE_16_LEN = 4 ; -static const uint8_t EXPLR_MMIO_OTRCFG54_TEMPLATE_31 = 32 ; -static const uint8_t EXPLR_MMIO_OTRCFG54_TEMPLATE_31_LEN = 4 ; -static const uint8_t EXPLR_MMIO_OTRCFG54_TEMPLATE_30 = 36 ; -static const uint8_t EXPLR_MMIO_OTRCFG54_TEMPLATE_30_LEN = 4 ; -static const uint8_t EXPLR_MMIO_OTRCFG54_TEMPLATE_29 = 40 ; -static const uint8_t EXPLR_MMIO_OTRCFG54_TEMPLATE_29_LEN = 4 ; -static const uint8_t EXPLR_MMIO_OTRCFG54_TEMPLATE_28 = 44 ; -static const uint8_t EXPLR_MMIO_OTRCFG54_TEMPLATE_28_LEN = 4 ; -static const uint8_t EXPLR_MMIO_OTRCFG54_TEMPLATE_27 = 48 ; -static const uint8_t EXPLR_MMIO_OTRCFG54_TEMPLATE_27_LEN = 4 ; -static const uint8_t EXPLR_MMIO_OTRCFG54_TEMPLATE_26 = 52 ; -static const uint8_t EXPLR_MMIO_OTRCFG54_TEMPLATE_26_LEN = 4 ; -static const uint8_t EXPLR_MMIO_OTRCFG54_TEMPLATE_25 = 56 ; -static const uint8_t EXPLR_MMIO_OTRCFG54_TEMPLATE_25_LEN = 4 ; -static const uint8_t EXPLR_MMIO_OTRCFG54_TEMPLATE_24 = 60 ; -static const uint8_t EXPLR_MMIO_OTRCFG54_TEMPLATE_24_LEN = 4 ; - -static const uint8_t EXPLR_MMIO_OTRCFG76_TEMPLATE_7 = 0 ; -static const uint8_t EXPLR_MMIO_OTRCFG76_TEMPLATE_7_LEN = 4 ; -static const uint8_t EXPLR_MMIO_OTRCFG76_TEMPLATE_6 = 4 ; -static const uint8_t EXPLR_MMIO_OTRCFG76_TEMPLATE_6_LEN = 4 ; -static const uint8_t EXPLR_MMIO_OTRCFG76_TEMPLATE_5 = 8 ; -static const uint8_t EXPLR_MMIO_OTRCFG76_TEMPLATE_5_LEN = 4 ; -static const uint8_t EXPLR_MMIO_OTRCFG76_TEMPLATE_4 = 12 ; -static const uint8_t EXPLR_MMIO_OTRCFG76_TEMPLATE_4_LEN = 4 ; -static const uint8_t EXPLR_MMIO_OTRCFG76_TEMPLATE_3 = 16 ; -static const uint8_t EXPLR_MMIO_OTRCFG76_TEMPLATE_3_LEN = 4 ; -static const uint8_t EXPLR_MMIO_OTRCFG76_TEMPLATE_2 = 20 ; -static const uint8_t EXPLR_MMIO_OTRCFG76_TEMPLATE_2_LEN = 4 ; -static const uint8_t EXPLR_MMIO_OTRCFG76_TEMPLATE_1 = 24 ; -static const uint8_t EXPLR_MMIO_OTRCFG76_TEMPLATE_1_LEN = 4 ; -static const uint8_t EXPLR_MMIO_OTRCFG76_TEMPLATE_0 = 28 ; -static const uint8_t EXPLR_MMIO_OTRCFG76_TEMPLATE_0_LEN = 4 ; -static const uint8_t EXPLR_MMIO_OTRCFG76_TEMPLATE_15 = 32 ; -static const uint8_t EXPLR_MMIO_OTRCFG76_TEMPLATE_15_LEN = 4 ; -static const uint8_t EXPLR_MMIO_OTRCFG76_TEMPLATE_14 = 36 ; -static const uint8_t EXPLR_MMIO_OTRCFG76_TEMPLATE_14_LEN = 4 ; -static const uint8_t EXPLR_MMIO_OTRCFG76_TEMPLATE_13 = 40 ; -static const uint8_t EXPLR_MMIO_OTRCFG76_TEMPLATE_13_LEN = 4 ; -static const uint8_t EXPLR_MMIO_OTRCFG76_TEMPLATE_12 = 44 ; -static const uint8_t EXPLR_MMIO_OTRCFG76_TEMPLATE_12_LEN = 4 ; -static const uint8_t EXPLR_MMIO_OTRCFG76_TEMPLATE_11 = 48 ; -static const uint8_t EXPLR_MMIO_OTRCFG76_TEMPLATE_11_LEN = 4 ; -static const uint8_t EXPLR_MMIO_OTRCFG76_TEMPLATE_10 = 52 ; -static const uint8_t EXPLR_MMIO_OTRCFG76_TEMPLATE_10_LEN = 4 ; -static const uint8_t EXPLR_MMIO_OTRCFG76_TEMPLATE_9 = 56 ; -static const uint8_t EXPLR_MMIO_OTRCFG76_TEMPLATE_9_LEN = 4 ; -static const uint8_t EXPLR_MMIO_OTRCFG76_TEMPLATE_8 = 60 ; -static const uint8_t EXPLR_MMIO_OTRCFG76_TEMPLATE_8_LEN = 4 ; - -static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_31 = 0 ; -static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_30 = 1 ; -static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_29 = 2 ; -static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_28 = 3 ; -static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_27 = 4 ; -static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_26 = 5 ; -static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_25 = 6 ; -static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_24 = 7 ; -static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_23 = 8 ; -static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_22 = 9 ; -static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_21 = 10 ; -static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_20 = 11 ; -static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_19 = 12 ; -static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_18 = 13 ; -static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_17 = 14 ; -static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_16 = 15 ; -static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_15 = 16 ; -static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_14 = 17 ; -static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_13 = 18 ; -static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_12 = 19 ; -static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_11 = 20 ; -static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_10 = 21 ; -static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_9 = 22 ; -static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_8 = 23 ; -static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_7 = 24 ; -static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_6 = 25 ; -static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_5 = 26 ; -static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_4 = 27 ; -static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_3 = 28 ; -static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_2 = 29 ; -static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_1 = 30 ; -static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_0 = 31 ; -static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_63 = 32 ; -static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_62 = 33 ; -static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_61 = 34 ; -static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_60 = 35 ; -static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_59 = 36 ; -static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_58 = 37 ; -static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_57 = 38 ; -static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_56 = 39 ; -static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_55 = 40 ; -static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_54 = 41 ; -static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_53 = 42 ; -static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_52 = 43 ; -static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_51 = 44 ; -static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_50 = 45 ; -static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_49 = 46 ; -static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_48 = 47 ; -static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_47 = 48 ; -static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_46 = 49 ; -static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_45 = 50 ; -static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_44 = 51 ; -static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_43 = 52 ; -static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_42 = 53 ; -static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_41 = 54 ; -static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_40 = 55 ; -static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_39 = 56 ; -static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_38 = 57 ; -static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_37 = 58 ; -static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_36 = 59 ; -static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_35 = 60 ; -static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_34 = 61 ; -static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_33 = 62 ; -static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_32 = 63 ; - -static const uint8_t EXPLR_MMIO_OVERCAP_OTLID_TL_MAJOR_VERSION_CAPABILITY = 0 ; -static const uint8_t EXPLR_MMIO_OVERCAP_OTLID_TL_MAJOR_VERSION_CAPABILITY_LEN = 8 ; -static const uint8_t EXPLR_MMIO_OVERCAP_OTLID_TL_MINOR_VERSION_CAPABILITY = 8 ; -static const uint8_t EXPLR_MMIO_OVERCAP_OTLID_TL_MINOR_VERSION_CAPABILITY_LEN = 8 ; - -static const uint8_t EXPLR_MMIO_OVERCFG_TL_MAJOR_VERSION_CONFIGURATION = 32 ; -static const uint8_t EXPLR_MMIO_OVERCFG_TL_MAJOR_VERSION_CONFIGURATION_LEN = 8 ; -static const uint8_t EXPLR_MMIO_OVERCFG_TL_MINOR_VERSION_CONFIGURATION = 40 ; -static const uint8_t EXPLR_MMIO_OVERCFG_TL_MINOR_VERSION_CONFIGURATION_LEN = 8 ; -static const uint8_t EXPLR_MMIO_OVERCFG_LONG_BACK_OFF_TIMER = 56 ; -static const uint8_t EXPLR_MMIO_OVERCFG_LONG_BACK_OFF_TIMER_LEN = 4 ; -static const uint8_t EXPLR_MMIO_OVERCFG_SHORT_BACK_OFF_TIMER = 60 ; -static const uint8_t EXPLR_MMIO_OVERCFG_SHORT_BACK_OFF_TIMER_LEN = 4 ; - -static const uint8_t EXPLR_MMIO_OVPD_DATA = 0 ; -static const uint8_t EXPLR_MMIO_OVPD_DATA_LEN = 32 ; -static const uint8_t EXPLR_MMIO_OVPD_FLAG = 32 ; -static const uint8_t EXPLR_MMIO_OVPD_ADDRESS = 33 ; -static const uint8_t EXPLR_MMIO_OVPD_ADDRESS_LEN = 15 ; -static const uint8_t EXPLR_MMIO_OVPD_NEXT_POINTER = 48 ; -static const uint8_t EXPLR_MMIO_OVPD_NEXT_POINTER_LEN = 8 ; -static const uint8_t EXPLR_MMIO_OVPD_CAPABILITY_ID = 56 ; -static const uint8_t EXPLR_MMIO_OVPD_CAPABILITY_ID_LEN = 8 ; - -static const uint8_t EXPLR_MMIO_OWWID10_ID = 0 ; -static const uint8_t EXPLR_MMIO_OWWID10_ID_LEN = 64 ; - -static const uint8_t EXPLR_MMIO_OWWID32_ID = 0 ; -static const uint8_t EXPLR_MMIO_OWWID32_ID_LEN = 64 ; - -static const uint8_t EXPLR_MMIO_SCOMEWD_WDATA = 0 ; -static const uint8_t EXPLR_MMIO_SCOMEWD_WDATA_LEN = 64 ; - -static const uint8_t EXPLR_MMIO_SNSC_ACTPWRUP_ACTSCOUNT = 0 ; -static const uint8_t EXPLR_MMIO_SNSC_ACTPWRUP_ACTSCOUNT_LEN = 32 ; -static const uint8_t EXPLR_MMIO_SNSC_ACTPWRUP_POWERUPSCOUNT = 32 ; -static const uint8_t EXPLR_MMIO_SNSC_ACTPWRUP_POWERUPSCOUNT_LEN = 32 ; - -static const uint8_t EXPLR_MMIO_SNSC_D0THERM_ERRORBIT = 47 ; -static const uint8_t EXPLR_MMIO_SNSC_D0THERM_THERMALDATA = 48 ; -static const uint8_t EXPLR_MMIO_SNSC_D0THERM_THERMALDATA_LEN = 16 ; - -static const uint8_t EXPLR_MMIO_SNSC_D1THERM_ERRORBIT = 47 ; -static const uint8_t EXPLR_MMIO_SNSC_D1THERM_THERMALDATA = 48 ; -static const uint8_t EXPLR_MMIO_SNSC_D1THERM_THERMALDATA_LEN = 16 ; - -static const uint8_t EXPLR_MMIO_SNSC_FRAMESR_FRAMECOUNT = 0 ; -static const uint8_t EXPLR_MMIO_SNSC_FRAMESR_FRAMECOUNT_LEN = 32 ; -static const uint8_t EXPLR_MMIO_SNSC_FRAMESR_SELFREFRESHCOUNT = 32 ; -static const uint8_t EXPLR_MMIO_SNSC_FRAMESR_SELFREFRESHCOUNT_LEN = 8 ; - -static const uint8_t EXPLR_MMIO_SNSC_HISTOBASELOW_HISTOGRAMBASECOUNT = 0 ; -static const uint8_t EXPLR_MMIO_SNSC_HISTOBASELOW_HISTOGRAMBASECOUNT_LEN = 32 ; -static const uint8_t EXPLR_MMIO_SNSC_HISTOBASELOW_HISTOGRAMLOWCOUNT = 32 ; -static const uint8_t EXPLR_MMIO_SNSC_HISTOBASELOW_HISTOGRAMLOWCOUNT_LEN = 32 ; - -static const uint8_t EXPLR_MMIO_SNSC_HISTOMEDHIGH_HISTOGRAMMEDCOUNT = 0 ; -static const uint8_t EXPLR_MMIO_SNSC_HISTOMEDHIGH_HISTOGRAMMEDCOUNT_LEN = 32 ; -static const uint8_t EXPLR_MMIO_SNSC_HISTOMEDHIGH_HISTOGRAMHIGHCOUNT = 32 ; -static const uint8_t EXPLR_MMIO_SNSC_HISTOMEDHIGH_HISTOGRAMHIGHCOUNT_LEN = 32 ; - -static const uint8_t EXPLR_MMIO_SNSC_OCTHERM_ERRORBIT = 47 ; -static const uint8_t EXPLR_MMIO_SNSC_OCTHERM_THERMALDATA = 48 ; -static const uint8_t EXPLR_MMIO_SNSC_OCTHERM_THERMALDATA_LEN = 16 ; - -static const uint8_t EXPLR_MMIO_SNSC_RDWR_READSCOUNT = 0 ; -static const uint8_t EXPLR_MMIO_SNSC_RDWR_READSCOUNT_LEN = 32 ; -static const uint8_t EXPLR_MMIO_SNSC_RDWR_WRITESCOUNT = 32 ; -static const uint8_t EXPLR_MMIO_SNSC_RDWR_WRITESCOUNT_LEN = 32 ; - -static const uint8_t EXPLR_MMIO_SNSC_STATEREG_STREGISTER = 0 ; -static const uint8_t EXPLR_MMIO_SNSC_STATEREG_STREGISTER_LEN = 22 ; - -static const uint8_t EXPLR_RDF_AACR_ADDRESS = 0 ; -static const uint8_t EXPLR_RDF_AACR_ADDRESS_LEN = 7 ; -static const uint8_t EXPLR_RDF_AACR_AUTOINC = 7 ; - -static const uint8_t EXPLR_RDF_AADR_DATA = 0 ; -static const uint8_t EXPLR_RDF_AADR_DATA_LEN = 64 ; - -static const uint8_t EXPLR_RDF_AAER_DATA = 0 ; -static const uint8_t EXPLR_RDF_AAER_DATA_LEN = 8 ; - -static const uint8_t EXPLR_RDF_ACTION0_FIR = 0 ; -static const uint8_t EXPLR_RDF_ACTION0_FIR_LEN = 64 ; - -static const uint8_t EXPLR_RDF_ACTION1_FIR = 0 ; -static const uint8_t EXPLR_RDF_ACTION1_FIR_LEN = 64 ; - -static const uint8_t EXPLR_RDF_CERR0_MSR_PE = 12 ; -static const uint8_t EXPLR_RDF_CERR0_EICR_PE = 13 ; -static const uint8_t EXPLR_RDF_CERR0_HWMSX_PE = 16 ; -static const uint8_t EXPLR_RDF_CERR0_HWMSX_PE_LEN = 8 ; -static const uint8_t EXPLR_RDF_CERR0_FWMSX_PE = 24 ; -static const uint8_t EXPLR_RDF_CERR0_FWMSX_PE_LEN = 8 ; -static const uint8_t EXPLR_RDF_CERR0_RSPAR_PE = 32 ; -static const uint8_t EXPLR_RDF_CERR0_AACR_PE = 41 ; -static const uint8_t EXPLR_RDF_CERR0_MCBCM_PE = 44 ; -static const uint8_t EXPLR_RDF_CERR0_RECR_PE = 45 ; -static const uint8_t EXPLR_RDF_CERR0_DBGR_PE = 46 ; -static const uint8_t EXPLR_RDF_CERR0_MASK0_PE = 48 ; -static const uint8_t EXPLR_RDF_CERR0_MASK1_PE = 49 ; -static const uint8_t EXPLR_RDF_CERR0_CGDR_PE = 50 ; - -static const uint8_t EXPLR_RDF_CERR1_ECC_CTL_AF_PERR = 0 ; -static const uint8_t EXPLR_RDF_CERR1_ECC_CTL_TCHN_PERR = 1 ; -static const uint8_t EXPLR_RDF_CERR1_ECC_CTL_CMPMODE_ERR = 2 ; -static const uint8_t EXPLR_RDF_CERR1_ECC_PIPE_PCX_PERR = 3 ; -static const uint8_t EXPLR_RDF_CERR1_ECC_PIPE_SYND_PERR = 4 ; -static const uint8_t EXPLR_RDF_CERR1_ECC_PIPE_2SYM_PERR = 5 ; -static const uint8_t EXPLR_RDF_CERR1_ECC_PIPE_CPLX_PERR = 6 ; -static const uint8_t EXPLR_RDF_CERR1_ECC_PIPE_EP2_PERR = 7 ; -static const uint8_t EXPLR_RDF_CERR1_READ_ECC_DATAPATH_PARITY_ERROR = 8 ; -static const uint8_t EXPLR_RDF_CERR1_ECC_PIPE_CMX_PERR = 9 ; -static const uint8_t EXPLR_RDF_CERR1_ECC_PIPE_VP1_PERR = 10 ; -static const uint8_t EXPLR_RDF_CERR1_ECC_PIPE_VP2_PERR = 11 ; -static const uint8_t EXPLR_RDF_CERR1_ECC_PIPE_SYG_PERR = 12 ; -static const uint8_t EXPLR_RDF_CERR1_ECC_PIPE_EF1_PERR = 13 ; -static const uint8_t EXPLR_RDF_CERR1_ECC_PIPE_MK3_PERR = 14 ; -static const uint8_t EXPLR_RDF_CERR1_ECC_PIPE_E1A_PERR = 15 ; -static const uint8_t EXPLR_RDF_CERR1_UNEXPECTED_RDDATA_VALID = 16 ; -static const uint8_t EXPLR_RDF_CERR1_MISSING_RDDATA_VALID = 17 ; -static const uint8_t EXPLR_RDF_CERR1_RBUF_ECC_ERR_CE_DW0 = 20 ; -static const uint8_t EXPLR_RDF_CERR1_RBUF_ECC_ERR_UE_DW0 = 21 ; -static const uint8_t EXPLR_RDF_CERR1_RBUF_ECC_ERR_CE_DW1 = 22 ; -static const uint8_t EXPLR_RDF_CERR1_RBUF_ECC_ERR_UE_DW1 = 23 ; -static const uint8_t EXPLR_RDF_CERR1_RD_BUFF_ECC_ERR_SYNDROME = 24 ; -static const uint8_t EXPLR_RDF_CERR1_RD_BUFF_ECC_ERR_SYNDROME_LEN = 8 ; - -static const uint8_t EXPLR_RDF_CGDR_CGDIS_PCTL = 0 ; -static const uint8_t EXPLR_RDF_CGDR_CGDIS_RESP = 1 ; -static const uint8_t EXPLR_RDF_CGDR_CGDIS_RMW = 2 ; -static const uint8_t EXPLR_RDF_CGDR_CGDIS_LPTR = 3 ; -static const uint8_t EXPLR_RDF_CGDR_CGDIS_AHASH = 4 ; -static const uint8_t EXPLR_RDF_CGDR_CGDIS_STG = 5 ; -static const uint8_t EXPLR_RDF_CGDR_CGDIS_OUT = 6 ; -static const uint8_t EXPLR_RDF_CGDR_CGDIS_TLM = 7 ; -static const uint8_t EXPLR_RDF_CGDR_CGDIS_BD = 8 ; -static const uint8_t EXPLR_RDF_CGDR_CGDIS_DCMP = 9 ; -static const uint8_t EXPLR_RDF_CGDR_CGDIS_RBCTL = 10 ; -static const uint8_t EXPLR_RDF_CGDR_CGDIS_RBRMW = 11 ; -static const uint8_t EXPLR_RDF_CGDR_CGDIS_RBTRC = 12 ; -static const uint8_t EXPLR_RDF_CGDR_CGDIS_MPE = 13 ; -static const uint8_t EXPLR_RDF_CGDR_CGDIS_CONF = 14 ; -static const uint8_t EXPLR_RDF_CGDR_CGDIS_HWMS = 15 ; -static const uint8_t EXPLR_RDF_CGDR_PSDIS_ZERO_SYND = 16 ; -static const uint8_t EXPLR_RDF_CGDR_PSDIS_SAME_MARKS = 17 ; -static const uint8_t EXPLR_RDF_CGDR_PSDIS_SAME_STEER = 18 ; -static const uint8_t EXPLR_RDF_CGDR_CGDIS_SPARE = 19 ; - -static const uint8_t EXPLR_RDF_CTCR_MPE_TIMER = 0 ; -static const uint8_t EXPLR_RDF_CTCR_MPE_TIMER_LEN = 6 ; -static const uint8_t EXPLR_RDF_CTCR_MPE_TIMEBASE = 6 ; -static const uint8_t EXPLR_RDF_CTCR_MPE_TIMEBASE_LEN = 3 ; -static const uint8_t EXPLR_RDF_CTCR_UE_TIMER = 9 ; -static const uint8_t EXPLR_RDF_CTCR_UE_TIMER_LEN = 6 ; -static const uint8_t EXPLR_RDF_CTCR_UE_TIMEBASE = 15 ; -static const uint8_t EXPLR_RDF_CTCR_UE_TIMEBASE_LEN = 3 ; -static const uint8_t EXPLR_RDF_CTCR_UE_LOCKOUT_ENABLE = 18 ; - -static const uint8_t EXPLR_RDF_DBGR_PRIMARY_SELECT = 0 ; -static const uint8_t EXPLR_RDF_DBGR_PRIMARY_SELECT_LEN = 4 ; -static const uint8_t EXPLR_RDF_DBGR_SECONDARY_SELECT = 4 ; -static const uint8_t EXPLR_RDF_DBGR_SECONDARY_SELECT_LEN = 4 ; -static const uint8_t EXPLR_RDF_DBGR_EPX_CHIP = 8 ; -static const uint8_t EXPLR_RDF_DBGR_EPX_SYMS = 9 ; -static const uint8_t EXPLR_RDF_DBGR_TRACE_ALWAYS = 10 ; -static const uint8_t EXPLR_RDF_DBGR_WAT_ENABLE = 11 ; -static const uint8_t EXPLR_RDF_DBGR_WAT_ACTION_SELECT = 12 ; -static const uint8_t EXPLR_RDF_DBGR_WAT_SOURCE = 13 ; -static const uint8_t EXPLR_RDF_DBGR_WAT_SOURCE_LEN = 2 ; - -static const uint8_t EXPLR_RDF_EICR_ADDRESS = 0 ; -static const uint8_t EXPLR_RDF_EICR_ADDRESS_LEN = 37 ; -static const uint8_t EXPLR_RDF_EICR_RESERVED = 37 ; -static const uint8_t EXPLR_RDF_EICR_PERSIST = 38 ; -static const uint8_t EXPLR_RDF_EICR_PERSIST_LEN = 2 ; -static const uint8_t EXPLR_RDF_EICR_REGION = 40 ; -static const uint8_t EXPLR_RDF_EICR_REGION_LEN = 3 ; -static const uint8_t EXPLR_RDF_EICR_TYPE = 43 ; -static const uint8_t EXPLR_RDF_EICR_TYPE_LEN = 5 ; -static const uint8_t EXPLR_RDF_EICR_MISC = 48 ; -static const uint8_t EXPLR_RDF_EICR_MISC_LEN = 6 ; - -static const uint8_t EXPLR_RDF_ELPR_LOG_FULL = 0 ; -static const uint8_t EXPLR_RDF_ELPR_LOG_POINTER = 2 ; -static const uint8_t EXPLR_RDF_ELPR_LOG_POINTER_LEN = 6 ; - -static const uint8_t EXPLR_RDF_ERR_HOLD_LAT_FIR_MASK_PAR = 0 ; -static const uint8_t EXPLR_RDF_ERR_HOLD_LAT_FIR_ACTION0_PAR = 1 ; -static const uint8_t EXPLR_RDF_ERR_HOLD_LAT_FIR_ACTION1_PAR = 2 ; - -static const uint8_t EXPLR_RDF_ERR_MASK_LAT_FIR_PAR = 0 ; -static const uint8_t EXPLR_RDF_ERR_MASK_LAT_FIR_ACTION0_PAR = 1 ; -static const uint8_t EXPLR_RDF_ERR_MASK_LAT_FIR_ACTION1_PAR = 2 ; - -static const uint8_t EXPLR_RDF_FIR_MAINLINE_MPE_RANK_0_TO_7 = 0 ; -static const uint8_t EXPLR_RDF_FIR_MAINLINE_MPE_RANK_0_TO_7_LEN = 8 ; -static const uint8_t EXPLR_RDF_FIR_MAINLINE_NCE = 8 ; -static const uint8_t EXPLR_RDF_FIR_MAINLINE_TCE = 9 ; -static const uint8_t EXPLR_RDF_FIR_MAINLINE_SCE = 10 ; -static const uint8_t EXPLR_RDF_FIR_MAINLINE_MCE = 11 ; -static const uint8_t EXPLR_RDF_FIR_MAINLINE_SUE = 12 ; -static const uint8_t EXPLR_RDF_FIR_MAINLINE_AUE = 13 ; -static const uint8_t EXPLR_RDF_FIR_MAINLINE_UE = 14 ; -static const uint8_t EXPLR_RDF_FIR_MAINLINE_RCD = 15 ; -static const uint8_t EXPLR_RDF_FIR_MAINLINE_IAUE = 16 ; -static const uint8_t EXPLR_RDF_FIR_MAINLINE_IUE = 17 ; -static const uint8_t EXPLR_RDF_FIR_MAINLINE_IRCD = 18 ; -static const uint8_t EXPLR_RDF_FIR_MAINLINE_IMPE = 19 ; -static const uint8_t EXPLR_RDF_FIR_MAINTENANCE_MPE_RANK_0_TO_7 = 20 ; -static const uint8_t EXPLR_RDF_FIR_MAINTENANCE_MPE_RANK_0_TO_7_LEN = 8 ; -static const uint8_t EXPLR_RDF_FIR_MAINTENANCE_NCE = 28 ; -static const uint8_t EXPLR_RDF_FIR_MAINTENANCE_TCE = 29 ; -static const uint8_t EXPLR_RDF_FIR_MAINTENANCE_SCE = 30 ; -static const uint8_t EXPLR_RDF_FIR_MAINTENANCE_MCE = 31 ; -static const uint8_t EXPLR_RDF_FIR_MAINTENANCE_SUE = 32 ; -static const uint8_t EXPLR_RDF_FIR_MAINTENANCE_AUE = 33 ; -static const uint8_t EXPLR_RDF_FIR_MAINTENANCE_UE = 34 ; -static const uint8_t EXPLR_RDF_FIR_MAINTENANCE_RCD = 35 ; -static const uint8_t EXPLR_RDF_FIR_MAINTENANCE_IAUE = 36 ; -static const uint8_t EXPLR_RDF_FIR_MAINTENANCE_IUE = 37 ; -static const uint8_t EXPLR_RDF_FIR_MAINTENANCE_IRCD = 38 ; -static const uint8_t EXPLR_RDF_FIR_MAINTENANCE_IMPE = 39 ; -static const uint8_t EXPLR_RDF_FIR_RDDATA_VALID_ERROR = 40 ; -static const uint8_t EXPLR_RDF_FIR_SCOM_PARITY_CLASS_STATUS = 41 ; -static const uint8_t EXPLR_RDF_FIR_SCOM_PARITY_CLASS_RECOVERABLE = 42 ; -static const uint8_t EXPLR_RDF_FIR_SCOM_PARITY_CLASS_UNRECOVERABLE = 43 ; -static const uint8_t EXPLR_RDF_FIR_ECC_CORRECTOR_INTERNAL_PARITY_ERROR = 44 ; -static const uint8_t EXPLR_RDF_FIR_ECC_RBUF_CE_DW0 = 45 ; -static const uint8_t EXPLR_RDF_FIR_ECC_RBUF_CE_DW1 = 46 ; -static const uint8_t EXPLR_RDF_FIR_ECC_RBUF_UE_DW0 = 47 ; -static const uint8_t EXPLR_RDF_FIR_ECC_RBUF_UE_DW1 = 48 ; -static const uint8_t EXPLR_RDF_FIR_RESERVED_49_59 = 49 ; -static const uint8_t EXPLR_RDF_FIR_RESERVED_49_59_LEN = 11 ; -static const uint8_t EXPLR_RDF_FIR_SCOM_PARITY_DEBUG_WAT = 60 ; -static const uint8_t EXPLR_RDF_FIR_RESERVED = 61 ; -static const uint8_t EXPLR_RDF_FIR_INTERNAL_SCOM_ERROR = 62 ; -static const uint8_t EXPLR_RDF_FIR_INTERNAL_SCOM_ERROR_COPY = 63 ; - -static const uint8_t EXPLR_RDF_FWMS0_MARK = 0 ; -static const uint8_t EXPLR_RDF_FWMS0_MARK_LEN = 8 ; -static const uint8_t EXPLR_RDF_FWMS0_TYPE = 8 ; -static const uint8_t EXPLR_RDF_FWMS0_REGION = 9 ; -static const uint8_t EXPLR_RDF_FWMS0_REGION_LEN = 3 ; -static const uint8_t EXPLR_RDF_FWMS0_ADDRESS = 12 ; -static const uint8_t EXPLR_RDF_FWMS0_ADDRESS_LEN = 11 ; -static const uint8_t EXPLR_RDF_FWMS0_EXIT_1 = 23 ; - -static const uint8_t EXPLR_RDF_FWMS1_MARK = 0 ; -static const uint8_t EXPLR_RDF_FWMS1_MARK_LEN = 8 ; -static const uint8_t EXPLR_RDF_FWMS1_TYPE = 8 ; -static const uint8_t EXPLR_RDF_FWMS1_REGION = 9 ; -static const uint8_t EXPLR_RDF_FWMS1_REGION_LEN = 3 ; -static const uint8_t EXPLR_RDF_FWMS1_ADDRESS = 12 ; -static const uint8_t EXPLR_RDF_FWMS1_ADDRESS_LEN = 11 ; -static const uint8_t EXPLR_RDF_FWMS1_EXIT_1 = 23 ; - -static const uint8_t EXPLR_RDF_FWMS2_MARK = 0 ; -static const uint8_t EXPLR_RDF_FWMS2_MARK_LEN = 8 ; -static const uint8_t EXPLR_RDF_FWMS2_TYPE = 8 ; -static const uint8_t EXPLR_RDF_FWMS2_REGION = 9 ; -static const uint8_t EXPLR_RDF_FWMS2_REGION_LEN = 3 ; -static const uint8_t EXPLR_RDF_FWMS2_ADDRESS = 12 ; -static const uint8_t EXPLR_RDF_FWMS2_ADDRESS_LEN = 11 ; -static const uint8_t EXPLR_RDF_FWMS2_EXIT_1 = 23 ; - -static const uint8_t EXPLR_RDF_FWMS3_MARK = 0 ; -static const uint8_t EXPLR_RDF_FWMS3_MARK_LEN = 8 ; -static const uint8_t EXPLR_RDF_FWMS3_TYPE = 8 ; -static const uint8_t EXPLR_RDF_FWMS3_REGION = 9 ; -static const uint8_t EXPLR_RDF_FWMS3_REGION_LEN = 3 ; -static const uint8_t EXPLR_RDF_FWMS3_ADDRESS = 12 ; -static const uint8_t EXPLR_RDF_FWMS3_ADDRESS_LEN = 11 ; -static const uint8_t EXPLR_RDF_FWMS3_EXIT_1 = 23 ; - -static const uint8_t EXPLR_RDF_FWMS4_MARK = 0 ; -static const uint8_t EXPLR_RDF_FWMS4_MARK_LEN = 8 ; -static const uint8_t EXPLR_RDF_FWMS4_TYPE = 8 ; -static const uint8_t EXPLR_RDF_FWMS4_REGION = 9 ; -static const uint8_t EXPLR_RDF_FWMS4_REGION_LEN = 3 ; -static const uint8_t EXPLR_RDF_FWMS4_ADDRESS = 12 ; -static const uint8_t EXPLR_RDF_FWMS4_ADDRESS_LEN = 11 ; -static const uint8_t EXPLR_RDF_FWMS4_EXIT_1 = 23 ; - -static const uint8_t EXPLR_RDF_FWMS5_MARK = 0 ; -static const uint8_t EXPLR_RDF_FWMS5_MARK_LEN = 8 ; -static const uint8_t EXPLR_RDF_FWMS5_TYPE = 8 ; -static const uint8_t EXPLR_RDF_FWMS5_REGION = 9 ; -static const uint8_t EXPLR_RDF_FWMS5_REGION_LEN = 3 ; -static const uint8_t EXPLR_RDF_FWMS5_ADDRESS = 12 ; -static const uint8_t EXPLR_RDF_FWMS5_ADDRESS_LEN = 11 ; -static const uint8_t EXPLR_RDF_FWMS5_EXIT_1 = 23 ; - -static const uint8_t EXPLR_RDF_FWMS6_MARK = 0 ; -static const uint8_t EXPLR_RDF_FWMS6_MARK_LEN = 8 ; -static const uint8_t EXPLR_RDF_FWMS6_TYPE = 8 ; -static const uint8_t EXPLR_RDF_FWMS6_REGION = 9 ; -static const uint8_t EXPLR_RDF_FWMS6_REGION_LEN = 3 ; -static const uint8_t EXPLR_RDF_FWMS6_ADDRESS = 12 ; -static const uint8_t EXPLR_RDF_FWMS6_ADDRESS_LEN = 11 ; -static const uint8_t EXPLR_RDF_FWMS6_EXIT_1 = 23 ; - -static const uint8_t EXPLR_RDF_FWMS7_MARK = 0 ; -static const uint8_t EXPLR_RDF_FWMS7_MARK_LEN = 8 ; -static const uint8_t EXPLR_RDF_FWMS7_TYPE = 8 ; -static const uint8_t EXPLR_RDF_FWMS7_REGION = 9 ; -static const uint8_t EXPLR_RDF_FWMS7_REGION_LEN = 3 ; -static const uint8_t EXPLR_RDF_FWMS7_ADDRESS = 12 ; -static const uint8_t EXPLR_RDF_FWMS7_ADDRESS_LEN = 11 ; -static const uint8_t EXPLR_RDF_FWMS7_EXIT_1 = 23 ; - -static const uint8_t EXPLR_RDF_HWMS0_CHIPMARK = 0 ; -static const uint8_t EXPLR_RDF_HWMS0_CHIPMARK_LEN = 8 ; -static const uint8_t EXPLR_RDF_HWMS0_CONFIRMED = 8 ; -static const uint8_t EXPLR_RDF_HWMS0_EXIT_1 = 9 ; - -static const uint8_t EXPLR_RDF_HWMS1_CHIPMARK = 0 ; -static const uint8_t EXPLR_RDF_HWMS1_CHIPMARK_LEN = 8 ; -static const uint8_t EXPLR_RDF_HWMS1_CONFIRMED = 8 ; -static const uint8_t EXPLR_RDF_HWMS1_EXIT_1 = 9 ; - -static const uint8_t EXPLR_RDF_HWMS2_CHIPMARK = 0 ; -static const uint8_t EXPLR_RDF_HWMS2_CHIPMARK_LEN = 8 ; -static const uint8_t EXPLR_RDF_HWMS2_CONFIRMED = 8 ; -static const uint8_t EXPLR_RDF_HWMS2_EXIT_1 = 9 ; - -static const uint8_t EXPLR_RDF_HWMS3_CHIPMARK = 0 ; -static const uint8_t EXPLR_RDF_HWMS3_CHIPMARK_LEN = 8 ; -static const uint8_t EXPLR_RDF_HWMS3_CONFIRMED = 8 ; -static const uint8_t EXPLR_RDF_HWMS3_EXIT_1 = 9 ; - -static const uint8_t EXPLR_RDF_HWMS4_CHIPMARK = 0 ; -static const uint8_t EXPLR_RDF_HWMS4_CHIPMARK_LEN = 8 ; -static const uint8_t EXPLR_RDF_HWMS4_CONFIRMED = 8 ; -static const uint8_t EXPLR_RDF_HWMS4_EXIT_1 = 9 ; - -static const uint8_t EXPLR_RDF_HWMS5_CHIPMARK = 0 ; -static const uint8_t EXPLR_RDF_HWMS5_CHIPMARK_LEN = 8 ; -static const uint8_t EXPLR_RDF_HWMS5_CONFIRMED = 8 ; -static const uint8_t EXPLR_RDF_HWMS5_EXIT_1 = 9 ; - -static const uint8_t EXPLR_RDF_HWMS6_CHIPMARK = 0 ; -static const uint8_t EXPLR_RDF_HWMS6_CHIPMARK_LEN = 8 ; -static const uint8_t EXPLR_RDF_HWMS6_CONFIRMED = 8 ; -static const uint8_t EXPLR_RDF_HWMS6_EXIT_1 = 9 ; - -static const uint8_t EXPLR_RDF_HWMS7_CHIPMARK = 0 ; -static const uint8_t EXPLR_RDF_HWMS7_CHIPMARK_LEN = 8 ; -static const uint8_t EXPLR_RDF_HWMS7_CONFIRMED = 8 ; -static const uint8_t EXPLR_RDF_HWMS7_EXIT_1 = 9 ; - -static const uint8_t EXPLR_RDF_MASK_FIR = 0 ; -static const uint8_t EXPLR_RDF_MASK_FIR_LEN = 64 ; - -static const uint8_t EXPLR_RDF_MASK0_MSR_PE = 12 ; -static const uint8_t EXPLR_RDF_MASK0_EICR_PE = 13 ; -static const uint8_t EXPLR_RDF_MASK0_HWMSX_PE = 16 ; -static const uint8_t EXPLR_RDF_MASK0_HWMSX_PE_LEN = 8 ; -static const uint8_t EXPLR_RDF_MASK0_FWMSX_PE = 24 ; -static const uint8_t EXPLR_RDF_MASK0_FWMSX_PE_LEN = 8 ; -static const uint8_t EXPLR_RDF_MASK0_RSPAR_PE = 32 ; -static const uint8_t EXPLR_RDF_MASK0_CTCR_PE = 40 ; -static const uint8_t EXPLR_RDF_MASK0_AACR_PE = 41 ; -static const uint8_t EXPLR_RDF_MASK0_MCBCM_PE = 44 ; -static const uint8_t EXPLR_RDF_MASK0_RECR_PE = 45 ; -static const uint8_t EXPLR_RDF_MASK0_DBGR_PE = 46 ; -static const uint8_t EXPLR_RDF_MASK0_MASK0_PE = 48 ; -static const uint8_t EXPLR_RDF_MASK0_MASK1_PE = 49 ; -static const uint8_t EXPLR_RDF_MASK0_CGDR_PE = 50 ; - -static const uint8_t EXPLR_RDF_MASK1_ECC_CTL_AF_PERR = 0 ; -static const uint8_t EXPLR_RDF_MASK1_ECC_CTL_TCHN_PERR = 1 ; -static const uint8_t EXPLR_RDF_MASK1_ECC_CTL_CMPMODE_ERR = 2 ; -static const uint8_t EXPLR_RDF_MASK1_ECC_PIPE_PCX_PERR = 3 ; -static const uint8_t EXPLR_RDF_MASK1_ECC_PIPE_SYND_PERR = 4 ; -static const uint8_t EXPLR_RDF_MASK1_ECC_PIPE_2SYM_PERR = 5 ; -static const uint8_t EXPLR_RDF_MASK1_ECC_PIPE_CPLX_PERR = 6 ; -static const uint8_t EXPLR_RDF_MASK1_ECC_PIPE_EP2_PERR = 7 ; -static const uint8_t EXPLR_RDF_MASK1_READ_ECC_DATAPATH_PARITY_ERROR = 8 ; -static const uint8_t EXPLR_RDF_MASK1_ECC_PIPE_CMX_PERR = 9 ; -static const uint8_t EXPLR_RDF_MASK1_ECC_PIPE_VP1_PERR = 10 ; -static const uint8_t EXPLR_RDF_MASK1_ECC_PIPE_VP2_PERR = 11 ; -static const uint8_t EXPLR_RDF_MASK1_ECC_PIPE_SYG_PERR = 12 ; -static const uint8_t EXPLR_RDF_MASK1_ECC_PIPE_EF1_PERR = 13 ; -static const uint8_t EXPLR_RDF_MASK1_ECC_PIPE_MK3_PERR = 14 ; -static const uint8_t EXPLR_RDF_MASK1_ECC_PIPE_E1A_PERR = 15 ; -static const uint8_t EXPLR_RDF_MASK1_UNEXPECTED_RDDATA_VALID = 16 ; -static const uint8_t EXPLR_RDF_MASK1_MISSING_RDDATA_VALID = 17 ; - -static const uint8_t EXPLR_RDF_MCBCM_MCBIST_HALF_COMPARE_MASK = 0 ; -static const uint8_t EXPLR_RDF_MCBCM_MCBIST_HALF_COMPARE_MASK_LEN = 40 ; -static const uint8_t EXPLR_RDF_MCBCM_MCBIST_MASK_COVERAGE_SELECTOR = 40 ; -static const uint8_t EXPLR_RDF_MCBCM_MCBIST_TRAP_NONSTOP = 41 ; -static const uint8_t EXPLR_RDF_MCBCM_MCBIST_TRAP_CE_ENABLE = 42 ; -static const uint8_t EXPLR_RDF_MCBCM_MCBIST_TRAP_MPE_ENABLE = 43 ; -static const uint8_t EXPLR_RDF_MCBCM_MCBIST_TRAP_UE_ENABLE = 44 ; - -static const uint8_t EXPLR_RDF_MSR_CHIPMARK = 8 ; -static const uint8_t EXPLR_RDF_MSR_CHIPMARK_LEN = 8 ; -static const uint8_t EXPLR_RDF_MSR_RANK = 16 ; -static const uint8_t EXPLR_RDF_MSR_RANK_LEN = 3 ; - -static const uint8_t EXPLR_RDF_RECR_MBSECCQ_DISABLE_MEMORY_ECC_CHECK_CORRECT = 0 ; -static const uint8_t EXPLR_RDF_RECR_MBSECCQ_DISABLE_MEMORY_ECC_CORRECT = 1 ; -static const uint8_t EXPLR_RDF_RECR_MBSECCQ_DISABLE_MARK_STORE_WRITE = 2 ; -static const uint8_t EXPLR_RDF_RECR_MBSECCQ_DISABLE_UE_RETRY = 3 ; -static const uint8_t EXPLR_RDF_RECR_MBSECCQ_ITAG_METADATA_ENABLE = 4 ; -static const uint8_t EXPLR_RDF_RECR_DISABLE_RCD_CHECK = 5 ; -static const uint8_t EXPLR_RDF_RECR_DISABLE_RDDATA_VALID_CHECK = 6 ; -static const uint8_t EXPLR_RDF_RECR_MBSECCQ_DISABLE_UTC_EXIT_INCREASE = 8 ; -static const uint8_t EXPLR_RDF_RECR_MBSECCQ_EXIT_OVERRIDE = 9 ; -static const uint8_t EXPLR_RDF_RECR_MBSECCQ_EXIT_OVERRIDE_LEN = 2 ; -static const uint8_t EXPLR_RDF_RECR_MBSECCQ_HWMARK_EXIT1 = 11 ; -static const uint8_t EXPLR_RDF_RECR_CAPPTAG_BYPASS_BIT_ENABLE = 14 ; -static const uint8_t EXPLR_RDF_RECR_CAPPTAG_RETRY_BIT_ENABLE = 15 ; -static const uint8_t EXPLR_RDF_RECR_CAPPTAG_BYPASS_BIT_SELECT = 16 ; -static const uint8_t EXPLR_RDF_RECR_CAPPTAG_BYPASS_BIT_SELECT_LEN = 4 ; -static const uint8_t EXPLR_RDF_RECR_CAPPTAG_RETRY_BIT_SELECT = 20 ; -static const uint8_t EXPLR_RDF_RECR_CAPPTAG_RETRY_BIT_SELECT_LEN = 4 ; -static const uint8_t EXPLR_RDF_RECR_MBSECCQ_DISABLE_MPE_CONFIRM = 25 ; -static const uint8_t EXPLR_RDF_RECR_MBSECCQ_ENABLE_UE_NOISE_WINDOW = 26 ; -static const uint8_t EXPLR_RDF_RECR_MBSECCQ_ENABLE_TCE_CORRECTION = 27 ; -static const uint8_t EXPLR_RDF_RECR_MBSECCQ_ENABLE_CHIPMARKED_SCE_NCE = 28 ; -static const uint8_t EXPLR_RDF_RECR_MBSECCQ_USE_ADDRESS_HASH = 29 ; -static const uint8_t EXPLR_RDF_RECR_MBSECCQ_DATA_INVERSION = 30 ; -static const uint8_t EXPLR_RDF_RECR_MBSECCQ_DATA_INVERSION_LEN = 2 ; -static const uint8_t EXPLR_RDF_RECR_MBSECCQ_DISABLE_PIPE_NOERR_CLOCK_GATING = 32 ; -static const uint8_t EXPLR_RDF_RECR_MBSECCQ_MAINT_NO_RETRY_UE = 33 ; -static const uint8_t EXPLR_RDF_RECR_MBSECCQ_MAINT_NO_RETRY_MPE = 34 ; -static const uint8_t EXPLR_RDF_RECR_MBSECCQ_ENABLE_BYPASS_MARK_PLACE = 39 ; -static const uint8_t EXPLR_RDF_RECR_CFG_MAINT_USE_TIMERS = 40 ; -static const uint8_t EXPLR_RDF_RECR_HWMS_RANK_SELECT = 41 ; -static const uint8_t EXPLR_RDF_RECR_HWMS_RANK_SELECT_LEN = 6 ; - -static const uint8_t EXPLR_RDF_RSPAR_CFG_STEERING_R0_LEFT = 0 ; -static const uint8_t EXPLR_RDF_RSPAR_CFG_STEERING_R0_LEFT_LEN = 5 ; -static const uint8_t EXPLR_RDF_RSPAR_CFG_STEERING_R0_RIGHT = 5 ; -static const uint8_t EXPLR_RDF_RSPAR_CFG_STEERING_R0_RIGHT_LEN = 5 ; -static const uint8_t EXPLR_RDF_RSPAR_CFG_STEERING_R1_LEFT = 10 ; -static const uint8_t EXPLR_RDF_RSPAR_CFG_STEERING_R1_LEFT_LEN = 5 ; -static const uint8_t EXPLR_RDF_RSPAR_CFG_STEERING_R1_RIGHT = 15 ; -static const uint8_t EXPLR_RDF_RSPAR_CFG_STEERING_R1_RIGHT_LEN = 5 ; -static const uint8_t EXPLR_RDF_RSPAR_CFG_STEERING_R2_LEFT = 20 ; -static const uint8_t EXPLR_RDF_RSPAR_CFG_STEERING_R2_LEFT_LEN = 5 ; -static const uint8_t EXPLR_RDF_RSPAR_CFG_STEERING_R2_RIGHT = 25 ; -static const uint8_t EXPLR_RDF_RSPAR_CFG_STEERING_R2_RIGHT_LEN = 5 ; -static const uint8_t EXPLR_RDF_RSPAR_CFG_STEERING_R3_LEFT = 30 ; -static const uint8_t EXPLR_RDF_RSPAR_CFG_STEERING_R3_LEFT_LEN = 5 ; -static const uint8_t EXPLR_RDF_RSPAR_CFG_STEERING_R3_RIGHT = 35 ; -static const uint8_t EXPLR_RDF_RSPAR_CFG_STEERING_R3_RIGHT_LEN = 5 ; - -static const uint8_t EXPLR_RDF_WOF_FIR = 0 ; -static const uint8_t EXPLR_RDF_WOF_FIR_LEN = 64 ; - -static const uint8_t EXPLR_SRQ_ERR_HOLD_LAT_FIR_MASK_PAR = 0 ; -static const uint8_t EXPLR_SRQ_ERR_HOLD_LAT_FIR_ACTION0_PAR = 1 ; -static const uint8_t EXPLR_SRQ_ERR_HOLD_LAT_FIR_ACTION1_PAR = 2 ; - -static const uint8_t EXPLR_SRQ_ERR_MASK_LAT_FIR_PAR = 0 ; -static const uint8_t EXPLR_SRQ_ERR_MASK_LAT_FIR_ACTION0_PAR = 1 ; -static const uint8_t EXPLR_SRQ_ERR_MASK_LAT_FIR_ACTION1_PAR = 2 ; - -static const uint8_t EXPLR_SRQ_MBAREF0Q_CFG_REFRESH_ENABLE = 0 ; -static const uint8_t EXPLR_SRQ_MBAREF0Q_CFG_REFRESH_INTERVAL_TIMEBASE_SELECT = 1 ; +static const uint8_t EXPLR_MCBIST_MCBSTATQ_RESERVED_1_3 = 1 ; +static const uint8_t EXPLR_MCBIST_MCBSTATQ_RESERVED_1_3_LEN = 3 ; +static const uint8_t EXPLR_MCBIST_MCBSTATQ_MCBIST_SUBTEST_NUM_INDICATOR = 4 ; +static const uint8_t EXPLR_MCBIST_MCBSTATQ_MCBIST_SUBTEST_NUM_INDICATOR_LEN = 5 ; +static const uint8_t EXPLR_MCBIST_MCBSTATQ_RESERVED_9_15 = 9 ; +static const uint8_t EXPLR_MCBIST_MCBSTATQ_RESERVED_9_15_LEN = 7 ; + +static const uint8_t EXPLR_MCBIST_MCB_CNTLQ_START = 0 ; +static const uint8_t EXPLR_MCBIST_MCB_CNTLQ_STOP = 1 ; +static const uint8_t EXPLR_MCBIST_MCB_CNTLQ_RESERVED_2_5 = 2 ; +static const uint8_t EXPLR_MCBIST_MCB_CNTLQ_RESERVED_2_5_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_MCB_CNTLQ_RESET_TRAP_CNFG = 6 ; +static const uint8_t EXPLR_MCBIST_MCB_CNTLQ_RESET_ERROR_LOGS = 7 ; +static const uint8_t EXPLR_MCBIST_MCB_CNTLQ_RESUME_FROM_PAUSE = 8 ; + +static const uint8_t EXPLR_MCBIST_MCB_CNTLSTATQ_IP = 0 ; +static const uint8_t EXPLR_MCBIST_MCB_CNTLSTATQ_DONE = 1 ; +static const uint8_t EXPLR_MCBIST_MCB_CNTLSTATQ_FAIL = 2 ; + +static const uint8_t EXPLR_MCBIST_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM = 0 ; +static const uint8_t EXPLR_MCBIST_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD1 = 4 ; +static const uint8_t EXPLR_MCBIST_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD1_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD2 = 8 ; +static const uint8_t EXPLR_MCBIST_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD2_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD3 = 12 ; +static const uint8_t EXPLR_MCBIST_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD3_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD4 = 16 ; +static const uint8_t EXPLR_MCBIST_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD4_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD5 = 20 ; +static const uint8_t EXPLR_MCBIST_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD5_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD6 = 24 ; +static const uint8_t EXPLR_MCBIST_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD6_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD7 = 28 ; +static const uint8_t EXPLR_MCBIST_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD7_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD8 = 32 ; +static const uint8_t EXPLR_MCBIST_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD8_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD9 = 36 ; +static const uint8_t EXPLR_MCBIST_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD9_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD10 = 40 ; +static const uint8_t EXPLR_MCBIST_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD10_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD11 = 44 ; +static const uint8_t EXPLR_MCBIST_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD11_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD12 = 48 ; +static const uint8_t EXPLR_MCBIST_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD12_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD13 = 52 ; +static const uint8_t EXPLR_MCBIST_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD13_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD14 = 56 ; +static const uint8_t EXPLR_MCBIST_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD14_LEN = 4 ; +static const uint8_t EXPLR_MCBIST_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD15 = 60 ; +static const uint8_t EXPLR_MCBIST_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD15_LEN = 4 ; + +static const uint8_t EXPLR_MCBIST_RUNTIMECTRQ_CFG_RUNTIME_CTR = 0 ; +static const uint8_t EXPLR_MCBIST_RUNTIMECTRQ_CFG_RUNTIME_CTR_LEN = 37 ; + +static const uint8_t EXPLR_MCBIST_WATCFG0AQ_CFG_WAT_EVENT_ASEL = 0 ; +static const uint8_t EXPLR_MCBIST_WATCFG0AQ_CFG_WAT_EVENT_ASEL_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_WATCFG0AQ_CFG_WAT_EVENT_BSEL = 8 ; +static const uint8_t EXPLR_MCBIST_WATCFG0AQ_CFG_WAT_EVENT_BSEL_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_WATCFG0AQ_CFG_WAT_EVENT_ABSEL = 16 ; +static const uint8_t EXPLR_MCBIST_WATCFG0AQ_CFG_WAT_EVENT_ABSEL_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_WATCFG0AQ_CFG_WAT_EVENT_ETSEL = 24 ; +static const uint8_t EXPLR_MCBIST_WATCFG0AQ_CFG_WAT_EVENT_ETSEL_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_WATCFG0AQ_CFG_WAT_EVENT_CMSEL = 32 ; +static const uint8_t EXPLR_MCBIST_WATCFG0AQ_CFG_WAT_EVENT_CMSEL_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_WATCFG0AQ_CFG_WAT_EVENT_CYSEL = 40 ; +static const uint8_t EXPLR_MCBIST_WATCFG0AQ_CFG_WAT_EVENT_CYSEL_LEN = 8 ; + +static const uint8_t EXPLR_MCBIST_WATCFG0BQ_CFG_WAT_MSKA = 0 ; +static const uint8_t EXPLR_MCBIST_WATCFG0BQ_CFG_WAT_MSKA_LEN = 44 ; +static const uint8_t EXPLR_MCBIST_WATCFG0BQ_CFG_WAT_ENABLE = 44 ; +static const uint8_t EXPLR_MCBIST_WATCFG0BQ_CFG_INT_ARM_MODE = 45 ; +static const uint8_t EXPLR_MCBIST_WATCFG0BQ_CFG_EXT_ARM_MODE = 46 ; +static const uint8_t EXPLR_MCBIST_WATCFG0BQ_CFG_TIMER_STATE_MODE = 47 ; +static const uint8_t EXPLR_MCBIST_WATCFG0BQ_CFG_SET_LEVEL_ON_PULSE = 48 ; +static const uint8_t EXPLR_MCBIST_WATCFG0BQ_CFG_RESET_LEVEL_ON_PULSE = 49 ; +static const uint8_t EXPLR_MCBIST_WATCFG0BQ_CFG_ENABLE_EXT_RESET_LEVEL = 50 ; +static const uint8_t EXPLR_MCBIST_WATCFG0BQ_CFG_STATE_SET_DOM = 51 ; +static const uint8_t EXPLR_MCBIST_WATCFG0BQ_CFG_STATE_FOLLOW_LEVEL = 52 ; +static const uint8_t EXPLR_MCBIST_WATCFG0BQ_CFG_NOT_PATA_MODE = 53 ; +static const uint8_t EXPLR_MCBIST_WATCFG0BQ_CFG_NOT_PATB_MODE = 54 ; +static const uint8_t EXPLR_MCBIST_WATCFG0BQ_CFG_NOT_PATA_MODE2 = 55 ; +static const uint8_t EXPLR_MCBIST_WATCFG0BQ_CFG_NOT_PATB_MODE2 = 56 ; +static const uint8_t EXPLR_MCBIST_WATCFG0BQ_CFG_SLIDE_TRIG = 57 ; +static const uint8_t EXPLR_MCBIST_WATCFG0BQ_CFG_TRIGB_DELAY_SEL = 58 ; +static const uint8_t EXPLR_MCBIST_WATCFG0BQ_CFG_TRIGB_DELAY_SEL_LEN = 2 ; +static const uint8_t EXPLR_MCBIST_WATCFG0BQ_CFG_FORCE_TEST_MODE = 60 ; + +static const uint8_t EXPLR_MCBIST_WATCFG0CQ_CFG_WAT_MSKB = 0 ; +static const uint8_t EXPLR_MCBIST_WATCFG0CQ_CFG_WAT_MSKB_LEN = 44 ; + +static const uint8_t EXPLR_MCBIST_WATCFG0DQ_CFG_WAT_PATA = 0 ; +static const uint8_t EXPLR_MCBIST_WATCFG0DQ_CFG_WAT_PATA_LEN = 44 ; + +static const uint8_t EXPLR_MCBIST_WATCFG0EQ_CFG_WAT_PATB = 0 ; +static const uint8_t EXPLR_MCBIST_WATCFG0EQ_CFG_WAT_PATB_LEN = 44 ; + +static const uint8_t EXPLR_MCBIST_WATCFG1AQ_CFG_WAT_EVENT_ASEL = 0 ; +static const uint8_t EXPLR_MCBIST_WATCFG1AQ_CFG_WAT_EVENT_ASEL_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_WATCFG1AQ_CFG_WAT_EVENT_BSEL = 8 ; +static const uint8_t EXPLR_MCBIST_WATCFG1AQ_CFG_WAT_EVENT_BSEL_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_WATCFG1AQ_CFG_WAT_EVENT_ABSEL = 16 ; +static const uint8_t EXPLR_MCBIST_WATCFG1AQ_CFG_WAT_EVENT_ABSEL_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_WATCFG1AQ_CFG_WAT_EVENT_ETSEL = 24 ; +static const uint8_t EXPLR_MCBIST_WATCFG1AQ_CFG_WAT_EVENT_ETSEL_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_WATCFG1AQ_CFG_WAT_EVENT_CMSEL = 32 ; +static const uint8_t EXPLR_MCBIST_WATCFG1AQ_CFG_WAT_EVENT_CMSEL_LEN = 8 ; +static const uint8_t EXPLR_MCBIST_WATCFG1AQ_CFG_WAT_EVENT_CYSEL = 40 ; +static const uint8_t EXPLR_MCBIST_WATCFG1AQ_CFG_WAT_EVENT_CYSEL_LEN = 8 ; + +static const uint8_t EXPLR_MCBIST_WATCFG1BQ_CFG_WAT_MSKA = 0 ; +static const uint8_t EXPLR_MCBIST_WATCFG1BQ_CFG_WAT_MSKA_LEN = 44 ; +static const uint8_t EXPLR_MCBIST_WATCFG1BQ_CFG_WAT_CNTL = 44 ; +static const uint8_t EXPLR_MCBIST_WATCFG1BQ_CFG_WAT_CNTL_LEN = 17 ; + +static const uint8_t EXPLR_MCBIST_WATCFG1CQ_CFG_WAT_MSKB = 0 ; +static const uint8_t EXPLR_MCBIST_WATCFG1CQ_CFG_WAT_MSKB_LEN = 44 ; + +static const uint8_t EXPLR_MCBIST_WATCFG1DQ_CFG_WAT_PATA = 0 ; +static const uint8_t EXPLR_MCBIST_WATCFG1DQ_CFG_WAT_PATA_LEN = 44 ; + +static const uint8_t EXPLR_MCBIST_WATCFG1EQ_CFG_WAT_PATB = 0 ; +static const uint8_t EXPLR_MCBIST_WATCFG1EQ_CFG_WAT_PATB_LEN = 44 ; + +static const uint8_t EXPLR_MCBIST_WATCFG2AQ_CFG_WAT_EVENT_SEL = 0 ; +static const uint8_t EXPLR_MCBIST_WATCFG2AQ_CFG_WAT_EVENT_SEL_LEN = 48 ; + +static const uint8_t EXPLR_MCBIST_WATCFG2BQ_CFG_WAT_MSKA = 0 ; +static const uint8_t EXPLR_MCBIST_WATCFG2BQ_CFG_WAT_MSKA_LEN = 44 ; +static const uint8_t EXPLR_MCBIST_WATCFG2BQ_CFG_WAT_CNTL = 44 ; +static const uint8_t EXPLR_MCBIST_WATCFG2BQ_CFG_WAT_CNTL_LEN = 17 ; + +static const uint8_t EXPLR_MCBIST_WATCFG2CQ_CFG_WAT_MSKB = 0 ; +static const uint8_t EXPLR_MCBIST_WATCFG2CQ_CFG_WAT_MSKB_LEN = 44 ; + +static const uint8_t EXPLR_MCBIST_WATCFG2DQ_CFG_WAT_PATA = 0 ; +static const uint8_t EXPLR_MCBIST_WATCFG2DQ_CFG_WAT_PATA_LEN = 44 ; + +static const uint8_t EXPLR_MCBIST_WATCFG2EQ_CFG_WAT_PATB = 0 ; +static const uint8_t EXPLR_MCBIST_WATCFG2EQ_CFG_WAT_PATB_LEN = 44 ; + +static const uint8_t EXPLR_MCBIST_WATCFG3AQ_CFG_WAT_EVENT_SEL = 0 ; +static const uint8_t EXPLR_MCBIST_WATCFG3AQ_CFG_WAT_EVENT_SEL_LEN = 48 ; + +static const uint8_t EXPLR_MCBIST_WATCFG3BQ_CFG_WAT_MSKA = 0 ; +static const uint8_t EXPLR_MCBIST_WATCFG3BQ_CFG_WAT_MSKA_LEN = 44 ; +static const uint8_t EXPLR_MCBIST_WATCFG3BQ_CFG_WAT_CNTL = 44 ; +static const uint8_t EXPLR_MCBIST_WATCFG3BQ_CFG_WAT_CNTL_LEN = 17 ; + +static const uint8_t EXPLR_MCBIST_WATCFG3CQ_CFG_WAT_MSKB = 0 ; +static const uint8_t EXPLR_MCBIST_WATCFG3CQ_CFG_WAT_MSKB_LEN = 44 ; + +static const uint8_t EXPLR_MCBIST_WATCFG3DQ_CFG_WAT_PATA = 0 ; +static const uint8_t EXPLR_MCBIST_WATCFG3DQ_CFG_WAT_PATA_LEN = 44 ; + +static const uint8_t EXPLR_MCBIST_WATCFG3EQ_CFG_WAT_PATB = 0 ; +static const uint8_t EXPLR_MCBIST_WATCFG3EQ_CFG_WAT_PATB_LEN = 44 ; + +static const uint8_t EXPLR_MMIO_MCFGERR_RESP_CODE = 16 ; +static const uint8_t EXPLR_MMIO_MCFGERR_RESP_CODE_LEN = 4 ; +static const uint8_t EXPLR_MMIO_MCFGERR_BDI = 20 ; +static const uint8_t EXPLR_MMIO_MCFGERR_ERROR_TYPE = 21 ; +static const uint8_t EXPLR_MMIO_MCFGERR_ERROR_TYPE_LEN = 3 ; +static const uint8_t EXPLR_MMIO_MCFGERR_DEVICE = 24 ; +static const uint8_t EXPLR_MMIO_MCFGERR_DEVICE_LEN = 5 ; +static const uint8_t EXPLR_MMIO_MCFGERR_FUNCTION = 29 ; +static const uint8_t EXPLR_MMIO_MCFGERR_FUNCTION_LEN = 3 ; +static const uint8_t EXPLR_MMIO_MCFGERR_DEV_FUNC_MISMATCH = 32 ; +static const uint8_t EXPLR_MMIO_MCFGERR_DETECT_BAD_OP = 33 ; +static const uint8_t EXPLR_MMIO_MCFGERR_TBIT_IS_1 = 34 ; +static const uint8_t EXPLR_MMIO_MCFGERR_DATA_IS_BAD = 35 ; +static const uint8_t EXPLR_MMIO_MCFGERR_PL_IS_INVALID = 36 ; +static const uint8_t EXPLR_MMIO_MCFGERR_BAD_OP_OR_ALIGN = 37 ; +static const uint8_t EXPLR_MMIO_MCFGERR_ADDR_NO_IMPLEMENTED = 38 ; +static const uint8_t EXPLR_MMIO_MCFGERR_RDATA_VLD = 39 ; +static const uint8_t EXPLR_MMIO_MCFGERR_TBIT = 40 ; +static const uint8_t EXPLR_MMIO_MCFGERR_PLEN = 41 ; +static const uint8_t EXPLR_MMIO_MCFGERR_PLEN_LEN = 3 ; +static const uint8_t EXPLR_MMIO_MCFGERR_PORTNUM = 44 ; +static const uint8_t EXPLR_MMIO_MCFGERR_PORTNUM_LEN = 2 ; +static const uint8_t EXPLR_MMIO_MCFGERR_DL = 46 ; +static const uint8_t EXPLR_MMIO_MCFGERR_DL_LEN = 2 ; +static const uint8_t EXPLR_MMIO_MCFGERR_CAPPTAG = 48 ; +static const uint8_t EXPLR_MMIO_MCFGERR_CAPPTAG_LEN = 16 ; + +static const uint8_t EXPLR_MMIO_MCFGERRA_ADDR = 0 ; +static const uint8_t EXPLR_MMIO_MCFGERRA_ADDR_LEN = 64 ; + +static const uint8_t EXPLR_MMIO_MCHOLD_FIR_MASK_PAR_ERR = 0 ; +static const uint8_t EXPLR_MMIO_MCHOLD_FIR_ACTION0_PAR_ERR = 1 ; +static const uint8_t EXPLR_MMIO_MCHOLD_FIR_ACTION1_PAR_ERR = 2 ; + +static const uint8_t EXPLR_MMIO_MCMASK_MASK_FIR_MASK_PAR_ERR = 0 ; +static const uint8_t EXPLR_MMIO_MCMASK_MASK_FIR_ACTION0_PAR_ERR = 1 ; +static const uint8_t EXPLR_MMIO_MCMASK_MASK_FIR_ACTION1_PAR_ERR = 2 ; + +static const uint8_t EXPLR_MMIO_MDBELL_MDBELL = 0 ; + +static const uint8_t EXPLR_MMIO_MDBELLC_MDBELL_MDBELL = 0 ; + +static const uint8_t EXPLR_MMIO_MDEBUG0_DBGBUS_64_87 = 0 ; +static const uint8_t EXPLR_MMIO_MDEBUG0_DBGBUS_64_87_LEN = 24 ; +static const uint8_t EXPLR_MMIO_MDEBUG0_SPARE = 24 ; +static const uint8_t EXPLR_MMIO_MDEBUG0_SPARE_LEN = 8 ; +static const uint8_t EXPLR_MMIO_MDEBUG0_DBGSEL7 = 32 ; +static const uint8_t EXPLR_MMIO_MDEBUG0_DBGSEL7_LEN = 4 ; +static const uint8_t EXPLR_MMIO_MDEBUG0_DBGSEL6 = 36 ; +static const uint8_t EXPLR_MMIO_MDEBUG0_DBGSEL6_LEN = 4 ; +static const uint8_t EXPLR_MMIO_MDEBUG0_DBGSEL5 = 40 ; +static const uint8_t EXPLR_MMIO_MDEBUG0_DBGSEL5_LEN = 4 ; +static const uint8_t EXPLR_MMIO_MDEBUG0_DBGSEL4 = 44 ; +static const uint8_t EXPLR_MMIO_MDEBUG0_DBGSEL4_LEN = 4 ; +static const uint8_t EXPLR_MMIO_MDEBUG0_DBGSEL3 = 48 ; +static const uint8_t EXPLR_MMIO_MDEBUG0_DBGSEL3_LEN = 4 ; +static const uint8_t EXPLR_MMIO_MDEBUG0_DBGSEL2 = 52 ; +static const uint8_t EXPLR_MMIO_MDEBUG0_DBGSEL2_LEN = 4 ; +static const uint8_t EXPLR_MMIO_MDEBUG0_DBGSEL1 = 56 ; +static const uint8_t EXPLR_MMIO_MDEBUG0_DBGSEL1_LEN = 4 ; +static const uint8_t EXPLR_MMIO_MDEBUG0_DBGSEL0 = 60 ; +static const uint8_t EXPLR_MMIO_MDEBUG0_DBGSEL0_LEN = 4 ; + +static const uint8_t EXPLR_MMIO_MDEBUG1_DBGBUS_0_63 = 0 ; +static const uint8_t EXPLR_MMIO_MDEBUG1_DBGBUS_0_63_LEN = 64 ; + +static const uint8_t EXPLR_MMIO_MENTERP_MMIO_ENTERPRISE_MODE = 0 ; +static const uint8_t EXPLR_MMIO_MENTERP_HALF_DIMM_MODE = 1 ; +static const uint8_t EXPLR_MMIO_MENTERP_CFG_ENTERPRISE_MODE = 2 ; + +static const uint8_t EXPLR_MMIO_MERRCTL_MODE_BITS = 0 ; +static const uint8_t EXPLR_MMIO_MERRCTL_MODE_BITS_LEN = 44 ; +static const uint8_t EXPLR_MMIO_MERRCTL_MODE_BITS_44_46 = 44 ; +static const uint8_t EXPLR_MMIO_MERRCTL_MODE_BITS_44_46_LEN = 3 ; +static const uint8_t EXPLR_MMIO_MERRCTL_PASID_CHK_DIS = 47 ; +static const uint8_t EXPLR_MMIO_MERRCTL_ACTAG_CHK_DIS = 48 ; +static const uint8_t EXPLR_MMIO_MERRCTL_MSCC_RNGE_CHK_DIS = 49 ; +static const uint8_t EXPLR_MMIO_MERRCTL_MODE_BIT_50 = 50 ; +static const uint8_t EXPLR_MMIO_MERRCTL_HOLD_ACUM = 51 ; +static const uint8_t EXPLR_MMIO_MERRCTL_SNSC_MASTER_ENABLE = 52 ; +static const uint8_t EXPLR_MMIO_MERRCTL_TRAP_CLEAR = 53 ; +static const uint8_t EXPLR_MMIO_MERRCTL_WDATA_P = 54 ; +static const uint8_t EXPLR_MMIO_MERRCTL_RNW = 55 ; +static const uint8_t EXPLR_MMIO_MERRCTL_ADDR = 56 ; +static const uint8_t EXPLR_MMIO_MERRCTL_ADDR_LEN = 8 ; + +static const uint8_t EXPLR_MMIO_MFIR_AFU_DESC_UNIMP = 0 ; +static const uint8_t EXPLR_MMIO_MFIR_MMIO_ERR = 1 ; +static const uint8_t EXPLR_MMIO_MFIR_SCOM_ERR = 2 ; +static const uint8_t EXPLR_MMIO_MFIR_FSM_PERR = 3 ; +static const uint8_t EXPLR_MMIO_MFIR_FIFO_OVERFLOW = 4 ; +static const uint8_t EXPLR_MMIO_MFIR_CTL_REG_PERR = 5 ; +static const uint8_t EXPLR_MMIO_MFIR_INFO_REG_PERR = 6 ; +static const uint8_t EXPLR_MMIO_MFIR_SNSC_BOTH_STARTS_ERR = 7 ; +static const uint8_t EXPLR_MMIO_MFIR_SNSC_MULT_SEQ_PERR = 8 ; +static const uint8_t EXPLR_MMIO_MFIR_SNSC_FSM_PERR = 9 ; +static const uint8_t EXPLR_MMIO_MFIR_SNSC_REG_PERR = 10 ; +static const uint8_t EXPLR_MMIO_MFIR_ACTAG_PASID_CFG_ERR = 11 ; + +static const uint8_t EXPLR_MMIO_MFIRACT0_FIR_ACTION0 = 0 ; +static const uint8_t EXPLR_MMIO_MFIRACT0_FIR_ACTION0_LEN = 12 ; + +static const uint8_t EXPLR_MMIO_MFIRACT1_FIR_ACTION1 = 0 ; +static const uint8_t EXPLR_MMIO_MFIRACT1_FIR_ACTION1_LEN = 12 ; + +static const uint8_t EXPLR_MMIO_MFIRMASK_FIR_MASK = 0 ; +static const uint8_t EXPLR_MMIO_MFIRMASK_FIR_MASK_LEN = 12 ; + +static const uint8_t EXPLR_MMIO_MFIRWOF_FIR_WOF = 0 ; +static const uint8_t EXPLR_MMIO_MFIRWOF_FIR_WOF_LEN = 12 ; + +static const uint8_t EXPLR_MMIO_MHOLD0_O0MBIT_O0DID_PERR = 0 ; +static const uint8_t EXPLR_MMIO_MHOLD0_O0CCD_PERR = 1 ; +static const uint8_t EXPLR_MMIO_MHOLD0_O0BAR0_PERR = 2 ; +static const uint8_t EXPLR_MMIO_MHOLD0_O0BAR1_PERR = 3 ; +static const uint8_t EXPLR_MMIO_MHOLD0_O0BAR2_PERR = 4 ; +static const uint8_t EXPLR_MMIO_MHOLD0_O0SSYSID_PERR = 5 ; +static const uint8_t EXPLR_MMIO_MHOLD0_O0CAPPTR_O0ROMBAR_PERR = 6 ; +static const uint8_t EXPLR_MMIO_MHOLD0_OVPD_PERR = 7 ; +static const uint8_t EXPLR_MMIO_MHOLD0_ODSNLO_ODSNCAP_PERR = 8 ; +static const uint8_t EXPLR_MMIO_MHOLD0_ODSNHI_PERR = 9 ; +static const uint8_t EXPLR_MMIO_MHOLD0_OTLVID_OTLCAP_PERR = 10 ; +static const uint8_t EXPLR_MMIO_MHOLD0_OVERCAP_OTLID_PERR = 11 ; +static const uint8_t EXPLR_MMIO_MHOLD0_OVERCFG_PERR = 12 ; +static const uint8_t EXPLR_MMIO_MHOLD0_ORTCAP_PERR = 13 ; +static const uint8_t EXPLR_MMIO_MHOLD0_OTTCFG_PERR = 14 ; +static const uint8_t EXPLR_MMIO_MHOLD0_ORRCAP10_PERR = 15 ; +static const uint8_t EXPLR_MMIO_MHOLD0_ORRCAP32_PERR = 16 ; +static const uint8_t EXPLR_MMIO_MHOLD0_ORRCAP54_PERR = 17 ; +static const uint8_t EXPLR_MMIO_MHOLD0_ORRCAP76_PERR = 18 ; +static const uint8_t EXPLR_MMIO_MHOLD0_OTRCFG10_PERR = 19 ; +static const uint8_t EXPLR_MMIO_MHOLD0_OTRCFG32_PERR = 20 ; +static const uint8_t EXPLR_MMIO_MHOLD0_OTRCFG54_PERR = 21 ; +static const uint8_t EXPLR_MMIO_MHOLD0_OTRCFG76_PERR = 22 ; +static const uint8_t EXPLR_MMIO_MHOLD0_O0FNVID_O0FNCAP_PERR = 23 ; +static const uint8_t EXPLR_MMIO_MHOLD0_O0ACTAG_O0FNID_PERR = 24 ; +static const uint8_t EXPLR_MMIO_MHOLD0_O0VSVID_O0VSCAP_PERR = 25 ; +static const uint8_t EXPLR_MMIO_MHOLD0_O0VSID_PERR = 26 ; +static const uint8_t EXPLR_MMIO_MHOLD0_O1MBIT_O1DID_PERR = 27 ; +static const uint8_t EXPLR_MMIO_MHOLD0_O1CCD_PERR = 28 ; +static const uint8_t EXPLR_MMIO_MHOLD0_O1BAR0_PERR = 29 ; +static const uint8_t EXPLR_MMIO_MHOLD0_O1BAR1_PERR = 30 ; +static const uint8_t EXPLR_MMIO_MHOLD0_O1BAR2_PERR = 31 ; +static const uint8_t EXPLR_MMIO_MHOLD0_O1SSYSID_PERR = 32 ; +static const uint8_t EXPLR_MMIO_MHOLD0_O1CAPPTR_O1ROMBAR_PERR = 33 ; +static const uint8_t EXPLR_MMIO_MHOLD0_OPASID_PERR = 34 ; +static const uint8_t EXPLR_MMIO_MHOLD0_O1FNVID_O1FNCAP_PERR = 35 ; +static const uint8_t EXPLR_MMIO_MHOLD0_O1ACTAG_O1FNID_PERR = 36 ; +static const uint8_t EXPLR_MMIO_MHOLD0_O1INFVID_O1INFCAP_PERR = 37 ; +static const uint8_t EXPLR_MMIO_MHOLD0_O1INFOFF_O1INFID_PERR = 38 ; +static const uint8_t EXPLR_MMIO_MHOLD0_O1INFDAT_PERR = 39 ; +static const uint8_t EXPLR_MMIO_MHOLD0_OCTRLVID_OCTRLCAP_PERR = 40 ; +static const uint8_t EXPLR_MMIO_MHOLD0_OCTRLENB_OCTRLID_PERR = 41 ; +static const uint8_t EXPLR_MMIO_MHOLD0_OCTRLPID_PERR = 42 ; +static const uint8_t EXPLR_MMIO_MHOLD0_OCTRLTAG_PERR = 43 ; +static const uint8_t EXPLR_MMIO_MHOLD0_O1VSVID_O1VSCAP_PERR = 44 ; +static const uint8_t EXPLR_MMIO_MHOLD0_O1VSID_PERR = 45 ; +static const uint8_t EXPLR_MMIO_MHOLD0_AFU_DESC_UNIMP = 46 ; +static const uint8_t EXPLR_MMIO_MHOLD0_MMIO_ERR = 47 ; +static const uint8_t EXPLR_MMIO_MHOLD0_SCOM_ERR = 48 ; +static const uint8_t EXPLR_MMIO_MHOLD0_SCOM_CCMD_FSMPERR = 49 ; +static const uint8_t EXPLR_MMIO_MHOLD0_SCOM_CRESP_FSMPERR = 50 ; +static const uint8_t EXPLR_MMIO_MHOLD0_CTL_MMIO_FSMPERR = 51 ; +static const uint8_t EXPLR_MMIO_MHOLD0_CTL_CCMD_FSMPERR = 52 ; +static const uint8_t EXPLR_MMIO_MHOLD0_CTL_CRESP_FSMPERR = 53 ; +static const uint8_t EXPLR_MMIO_MHOLD0_PIB_FSMPERR = 54 ; +static const uint8_t EXPLR_MMIO_MHOLD0_CMUX_ARBPERR = 55 ; +static const uint8_t EXPLR_MMIO_MHOLD0_CFG_CMDFIFO_OVRFLOW = 56 ; +static const uint8_t EXPLR_MMIO_MHOLD0_CFG_RESPFIFO_OVRFLOW = 57 ; +static const uint8_t EXPLR_MMIO_MHOLD0_CFGP_FIFO_OVRFLOW = 58 ; +static const uint8_t EXPLR_MMIO_MHOLD0_MERRCTL_PERR = 59 ; +static const uint8_t EXPLR_MMIO_MHOLD0_MHOLD1_PERR = 60 ; +static const uint8_t EXPLR_MMIO_MHOLD0_MMASK1_PERR = 61 ; +static const uint8_t EXPLR_MMIO_MHOLD0_MDBELL_PERR = 62 ; +static const uint8_t EXPLR_MMIO_MHOLD0_MSCCRNGE_PERR = 63 ; + +static const uint8_t EXPLR_MMIO_MHOLD1_ONAME0_ODESCTML_PERR = 0 ; +static const uint8_t EXPLR_MMIO_MHOLD1_ONAME21_PERR = 1 ; +static const uint8_t EXPLR_MMIO_MHOLD1_ONAME43_PERR = 2 ; +static const uint8_t EXPLR_MMIO_MHOLD1_OAFUVER_ONAME5_PERR = 3 ; +static const uint8_t EXPLR_MMIO_MHOLD1_OGMMIOOF_PERR = 4 ; +static const uint8_t EXPLR_MMIO_MHOLD1_OGMMIOSZ_PERR = 5 ; +static const uint8_t EXPLR_MMIO_MHOLD1_OPMMIOOOF_PERR = 6 ; +static const uint8_t EXPLR_MMIO_MHOLD1_OPMMIOST_PERR = 7 ; +static const uint8_t EXPLR_MMIO_MHOLD1_OMEMADDR_PERR = 8 ; +static const uint8_t EXPLR_MMIO_MHOLD1_OWWID10_PERR = 9 ; +static const uint8_t EXPLR_MMIO_MHOLD1_OWWID32_PERR = 10 ; +static const uint8_t EXPLR_MMIO_MHOLD1_MHOLD0_PERR = 11 ; +static const uint8_t EXPLR_MMIO_MHOLD1_MMASK0_PERR = 12 ; +static const uint8_t EXPLR_MMIO_MHOLD1_MMIOERR_PERR = 13 ; +static const uint8_t EXPLR_MMIO_MHOLD1_MMIOEWD_PERR = 14 ; +static const uint8_t EXPLR_MMIO_MHOLD1_SCOMEWD_PERR = 15 ; +static const uint8_t EXPLR_MMIO_MHOLD1_MCFGERRA_PERR = 16 ; +static const uint8_t EXPLR_MMIO_MHOLD1_MCFGERRB_PERR = 17 ; +static const uint8_t EXPLR_MMIO_MHOLD1_SNSC_BOTH_STARTS_ERR = 18 ; +static const uint8_t EXPLR_MMIO_MHOLD1_SNSC_MULT_SEQ_PERR = 19 ; +static const uint8_t EXPLR_MMIO_MHOLD1_SNSC_FSM_PERR = 20 ; +static const uint8_t EXPLR_MMIO_MHOLD1_SNSC_OCTHERM_PERR = 21 ; +static const uint8_t EXPLR_MMIO_MHOLD1_SNSC_D0THERM_PERR = 22 ; +static const uint8_t EXPLR_MMIO_MHOLD1_SNSC_D1THERM_PERR = 23 ; +static const uint8_t EXPLR_MMIO_MHOLD1_SNSC_RDWR_PERR = 24 ; +static const uint8_t EXPLR_MMIO_MHOLD1_SNSC_ACTPWRUP_PERR = 25 ; +static const uint8_t EXPLR_MMIO_MHOLD1_SNSC_FRAMESR_PERR = 26 ; +static const uint8_t EXPLR_MMIO_MHOLD1_SNSC_HISTOBASELOW_PERR = 27 ; +static const uint8_t EXPLR_MMIO_MHOLD1_SNSC_HISTOBASEHIGH_PERR = 28 ; +static const uint8_t EXPLR_MMIO_MHOLD1_O0VSTLXA_PERR = 29 ; +static const uint8_t EXPLR_MMIO_MHOLD1_O0VSTLXB_PERR = 30 ; +static const uint8_t EXPLR_MMIO_MHOLD1_O0VSDLXA_PERR = 31 ; +static const uint8_t EXPLR_MMIO_MHOLD1_O0VSDLXB_PERR = 32 ; +static const uint8_t EXPLR_MMIO_MHOLD1_O0VSFLSH_PERR = 33 ; +static const uint8_t EXPLR_MMIO_MHOLD1_BAD_FUNC_ACTAG_LENGTH = 34 ; +static const uint8_t EXPLR_MMIO_MHOLD1_BAD_AFU_ACTAG_LENGTH = 35 ; +static const uint8_t EXPLR_MMIO_MHOLD1_BAD_FUNC_PASID_LENGTH = 36 ; +static const uint8_t EXPLR_MMIO_MHOLD1_BAD_AFU_PASID_LENGTH = 37 ; +static const uint8_t EXPLR_MMIO_MHOLD1_MENTRP_PERR = 38 ; +static const uint8_t EXPLR_MMIO_MHOLD1_OSYSMEML_PERR = 39 ; +static const uint8_t EXPLR_MMIO_MHOLD1_MDEBUG0_PERR = 40 ; +static const uint8_t EXPLR_MMIO_MHOLD1_MDEBUG1_PERR = 41 ; + +static const uint8_t EXPLR_MMIO_MMASK0_MSK = 0 ; +static const uint8_t EXPLR_MMIO_MMASK0_MSK_LEN = 64 ; + +static const uint8_t EXPLR_MMIO_MMASK1_MSK = 0 ; +static const uint8_t EXPLR_MMIO_MMASK1_MSK_LEN = 42 ; + +static const uint8_t EXPLR_MMIO_MMIOERR_WDATA_P = 0 ; +static const uint8_t EXPLR_MMIO_MMIOERR_WDATA_P_LEN = 8 ; +static const uint8_t EXPLR_MMIO_MMIOERR_INFO = 8 ; +static const uint8_t EXPLR_MMIO_MMIOERR_INFO_LEN = 16 ; +static const uint8_t EXPLR_MMIO_MMIOERR_PLEN = 25 ; +static const uint8_t EXPLR_MMIO_MMIOERR_PLEN_LEN = 3 ; +static const uint8_t EXPLR_MMIO_MMIOERR_RNW = 28 ; +static const uint8_t EXPLR_MMIO_MMIOERR_ADDR = 29 ; +static const uint8_t EXPLR_MMIO_MMIOERR_ADDR_LEN = 35 ; + +static const uint8_t EXPLR_MMIO_MMIOEWD_WDATA = 0 ; +static const uint8_t EXPLR_MMIO_MMIOEWD_WDATA_LEN = 64 ; + +static const uint8_t EXPLR_MMIO_MPIBERR0_ERRINFO = 0 ; +static const uint8_t EXPLR_MMIO_MPIBERR0_ERRINFO_LEN = 64 ; + +static const uint8_t EXPLR_MMIO_MPIBERR1_ERRINFO = 0 ; +static const uint8_t EXPLR_MMIO_MPIBERR1_ERRINFO_LEN = 64 ; + +static const uint8_t EXPLR_MMIO_MPIBERR2_ERRINFO = 0 ; +static const uint8_t EXPLR_MMIO_MPIBERR2_ERRINFO_LEN = 64 ; + +static const uint8_t EXPLR_MMIO_MPIBERR3_ERRINFO = 0 ; +static const uint8_t EXPLR_MMIO_MPIBERR3_ERRINFO_LEN = 64 ; + +static const uint8_t EXPLR_MMIO_MSCCRNGE_LOWER = 0 ; +static const uint8_t EXPLR_MMIO_MSCCRNGE_LOWER_LEN = 29 ; +static const uint8_t EXPLR_MMIO_MSCCRNGE_UPPER = 32 ; +static const uint8_t EXPLR_MMIO_MSCCRNGE_UPPER_LEN = 32 ; + +static const uint8_t EXPLR_MMIO_O0ACTAG_O0FNID_ACTAG_BASE = 4 ; +static const uint8_t EXPLR_MMIO_O0ACTAG_O0FNID_ACTAG_BASE_LEN = 12 ; +static const uint8_t EXPLR_MMIO_O0ACTAG_O0FNID_ACTAG_LENGTH = 20 ; +static const uint8_t EXPLR_MMIO_O0ACTAG_O0FNID_ACTAG_LENGTH_LEN = 12 ; +static const uint8_t EXPLR_MMIO_O0ACTAG_O0FNID_AFU_PRESENT = 32 ; +static const uint8_t EXPLR_MMIO_O0ACTAG_O0FNID_MAX_AFU_INDEX = 34 ; +static const uint8_t EXPLR_MMIO_O0ACTAG_O0FNID_MAX_AFU_INDEX_LEN = 6 ; +static const uint8_t EXPLR_MMIO_O0ACTAG_O0FNID_FUNCTION_RESET = 40 ; +static const uint8_t EXPLR_MMIO_O0ACTAG_O0FNID_DVSEC_ID = 48 ; +static const uint8_t EXPLR_MMIO_O0ACTAG_O0FNID_DVSEC_ID_LEN = 16 ; + +static const uint8_t EXPLR_MMIO_O0BAR0_BAR_ADDRESS = 0 ; +static const uint8_t EXPLR_MMIO_O0BAR0_BAR_ADDRESS_LEN = 60 ; +static const uint8_t EXPLR_MMIO_O0BAR0_PREFETCHABLE = 60 ; +static const uint8_t EXPLR_MMIO_O0BAR0_TYPE = 61 ; +static const uint8_t EXPLR_MMIO_O0BAR0_TYPE_LEN = 2 ; +static const uint8_t EXPLR_MMIO_O0BAR0_ADDRESS_SPACE = 63 ; + +static const uint8_t EXPLR_MMIO_O0BAR1_BAR_ADDRESS = 0 ; +static const uint8_t EXPLR_MMIO_O0BAR1_BAR_ADDRESS_LEN = 60 ; +static const uint8_t EXPLR_MMIO_O0BAR1_PREFETCHABLE = 60 ; +static const uint8_t EXPLR_MMIO_O0BAR1_TYPE = 61 ; +static const uint8_t EXPLR_MMIO_O0BAR1_TYPE_LEN = 2 ; +static const uint8_t EXPLR_MMIO_O0BAR1_ADDRESS_SPACE = 63 ; + +static const uint8_t EXPLR_MMIO_O0BAR2_BAR_ADDRESS = 0 ; +static const uint8_t EXPLR_MMIO_O0BAR2_BAR_ADDRESS_LEN = 60 ; +static const uint8_t EXPLR_MMIO_O0BAR2_PREFETCHABLE = 60 ; +static const uint8_t EXPLR_MMIO_O0BAR2_TYPE = 61 ; +static const uint8_t EXPLR_MMIO_O0BAR2_TYPE_LEN = 2 ; +static const uint8_t EXPLR_MMIO_O0BAR2_ADDRESS_SPACE = 63 ; + +static const uint8_t EXPLR_MMIO_O0CAPPTR_O0ROMBAR_ROM_BASE = 32 ; +static const uint8_t EXPLR_MMIO_O0CAPPTR_O0ROMBAR_ROM_BASE_LEN = 21 ; +static const uint8_t EXPLR_MMIO_O0CAPPTR_O0ROMBAR_ROM_ENABLE = 63 ; + +static const uint8_t EXPLR_MMIO_O0CCD_MULTI_FUNCTION = 8 ; +static const uint8_t EXPLR_MMIO_O0CCD_CLASS_CODE = 32 ; +static const uint8_t EXPLR_MMIO_O0CCD_CLASS_CODE_LEN = 24 ; +static const uint8_t EXPLR_MMIO_O0CCD_REVISION_ID = 56 ; +static const uint8_t EXPLR_MMIO_O0CCD_REVISION_ID_LEN = 8 ; + +static const uint8_t EXPLR_MMIO_O0MBIT_O0DID_CAPABILITIES_LIST = 11 ; +static const uint8_t EXPLR_MMIO_O0MBIT_O0DID_MEMORY_SPACE = 30 ; +static const uint8_t EXPLR_MMIO_O0MBIT_O0DID_DEVICE_ID = 32 ; +static const uint8_t EXPLR_MMIO_O0MBIT_O0DID_DEVICE_ID_LEN = 16 ; +static const uint8_t EXPLR_MMIO_O0MBIT_O0DID_VENDOR_ID = 48 ; +static const uint8_t EXPLR_MMIO_O0MBIT_O0DID_VENDOR_ID_LEN = 16 ; + +static const uint8_t EXPLR_MMIO_O0SSYSID_SUBSYSTEM_ID = 0 ; +static const uint8_t EXPLR_MMIO_O0SSYSID_SUBSYSTEM_ID_LEN = 16 ; +static const uint8_t EXPLR_MMIO_O0SSYSID_SUBSYSTEM_VENDOR_ID = 16 ; +static const uint8_t EXPLR_MMIO_O0SSYSID_SUBSYSTEM_VENDOR_ID_LEN = 16 ; + +static const uint8_t EXPLR_MMIO_O0VSDLXA_DLX_PORT1 = 0 ; +static const uint8_t EXPLR_MMIO_O0VSDLXA_DLX_PORT1_LEN = 32 ; +static const uint8_t EXPLR_MMIO_O0VSDLXA_DLX_PORT0 = 32 ; +static const uint8_t EXPLR_MMIO_O0VSDLXA_DLX_PORT0_LEN = 32 ; + +static const uint8_t EXPLR_MMIO_O0VSDLXB_DLX_PORT3 = 0 ; +static const uint8_t EXPLR_MMIO_O0VSDLXB_DLX_PORT3_LEN = 32 ; +static const uint8_t EXPLR_MMIO_O0VSDLXB_DLX_PORT2 = 32 ; +static const uint8_t EXPLR_MMIO_O0VSDLXB_DLX_PORT2_LEN = 32 ; + +static const uint8_t EXPLR_MMIO_O0VSFLSH_DATA = 0 ; +static const uint8_t EXPLR_MMIO_O0VSFLSH_DATA_LEN = 32 ; +static const uint8_t EXPLR_MMIO_O0VSFLSH_CONTROL = 44 ; +static const uint8_t EXPLR_MMIO_O0VSFLSH_CONTROL_LEN = 20 ; + +static const uint8_t EXPLR_MMIO_O0VSID_VENDOR_UNIQUE = 32 ; +static const uint8_t EXPLR_MMIO_O0VSID_VENDOR_UNIQUE_LEN = 16 ; +static const uint8_t EXPLR_MMIO_O0VSID_DVSEC_ID = 48 ; +static const uint8_t EXPLR_MMIO_O0VSID_DVSEC_ID_LEN = 16 ; + +static const uint8_t EXPLR_MMIO_O0VSTLXA_TLX_PORT1 = 0 ; +static const uint8_t EXPLR_MMIO_O0VSTLXA_TLX_PORT1_LEN = 32 ; +static const uint8_t EXPLR_MMIO_O0VSTLXA_TLX_PORT0 = 32 ; +static const uint8_t EXPLR_MMIO_O0VSTLXA_TLX_PORT0_LEN = 32 ; + +static const uint8_t EXPLR_MMIO_O0VSTLXB_TLX_PORT3 = 0 ; +static const uint8_t EXPLR_MMIO_O0VSTLXB_TLX_PORT3_LEN = 32 ; +static const uint8_t EXPLR_MMIO_O0VSTLXB_TLX_PORT2 = 32 ; +static const uint8_t EXPLR_MMIO_O0VSTLXB_TLX_PORT2_LEN = 32 ; + +static const uint8_t EXPLR_MMIO_O1ACTAG_O1FNID_ACTAG_BASE = 4 ; +static const uint8_t EXPLR_MMIO_O1ACTAG_O1FNID_ACTAG_BASE_LEN = 12 ; +static const uint8_t EXPLR_MMIO_O1ACTAG_O1FNID_ACTAG_LENGTH = 20 ; +static const uint8_t EXPLR_MMIO_O1ACTAG_O1FNID_ACTAG_LENGTH_LEN = 12 ; +static const uint8_t EXPLR_MMIO_O1ACTAG_O1FNID_AFU_PRESENT = 32 ; +static const uint8_t EXPLR_MMIO_O1ACTAG_O1FNID_MAX_AFU_INDEX = 34 ; +static const uint8_t EXPLR_MMIO_O1ACTAG_O1FNID_MAX_AFU_INDEX_LEN = 6 ; +static const uint8_t EXPLR_MMIO_O1ACTAG_O1FNID_FUNCTION_RESET = 40 ; +static const uint8_t EXPLR_MMIO_O1ACTAG_O1FNID_DVSEC_ID = 48 ; +static const uint8_t EXPLR_MMIO_O1ACTAG_O1FNID_DVSEC_ID_LEN = 16 ; + +static const uint8_t EXPLR_MMIO_O1BAR0_BAR_ADDRESS = 0 ; +static const uint8_t EXPLR_MMIO_O1BAR0_BAR_ADDRESS_LEN = 29 ; +static const uint8_t EXPLR_MMIO_O1BAR0_PREFETCHABLE = 60 ; +static const uint8_t EXPLR_MMIO_O1BAR0_TYPE = 61 ; +static const uint8_t EXPLR_MMIO_O1BAR0_TYPE_LEN = 2 ; +static const uint8_t EXPLR_MMIO_O1BAR0_ADDRESS_SPACE = 63 ; + +static const uint8_t EXPLR_MMIO_O1BAR1_BAR_ADDRESS = 0 ; +static const uint8_t EXPLR_MMIO_O1BAR1_BAR_ADDRESS_LEN = 60 ; +static const uint8_t EXPLR_MMIO_O1BAR1_PREFETCHABLE = 60 ; +static const uint8_t EXPLR_MMIO_O1BAR1_TYPE = 61 ; +static const uint8_t EXPLR_MMIO_O1BAR1_TYPE_LEN = 2 ; +static const uint8_t EXPLR_MMIO_O1BAR1_ADDRESS_SPACE = 63 ; + +static const uint8_t EXPLR_MMIO_O1BAR2_BAR_ADDRESS = 0 ; +static const uint8_t EXPLR_MMIO_O1BAR2_BAR_ADDRESS_LEN = 60 ; +static const uint8_t EXPLR_MMIO_O1BAR2_PREFETCHABLE = 60 ; +static const uint8_t EXPLR_MMIO_O1BAR2_TYPE = 61 ; +static const uint8_t EXPLR_MMIO_O1BAR2_TYPE_LEN = 2 ; +static const uint8_t EXPLR_MMIO_O1BAR2_ADDRESS_SPACE = 63 ; + +static const uint8_t EXPLR_MMIO_O1CAPPTR_O1ROMBAR_ROM_BASE = 32 ; +static const uint8_t EXPLR_MMIO_O1CAPPTR_O1ROMBAR_ROM_BASE_LEN = 21 ; +static const uint8_t EXPLR_MMIO_O1CAPPTR_O1ROMBAR_ROM_ENABLE = 63 ; + +static const uint8_t EXPLR_MMIO_O1CCD_MULTI_FUNCTION = 8 ; +static const uint8_t EXPLR_MMIO_O1CCD_CLASS_CODE = 32 ; +static const uint8_t EXPLR_MMIO_O1CCD_CLASS_CODE_LEN = 24 ; +static const uint8_t EXPLR_MMIO_O1CCD_REVISION_ID = 56 ; +static const uint8_t EXPLR_MMIO_O1CCD_REVISION_ID_LEN = 8 ; + +static const uint8_t EXPLR_MMIO_O1INFDAT_AFU_DESCRIPTOR_DATA = 32 ; +static const uint8_t EXPLR_MMIO_O1INFDAT_AFU_DESCRIPTOR_DATA_LEN = 32 ; + +static const uint8_t EXPLR_MMIO_O1INFOFF_O1INFID_DATA_VALID = 0 ; +static const uint8_t EXPLR_MMIO_O1INFOFF_O1INFID_AFU_DESCRIPTOR_OFFSET = 1 ; +static const uint8_t EXPLR_MMIO_O1INFOFF_O1INFID_AFU_DESCRIPTOR_OFFSET_LEN = 31 ; +static const uint8_t EXPLR_MMIO_O1INFOFF_O1INFID_AFU_INFO_INDEX = 42 ; +static const uint8_t EXPLR_MMIO_O1INFOFF_O1INFID_AFU_INFO_INDEX_LEN = 6 ; +static const uint8_t EXPLR_MMIO_O1INFOFF_O1INFID_DVSEC_ID = 48 ; +static const uint8_t EXPLR_MMIO_O1INFOFF_O1INFID_DVSEC_ID_LEN = 16 ; + +static const uint8_t EXPLR_MMIO_O1MBIT_O1DID_CAPABILITIES_LIST = 11 ; +static const uint8_t EXPLR_MMIO_O1MBIT_O1DID_MEMORY_SPACE = 30 ; +static const uint8_t EXPLR_MMIO_O1MBIT_O1DID_DEVICE_ID = 32 ; +static const uint8_t EXPLR_MMIO_O1MBIT_O1DID_DEVICE_ID_LEN = 16 ; +static const uint8_t EXPLR_MMIO_O1MBIT_O1DID_VENDOR_ID = 48 ; +static const uint8_t EXPLR_MMIO_O1MBIT_O1DID_VENDOR_ID_LEN = 16 ; + +static const uint8_t EXPLR_MMIO_O1SSYSID_SUBSYSTEM_ID = 0 ; +static const uint8_t EXPLR_MMIO_O1SSYSID_SUBSYSTEM_ID_LEN = 16 ; +static const uint8_t EXPLR_MMIO_O1SSYSID_SUBSYSTEM_VENDOR_ID = 16 ; +static const uint8_t EXPLR_MMIO_O1SSYSID_SUBSYSTEM_VENDOR_ID_LEN = 16 ; + +static const uint8_t EXPLR_MMIO_O1VSID_VENDOR_UNIQUE = 32 ; +static const uint8_t EXPLR_MMIO_O1VSID_VENDOR_UNIQUE_LEN = 16 ; +static const uint8_t EXPLR_MMIO_O1VSID_DVSEC_ID = 48 ; +static const uint8_t EXPLR_MMIO_O1VSID_DVSEC_ID_LEN = 16 ; + +static const uint8_t EXPLR_MMIO_OAFUVER_ONAME5_AFU_VERSION_MAJOR = 0 ; +static const uint8_t EXPLR_MMIO_OAFUVER_ONAME5_AFU_VERSION_MAJOR_LEN = 8 ; +static const uint8_t EXPLR_MMIO_OAFUVER_ONAME5_AFU_VERSION_MINOR = 8 ; +static const uint8_t EXPLR_MMIO_OAFUVER_ONAME5_AFU_VERSION_MINOR_LEN = 8 ; +static const uint8_t EXPLR_MMIO_OAFUVER_ONAME5_AFU_C_TYPE = 16 ; +static const uint8_t EXPLR_MMIO_OAFUVER_ONAME5_AFU_C_TYPE_LEN = 3 ; +static const uint8_t EXPLR_MMIO_OAFUVER_ONAME5_AFU_M_TYPE = 19 ; +static const uint8_t EXPLR_MMIO_OAFUVER_ONAME5_AFU_M_TYPE_LEN = 3 ; +static const uint8_t EXPLR_MMIO_OAFUVER_ONAME5_PROFILE = 24 ; +static const uint8_t EXPLR_MMIO_OAFUVER_ONAME5_PROFILE_LEN = 8 ; +static const uint8_t EXPLR_MMIO_OAFUVER_ONAME5_NAME_SPACE_23 = 32 ; +static const uint8_t EXPLR_MMIO_OAFUVER_ONAME5_NAME_SPACE_23_LEN = 8 ; +static const uint8_t EXPLR_MMIO_OAFUVER_ONAME5_NAME_SPACE_22 = 40 ; +static const uint8_t EXPLR_MMIO_OAFUVER_ONAME5_NAME_SPACE_22_LEN = 8 ; +static const uint8_t EXPLR_MMIO_OAFUVER_ONAME5_NAME_SPACE_21 = 48 ; +static const uint8_t EXPLR_MMIO_OAFUVER_ONAME5_NAME_SPACE_21_LEN = 8 ; +static const uint8_t EXPLR_MMIO_OAFUVER_ONAME5_NAME_SPACE_20 = 56 ; +static const uint8_t EXPLR_MMIO_OAFUVER_ONAME5_NAME_SPACE_20_LEN = 8 ; + +static const uint8_t EXPLR_MMIO_OCTRLENB_OCTRLID_AFU_UNIQUE = 0 ; +static const uint8_t EXPLR_MMIO_OCTRLENB_OCTRLID_AFU_UNIQUE_LEN = 4 ; +static const uint8_t EXPLR_MMIO_OCTRLENB_OCTRLID_FENCE_AFU = 6 ; +static const uint8_t EXPLR_MMIO_OCTRLENB_OCTRLID_ENABLE_AFU = 7 ; +static const uint8_t EXPLR_MMIO_OCTRLENB_OCTRLID_RESET_AFU = 8 ; +static const uint8_t EXPLR_MMIO_OCTRLENB_OCTRLID_TERMINATE_VALID = 11 ; +static const uint8_t EXPLR_MMIO_OCTRLENB_OCTRLID_PASID_TERMINATION_VALUE = 12 ; +static const uint8_t EXPLR_MMIO_OCTRLENB_OCTRLID_PASID_TERMINATION_VALUE_LEN = 20 ; +static const uint8_t EXPLR_MMIO_OCTRLENB_OCTRLID_AFU_CONTROL_INDEX = 42 ; +static const uint8_t EXPLR_MMIO_OCTRLENB_OCTRLID_AFU_CONTROL_INDEX_LEN = 6 ; +static const uint8_t EXPLR_MMIO_OCTRLENB_OCTRLID_DVSEC_ID = 48 ; +static const uint8_t EXPLR_MMIO_OCTRLENB_OCTRLID_DVSEC_ID_LEN = 16 ; + +static const uint8_t EXPLR_MMIO_OCTRLPID_METADATA_SUPPORTED = 0 ; +static const uint8_t EXPLR_MMIO_OCTRLPID_METADATA_ENABLED = 1 ; +static const uint8_t EXPLR_MMIO_OCTRLPID_HTRL = 2 ; +static const uint8_t EXPLR_MMIO_OCTRLPID_HTRL_LEN = 3 ; +static const uint8_t EXPLR_MMIO_OCTRLPID_PASID_BASE = 12 ; +static const uint8_t EXPLR_MMIO_OCTRLPID_PASID_BASE_LEN = 20 ; +static const uint8_t EXPLR_MMIO_OCTRLPID_PASID_LENGTH_ENABLED = 51 ; +static const uint8_t EXPLR_MMIO_OCTRLPID_PASID_LENGTH_ENABLED_LEN = 5 ; +static const uint8_t EXPLR_MMIO_OCTRLPID_PASID_LENGTH_SUPPORTED = 59 ; +static const uint8_t EXPLR_MMIO_OCTRLPID_PASID_LENGTH_SUPPORTED_LEN = 5 ; + +static const uint8_t EXPLR_MMIO_OCTRLTAG_AFU_ACTAG_BASE = 20 ; +static const uint8_t EXPLR_MMIO_OCTRLTAG_AFU_ACTAG_BASE_LEN = 12 ; +static const uint8_t EXPLR_MMIO_OCTRLTAG_AFU_ACTAG_LENGTH_ENABLED = 36 ; +static const uint8_t EXPLR_MMIO_OCTRLTAG_AFU_ACTAG_LENGTH_ENABLED_LEN = 12 ; +static const uint8_t EXPLR_MMIO_OCTRLTAG_AFU_ACTAG_LENGTH_SUPPORTED = 52 ; +static const uint8_t EXPLR_MMIO_OCTRLTAG_AFU_ACTAG_LENGTH_SUPPORTED_LEN = 12 ; + +static const uint8_t EXPLR_MMIO_ODSNHI_DSN_HIGH = 32 ; +static const uint8_t EXPLR_MMIO_ODSNHI_DSN_HIGH_LEN = 32 ; + +static const uint8_t EXPLR_MMIO_ODSNLO_ODSNCAP_DSN_LOW = 0 ; +static const uint8_t EXPLR_MMIO_ODSNLO_ODSNCAP_DSN_LOW_LEN = 32 ; + +static const uint8_t EXPLR_MMIO_OGMMIOOF_OFFSET = 0 ; +static const uint8_t EXPLR_MMIO_OGMMIOOF_OFFSET_LEN = 48 ; +static const uint8_t EXPLR_MMIO_OGMMIOOF_BAR = 61 ; +static const uint8_t EXPLR_MMIO_OGMMIOOF_BAR_LEN = 3 ; + +static const uint8_t EXPLR_MMIO_OGMMIOSZ_SIZE = 32 ; +static const uint8_t EXPLR_MMIO_OGMMIOSZ_SIZE_LEN = 32 ; + +static const uint8_t EXPLR_MMIO_OMEMADDR_ADDR = 0 ; +static const uint8_t EXPLR_MMIO_OMEMADDR_ADDR_LEN = 64 ; + +static const uint8_t EXPLR_MMIO_ONAME0_ODESCTML_NAME_SPACE_3 = 0 ; +static const uint8_t EXPLR_MMIO_ONAME0_ODESCTML_NAME_SPACE_3_LEN = 8 ; +static const uint8_t EXPLR_MMIO_ONAME0_ODESCTML_NAME_SPACE_2 = 8 ; +static const uint8_t EXPLR_MMIO_ONAME0_ODESCTML_NAME_SPACE_2_LEN = 8 ; +static const uint8_t EXPLR_MMIO_ONAME0_ODESCTML_NAME_SPACE_1 = 16 ; +static const uint8_t EXPLR_MMIO_ONAME0_ODESCTML_NAME_SPACE_1_LEN = 8 ; +static const uint8_t EXPLR_MMIO_ONAME0_ODESCTML_NAME_SPACE_0 = 24 ; +static const uint8_t EXPLR_MMIO_ONAME0_ODESCTML_NAME_SPACE_0_LEN = 8 ; + +static const uint8_t EXPLR_MMIO_ONAME21_NAME_SPACE_11 = 0 ; +static const uint8_t EXPLR_MMIO_ONAME21_NAME_SPACE_11_LEN = 8 ; +static const uint8_t EXPLR_MMIO_ONAME21_NAME_SPACE_10 = 8 ; +static const uint8_t EXPLR_MMIO_ONAME21_NAME_SPACE_10_LEN = 8 ; +static const uint8_t EXPLR_MMIO_ONAME21_NAME_SPACE_9 = 16 ; +static const uint8_t EXPLR_MMIO_ONAME21_NAME_SPACE_9_LEN = 8 ; +static const uint8_t EXPLR_MMIO_ONAME21_NAME_SPACE_8 = 24 ; +static const uint8_t EXPLR_MMIO_ONAME21_NAME_SPACE_8_LEN = 8 ; +static const uint8_t EXPLR_MMIO_ONAME21_NAME_SPACE_7 = 32 ; +static const uint8_t EXPLR_MMIO_ONAME21_NAME_SPACE_7_LEN = 8 ; +static const uint8_t EXPLR_MMIO_ONAME21_NAME_SPACE_6 = 40 ; +static const uint8_t EXPLR_MMIO_ONAME21_NAME_SPACE_6_LEN = 8 ; +static const uint8_t EXPLR_MMIO_ONAME21_NAME_SPACE_5 = 48 ; +static const uint8_t EXPLR_MMIO_ONAME21_NAME_SPACE_5_LEN = 8 ; +static const uint8_t EXPLR_MMIO_ONAME21_NAME_SPACE_4 = 56 ; +static const uint8_t EXPLR_MMIO_ONAME21_NAME_SPACE_4_LEN = 8 ; + +static const uint8_t EXPLR_MMIO_ONAME43_NAME_SPACE_19 = 0 ; +static const uint8_t EXPLR_MMIO_ONAME43_NAME_SPACE_19_LEN = 8 ; +static const uint8_t EXPLR_MMIO_ONAME43_NAME_SPACE_18 = 8 ; +static const uint8_t EXPLR_MMIO_ONAME43_NAME_SPACE_18_LEN = 8 ; +static const uint8_t EXPLR_MMIO_ONAME43_NAME_SPACE_17 = 16 ; +static const uint8_t EXPLR_MMIO_ONAME43_NAME_SPACE_17_LEN = 8 ; +static const uint8_t EXPLR_MMIO_ONAME43_NAME_SPACE_16 = 24 ; +static const uint8_t EXPLR_MMIO_ONAME43_NAME_SPACE_16_LEN = 8 ; +static const uint8_t EXPLR_MMIO_ONAME43_NAME_SPACE_15 = 32 ; +static const uint8_t EXPLR_MMIO_ONAME43_NAME_SPACE_15_LEN = 8 ; +static const uint8_t EXPLR_MMIO_ONAME43_NAME_SPACE_14 = 40 ; +static const uint8_t EXPLR_MMIO_ONAME43_NAME_SPACE_14_LEN = 8 ; +static const uint8_t EXPLR_MMIO_ONAME43_NAME_SPACE_13 = 48 ; +static const uint8_t EXPLR_MMIO_ONAME43_NAME_SPACE_13_LEN = 8 ; +static const uint8_t EXPLR_MMIO_ONAME43_NAME_SPACE_12 = 56 ; +static const uint8_t EXPLR_MMIO_ONAME43_NAME_SPACE_12_LEN = 8 ; + +static const uint8_t EXPLR_MMIO_OPASID_MAX_PASID_WIDTH = 19 ; +static const uint8_t EXPLR_MMIO_OPASID_MAX_PASID_WIDTH_LEN = 5 ; + +static const uint8_t EXPLR_MMIO_OPMMIOOF_OFFSET = 0 ; +static const uint8_t EXPLR_MMIO_OPMMIOOF_OFFSET_LEN = 48 ; +static const uint8_t EXPLR_MMIO_OPMMIOOF_BAR = 61 ; +static const uint8_t EXPLR_MMIO_OPMMIOOF_BAR_LEN = 3 ; + +static const uint8_t EXPLR_MMIO_OPMMIOST_MEM_SIZE = 24 ; +static const uint8_t EXPLR_MMIO_OPMMIOST_MEM_SIZE_LEN = 8 ; +static const uint8_t EXPLR_MMIO_OPMMIOST_STRIDE = 32 ; +static const uint8_t EXPLR_MMIO_OPMMIOST_STRIDE_LEN = 16 ; + +static const uint8_t EXPLR_MMIO_ORRCAP10_TEMPLATE_55 = 0 ; +static const uint8_t EXPLR_MMIO_ORRCAP10_TEMPLATE_55_LEN = 4 ; +static const uint8_t EXPLR_MMIO_ORRCAP10_TEMPLATE_54 = 4 ; +static const uint8_t EXPLR_MMIO_ORRCAP10_TEMPLATE_54_LEN = 4 ; +static const uint8_t EXPLR_MMIO_ORRCAP10_TEMPLATE_53 = 8 ; +static const uint8_t EXPLR_MMIO_ORRCAP10_TEMPLATE_53_LEN = 4 ; +static const uint8_t EXPLR_MMIO_ORRCAP10_TEMPLATE_52 = 12 ; +static const uint8_t EXPLR_MMIO_ORRCAP10_TEMPLATE_52_LEN = 4 ; +static const uint8_t EXPLR_MMIO_ORRCAP10_TEMPLATE_51 = 16 ; +static const uint8_t EXPLR_MMIO_ORRCAP10_TEMPLATE_51_LEN = 4 ; +static const uint8_t EXPLR_MMIO_ORRCAP10_TEMPLATE_50 = 20 ; +static const uint8_t EXPLR_MMIO_ORRCAP10_TEMPLATE_50_LEN = 4 ; +static const uint8_t EXPLR_MMIO_ORRCAP10_TEMPLATE_49 = 24 ; +static const uint8_t EXPLR_MMIO_ORRCAP10_TEMPLATE_49_LEN = 4 ; +static const uint8_t EXPLR_MMIO_ORRCAP10_TEMPLATE_48 = 28 ; +static const uint8_t EXPLR_MMIO_ORRCAP10_TEMPLATE_48_LEN = 4 ; +static const uint8_t EXPLR_MMIO_ORRCAP10_TEMPLATE_63 = 32 ; +static const uint8_t EXPLR_MMIO_ORRCAP10_TEMPLATE_63_LEN = 4 ; +static const uint8_t EXPLR_MMIO_ORRCAP10_TEMPLATE_62 = 36 ; +static const uint8_t EXPLR_MMIO_ORRCAP10_TEMPLATE_62_LEN = 4 ; +static const uint8_t EXPLR_MMIO_ORRCAP10_TEMPLATE_61 = 40 ; +static const uint8_t EXPLR_MMIO_ORRCAP10_TEMPLATE_61_LEN = 4 ; +static const uint8_t EXPLR_MMIO_ORRCAP10_TEMPLATE_60 = 44 ; +static const uint8_t EXPLR_MMIO_ORRCAP10_TEMPLATE_60_LEN = 4 ; +static const uint8_t EXPLR_MMIO_ORRCAP10_TEMPLATE_59 = 48 ; +static const uint8_t EXPLR_MMIO_ORRCAP10_TEMPLATE_59_LEN = 4 ; +static const uint8_t EXPLR_MMIO_ORRCAP10_TEMPLATE_58 = 52 ; +static const uint8_t EXPLR_MMIO_ORRCAP10_TEMPLATE_58_LEN = 4 ; +static const uint8_t EXPLR_MMIO_ORRCAP10_TEMPLATE_57 = 56 ; +static const uint8_t EXPLR_MMIO_ORRCAP10_TEMPLATE_57_LEN = 4 ; +static const uint8_t EXPLR_MMIO_ORRCAP10_TEMPLATE_56 = 60 ; +static const uint8_t EXPLR_MMIO_ORRCAP10_TEMPLATE_56_LEN = 4 ; + +static const uint8_t EXPLR_MMIO_ORRCAP32_TEMPLATE_39 = 0 ; +static const uint8_t EXPLR_MMIO_ORRCAP32_TEMPLATE_39_LEN = 4 ; +static const uint8_t EXPLR_MMIO_ORRCAP32_TEMPLATE_38 = 4 ; +static const uint8_t EXPLR_MMIO_ORRCAP32_TEMPLATE_38_LEN = 4 ; +static const uint8_t EXPLR_MMIO_ORRCAP32_TEMPLATE_37 = 8 ; +static const uint8_t EXPLR_MMIO_ORRCAP32_TEMPLATE_37_LEN = 4 ; +static const uint8_t EXPLR_MMIO_ORRCAP32_TEMPLATE_36 = 12 ; +static const uint8_t EXPLR_MMIO_ORRCAP32_TEMPLATE_36_LEN = 4 ; +static const uint8_t EXPLR_MMIO_ORRCAP32_TEMPLATE_35 = 16 ; +static const uint8_t EXPLR_MMIO_ORRCAP32_TEMPLATE_35_LEN = 4 ; +static const uint8_t EXPLR_MMIO_ORRCAP32_TEMPLATE_34 = 20 ; +static const uint8_t EXPLR_MMIO_ORRCAP32_TEMPLATE_34_LEN = 4 ; +static const uint8_t EXPLR_MMIO_ORRCAP32_TEMPLATE_33 = 24 ; +static const uint8_t EXPLR_MMIO_ORRCAP32_TEMPLATE_33_LEN = 4 ; +static const uint8_t EXPLR_MMIO_ORRCAP32_TEMPLATE_32 = 28 ; +static const uint8_t EXPLR_MMIO_ORRCAP32_TEMPLATE_32_LEN = 4 ; +static const uint8_t EXPLR_MMIO_ORRCAP32_TEMPLATE_47 = 32 ; +static const uint8_t EXPLR_MMIO_ORRCAP32_TEMPLATE_47_LEN = 4 ; +static const uint8_t EXPLR_MMIO_ORRCAP32_TEMPLATE_46 = 36 ; +static const uint8_t EXPLR_MMIO_ORRCAP32_TEMPLATE_46_LEN = 4 ; +static const uint8_t EXPLR_MMIO_ORRCAP32_TEMPLATE_45 = 40 ; +static const uint8_t EXPLR_MMIO_ORRCAP32_TEMPLATE_45_LEN = 4 ; +static const uint8_t EXPLR_MMIO_ORRCAP32_TEMPLATE_44 = 44 ; +static const uint8_t EXPLR_MMIO_ORRCAP32_TEMPLATE_44_LEN = 4 ; +static const uint8_t EXPLR_MMIO_ORRCAP32_TEMPLATE_43 = 48 ; +static const uint8_t EXPLR_MMIO_ORRCAP32_TEMPLATE_43_LEN = 4 ; +static const uint8_t EXPLR_MMIO_ORRCAP32_TEMPLATE_42 = 52 ; +static const uint8_t EXPLR_MMIO_ORRCAP32_TEMPLATE_42_LEN = 4 ; +static const uint8_t EXPLR_MMIO_ORRCAP32_TEMPLATE_41 = 56 ; +static const uint8_t EXPLR_MMIO_ORRCAP32_TEMPLATE_41_LEN = 4 ; +static const uint8_t EXPLR_MMIO_ORRCAP32_TEMPLATE_40 = 60 ; +static const uint8_t EXPLR_MMIO_ORRCAP32_TEMPLATE_40_LEN = 4 ; + +static const uint8_t EXPLR_MMIO_ORRCAP54_TEMPLATE_23 = 0 ; +static const uint8_t EXPLR_MMIO_ORRCAP54_TEMPLATE_23_LEN = 4 ; +static const uint8_t EXPLR_MMIO_ORRCAP54_TEMPLATE_22 = 4 ; +static const uint8_t EXPLR_MMIO_ORRCAP54_TEMPLATE_22_LEN = 4 ; +static const uint8_t EXPLR_MMIO_ORRCAP54_TEMPLATE_21 = 8 ; +static const uint8_t EXPLR_MMIO_ORRCAP54_TEMPLATE_21_LEN = 4 ; +static const uint8_t EXPLR_MMIO_ORRCAP54_TEMPLATE_20 = 12 ; +static const uint8_t EXPLR_MMIO_ORRCAP54_TEMPLATE_20_LEN = 4 ; +static const uint8_t EXPLR_MMIO_ORRCAP54_TEMPLATE_19 = 16 ; +static const uint8_t EXPLR_MMIO_ORRCAP54_TEMPLATE_19_LEN = 4 ; +static const uint8_t EXPLR_MMIO_ORRCAP54_TEMPLATE_18 = 20 ; +static const uint8_t EXPLR_MMIO_ORRCAP54_TEMPLATE_18_LEN = 4 ; +static const uint8_t EXPLR_MMIO_ORRCAP54_TEMPLATE_17 = 24 ; +static const uint8_t EXPLR_MMIO_ORRCAP54_TEMPLATE_17_LEN = 4 ; +static const uint8_t EXPLR_MMIO_ORRCAP54_TEMPLATE_16 = 28 ; +static const uint8_t EXPLR_MMIO_ORRCAP54_TEMPLATE_16_LEN = 4 ; +static const uint8_t EXPLR_MMIO_ORRCAP54_TEMPLATE_31 = 32 ; +static const uint8_t EXPLR_MMIO_ORRCAP54_TEMPLATE_31_LEN = 4 ; +static const uint8_t EXPLR_MMIO_ORRCAP54_TEMPLATE_30 = 36 ; +static const uint8_t EXPLR_MMIO_ORRCAP54_TEMPLATE_30_LEN = 4 ; +static const uint8_t EXPLR_MMIO_ORRCAP54_TEMPLATE_29 = 40 ; +static const uint8_t EXPLR_MMIO_ORRCAP54_TEMPLATE_29_LEN = 4 ; +static const uint8_t EXPLR_MMIO_ORRCAP54_TEMPLATE_28 = 44 ; +static const uint8_t EXPLR_MMIO_ORRCAP54_TEMPLATE_28_LEN = 4 ; +static const uint8_t EXPLR_MMIO_ORRCAP54_TEMPLATE_27 = 48 ; +static const uint8_t EXPLR_MMIO_ORRCAP54_TEMPLATE_27_LEN = 4 ; +static const uint8_t EXPLR_MMIO_ORRCAP54_TEMPLATE_26 = 52 ; +static const uint8_t EXPLR_MMIO_ORRCAP54_TEMPLATE_26_LEN = 4 ; +static const uint8_t EXPLR_MMIO_ORRCAP54_TEMPLATE_25 = 56 ; +static const uint8_t EXPLR_MMIO_ORRCAP54_TEMPLATE_25_LEN = 4 ; +static const uint8_t EXPLR_MMIO_ORRCAP54_TEMPLATE_24 = 60 ; +static const uint8_t EXPLR_MMIO_ORRCAP54_TEMPLATE_24_LEN = 4 ; + +static const uint8_t EXPLR_MMIO_ORRCAP76_TEMPLATE_7 = 0 ; +static const uint8_t EXPLR_MMIO_ORRCAP76_TEMPLATE_7_LEN = 4 ; +static const uint8_t EXPLR_MMIO_ORRCAP76_TEMPLATE_6 = 4 ; +static const uint8_t EXPLR_MMIO_ORRCAP76_TEMPLATE_6_LEN = 4 ; +static const uint8_t EXPLR_MMIO_ORRCAP76_TEMPLATE_5 = 8 ; +static const uint8_t EXPLR_MMIO_ORRCAP76_TEMPLATE_5_LEN = 4 ; +static const uint8_t EXPLR_MMIO_ORRCAP76_TEMPLATE_4 = 12 ; +static const uint8_t EXPLR_MMIO_ORRCAP76_TEMPLATE_4_LEN = 4 ; +static const uint8_t EXPLR_MMIO_ORRCAP76_TEMPLATE_3 = 16 ; +static const uint8_t EXPLR_MMIO_ORRCAP76_TEMPLATE_3_LEN = 4 ; +static const uint8_t EXPLR_MMIO_ORRCAP76_TEMPLATE_2 = 20 ; +static const uint8_t EXPLR_MMIO_ORRCAP76_TEMPLATE_2_LEN = 4 ; +static const uint8_t EXPLR_MMIO_ORRCAP76_TEMPLATE_1 = 24 ; +static const uint8_t EXPLR_MMIO_ORRCAP76_TEMPLATE_1_LEN = 4 ; +static const uint8_t EXPLR_MMIO_ORRCAP76_TEMPLATE_0 = 28 ; +static const uint8_t EXPLR_MMIO_ORRCAP76_TEMPLATE_0_LEN = 4 ; +static const uint8_t EXPLR_MMIO_ORRCAP76_TEMPLATE_15 = 32 ; +static const uint8_t EXPLR_MMIO_ORRCAP76_TEMPLATE_15_LEN = 4 ; +static const uint8_t EXPLR_MMIO_ORRCAP76_TEMPLATE_14 = 36 ; +static const uint8_t EXPLR_MMIO_ORRCAP76_TEMPLATE_14_LEN = 4 ; +static const uint8_t EXPLR_MMIO_ORRCAP76_TEMPLATE_13 = 40 ; +static const uint8_t EXPLR_MMIO_ORRCAP76_TEMPLATE_13_LEN = 4 ; +static const uint8_t EXPLR_MMIO_ORRCAP76_TEMPLATE_12 = 44 ; +static const uint8_t EXPLR_MMIO_ORRCAP76_TEMPLATE_12_LEN = 4 ; +static const uint8_t EXPLR_MMIO_ORRCAP76_TEMPLATE_11 = 48 ; +static const uint8_t EXPLR_MMIO_ORRCAP76_TEMPLATE_11_LEN = 4 ; +static const uint8_t EXPLR_MMIO_ORRCAP76_TEMPLATE_10 = 52 ; +static const uint8_t EXPLR_MMIO_ORRCAP76_TEMPLATE_10_LEN = 4 ; +static const uint8_t EXPLR_MMIO_ORRCAP76_TEMPLATE_9 = 56 ; +static const uint8_t EXPLR_MMIO_ORRCAP76_TEMPLATE_9_LEN = 4 ; +static const uint8_t EXPLR_MMIO_ORRCAP76_TEMPLATE_8 = 60 ; +static const uint8_t EXPLR_MMIO_ORRCAP76_TEMPLATE_8_LEN = 4 ; + +static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_31 = 0 ; +static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_30 = 1 ; +static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_29 = 2 ; +static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_28 = 3 ; +static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_27 = 4 ; +static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_26 = 5 ; +static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_25 = 6 ; +static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_24 = 7 ; +static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_23 = 8 ; +static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_22 = 9 ; +static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_21 = 10 ; +static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_20 = 11 ; +static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_19 = 12 ; +static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_18 = 13 ; +static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_17 = 14 ; +static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_16 = 15 ; +static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_15 = 16 ; +static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_14 = 17 ; +static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_13 = 18 ; +static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_12 = 19 ; +static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_11 = 20 ; +static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_10 = 21 ; +static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_9 = 22 ; +static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_8 = 23 ; +static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_7 = 24 ; +static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_6 = 25 ; +static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_5 = 26 ; +static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_4 = 27 ; +static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_3 = 28 ; +static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_2 = 29 ; +static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_1 = 30 ; +static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_0 = 31 ; +static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_63 = 32 ; +static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_62 = 33 ; +static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_61 = 34 ; +static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_60 = 35 ; +static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_59 = 36 ; +static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_58 = 37 ; +static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_57 = 38 ; +static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_56 = 39 ; +static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_55 = 40 ; +static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_54 = 41 ; +static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_53 = 42 ; +static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_52 = 43 ; +static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_51 = 44 ; +static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_50 = 45 ; +static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_49 = 46 ; +static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_48 = 47 ; +static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_47 = 48 ; +static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_46 = 49 ; +static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_45 = 50 ; +static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_44 = 51 ; +static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_43 = 52 ; +static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_42 = 53 ; +static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_41 = 54 ; +static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_40 = 55 ; +static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_39 = 56 ; +static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_38 = 57 ; +static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_37 = 58 ; +static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_36 = 59 ; +static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_35 = 60 ; +static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_34 = 61 ; +static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_33 = 62 ; +static const uint8_t EXPLR_MMIO_ORTCAP_TEMPLATE_32 = 63 ; + +static const uint8_t EXPLR_MMIO_OSYSMEML_SYSLEN = 0 ; +static const uint8_t EXPLR_MMIO_OSYSMEML_SYSLEN_LEN = 48 ; + +static const uint8_t EXPLR_MMIO_OTRCFG10_TEMPLATE_55 = 0 ; +static const uint8_t EXPLR_MMIO_OTRCFG10_TEMPLATE_55_LEN = 4 ; +static const uint8_t EXPLR_MMIO_OTRCFG10_TEMPLATE_54 = 4 ; +static const uint8_t EXPLR_MMIO_OTRCFG10_TEMPLATE_54_LEN = 4 ; +static const uint8_t EXPLR_MMIO_OTRCFG10_TEMPLATE_53 = 8 ; +static const uint8_t EXPLR_MMIO_OTRCFG10_TEMPLATE_53_LEN = 4 ; +static const uint8_t EXPLR_MMIO_OTRCFG10_TEMPLATE_52 = 12 ; +static const uint8_t EXPLR_MMIO_OTRCFG10_TEMPLATE_52_LEN = 4 ; +static const uint8_t EXPLR_MMIO_OTRCFG10_TEMPLATE_51 = 16 ; +static const uint8_t EXPLR_MMIO_OTRCFG10_TEMPLATE_51_LEN = 4 ; +static const uint8_t EXPLR_MMIO_OTRCFG10_TEMPLATE_50 = 20 ; +static const uint8_t EXPLR_MMIO_OTRCFG10_TEMPLATE_50_LEN = 4 ; +static const uint8_t EXPLR_MMIO_OTRCFG10_TEMPLATE_49 = 24 ; +static const uint8_t EXPLR_MMIO_OTRCFG10_TEMPLATE_49_LEN = 4 ; +static const uint8_t EXPLR_MMIO_OTRCFG10_TEMPLATE_48 = 28 ; +static const uint8_t EXPLR_MMIO_OTRCFG10_TEMPLATE_48_LEN = 4 ; +static const uint8_t EXPLR_MMIO_OTRCFG10_TEMPLATE_63 = 32 ; +static const uint8_t EXPLR_MMIO_OTRCFG10_TEMPLATE_63_LEN = 4 ; +static const uint8_t EXPLR_MMIO_OTRCFG10_TEMPLATE_62 = 36 ; +static const uint8_t EXPLR_MMIO_OTRCFG10_TEMPLATE_62_LEN = 4 ; +static const uint8_t EXPLR_MMIO_OTRCFG10_TEMPLATE_61 = 40 ; +static const uint8_t EXPLR_MMIO_OTRCFG10_TEMPLATE_61_LEN = 4 ; +static const uint8_t EXPLR_MMIO_OTRCFG10_TEMPLATE_60 = 44 ; +static const uint8_t EXPLR_MMIO_OTRCFG10_TEMPLATE_60_LEN = 4 ; +static const uint8_t EXPLR_MMIO_OTRCFG10_TEMPLATE_59 = 48 ; +static const uint8_t EXPLR_MMIO_OTRCFG10_TEMPLATE_59_LEN = 4 ; +static const uint8_t EXPLR_MMIO_OTRCFG10_TEMPLATE_58 = 52 ; +static const uint8_t EXPLR_MMIO_OTRCFG10_TEMPLATE_58_LEN = 4 ; +static const uint8_t EXPLR_MMIO_OTRCFG10_TEMPLATE_57 = 56 ; +static const uint8_t EXPLR_MMIO_OTRCFG10_TEMPLATE_57_LEN = 4 ; +static const uint8_t EXPLR_MMIO_OTRCFG10_TEMPLATE_56 = 60 ; +static const uint8_t EXPLR_MMIO_OTRCFG10_TEMPLATE_56_LEN = 4 ; + +static const uint8_t EXPLR_MMIO_OTRCFG32_TEMPLATE_39 = 0 ; +static const uint8_t EXPLR_MMIO_OTRCFG32_TEMPLATE_39_LEN = 4 ; +static const uint8_t EXPLR_MMIO_OTRCFG32_TEMPLATE_38 = 4 ; +static const uint8_t EXPLR_MMIO_OTRCFG32_TEMPLATE_38_LEN = 4 ; +static const uint8_t EXPLR_MMIO_OTRCFG32_TEMPLATE_37 = 8 ; +static const uint8_t EXPLR_MMIO_OTRCFG32_TEMPLATE_37_LEN = 4 ; +static const uint8_t EXPLR_MMIO_OTRCFG32_TEMPLATE_36 = 12 ; +static const uint8_t EXPLR_MMIO_OTRCFG32_TEMPLATE_36_LEN = 4 ; +static const uint8_t EXPLR_MMIO_OTRCFG32_TEMPLATE_35 = 16 ; +static const uint8_t EXPLR_MMIO_OTRCFG32_TEMPLATE_35_LEN = 4 ; +static const uint8_t EXPLR_MMIO_OTRCFG32_TEMPLATE_34 = 20 ; +static const uint8_t EXPLR_MMIO_OTRCFG32_TEMPLATE_34_LEN = 4 ; +static const uint8_t EXPLR_MMIO_OTRCFG32_TEMPLATE_33 = 24 ; +static const uint8_t EXPLR_MMIO_OTRCFG32_TEMPLATE_33_LEN = 4 ; +static const uint8_t EXPLR_MMIO_OTRCFG32_TEMPLATE_32 = 28 ; +static const uint8_t EXPLR_MMIO_OTRCFG32_TEMPLATE_32_LEN = 4 ; +static const uint8_t EXPLR_MMIO_OTRCFG32_TEMPLATE_47 = 32 ; +static const uint8_t EXPLR_MMIO_OTRCFG32_TEMPLATE_47_LEN = 4 ; +static const uint8_t EXPLR_MMIO_OTRCFG32_TEMPLATE_46 = 36 ; +static const uint8_t EXPLR_MMIO_OTRCFG32_TEMPLATE_46_LEN = 4 ; +static const uint8_t EXPLR_MMIO_OTRCFG32_TEMPLATE_45 = 40 ; +static const uint8_t EXPLR_MMIO_OTRCFG32_TEMPLATE_45_LEN = 4 ; +static const uint8_t EXPLR_MMIO_OTRCFG32_TEMPLATE_44 = 44 ; +static const uint8_t EXPLR_MMIO_OTRCFG32_TEMPLATE_44_LEN = 4 ; +static const uint8_t EXPLR_MMIO_OTRCFG32_TEMPLATE_43 = 48 ; +static const uint8_t EXPLR_MMIO_OTRCFG32_TEMPLATE_43_LEN = 4 ; +static const uint8_t EXPLR_MMIO_OTRCFG32_TEMPLATE_42 = 52 ; +static const uint8_t EXPLR_MMIO_OTRCFG32_TEMPLATE_42_LEN = 4 ; +static const uint8_t EXPLR_MMIO_OTRCFG32_TEMPLATE_41 = 56 ; +static const uint8_t EXPLR_MMIO_OTRCFG32_TEMPLATE_41_LEN = 4 ; +static const uint8_t EXPLR_MMIO_OTRCFG32_TEMPLATE_40 = 60 ; +static const uint8_t EXPLR_MMIO_OTRCFG32_TEMPLATE_40_LEN = 4 ; + +static const uint8_t EXPLR_MMIO_OTRCFG54_TEMPLATE_23 = 0 ; +static const uint8_t EXPLR_MMIO_OTRCFG54_TEMPLATE_23_LEN = 4 ; +static const uint8_t EXPLR_MMIO_OTRCFG54_TEMPLATE_22 = 4 ; +static const uint8_t EXPLR_MMIO_OTRCFG54_TEMPLATE_22_LEN = 4 ; +static const uint8_t EXPLR_MMIO_OTRCFG54_TEMPLATE_21 = 8 ; +static const uint8_t EXPLR_MMIO_OTRCFG54_TEMPLATE_21_LEN = 4 ; +static const uint8_t EXPLR_MMIO_OTRCFG54_TEMPLATE_20 = 12 ; +static const uint8_t EXPLR_MMIO_OTRCFG54_TEMPLATE_20_LEN = 4 ; +static const uint8_t EXPLR_MMIO_OTRCFG54_TEMPLATE_19 = 16 ; +static const uint8_t EXPLR_MMIO_OTRCFG54_TEMPLATE_19_LEN = 4 ; +static const uint8_t EXPLR_MMIO_OTRCFG54_TEMPLATE_18 = 20 ; +static const uint8_t EXPLR_MMIO_OTRCFG54_TEMPLATE_18_LEN = 4 ; +static const uint8_t EXPLR_MMIO_OTRCFG54_TEMPLATE_17 = 24 ; +static const uint8_t EXPLR_MMIO_OTRCFG54_TEMPLATE_17_LEN = 4 ; +static const uint8_t EXPLR_MMIO_OTRCFG54_TEMPLATE_16 = 28 ; +static const uint8_t EXPLR_MMIO_OTRCFG54_TEMPLATE_16_LEN = 4 ; +static const uint8_t EXPLR_MMIO_OTRCFG54_TEMPLATE_31 = 32 ; +static const uint8_t EXPLR_MMIO_OTRCFG54_TEMPLATE_31_LEN = 4 ; +static const uint8_t EXPLR_MMIO_OTRCFG54_TEMPLATE_30 = 36 ; +static const uint8_t EXPLR_MMIO_OTRCFG54_TEMPLATE_30_LEN = 4 ; +static const uint8_t EXPLR_MMIO_OTRCFG54_TEMPLATE_29 = 40 ; +static const uint8_t EXPLR_MMIO_OTRCFG54_TEMPLATE_29_LEN = 4 ; +static const uint8_t EXPLR_MMIO_OTRCFG54_TEMPLATE_28 = 44 ; +static const uint8_t EXPLR_MMIO_OTRCFG54_TEMPLATE_28_LEN = 4 ; +static const uint8_t EXPLR_MMIO_OTRCFG54_TEMPLATE_27 = 48 ; +static const uint8_t EXPLR_MMIO_OTRCFG54_TEMPLATE_27_LEN = 4 ; +static const uint8_t EXPLR_MMIO_OTRCFG54_TEMPLATE_26 = 52 ; +static const uint8_t EXPLR_MMIO_OTRCFG54_TEMPLATE_26_LEN = 4 ; +static const uint8_t EXPLR_MMIO_OTRCFG54_TEMPLATE_25 = 56 ; +static const uint8_t EXPLR_MMIO_OTRCFG54_TEMPLATE_25_LEN = 4 ; +static const uint8_t EXPLR_MMIO_OTRCFG54_TEMPLATE_24 = 60 ; +static const uint8_t EXPLR_MMIO_OTRCFG54_TEMPLATE_24_LEN = 4 ; + +static const uint8_t EXPLR_MMIO_OTRCFG76_TEMPLATE_7 = 0 ; +static const uint8_t EXPLR_MMIO_OTRCFG76_TEMPLATE_7_LEN = 4 ; +static const uint8_t EXPLR_MMIO_OTRCFG76_TEMPLATE_6 = 4 ; +static const uint8_t EXPLR_MMIO_OTRCFG76_TEMPLATE_6_LEN = 4 ; +static const uint8_t EXPLR_MMIO_OTRCFG76_TEMPLATE_5 = 8 ; +static const uint8_t EXPLR_MMIO_OTRCFG76_TEMPLATE_5_LEN = 4 ; +static const uint8_t EXPLR_MMIO_OTRCFG76_TEMPLATE_4 = 12 ; +static const uint8_t EXPLR_MMIO_OTRCFG76_TEMPLATE_4_LEN = 4 ; +static const uint8_t EXPLR_MMIO_OTRCFG76_TEMPLATE_3 = 16 ; +static const uint8_t EXPLR_MMIO_OTRCFG76_TEMPLATE_3_LEN = 4 ; +static const uint8_t EXPLR_MMIO_OTRCFG76_TEMPLATE_2 = 20 ; +static const uint8_t EXPLR_MMIO_OTRCFG76_TEMPLATE_2_LEN = 4 ; +static const uint8_t EXPLR_MMIO_OTRCFG76_TEMPLATE_1 = 24 ; +static const uint8_t EXPLR_MMIO_OTRCFG76_TEMPLATE_1_LEN = 4 ; +static const uint8_t EXPLR_MMIO_OTRCFG76_TEMPLATE_0 = 28 ; +static const uint8_t EXPLR_MMIO_OTRCFG76_TEMPLATE_0_LEN = 4 ; +static const uint8_t EXPLR_MMIO_OTRCFG76_TEMPLATE_15 = 32 ; +static const uint8_t EXPLR_MMIO_OTRCFG76_TEMPLATE_15_LEN = 4 ; +static const uint8_t EXPLR_MMIO_OTRCFG76_TEMPLATE_14 = 36 ; +static const uint8_t EXPLR_MMIO_OTRCFG76_TEMPLATE_14_LEN = 4 ; +static const uint8_t EXPLR_MMIO_OTRCFG76_TEMPLATE_13 = 40 ; +static const uint8_t EXPLR_MMIO_OTRCFG76_TEMPLATE_13_LEN = 4 ; +static const uint8_t EXPLR_MMIO_OTRCFG76_TEMPLATE_12 = 44 ; +static const uint8_t EXPLR_MMIO_OTRCFG76_TEMPLATE_12_LEN = 4 ; +static const uint8_t EXPLR_MMIO_OTRCFG76_TEMPLATE_11 = 48 ; +static const uint8_t EXPLR_MMIO_OTRCFG76_TEMPLATE_11_LEN = 4 ; +static const uint8_t EXPLR_MMIO_OTRCFG76_TEMPLATE_10 = 52 ; +static const uint8_t EXPLR_MMIO_OTRCFG76_TEMPLATE_10_LEN = 4 ; +static const uint8_t EXPLR_MMIO_OTRCFG76_TEMPLATE_9 = 56 ; +static const uint8_t EXPLR_MMIO_OTRCFG76_TEMPLATE_9_LEN = 4 ; +static const uint8_t EXPLR_MMIO_OTRCFG76_TEMPLATE_8 = 60 ; +static const uint8_t EXPLR_MMIO_OTRCFG76_TEMPLATE_8_LEN = 4 ; + +static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_31 = 0 ; +static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_30 = 1 ; +static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_29 = 2 ; +static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_28 = 3 ; +static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_27 = 4 ; +static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_26 = 5 ; +static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_25 = 6 ; +static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_24 = 7 ; +static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_23 = 8 ; +static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_22 = 9 ; +static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_21 = 10 ; +static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_20 = 11 ; +static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_19 = 12 ; +static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_18 = 13 ; +static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_17 = 14 ; +static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_16 = 15 ; +static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_15 = 16 ; +static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_14 = 17 ; +static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_13 = 18 ; +static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_12 = 19 ; +static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_11 = 20 ; +static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_10 = 21 ; +static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_9 = 22 ; +static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_8 = 23 ; +static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_7 = 24 ; +static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_6 = 25 ; +static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_5 = 26 ; +static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_4 = 27 ; +static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_3 = 28 ; +static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_2 = 29 ; +static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_1 = 30 ; +static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_0 = 31 ; +static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_63 = 32 ; +static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_62 = 33 ; +static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_61 = 34 ; +static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_60 = 35 ; +static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_59 = 36 ; +static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_58 = 37 ; +static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_57 = 38 ; +static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_56 = 39 ; +static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_55 = 40 ; +static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_54 = 41 ; +static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_53 = 42 ; +static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_52 = 43 ; +static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_51 = 44 ; +static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_50 = 45 ; +static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_49 = 46 ; +static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_48 = 47 ; +static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_47 = 48 ; +static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_46 = 49 ; +static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_45 = 50 ; +static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_44 = 51 ; +static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_43 = 52 ; +static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_42 = 53 ; +static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_41 = 54 ; +static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_40 = 55 ; +static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_39 = 56 ; +static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_38 = 57 ; +static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_37 = 58 ; +static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_36 = 59 ; +static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_35 = 60 ; +static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_34 = 61 ; +static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_33 = 62 ; +static const uint8_t EXPLR_MMIO_OTTCFG_TEMPLATE_32 = 63 ; + +static const uint8_t EXPLR_MMIO_OVERCAP_OTLID_TL_MAJOR_VERSION_CAPABILITY = 0 ; +static const uint8_t EXPLR_MMIO_OVERCAP_OTLID_TL_MAJOR_VERSION_CAPABILITY_LEN = 8 ; +static const uint8_t EXPLR_MMIO_OVERCAP_OTLID_TL_MINOR_VERSION_CAPABILITY = 8 ; +static const uint8_t EXPLR_MMIO_OVERCAP_OTLID_TL_MINOR_VERSION_CAPABILITY_LEN = 8 ; + +static const uint8_t EXPLR_MMIO_OVERCFG_TL_MAJOR_VERSION_CONFIGURATION = 32 ; +static const uint8_t EXPLR_MMIO_OVERCFG_TL_MAJOR_VERSION_CONFIGURATION_LEN = 8 ; +static const uint8_t EXPLR_MMIO_OVERCFG_TL_MINOR_VERSION_CONFIGURATION = 40 ; +static const uint8_t EXPLR_MMIO_OVERCFG_TL_MINOR_VERSION_CONFIGURATION_LEN = 8 ; +static const uint8_t EXPLR_MMIO_OVERCFG_LONG_BACK_OFF_TIMER = 56 ; +static const uint8_t EXPLR_MMIO_OVERCFG_LONG_BACK_OFF_TIMER_LEN = 4 ; +static const uint8_t EXPLR_MMIO_OVERCFG_SHORT_BACK_OFF_TIMER = 60 ; +static const uint8_t EXPLR_MMIO_OVERCFG_SHORT_BACK_OFF_TIMER_LEN = 4 ; + +static const uint8_t EXPLR_MMIO_OVPD_DATA = 0 ; +static const uint8_t EXPLR_MMIO_OVPD_DATA_LEN = 32 ; +static const uint8_t EXPLR_MMIO_OVPD_FLAG = 32 ; +static const uint8_t EXPLR_MMIO_OVPD_ADDRESS = 33 ; +static const uint8_t EXPLR_MMIO_OVPD_ADDRESS_LEN = 15 ; +static const uint8_t EXPLR_MMIO_OVPD_NEXT_POINTER = 48 ; +static const uint8_t EXPLR_MMIO_OVPD_NEXT_POINTER_LEN = 8 ; +static const uint8_t EXPLR_MMIO_OVPD_CAPABILITY_ID = 56 ; +static const uint8_t EXPLR_MMIO_OVPD_CAPABILITY_ID_LEN = 8 ; + +static const uint8_t EXPLR_MMIO_OWWID10_ID = 0 ; +static const uint8_t EXPLR_MMIO_OWWID10_ID_LEN = 64 ; + +static const uint8_t EXPLR_MMIO_OWWID32_ID = 0 ; +static const uint8_t EXPLR_MMIO_OWWID32_ID_LEN = 64 ; + +static const uint8_t EXPLR_MMIO_SCOMEWD_WDATA = 0 ; +static const uint8_t EXPLR_MMIO_SCOMEWD_WDATA_LEN = 64 ; + +static const uint8_t EXPLR_MMIO_SNSC_ACTPWRUP_ACTSCOUNT = 0 ; +static const uint8_t EXPLR_MMIO_SNSC_ACTPWRUP_ACTSCOUNT_LEN = 32 ; +static const uint8_t EXPLR_MMIO_SNSC_ACTPWRUP_POWERUPSCOUNT = 32 ; +static const uint8_t EXPLR_MMIO_SNSC_ACTPWRUP_POWERUPSCOUNT_LEN = 32 ; + +static const uint8_t EXPLR_MMIO_SNSC_D0THERM_PRESENTBIT = 45 ; +static const uint8_t EXPLR_MMIO_SNSC_D0THERM_VALIDBIT = 46 ; +static const uint8_t EXPLR_MMIO_SNSC_D0THERM_ERRORBIT = 47 ; +static const uint8_t EXPLR_MMIO_SNSC_D0THERM_THERMALDATA = 48 ; +static const uint8_t EXPLR_MMIO_SNSC_D0THERM_THERMALDATA_LEN = 16 ; + +static const uint8_t EXPLR_MMIO_SNSC_D1THERM_PRESENTBIT = 45 ; +static const uint8_t EXPLR_MMIO_SNSC_D1THERM_VALIDBIT = 46 ; +static const uint8_t EXPLR_MMIO_SNSC_D1THERM_ERRORBIT = 47 ; +static const uint8_t EXPLR_MMIO_SNSC_D1THERM_THERMALDATA = 48 ; +static const uint8_t EXPLR_MMIO_SNSC_D1THERM_THERMALDATA_LEN = 16 ; + +static const uint8_t EXPLR_MMIO_SNSC_FRAMESR_FRAMECOUNT = 0 ; +static const uint8_t EXPLR_MMIO_SNSC_FRAMESR_FRAMECOUNT_LEN = 32 ; +static const uint8_t EXPLR_MMIO_SNSC_FRAMESR_SELFREFRESHCOUNT = 32 ; +static const uint8_t EXPLR_MMIO_SNSC_FRAMESR_SELFREFRESHCOUNT_LEN = 8 ; + +static const uint8_t EXPLR_MMIO_SNSC_HISTOBASELOW_HISTOGRAMBASECOUNT = 0 ; +static const uint8_t EXPLR_MMIO_SNSC_HISTOBASELOW_HISTOGRAMBASECOUNT_LEN = 32 ; +static const uint8_t EXPLR_MMIO_SNSC_HISTOBASELOW_HISTOGRAMLOWCOUNT = 32 ; +static const uint8_t EXPLR_MMIO_SNSC_HISTOBASELOW_HISTOGRAMLOWCOUNT_LEN = 32 ; + +static const uint8_t EXPLR_MMIO_SNSC_HISTOMEDHIGH_HISTOGRAMMEDCOUNT = 0 ; +static const uint8_t EXPLR_MMIO_SNSC_HISTOMEDHIGH_HISTOGRAMMEDCOUNT_LEN = 32 ; +static const uint8_t EXPLR_MMIO_SNSC_HISTOMEDHIGH_HISTOGRAMHIGHCOUNT = 32 ; +static const uint8_t EXPLR_MMIO_SNSC_HISTOMEDHIGH_HISTOGRAMHIGHCOUNT_LEN = 32 ; + +static const uint8_t EXPLR_MMIO_SNSC_OCTHERM_PRESENTBIT = 45 ; +static const uint8_t EXPLR_MMIO_SNSC_OCTHERM_VALIDBIT = 46 ; +static const uint8_t EXPLR_MMIO_SNSC_OCTHERM_ERRORBIT = 47 ; +static const uint8_t EXPLR_MMIO_SNSC_OCTHERM_THERMALDATA = 48 ; +static const uint8_t EXPLR_MMIO_SNSC_OCTHERM_THERMALDATA_LEN = 16 ; + +static const uint8_t EXPLR_MMIO_SNSC_RDWR_READSCOUNT = 0 ; +static const uint8_t EXPLR_MMIO_SNSC_RDWR_READSCOUNT_LEN = 32 ; +static const uint8_t EXPLR_MMIO_SNSC_RDWR_WRITESCOUNT = 32 ; +static const uint8_t EXPLR_MMIO_SNSC_RDWR_WRITESCOUNT_LEN = 32 ; + +static const uint8_t EXPLR_MMIO_SNSC_STATEREG_STREGISTER = 0 ; +static const uint8_t EXPLR_MMIO_SNSC_STATEREG_STREGISTER_LEN = 22 ; + +static const uint8_t EXPLR_RDF_AACR_ADDRESS = 0 ; +static const uint8_t EXPLR_RDF_AACR_ADDRESS_LEN = 7 ; +static const uint8_t EXPLR_RDF_AACR_AUTOINC = 7 ; + +static const uint8_t EXPLR_RDF_AADR_DATA = 0 ; +static const uint8_t EXPLR_RDF_AADR_DATA_LEN = 64 ; + +static const uint8_t EXPLR_RDF_AAER_DATA = 0 ; +static const uint8_t EXPLR_RDF_AAER_DATA_LEN = 8 ; + +static const uint8_t EXPLR_RDF_ACTION0_FIR = 0 ; +static const uint8_t EXPLR_RDF_ACTION0_FIR_LEN = 64 ; + +static const uint8_t EXPLR_RDF_ACTION1_FIR = 0 ; +static const uint8_t EXPLR_RDF_ACTION1_FIR_LEN = 64 ; + +static const uint8_t EXPLR_RDF_CERR0_MSR_PE = 12 ; +static const uint8_t EXPLR_RDF_CERR0_EICR_PE = 13 ; +static const uint8_t EXPLR_RDF_CERR0_HWMSX_PE = 16 ; +static const uint8_t EXPLR_RDF_CERR0_HWMSX_PE_LEN = 8 ; +static const uint8_t EXPLR_RDF_CERR0_FWMSX_PE = 24 ; +static const uint8_t EXPLR_RDF_CERR0_FWMSX_PE_LEN = 8 ; +static const uint8_t EXPLR_RDF_CERR0_RSPAR_PE = 32 ; +static const uint8_t EXPLR_RDF_CERR0_AACR_PE = 41 ; +static const uint8_t EXPLR_RDF_CERR0_RECR_PE = 45 ; +static const uint8_t EXPLR_RDF_CERR0_DBGR_PE = 46 ; +static const uint8_t EXPLR_RDF_CERR0_MASK0_PE = 48 ; +static const uint8_t EXPLR_RDF_CERR0_MASK1_PE = 49 ; +static const uint8_t EXPLR_RDF_CERR0_CGDR_PE = 50 ; +static const uint8_t EXPLR_RDF_CERR0_MCBCM_PE = 52 ; +static const uint8_t EXPLR_RDF_CERR0_MCBCM2_PE = 53 ; + +static const uint8_t EXPLR_RDF_CERR1_ECC_CTL_AF_PERR = 0 ; +static const uint8_t EXPLR_RDF_CERR1_ECC_CTL_TCHN_PERR = 1 ; +static const uint8_t EXPLR_RDF_CERR1_ECC_CTL_CMPMODE_ERR = 2 ; +static const uint8_t EXPLR_RDF_CERR1_ECC_PIPE_PCX_PERR = 3 ; +static const uint8_t EXPLR_RDF_CERR1_ECC_PIPE_SYND_PERR = 4 ; +static const uint8_t EXPLR_RDF_CERR1_ECC_PIPE_2SYM_PERR = 5 ; +static const uint8_t EXPLR_RDF_CERR1_ECC_PIPE_CPLX_PERR = 6 ; +static const uint8_t EXPLR_RDF_CERR1_ECC_PIPE_EP2_PERR = 7 ; +static const uint8_t EXPLR_RDF_CERR1_READ_ECC_DATAPATH_PARITY_ERROR = 8 ; +static const uint8_t EXPLR_RDF_CERR1_ECC_PIPE_CMX_PERR = 9 ; +static const uint8_t EXPLR_RDF_CERR1_ECC_PIPE_VP1_PERR = 10 ; +static const uint8_t EXPLR_RDF_CERR1_ECC_PIPE_VP2_PERR = 11 ; +static const uint8_t EXPLR_RDF_CERR1_ECC_PIPE_SYG_PERR = 12 ; +static const uint8_t EXPLR_RDF_CERR1_ECC_PIPE_EF1_PERR = 13 ; +static const uint8_t EXPLR_RDF_CERR1_ECC_PIPE_MK3_PERR = 14 ; +static const uint8_t EXPLR_RDF_CERR1_ECC_PIPE_E1A_PERR = 15 ; +static const uint8_t EXPLR_RDF_CERR1_UNEXPECTED_RDDATA_VALID = 16 ; +static const uint8_t EXPLR_RDF_CERR1_MISSING_RDDATA_VALID = 17 ; +static const uint8_t EXPLR_RDF_CERR1_SUE_01_DETECT = 18 ; +static const uint8_t EXPLR_RDF_CERR1_SUE_10_DETECT = 19 ; +static const uint8_t EXPLR_RDF_CERR1_RBUF_ECC_ERR_CE_DW0 = 20 ; +static const uint8_t EXPLR_RDF_CERR1_RBUF_ECC_ERR_UE_DW0 = 21 ; +static const uint8_t EXPLR_RDF_CERR1_RBUF_ECC_ERR_CE_DW1 = 22 ; +static const uint8_t EXPLR_RDF_CERR1_RBUF_ECC_ERR_UE_DW1 = 23 ; +static const uint8_t EXPLR_RDF_CERR1_RD_BUFF_ECC_ERR_SYNDROME = 24 ; +static const uint8_t EXPLR_RDF_CERR1_RD_BUFF_ECC_ERR_SYNDROME_LEN = 8 ; + +static const uint8_t EXPLR_RDF_CGDR_CGDIS_PCTL = 0 ; +static const uint8_t EXPLR_RDF_CGDR_CGDIS_RESP = 1 ; +static const uint8_t EXPLR_RDF_CGDR_CGDIS_RMW = 2 ; +static const uint8_t EXPLR_RDF_CGDR_CGDIS_LPTR = 3 ; +static const uint8_t EXPLR_RDF_CGDR_CGDIS_AHASH = 4 ; +static const uint8_t EXPLR_RDF_CGDR_CGDIS_STG = 5 ; +static const uint8_t EXPLR_RDF_CGDR_CGDIS_OUT = 6 ; +static const uint8_t EXPLR_RDF_CGDR_CGDIS_TLM = 7 ; +static const uint8_t EXPLR_RDF_CGDR_CGDIS_BD = 8 ; +static const uint8_t EXPLR_RDF_CGDR_CGDIS_DCMP = 9 ; +static const uint8_t EXPLR_RDF_CGDR_CGDIS_RBCTL = 10 ; +static const uint8_t EXPLR_RDF_CGDR_CGDIS_RBRMW = 11 ; +static const uint8_t EXPLR_RDF_CGDR_CGDIS_RBTRC = 12 ; +static const uint8_t EXPLR_RDF_CGDR_CGDIS_MPE = 13 ; +static const uint8_t EXPLR_RDF_CGDR_CGDIS_CONF = 14 ; +static const uint8_t EXPLR_RDF_CGDR_CGDIS_HWMS = 15 ; +static const uint8_t EXPLR_RDF_CGDR_PSDIS_ZERO_SYND = 16 ; +static const uint8_t EXPLR_RDF_CGDR_PSDIS_SAME_MARKS = 17 ; +static const uint8_t EXPLR_RDF_CGDR_PSDIS_SAME_STEER = 18 ; +static const uint8_t EXPLR_RDF_CGDR_CGDIS_SPARE = 19 ; + +static const uint8_t EXPLR_RDF_CTCR_MPE_TIMER = 0 ; +static const uint8_t EXPLR_RDF_CTCR_MPE_TIMER_LEN = 6 ; +static const uint8_t EXPLR_RDF_CTCR_MPE_TIMEBASE = 6 ; +static const uint8_t EXPLR_RDF_CTCR_MPE_TIMEBASE_LEN = 3 ; +static const uint8_t EXPLR_RDF_CTCR_UE_TIMER = 9 ; +static const uint8_t EXPLR_RDF_CTCR_UE_TIMER_LEN = 6 ; +static const uint8_t EXPLR_RDF_CTCR_UE_TIMEBASE = 15 ; +static const uint8_t EXPLR_RDF_CTCR_UE_TIMEBASE_LEN = 3 ; +static const uint8_t EXPLR_RDF_CTCR_UE_LOCKOUT_ENABLE = 18 ; + +static const uint8_t EXPLR_RDF_DBGR_PRIMARY_SELECT = 0 ; +static const uint8_t EXPLR_RDF_DBGR_PRIMARY_SELECT_LEN = 4 ; +static const uint8_t EXPLR_RDF_DBGR_SECONDARY_SELECT = 4 ; +static const uint8_t EXPLR_RDF_DBGR_SECONDARY_SELECT_LEN = 4 ; +static const uint8_t EXPLR_RDF_DBGR_EPX_CHIP = 8 ; +static const uint8_t EXPLR_RDF_DBGR_EPX_SYMS = 9 ; +static const uint8_t EXPLR_RDF_DBGR_TRACE_ALWAYS = 10 ; +static const uint8_t EXPLR_RDF_DBGR_WAT_ENABLE = 11 ; +static const uint8_t EXPLR_RDF_DBGR_WAT_ACTION_SELECT = 12 ; +static const uint8_t EXPLR_RDF_DBGR_WAT_SOURCE = 13 ; +static const uint8_t EXPLR_RDF_DBGR_WAT_SOURCE_LEN = 2 ; + +static const uint8_t EXPLR_RDF_EICR_ADDRESS = 0 ; +static const uint8_t EXPLR_RDF_EICR_ADDRESS_LEN = 37 ; +static const uint8_t EXPLR_RDF_EICR_RESERVED = 37 ; +static const uint8_t EXPLR_RDF_EICR_PERSIST = 38 ; +static const uint8_t EXPLR_RDF_EICR_PERSIST_LEN = 2 ; +static const uint8_t EXPLR_RDF_EICR_REGION = 40 ; +static const uint8_t EXPLR_RDF_EICR_REGION_LEN = 3 ; +static const uint8_t EXPLR_RDF_EICR_TYPE = 43 ; +static const uint8_t EXPLR_RDF_EICR_TYPE_LEN = 5 ; +static const uint8_t EXPLR_RDF_EICR_MISC = 48 ; +static const uint8_t EXPLR_RDF_EICR_MISC_LEN = 6 ; + +static const uint8_t EXPLR_RDF_ELPR_LOG_FULL = 0 ; +static const uint8_t EXPLR_RDF_ELPR_LOG_POINTER = 2 ; +static const uint8_t EXPLR_RDF_ELPR_LOG_POINTER_LEN = 6 ; + +static const uint8_t EXPLR_RDF_ERR_HOLD_LAT_FIR_MASK_PAR = 0 ; +static const uint8_t EXPLR_RDF_ERR_HOLD_LAT_FIR_ACTION0_PAR = 1 ; +static const uint8_t EXPLR_RDF_ERR_HOLD_LAT_FIR_ACTION1_PAR = 2 ; + +static const uint8_t EXPLR_RDF_ERR_MASK_LAT_FIR_PAR = 0 ; +static const uint8_t EXPLR_RDF_ERR_MASK_LAT_FIR_ACTION0_PAR = 1 ; +static const uint8_t EXPLR_RDF_ERR_MASK_LAT_FIR_ACTION1_PAR = 2 ; + +static const uint8_t EXPLR_RDF_FIR_MAINLINE_MPE_RANK_0_TO_7 = 0 ; +static const uint8_t EXPLR_RDF_FIR_MAINLINE_MPE_RANK_0_TO_7_LEN = 8 ; +static const uint8_t EXPLR_RDF_FIR_MAINLINE_NCE = 8 ; +static const uint8_t EXPLR_RDF_FIR_MAINLINE_TCE = 9 ; +static const uint8_t EXPLR_RDF_FIR_MAINLINE_SCE = 10 ; +static const uint8_t EXPLR_RDF_FIR_MAINLINE_MCE = 11 ; +static const uint8_t EXPLR_RDF_FIR_MAINLINE_SUE = 12 ; +static const uint8_t EXPLR_RDF_FIR_MAINLINE_AUE = 13 ; +static const uint8_t EXPLR_RDF_FIR_MAINLINE_UE = 14 ; +static const uint8_t EXPLR_RDF_FIR_MAINLINE_RCD = 15 ; +static const uint8_t EXPLR_RDF_FIR_MAINLINE_IAUE = 16 ; +static const uint8_t EXPLR_RDF_FIR_MAINLINE_IUE = 17 ; +static const uint8_t EXPLR_RDF_FIR_MAINLINE_IRCD = 18 ; +static const uint8_t EXPLR_RDF_FIR_MAINLINE_IMPE = 19 ; +static const uint8_t EXPLR_RDF_FIR_MAINTENANCE_MPE_RANK_0_TO_7 = 20 ; +static const uint8_t EXPLR_RDF_FIR_MAINTENANCE_MPE_RANK_0_TO_7_LEN = 8 ; +static const uint8_t EXPLR_RDF_FIR_MAINTENANCE_NCE = 28 ; +static const uint8_t EXPLR_RDF_FIR_MAINTENANCE_TCE = 29 ; +static const uint8_t EXPLR_RDF_FIR_MAINTENANCE_SCE = 30 ; +static const uint8_t EXPLR_RDF_FIR_MAINTENANCE_MCE = 31 ; +static const uint8_t EXPLR_RDF_FIR_MAINTENANCE_SUE = 32 ; +static const uint8_t EXPLR_RDF_FIR_MAINTENANCE_AUE = 33 ; +static const uint8_t EXPLR_RDF_FIR_MAINTENANCE_UE = 34 ; +static const uint8_t EXPLR_RDF_FIR_MAINTENANCE_RCD = 35 ; +static const uint8_t EXPLR_RDF_FIR_MAINTENANCE_IAUE = 36 ; +static const uint8_t EXPLR_RDF_FIR_MAINTENANCE_IUE = 37 ; +static const uint8_t EXPLR_RDF_FIR_MAINTENANCE_IRCD = 38 ; +static const uint8_t EXPLR_RDF_FIR_MAINTENANCE_IMPE = 39 ; +static const uint8_t EXPLR_RDF_FIR_RDDATA_VALID_ERROR = 40 ; +static const uint8_t EXPLR_RDF_FIR_SCOM_PARITY_CLASS_STATUS = 41 ; +static const uint8_t EXPLR_RDF_FIR_SCOM_PARITY_CLASS_RECOVERABLE = 42 ; +static const uint8_t EXPLR_RDF_FIR_SCOM_PARITY_CLASS_UNRECOVERABLE = 43 ; +static const uint8_t EXPLR_RDF_FIR_ECC_CORRECTOR_INTERNAL_PARITY_ERROR = 44 ; +static const uint8_t EXPLR_RDF_FIR_ECC_RBUF_CE_DW0 = 45 ; +static const uint8_t EXPLR_RDF_FIR_ECC_RBUF_CE_DW1 = 46 ; +static const uint8_t EXPLR_RDF_FIR_ECC_RBUF_UE_DW0 = 47 ; +static const uint8_t EXPLR_RDF_FIR_ECC_RBUF_UE_DW1 = 48 ; +static const uint8_t EXPLR_RDF_FIR_RESERVED_49_59 = 49 ; +static const uint8_t EXPLR_RDF_FIR_RESERVED_49_59_LEN = 11 ; +static const uint8_t EXPLR_RDF_FIR_SCOM_PARITY_DEBUG_WAT = 60 ; +static const uint8_t EXPLR_RDF_FIR_RESERVED = 61 ; +static const uint8_t EXPLR_RDF_FIR_INTERNAL_SCOM_ERROR = 62 ; +static const uint8_t EXPLR_RDF_FIR_INTERNAL_SCOM_ERROR_COPY = 63 ; + +static const uint8_t EXPLR_RDF_FWMS0_MARK = 0 ; +static const uint8_t EXPLR_RDF_FWMS0_MARK_LEN = 8 ; +static const uint8_t EXPLR_RDF_FWMS0_TYPE = 8 ; +static const uint8_t EXPLR_RDF_FWMS0_REGION = 9 ; +static const uint8_t EXPLR_RDF_FWMS0_REGION_LEN = 3 ; +static const uint8_t EXPLR_RDF_FWMS0_ADDRESS = 12 ; +static const uint8_t EXPLR_RDF_FWMS0_ADDRESS_LEN = 11 ; +static const uint8_t EXPLR_RDF_FWMS0_EXIT_1 = 23 ; + +static const uint8_t EXPLR_RDF_FWMS1_MARK = 0 ; +static const uint8_t EXPLR_RDF_FWMS1_MARK_LEN = 8 ; +static const uint8_t EXPLR_RDF_FWMS1_TYPE = 8 ; +static const uint8_t EXPLR_RDF_FWMS1_REGION = 9 ; +static const uint8_t EXPLR_RDF_FWMS1_REGION_LEN = 3 ; +static const uint8_t EXPLR_RDF_FWMS1_ADDRESS = 12 ; +static const uint8_t EXPLR_RDF_FWMS1_ADDRESS_LEN = 11 ; +static const uint8_t EXPLR_RDF_FWMS1_EXIT_1 = 23 ; + +static const uint8_t EXPLR_RDF_FWMS2_MARK = 0 ; +static const uint8_t EXPLR_RDF_FWMS2_MARK_LEN = 8 ; +static const uint8_t EXPLR_RDF_FWMS2_TYPE = 8 ; +static const uint8_t EXPLR_RDF_FWMS2_REGION = 9 ; +static const uint8_t EXPLR_RDF_FWMS2_REGION_LEN = 3 ; +static const uint8_t EXPLR_RDF_FWMS2_ADDRESS = 12 ; +static const uint8_t EXPLR_RDF_FWMS2_ADDRESS_LEN = 11 ; +static const uint8_t EXPLR_RDF_FWMS2_EXIT_1 = 23 ; + +static const uint8_t EXPLR_RDF_FWMS3_MARK = 0 ; +static const uint8_t EXPLR_RDF_FWMS3_MARK_LEN = 8 ; +static const uint8_t EXPLR_RDF_FWMS3_TYPE = 8 ; +static const uint8_t EXPLR_RDF_FWMS3_REGION = 9 ; +static const uint8_t EXPLR_RDF_FWMS3_REGION_LEN = 3 ; +static const uint8_t EXPLR_RDF_FWMS3_ADDRESS = 12 ; +static const uint8_t EXPLR_RDF_FWMS3_ADDRESS_LEN = 11 ; +static const uint8_t EXPLR_RDF_FWMS3_EXIT_1 = 23 ; + +static const uint8_t EXPLR_RDF_FWMS4_MARK = 0 ; +static const uint8_t EXPLR_RDF_FWMS4_MARK_LEN = 8 ; +static const uint8_t EXPLR_RDF_FWMS4_TYPE = 8 ; +static const uint8_t EXPLR_RDF_FWMS4_REGION = 9 ; +static const uint8_t EXPLR_RDF_FWMS4_REGION_LEN = 3 ; +static const uint8_t EXPLR_RDF_FWMS4_ADDRESS = 12 ; +static const uint8_t EXPLR_RDF_FWMS4_ADDRESS_LEN = 11 ; +static const uint8_t EXPLR_RDF_FWMS4_EXIT_1 = 23 ; + +static const uint8_t EXPLR_RDF_FWMS5_MARK = 0 ; +static const uint8_t EXPLR_RDF_FWMS5_MARK_LEN = 8 ; +static const uint8_t EXPLR_RDF_FWMS5_TYPE = 8 ; +static const uint8_t EXPLR_RDF_FWMS5_REGION = 9 ; +static const uint8_t EXPLR_RDF_FWMS5_REGION_LEN = 3 ; +static const uint8_t EXPLR_RDF_FWMS5_ADDRESS = 12 ; +static const uint8_t EXPLR_RDF_FWMS5_ADDRESS_LEN = 11 ; +static const uint8_t EXPLR_RDF_FWMS5_EXIT_1 = 23 ; + +static const uint8_t EXPLR_RDF_FWMS6_MARK = 0 ; +static const uint8_t EXPLR_RDF_FWMS6_MARK_LEN = 8 ; +static const uint8_t EXPLR_RDF_FWMS6_TYPE = 8 ; +static const uint8_t EXPLR_RDF_FWMS6_REGION = 9 ; +static const uint8_t EXPLR_RDF_FWMS6_REGION_LEN = 3 ; +static const uint8_t EXPLR_RDF_FWMS6_ADDRESS = 12 ; +static const uint8_t EXPLR_RDF_FWMS6_ADDRESS_LEN = 11 ; +static const uint8_t EXPLR_RDF_FWMS6_EXIT_1 = 23 ; + +static const uint8_t EXPLR_RDF_FWMS7_MARK = 0 ; +static const uint8_t EXPLR_RDF_FWMS7_MARK_LEN = 8 ; +static const uint8_t EXPLR_RDF_FWMS7_TYPE = 8 ; +static const uint8_t EXPLR_RDF_FWMS7_REGION = 9 ; +static const uint8_t EXPLR_RDF_FWMS7_REGION_LEN = 3 ; +static const uint8_t EXPLR_RDF_FWMS7_ADDRESS = 12 ; +static const uint8_t EXPLR_RDF_FWMS7_ADDRESS_LEN = 11 ; +static const uint8_t EXPLR_RDF_FWMS7_EXIT_1 = 23 ; + +static const uint8_t EXPLR_RDF_HWMS0_CHIPMARK = 0 ; +static const uint8_t EXPLR_RDF_HWMS0_CHIPMARK_LEN = 8 ; +static const uint8_t EXPLR_RDF_HWMS0_CONFIRMED = 8 ; +static const uint8_t EXPLR_RDF_HWMS0_EXIT_1 = 9 ; + +static const uint8_t EXPLR_RDF_HWMS1_CHIPMARK = 0 ; +static const uint8_t EXPLR_RDF_HWMS1_CHIPMARK_LEN = 8 ; +static const uint8_t EXPLR_RDF_HWMS1_CONFIRMED = 8 ; +static const uint8_t EXPLR_RDF_HWMS1_EXIT_1 = 9 ; + +static const uint8_t EXPLR_RDF_HWMS2_CHIPMARK = 0 ; +static const uint8_t EXPLR_RDF_HWMS2_CHIPMARK_LEN = 8 ; +static const uint8_t EXPLR_RDF_HWMS2_CONFIRMED = 8 ; +static const uint8_t EXPLR_RDF_HWMS2_EXIT_1 = 9 ; + +static const uint8_t EXPLR_RDF_HWMS3_CHIPMARK = 0 ; +static const uint8_t EXPLR_RDF_HWMS3_CHIPMARK_LEN = 8 ; +static const uint8_t EXPLR_RDF_HWMS3_CONFIRMED = 8 ; +static const uint8_t EXPLR_RDF_HWMS3_EXIT_1 = 9 ; + +static const uint8_t EXPLR_RDF_HWMS4_CHIPMARK = 0 ; +static const uint8_t EXPLR_RDF_HWMS4_CHIPMARK_LEN = 8 ; +static const uint8_t EXPLR_RDF_HWMS4_CONFIRMED = 8 ; +static const uint8_t EXPLR_RDF_HWMS4_EXIT_1 = 9 ; + +static const uint8_t EXPLR_RDF_HWMS5_CHIPMARK = 0 ; +static const uint8_t EXPLR_RDF_HWMS5_CHIPMARK_LEN = 8 ; +static const uint8_t EXPLR_RDF_HWMS5_CONFIRMED = 8 ; +static const uint8_t EXPLR_RDF_HWMS5_EXIT_1 = 9 ; + +static const uint8_t EXPLR_RDF_HWMS6_CHIPMARK = 0 ; +static const uint8_t EXPLR_RDF_HWMS6_CHIPMARK_LEN = 8 ; +static const uint8_t EXPLR_RDF_HWMS6_CONFIRMED = 8 ; +static const uint8_t EXPLR_RDF_HWMS6_EXIT_1 = 9 ; + +static const uint8_t EXPLR_RDF_HWMS7_CHIPMARK = 0 ; +static const uint8_t EXPLR_RDF_HWMS7_CHIPMARK_LEN = 8 ; +static const uint8_t EXPLR_RDF_HWMS7_CONFIRMED = 8 ; +static const uint8_t EXPLR_RDF_HWMS7_EXIT_1 = 9 ; + +static const uint8_t EXPLR_RDF_MASK_FIR = 0 ; +static const uint8_t EXPLR_RDF_MASK_FIR_LEN = 64 ; + +static const uint8_t EXPLR_RDF_MASK0_MSR_PE = 12 ; +static const uint8_t EXPLR_RDF_MASK0_EICR_PE = 13 ; +static const uint8_t EXPLR_RDF_MASK0_HWMSX_PE = 16 ; +static const uint8_t EXPLR_RDF_MASK0_HWMSX_PE_LEN = 8 ; +static const uint8_t EXPLR_RDF_MASK0_FWMSX_PE = 24 ; +static const uint8_t EXPLR_RDF_MASK0_FWMSX_PE_LEN = 8 ; +static const uint8_t EXPLR_RDF_MASK0_RSPAR_PE = 32 ; +static const uint8_t EXPLR_RDF_MASK0_CTCR_PE = 40 ; +static const uint8_t EXPLR_RDF_MASK0_AACR_PE = 41 ; +static const uint8_t EXPLR_RDF_MASK0_RECR_PE = 45 ; +static const uint8_t EXPLR_RDF_MASK0_DBGR_PE = 46 ; +static const uint8_t EXPLR_RDF_MASK0_MASK0_PE = 48 ; +static const uint8_t EXPLR_RDF_MASK0_MASK1_PE = 49 ; +static const uint8_t EXPLR_RDF_MASK0_CGDR_PE = 50 ; +static const uint8_t EXPLR_RDF_MASK0_MCBCM_PE = 52 ; +static const uint8_t EXPLR_RDF_MASK0_MCBCM2_PE = 53 ; + +static const uint8_t EXPLR_RDF_MASK1_ECC_CTL_AF_PERR = 0 ; +static const uint8_t EXPLR_RDF_MASK1_ECC_CTL_TCHN_PERR = 1 ; +static const uint8_t EXPLR_RDF_MASK1_ECC_CTL_CMPMODE_ERR = 2 ; +static const uint8_t EXPLR_RDF_MASK1_ECC_PIPE_PCX_PERR = 3 ; +static const uint8_t EXPLR_RDF_MASK1_ECC_PIPE_SYND_PERR = 4 ; +static const uint8_t EXPLR_RDF_MASK1_ECC_PIPE_2SYM_PERR = 5 ; +static const uint8_t EXPLR_RDF_MASK1_ECC_PIPE_CPLX_PERR = 6 ; +static const uint8_t EXPLR_RDF_MASK1_ECC_PIPE_EP2_PERR = 7 ; +static const uint8_t EXPLR_RDF_MASK1_READ_ECC_DATAPATH_PARITY_ERROR = 8 ; +static const uint8_t EXPLR_RDF_MASK1_ECC_PIPE_CMX_PERR = 9 ; +static const uint8_t EXPLR_RDF_MASK1_ECC_PIPE_VP1_PERR = 10 ; +static const uint8_t EXPLR_RDF_MASK1_ECC_PIPE_VP2_PERR = 11 ; +static const uint8_t EXPLR_RDF_MASK1_ECC_PIPE_SYG_PERR = 12 ; +static const uint8_t EXPLR_RDF_MASK1_ECC_PIPE_EF1_PERR = 13 ; +static const uint8_t EXPLR_RDF_MASK1_ECC_PIPE_MK3_PERR = 14 ; +static const uint8_t EXPLR_RDF_MASK1_ECC_PIPE_E1A_PERR = 15 ; +static const uint8_t EXPLR_RDF_MASK1_UNEXPECTED_RDDATA_VALID = 16 ; +static const uint8_t EXPLR_RDF_MASK1_MISSING_RDDATA_VALID = 17 ; +static const uint8_t EXPLR_RDF_MASK1_SUE_01_DETECT = 18 ; +static const uint8_t EXPLR_RDF_MASK1_SUE_10_DETECT = 19 ; + +static const uint8_t EXPLR_RDF_MCBCM_MCBIST_HALF_COMPARE_MASK = 0 ; +static const uint8_t EXPLR_RDF_MCBCM_MCBIST_HALF_COMPARE_MASK_LEN = 40 ; +static const uint8_t EXPLR_RDF_MCBCM_MCBIST_MASK_COVERAGE_SELECTOR = 40 ; +static const uint8_t EXPLR_RDF_MCBCM_MCBIST_TRAP_NONSTOP = 41 ; +static const uint8_t EXPLR_RDF_MCBCM_MCBIST_TRAP_CE_ENABLE = 42 ; +static const uint8_t EXPLR_RDF_MCBCM_MCBIST_TRAP_MPE_ENABLE = 43 ; +static const uint8_t EXPLR_RDF_MCBCM_MCBIST_TRAP_UE_ENABLE = 44 ; + +static const uint8_t EXPLR_RDF_MSR_CHIPMARK = 8 ; +static const uint8_t EXPLR_RDF_MSR_CHIPMARK_LEN = 8 ; +static const uint8_t EXPLR_RDF_MSR_RANK = 16 ; +static const uint8_t EXPLR_RDF_MSR_RANK_LEN = 3 ; + +static const uint8_t EXPLR_RDF_RECR_MBSECCQ_DISABLE_MEMORY_ECC_CHECK_CORRECT = 0 ; +static const uint8_t EXPLR_RDF_RECR_MBSECCQ_DISABLE_MEMORY_ECC_CORRECT = 1 ; +static const uint8_t EXPLR_RDF_RECR_MBSECCQ_DISABLE_MARK_STORE_WRITE = 2 ; +static const uint8_t EXPLR_RDF_RECR_MBSECCQ_DISABLE_UE_RETRY = 3 ; +static const uint8_t EXPLR_RDF_RECR_MBSECCQ_ITAG_METADATA_ENABLE = 4 ; +static const uint8_t EXPLR_RDF_RECR_DISABLE_RCD_CHECK = 5 ; +static const uint8_t EXPLR_RDF_RECR_DISABLE_RDDATA_VALID_CHECK = 6 ; +static const uint8_t EXPLR_RDF_RECR_ENABLE_BAD_DATA_ON_SUE = 7 ; +static const uint8_t EXPLR_RDF_RECR_MBSECCQ_DISABLE_UTC_EXIT_INCREASE = 8 ; +static const uint8_t EXPLR_RDF_RECR_MBSECCQ_EXIT_OVERRIDE = 9 ; +static const uint8_t EXPLR_RDF_RECR_MBSECCQ_EXIT_OVERRIDE_LEN = 2 ; +static const uint8_t EXPLR_RDF_RECR_MBSECCQ_HWMARK_EXIT1 = 11 ; +static const uint8_t EXPLR_RDF_RECR_DISABLE_EXIT_0_DELAY_0 = 12 ; +static const uint8_t EXPLR_RDF_RECR_DISABLE_MPE_CORRECTION = 13 ; +static const uint8_t EXPLR_RDF_RECR_CAPPTAG_BYPASS_BIT_ENABLE = 14 ; +static const uint8_t EXPLR_RDF_RECR_CAPPTAG_RETRY_BIT_ENABLE = 15 ; +static const uint8_t EXPLR_RDF_RECR_CAPPTAG_BYPASS_BIT_SELECT = 16 ; +static const uint8_t EXPLR_RDF_RECR_CAPPTAG_BYPASS_BIT_SELECT_LEN = 4 ; +static const uint8_t EXPLR_RDF_RECR_CAPPTAG_RETRY_BIT_SELECT = 20 ; +static const uint8_t EXPLR_RDF_RECR_CAPPTAG_RETRY_BIT_SELECT_LEN = 4 ; +static const uint8_t EXPLR_RDF_RECR_MBSECCQ_ENABLE_MPE_NOISE_WINDOW = 24 ; +static const uint8_t EXPLR_RDF_RECR_MBSECCQ_DISABLE_MPE_CONFIRM = 25 ; +static const uint8_t EXPLR_RDF_RECR_MBSECCQ_ENABLE_UE_NOISE_WINDOW = 26 ; +static const uint8_t EXPLR_RDF_RECR_MBSECCQ_ENABLE_TCE_CORRECTION = 27 ; +static const uint8_t EXPLR_RDF_RECR_MBSECCQ_ENABLE_CHIPMARKED_SCE_NCE = 28 ; +static const uint8_t EXPLR_RDF_RECR_MBSECCQ_USE_ADDRESS_HASH = 29 ; +static const uint8_t EXPLR_RDF_RECR_MBSECCQ_DATA_INVERSION = 30 ; +static const uint8_t EXPLR_RDF_RECR_MBSECCQ_DATA_INVERSION_LEN = 2 ; +static const uint8_t EXPLR_RDF_RECR_MBSECCQ_DISABLE_PIPE_NOERR_CLOCK_GATING = 32 ; +static const uint8_t EXPLR_RDF_RECR_MBSECCQ_MAINT_NO_RETRY_UE = 33 ; +static const uint8_t EXPLR_RDF_RECR_MBSECCQ_MAINT_NO_RETRY_MPE = 34 ; +static const uint8_t EXPLR_RDF_RECR_RETRY_UNMARKED_ERRORS = 35 ; +static const uint8_t EXPLR_RDF_RECR_CFG_MAINT_USE_TIMERS = 40 ; +static const uint8_t EXPLR_RDF_RECR_HWMS_RANK_SELECT = 41 ; +static const uint8_t EXPLR_RDF_RECR_HWMS_RANK_SELECT_LEN = 6 ; + +static const uint8_t EXPLR_RDF_RSPAR_CFG_STEERING_R0_LEFT = 0 ; +static const uint8_t EXPLR_RDF_RSPAR_CFG_STEERING_R0_LEFT_LEN = 5 ; +static const uint8_t EXPLR_RDF_RSPAR_CFG_STEERING_R0_RIGHT = 5 ; +static const uint8_t EXPLR_RDF_RSPAR_CFG_STEERING_R0_RIGHT_LEN = 5 ; +static const uint8_t EXPLR_RDF_RSPAR_CFG_STEERING_R1_LEFT = 10 ; +static const uint8_t EXPLR_RDF_RSPAR_CFG_STEERING_R1_LEFT_LEN = 5 ; +static const uint8_t EXPLR_RDF_RSPAR_CFG_STEERING_R1_RIGHT = 15 ; +static const uint8_t EXPLR_RDF_RSPAR_CFG_STEERING_R1_RIGHT_LEN = 5 ; +static const uint8_t EXPLR_RDF_RSPAR_CFG_STEERING_R2_LEFT = 20 ; +static const uint8_t EXPLR_RDF_RSPAR_CFG_STEERING_R2_LEFT_LEN = 5 ; +static const uint8_t EXPLR_RDF_RSPAR_CFG_STEERING_R2_RIGHT = 25 ; +static const uint8_t EXPLR_RDF_RSPAR_CFG_STEERING_R2_RIGHT_LEN = 5 ; +static const uint8_t EXPLR_RDF_RSPAR_CFG_STEERING_R3_LEFT = 30 ; +static const uint8_t EXPLR_RDF_RSPAR_CFG_STEERING_R3_LEFT_LEN = 5 ; +static const uint8_t EXPLR_RDF_RSPAR_CFG_STEERING_R3_RIGHT = 35 ; +static const uint8_t EXPLR_RDF_RSPAR_CFG_STEERING_R3_RIGHT_LEN = 5 ; + +static const uint8_t EXPLR_RDF_WOF_FIR = 0 ; +static const uint8_t EXPLR_RDF_WOF_FIR_LEN = 64 ; + +static const uint8_t EXPLR_SRQ_ERR_HOLD_LAT_FIR_MASK_PAR = 0 ; +static const uint8_t EXPLR_SRQ_ERR_HOLD_LAT_FIR_ACTION0_PAR = 1 ; +static const uint8_t EXPLR_SRQ_ERR_HOLD_LAT_FIR_ACTION1_PAR = 2 ; + +static const uint8_t EXPLR_SRQ_ERR_MASK_LAT_FIR_PAR = 0 ; +static const uint8_t EXPLR_SRQ_ERR_MASK_LAT_FIR_ACTION0_PAR = 1 ; +static const uint8_t EXPLR_SRQ_ERR_MASK_LAT_FIR_ACTION1_PAR = 2 ; + +static const uint8_t EXPLR_SRQ_MBAREF0Q_CFG_REFRESH_ENABLE = 0 ; +static const uint8_t EXPLR_SRQ_MBAREF0Q_CFG_REFRESH_INTERVAL_TIMEBASE_SELECT = 1 ; static const uint8_t EXPLR_SRQ_MBAREF0Q_CFG_REFRESH_INTERVAL_TIMEBASE_SELECT_LEN = 2 ; -static const uint8_t EXPLR_SRQ_MBAREF0Q_CFG_PER_BANK_REFRESH = 3 ; -static const uint8_t EXPLR_SRQ_MBAREF0Q_RESERVED_4 = 4 ; -static const uint8_t EXPLR_SRQ_MBAREF0Q_CFG_REFRESH_PRIORITY_THRESHOLD = 5 ; -static const uint8_t EXPLR_SRQ_MBAREF0Q_CFG_REFRESH_PRIORITY_THRESHOLD_LEN = 3 ; -static const uint8_t EXPLR_SRQ_MBAREF0Q_CFG_REFRESH_INTERVAL = 8 ; -static const uint8_t EXPLR_SRQ_MBAREF0Q_CFG_REFRESH_INTERVAL_LEN = 11 ; -static const uint8_t EXPLR_SRQ_MBAREF0Q_CFG_REFRESH_RESET_INTERVAL = 19 ; -static const uint8_t EXPLR_SRQ_MBAREF0Q_CFG_REFRESH_RESET_INTERVAL_LEN = 11 ; -static const uint8_t EXPLR_SRQ_MBAREF0Q_CFG_TRFC = 30 ; -static const uint8_t EXPLR_SRQ_MBAREF0Q_CFG_TRFC_LEN = 10 ; -static const uint8_t EXPLR_SRQ_MBAREF0Q_CFG_REFR_TSV_STACK = 40 ; -static const uint8_t EXPLR_SRQ_MBAREF0Q_CFG_REFR_TSV_STACK_LEN = 10 ; -static const uint8_t EXPLR_SRQ_MBAREF0Q_CFG_REFR_CHECK_INTERVAL = 50 ; -static const uint8_t EXPLR_SRQ_MBAREF0Q_CFG_REFR_CHECK_INTERVAL_LEN = 11 ; -static const uint8_t EXPLR_SRQ_MBAREF0Q_CFG_TRFC_STACK_GATE_ALL_REF = 61 ; -static const uint8_t EXPLR_SRQ_MBAREF0Q_RESERVED_62_63 = 62 ; -static const uint8_t EXPLR_SRQ_MBAREF0Q_RESERVED_62_63_LEN = 2 ; - -static const uint8_t EXPLR_SRQ_MBAREFAQ_CFG_STATIC_IDLE_DLY = 0 ; -static const uint8_t EXPLR_SRQ_MBAREFAQ_CFG_STATIC_IDLE_DLY_LEN = 4 ; -static const uint8_t EXPLR_SRQ_MBAREFAQ_CFG_LP_SUB_CNT = 4 ; -static const uint8_t EXPLR_SRQ_MBAREFAQ_CFG_LP_SUB_CNT_LEN = 2 ; -static const uint8_t EXPLR_SRQ_MBAREFAQ_CFG_REFRESH_HP_RANK_BLOCK_ENABLE = 6 ; -static const uint8_t EXPLR_SRQ_MBAREFAQ_CFG_HP_WR_GATE_LP_REF_DIS = 7 ; -static const uint8_t EXPLR_SRQ_MBAREFAQ_RESERVED_8_9 = 8 ; -static const uint8_t EXPLR_SRQ_MBAREFAQ_RESERVED_8_9_LEN = 2 ; -static const uint8_t EXPLR_SRQ_MBAREFAQ_CFG_REF_BLOCK_STOP_DLY = 10 ; -static const uint8_t EXPLR_SRQ_MBAREFAQ_CFG_REF_BLOCK_STOP_DLY_LEN = 6 ; -static const uint8_t EXPLR_SRQ_MBAREFAQ_CFG_TSTAB = 16 ; -static const uint8_t EXPLR_SRQ_MBAREFAQ_CFG_TSTAB_LEN = 13 ; -static const uint8_t EXPLR_SRQ_MBAREFAQ_RESERVED_29_31 = 29 ; -static const uint8_t EXPLR_SRQ_MBAREFAQ_RESERVED_29_31_LEN = 3 ; - -static const uint8_t EXPLR_SRQ_MBARPC0Q_CFG_LP_CTRL_ENABLE = 0 ; -static const uint8_t EXPLR_SRQ_MBARPC0Q_CFG_LP_DATA_ENABLE = 1 ; -static const uint8_t EXPLR_SRQ_MBARPC0Q_CFG_MIN_MAX_DOMAINS_ENABLE = 2 ; -static const uint8_t EXPLR_SRQ_MBARPC0Q_CFG_MIN_MAX_DOMAINS = 3 ; -static const uint8_t EXPLR_SRQ_MBARPC0Q_CFG_MIN_MAX_DOMAINS_LEN = 3 ; -static const uint8_t EXPLR_SRQ_MBARPC0Q_CFG_PUP_AVAIL = 6 ; -static const uint8_t EXPLR_SRQ_MBARPC0Q_CFG_PUP_AVAIL_LEN = 5 ; -static const uint8_t EXPLR_SRQ_MBARPC0Q_CFG_PDN_PUP = 11 ; -static const uint8_t EXPLR_SRQ_MBARPC0Q_CFG_PDN_PUP_LEN = 5 ; -static const uint8_t EXPLR_SRQ_MBARPC0Q_CFG_PUP_PDN = 16 ; -static const uint8_t EXPLR_SRQ_MBARPC0Q_CFG_PUP_PDN_LEN = 5 ; -static const uint8_t EXPLR_SRQ_MBARPC0Q_CFG_QUAD_RANK_ENC = 21 ; -static const uint8_t EXPLR_SRQ_MBARPC0Q_CFG_MIN_DOMAIN_REDUCTION_ENABLE = 22 ; -static const uint8_t EXPLR_SRQ_MBARPC0Q_CFG_MIN_DOMAIN_REDUCTION_TIME = 23 ; -static const uint8_t EXPLR_SRQ_MBARPC0Q_CFG_MIN_DOMAIN_REDUCTION_TIME_LEN = 10 ; -static const uint8_t EXPLR_SRQ_MBARPC0Q_CFG_PUP_AFTER_ACTIVATE_WAIT_ENABLE = 33 ; -static const uint8_t EXPLR_SRQ_MBARPC0Q_CFG_PUP_AFTER_ACTIVATE_WAIT_TIME = 34 ; -static const uint8_t EXPLR_SRQ_MBARPC0Q_CFG_PUP_AFTER_ACTIVATE_WAIT_TIME_LEN = 8 ; -static const uint8_t EXPLR_SRQ_MBARPC0Q_CFG_CONC_LP_DATA_DISABLE = 42 ; -static const uint8_t EXPLR_SRQ_MBARPC0Q_CFG_MIN_DOMAIN_REDUCTION_CNT_REFR_INT = 43 ; -static const uint8_t EXPLR_SRQ_MBARPC0Q_CFG_EMER_MIN_MAX_DOMAIN = 44 ; -static const uint8_t EXPLR_SRQ_MBARPC0Q_CFG_EMER_MIN_MAX_DOMAIN_LEN = 3 ; -static const uint8_t EXPLR_SRQ_MBARPC0Q_CFG_PUP_ALL_WRITES_PENDING = 47 ; -static const uint8_t EXPLR_SRQ_MBARPC0Q_CFG_ALWAYS_WAIT_ACT_TIME = 48 ; -static const uint8_t EXPLR_SRQ_MBARPC0Q_CFG_TLP_RESP = 49 ; -static const uint8_t EXPLR_SRQ_MBARPC0Q_CFG_TLP_RESP_LEN = 5 ; -static const uint8_t EXPLR_SRQ_MBARPC0Q_CFG_TLP_WAKEUP = 54 ; -static const uint8_t EXPLR_SRQ_MBARPC0Q_CFG_TLP_WAKEUP_LEN = 5 ; -static const uint8_t EXPLR_SRQ_MBARPC0Q_CFG_CONC_CCS_STR_EN = 59 ; -static const uint8_t EXPLR_SRQ_MBARPC0Q_RESERVED_60_63 = 60 ; -static const uint8_t EXPLR_SRQ_MBARPC0Q_RESERVED_60_63_LEN = 4 ; - -static const uint8_t EXPLR_SRQ_MBASTR0Q_CFG_STR_ENABLE = 0 ; -static const uint8_t EXPLR_SRQ_MBASTR0Q_CFG_DIS_CLK_IN_STR = 1 ; -static const uint8_t EXPLR_SRQ_MBASTR0Q_CFG_ENTER_STR_TIME = 2 ; -static const uint8_t EXPLR_SRQ_MBASTR0Q_CFG_ENTER_STR_TIME_LEN = 10 ; -static const uint8_t EXPLR_SRQ_MBASTR0Q_CFG_TCKESR = 12 ; -static const uint8_t EXPLR_SRQ_MBASTR0Q_CFG_TCKESR_LEN = 5 ; -static const uint8_t EXPLR_SRQ_MBASTR0Q_CFG_TCKSRE = 17 ; -static const uint8_t EXPLR_SRQ_MBASTR0Q_CFG_TCKSRE_LEN = 5 ; -static const uint8_t EXPLR_SRQ_MBASTR0Q_CFG_TCKSRX = 22 ; -static const uint8_t EXPLR_SRQ_MBASTR0Q_CFG_TCKSRX_LEN = 5 ; -static const uint8_t EXPLR_SRQ_MBASTR0Q_CFG_TXSDLL = 27 ; -static const uint8_t EXPLR_SRQ_MBASTR0Q_CFG_TXSDLL_LEN = 11 ; -static const uint8_t EXPLR_SRQ_MBASTR0Q_CFG_TRFC_COUNTER_DIS = 38 ; -static const uint8_t EXPLR_SRQ_MBASTR0Q_CFG_TRFC_COUNTER_DIS_LEN = 8 ; -static const uint8_t EXPLR_SRQ_MBASTR0Q_CFG_SAFE_REFRESH_INTERVAL = 46 ; -static const uint8_t EXPLR_SRQ_MBASTR0Q_CFG_SAFE_REFRESH_INTERVAL_LEN = 11 ; -static const uint8_t EXPLR_SRQ_MBASTR0Q_CFG_OCC_DEADMAN_TIMER_SEL = 57 ; -static const uint8_t EXPLR_SRQ_MBASTR0Q_CFG_OCC_DEADMAN_TIMER_SEL_LEN = 4 ; -static const uint8_t EXPLR_SRQ_MBASTR0Q_CFG_OCC_DEADMAN_TB_SEL = 61 ; -static const uint8_t EXPLR_SRQ_MBASTR0Q_CFG_FORCE_STR = 62 ; -static const uint8_t EXPLR_SRQ_MBASTR0Q_CFG_EPOW_DISABLE = 63 ; - -static const uint8_t EXPLR_SRQ_MBA_DBG0Q_CFG_DBG_SRQ_ENABLE = 0 ; -static const uint8_t EXPLR_SRQ_MBA_DBG0Q_CFG_DBG_SRQ_SEL0 = 1 ; -static const uint8_t EXPLR_SRQ_MBA_DBG0Q_CFG_DBG_SRQ_SEL0_LEN = 3 ; -static const uint8_t EXPLR_SRQ_MBA_DBG0Q_CFG_DBG_SRQ_SEL1 = 4 ; -static const uint8_t EXPLR_SRQ_MBA_DBG0Q_CFG_DBG_SRQ_SEL1_LEN = 3 ; -static const uint8_t EXPLR_SRQ_MBA_DBG0Q_CFG_DBG_SRQ_SEL2 = 7 ; -static const uint8_t EXPLR_SRQ_MBA_DBG0Q_CFG_DBG_SRQ_SEL2_LEN = 3 ; -static const uint8_t EXPLR_SRQ_MBA_DBG0Q_CFG_DBG_SRQ_SEL3 = 10 ; -static const uint8_t EXPLR_SRQ_MBA_DBG0Q_CFG_DBG_SRQ_SEL3_LEN = 3 ; -static const uint8_t EXPLR_SRQ_MBA_DBG0Q_CFG_DBG_SRQ_SEL4 = 13 ; -static const uint8_t EXPLR_SRQ_MBA_DBG0Q_CFG_DBG_SRQ_SEL4_LEN = 3 ; -static const uint8_t EXPLR_SRQ_MBA_DBG0Q_CFG_DBG_SRQ_SEL5 = 16 ; -static const uint8_t EXPLR_SRQ_MBA_DBG0Q_CFG_DBG_SRQ_SEL5_LEN = 3 ; -static const uint8_t EXPLR_SRQ_MBA_DBG0Q_CFG_DBG_SRQ_SEL6 = 19 ; -static const uint8_t EXPLR_SRQ_MBA_DBG0Q_CFG_DBG_SRQ_SEL6_LEN = 3 ; -static const uint8_t EXPLR_SRQ_MBA_DBG0Q_CFG_DBG_SRQ_SEL7 = 22 ; -static const uint8_t EXPLR_SRQ_MBA_DBG0Q_CFG_DBG_SRQ_SEL7_LEN = 3 ; -static const uint8_t EXPLR_SRQ_MBA_DBG0Q_CFG_DBG_SRQ_SETUP0_FLIP = 25 ; -static const uint8_t EXPLR_SRQ_MBA_DBG0Q_CFG_DBG_SRQ_SETUP1_FLIP = 26 ; -static const uint8_t EXPLR_SRQ_MBA_DBG0Q_CFG_DBG_SRQ_SETUP2_FLIP = 27 ; -static const uint8_t EXPLR_SRQ_MBA_DBG0Q_CFG_DBG_SRQ_SETUP3_FLIP = 28 ; -static const uint8_t EXPLR_SRQ_MBA_DBG0Q_CFG_DBG_SRQ_SETUP4_FLIP = 29 ; -static const uint8_t EXPLR_SRQ_MBA_DBG0Q_CFG_DBG_SRQ_SETUP5_FLIP = 30 ; -static const uint8_t EXPLR_SRQ_MBA_DBG0Q_CFG_DBG_SRQ_SETUP6_FLIP = 31 ; -static const uint8_t EXPLR_SRQ_MBA_DBG0Q_CFG_DBG_SRQ_SETUP7_FLIP = 32 ; -static const uint8_t EXPLR_SRQ_MBA_DBG0Q_RESERVED_33_47 = 33 ; -static const uint8_t EXPLR_SRQ_MBA_DBG0Q_RESERVED_33_47_LEN = 15 ; -static const uint8_t EXPLR_SRQ_MBA_DBG0Q_CFG_WAT_FARB_RRQ_GT = 48 ; -static const uint8_t EXPLR_SRQ_MBA_DBG0Q_CFG_WAT_FARB_RRQ_GT_LEN = 4 ; -static const uint8_t EXPLR_SRQ_MBA_DBG0Q_CFG_WAT_FARB_WRQ_GT = 52 ; -static const uint8_t EXPLR_SRQ_MBA_DBG0Q_CFG_WAT_FARB_WRQ_GT_LEN = 4 ; -static const uint8_t EXPLR_SRQ_MBA_DBG0Q_CFG_WAT_FARB_REF_GT = 56 ; -static const uint8_t EXPLR_SRQ_MBA_DBG0Q_CFG_WAT_FARB_REF_GT_LEN = 4 ; -static const uint8_t EXPLR_SRQ_MBA_DBG0Q_RESERVED_60_63 = 60 ; -static const uint8_t EXPLR_SRQ_MBA_DBG0Q_RESERVED_60_63_LEN = 4 ; - -static const uint8_t EXPLR_SRQ_MBA_DBG1Q_CFG_WAT_FORCE_WR_ENTRY0_HP = 0 ; -static const uint8_t EXPLR_SRQ_MBA_DBG1Q_CFG_WAT_FORCE_WR_ENTRY0_HP_LEN = 4 ; -static const uint8_t EXPLR_SRQ_MBA_DBG1Q_CFG_WAT_FORCE_RD_ENTRY0_HP = 4 ; -static const uint8_t EXPLR_SRQ_MBA_DBG1Q_CFG_WAT_FORCE_RD_ENTRY0_HP_LEN = 4 ; -static const uint8_t EXPLR_SRQ_MBA_DBG1Q_CFG_WAT_FP_DIS = 8 ; -static const uint8_t EXPLR_SRQ_MBA_DBG1Q_CFG_WAT_FP_DIS_LEN = 4 ; -static const uint8_t EXPLR_SRQ_MBA_DBG1Q_CFG_WAT_DIS_RD_PG = 12 ; -static const uint8_t EXPLR_SRQ_MBA_DBG1Q_CFG_WAT_DIS_RD_PG_LEN = 4 ; -static const uint8_t EXPLR_SRQ_MBA_DBG1Q_CFG_WAT_DIS_WR_PG = 16 ; -static const uint8_t EXPLR_SRQ_MBA_DBG1Q_CFG_WAT_DIS_WR_PG_LEN = 4 ; -static const uint8_t EXPLR_SRQ_MBA_DBG1Q_CFG_WAT_PUP_ALL = 20 ; -static const uint8_t EXPLR_SRQ_MBA_DBG1Q_CFG_WAT_PUP_ALL_LEN = 4 ; -static const uint8_t EXPLR_SRQ_MBA_DBG1Q_CFG_WAT_EXIT_STR = 24 ; -static const uint8_t EXPLR_SRQ_MBA_DBG1Q_CFG_WAT_EXIT_STR_LEN = 4 ; -static const uint8_t EXPLR_SRQ_MBA_DBG1Q_CFG_WAT_REF_HP = 28 ; -static const uint8_t EXPLR_SRQ_MBA_DBG1Q_CFG_WAT_REF_HP_LEN = 4 ; -static const uint8_t EXPLR_SRQ_MBA_DBG1Q_CFG_WAT_REF_SYNC = 32 ; -static const uint8_t EXPLR_SRQ_MBA_DBG1Q_CFG_WAT_REF_SYNC_LEN = 4 ; -static const uint8_t EXPLR_SRQ_MBA_DBG1Q_CFG_WAT_REF_SAFE = 36 ; -static const uint8_t EXPLR_SRQ_MBA_DBG1Q_CFG_WAT_REF_SAFE_LEN = 4 ; -static const uint8_t EXPLR_SRQ_MBA_DBG1Q_RESERVED_40_43 = 40 ; -static const uint8_t EXPLR_SRQ_MBA_DBG1Q_RESERVED_40_43_LEN = 4 ; -static const uint8_t EXPLR_SRQ_MBA_DBG1Q_CFG_WAT_MCBIST_GT = 44 ; -static const uint8_t EXPLR_SRQ_MBA_DBG1Q_CFG_WAT_MCBIST_GT_LEN = 4 ; -static const uint8_t EXPLR_SRQ_MBA_DBG1Q_CFG_WAT_NCF_RM_INVALID_CMD = 48 ; -static const uint8_t EXPLR_SRQ_MBA_DBG1Q_CFG_WAT_NCF_RM_INVALID_CMD_LEN = 4 ; -static const uint8_t EXPLR_SRQ_MBA_DBG1Q_CFG_WAT_SET_FIR = 52 ; -static const uint8_t EXPLR_SRQ_MBA_DBG1Q_CFG_WAT_SET_FIR_LEN = 4 ; -static const uint8_t EXPLR_SRQ_MBA_DBG1Q_CFG_WAT_EMER_TH = 56 ; -static const uint8_t EXPLR_SRQ_MBA_DBG1Q_CFG_WAT_EMER_TH_LEN = 4 ; -static const uint8_t EXPLR_SRQ_MBA_DBG1Q_CFG_WAT_START_RECOVERY = 60 ; -static const uint8_t EXPLR_SRQ_MBA_DBG1Q_CFG_WAT_START_RECOVERY_LEN = 4 ; - -static const uint8_t EXPLR_SRQ_MBA_DSM0Q_CFG_RODT_START_DLY = 0 ; -static const uint8_t EXPLR_SRQ_MBA_DSM0Q_CFG_RODT_START_DLY_LEN = 6 ; -static const uint8_t EXPLR_SRQ_MBA_DSM0Q_CFG_RODT_END_DLY = 6 ; -static const uint8_t EXPLR_SRQ_MBA_DSM0Q_CFG_RODT_END_DLY_LEN = 6 ; -static const uint8_t EXPLR_SRQ_MBA_DSM0Q_CFG_WODT_START_DLY = 12 ; -static const uint8_t EXPLR_SRQ_MBA_DSM0Q_CFG_WODT_START_DLY_LEN = 6 ; -static const uint8_t EXPLR_SRQ_MBA_DSM0Q_CFG_WODT_END_DLY = 18 ; -static const uint8_t EXPLR_SRQ_MBA_DSM0Q_CFG_WODT_END_DLY_LEN = 6 ; -static const uint8_t EXPLR_SRQ_MBA_DSM0Q_CFG_WRDONE_DLY = 24 ; -static const uint8_t EXPLR_SRQ_MBA_DSM0Q_CFG_WRDONE_DLY_LEN = 6 ; -static const uint8_t EXPLR_SRQ_MBA_DSM0Q_CFG_WRDATA_DLY = 30 ; -static const uint8_t EXPLR_SRQ_MBA_DSM0Q_CFG_WRDATA_DLY_LEN = 6 ; -static const uint8_t EXPLR_SRQ_MBA_DSM0Q_CFG_RDTAG_DLY = 36 ; -static const uint8_t EXPLR_SRQ_MBA_DSM0Q_CFG_RDTAG_DLY_LEN = 6 ; -static const uint8_t EXPLR_SRQ_MBA_DSM0Q_CFG_RDCSLAT_DLY = 42 ; -static const uint8_t EXPLR_SRQ_MBA_DSM0Q_CFG_RDCSLAT_DLY_LEN = 5 ; -static const uint8_t EXPLR_SRQ_MBA_DSM0Q_CFG_RDDATA_EN_DLY = 47 ; -static const uint8_t EXPLR_SRQ_MBA_DSM0Q_CFG_RDDATA_EN_DLY_LEN = 5 ; -static const uint8_t EXPLR_SRQ_MBA_DSM0Q_CFG_WRCSLAT_DLY = 52 ; -static const uint8_t EXPLR_SRQ_MBA_DSM0Q_CFG_WRCSLAT_DLY_LEN = 5 ; -static const uint8_t EXPLR_SRQ_MBA_DSM0Q_CFG_WRDATA_EN_DLY = 57 ; -static const uint8_t EXPLR_SRQ_MBA_DSM0Q_CFG_WRDATA_EN_DLY_LEN = 5 ; -static const uint8_t EXPLR_SRQ_MBA_DSM0Q_RESERVED_62_63 = 62 ; -static const uint8_t EXPLR_SRQ_MBA_DSM0Q_RESERVED_62_63_LEN = 2 ; - -static const uint8_t EXPLR_SRQ_MBA_ERR_REPORTQ_PC_PCFSM_1HOT = 0 ; -static const uint8_t EXPLR_SRQ_MBA_ERR_REPORTQ_STRFSM_1HOT = 1 ; -static const uint8_t EXPLR_SRQ_MBA_ERR_REPORTQ_FARB_RECVFSM_1HOT = 2 ; -static const uint8_t EXPLR_SRQ_MBA_ERR_REPORTQ_PC_PE = 3 ; -static const uint8_t EXPLR_SRQ_MBA_ERR_REPORTQ_RRQ_PE = 4 ; -static const uint8_t EXPLR_SRQ_MBA_ERR_REPORTQ_WRQ_PE = 5 ; -static const uint8_t EXPLR_SRQ_MBA_ERR_REPORTQ_DSM_PE = 6 ; -static const uint8_t EXPLR_SRQ_MBA_ERR_REPORTQ_TMR_PE = 7 ; -static const uint8_t EXPLR_SRQ_MBA_ERR_REPORTQ_FARB_PE = 8 ; -static const uint8_t EXPLR_SRQ_MBA_ERR_REPORTQ_WRQ_HANG = 9 ; -static const uint8_t EXPLR_SRQ_MBA_ERR_REPORTQ_RRQ_HANG = 10 ; -static const uint8_t EXPLR_SRQ_MBA_ERR_REPORTQ_FARB_CMD_PE_HOLD_OUT = 11 ; -static const uint8_t EXPLR_SRQ_MBA_ERR_REPORTQ_DSM_CMD_PE_HOLD_OUT = 12 ; -static const uint8_t EXPLR_SRQ_MBA_ERR_REPORTQ_NCF_UE = 13 ; -static const uint8_t EXPLR_SRQ_MBA_ERR_REPORTQ_NCF_UE_LEN = 2 ; -static const uint8_t EXPLR_SRQ_MBA_ERR_REPORTQ_NCF_TBD = 15 ; -static const uint8_t EXPLR_SRQ_MBA_ERR_REPORTQ_NCF_TBD_LEN = 2 ; -static const uint8_t EXPLR_SRQ_MBA_ERR_REPORTQ_NCF_MCB_LOGIC_ERROR = 17 ; -static const uint8_t EXPLR_SRQ_MBA_ERR_REPORTQ_NCF_MCB_LOGIC_ERROR_LEN = 5 ; -static const uint8_t EXPLR_SRQ_MBA_ERR_REPORTQ_NCF_LOGIC_ERROR = 22 ; -static const uint8_t EXPLR_SRQ_MBA_ERR_REPORTQ_NCF_LOGIC_ERROR_LEN = 15 ; -static const uint8_t EXPLR_SRQ_MBA_ERR_REPORTQ_NCF_MCB_PARITY_ERROR = 37 ; -static const uint8_t EXPLR_SRQ_MBA_ERR_REPORTQ_NCF_MCB_PARITY_ERROR_LEN = 5 ; -static const uint8_t EXPLR_SRQ_MBA_ERR_REPORTQ_NCF_PARITY_ERROR = 42 ; -static const uint8_t EXPLR_SRQ_MBA_ERR_REPORTQ_NCF_PARITY_ERROR_LEN = 11 ; -static const uint8_t EXPLR_SRQ_MBA_ERR_REPORTQ_NCF_CE = 53 ; -static const uint8_t EXPLR_SRQ_MBA_ERR_REPORTQ_NCF_CE_LEN = 4 ; - -static const uint8_t EXPLR_SRQ_MBA_ERR_REPORTQ_MASK_ERRMASK = 0 ; -static const uint8_t EXPLR_SRQ_MBA_ERR_REPORTQ_MASK_ERRMASK_LEN = 57 ; - -static const uint8_t EXPLR_SRQ_MBA_FARB0Q_CFG_MISR_BLOCK = 0 ; -static const uint8_t EXPLR_SRQ_MBA_FARB0Q_CFG_MISR_BLOCK_LEN = 16 ; -static const uint8_t EXPLR_SRQ_MBA_FARB0Q_CFG_MISR_FEEDBACK_ENABLE = 16 ; -static const uint8_t EXPLR_SRQ_MBA_FARB0Q_CFG_2N_ADDR = 17 ; -static const uint8_t EXPLR_SRQ_MBA_FARB0Q_CFG_DDP_ADDR_MODE = 18 ; -static const uint8_t EXPLR_SRQ_MBA_FARB0Q_CFG_PLANAR_ADDR_MODE = 19 ; -static const uint8_t EXPLR_SRQ_MBA_FARB0Q_CFG_ACT_SAME_RANK_HOLD_TIME = 20 ; -static const uint8_t EXPLR_SRQ_MBA_FARB0Q_CFG_ACT_SAME_RANK_HOLD_TIME_LEN = 4 ; -static const uint8_t EXPLR_SRQ_MBA_FARB0Q_CFG_MAX_READS_IN_A_ROW = 24 ; -static const uint8_t EXPLR_SRQ_MBA_FARB0Q_CFG_MAX_READS_IN_A_ROW_LEN = 7 ; -static const uint8_t EXPLR_SRQ_MBA_FARB0Q_CFG_MAX_WRITES_IN_A_ROW = 31 ; -static const uint8_t EXPLR_SRQ_MBA_FARB0Q_CFG_MAX_WRITES_IN_A_ROW_LEN = 7 ; -static const uint8_t EXPLR_SRQ_MBA_FARB0Q_CFG_PARITY_AFTER_CMD = 38 ; -static const uint8_t EXPLR_SRQ_MBA_FARB0Q_CFG_INJECT_PARITY_ERR_WEN = 39 ; -static const uint8_t EXPLR_SRQ_MBA_FARB0Q_CFG_INJECT_PARITY_ERR_ADDR5 = 40 ; -static const uint8_t EXPLR_SRQ_MBA_FARB0Q_CFG_BW_WINDOW_SIZE = 41 ; -static const uint8_t EXPLR_SRQ_MBA_FARB0Q_CFG_BW_WINDOW_SIZE_LEN = 2 ; -static const uint8_t EXPLR_SRQ_MBA_FARB0Q_CFG_PARITY_DETECT_TIME = 43 ; -static const uint8_t EXPLR_SRQ_MBA_FARB0Q_CFG_PARITY_DETECT_TIME_LEN = 5 ; -static const uint8_t EXPLR_SRQ_MBA_FARB0Q_CFG_RCD_PROTECTION_TIME = 48 ; -static const uint8_t EXPLR_SRQ_MBA_FARB0Q_CFG_RCD_PROTECTION_TIME_LEN = 6 ; -static const uint8_t EXPLR_SRQ_MBA_FARB0Q_CFG_DISABLE_RCD_RECOVERY = 54 ; -static const uint8_t EXPLR_SRQ_MBA_FARB0Q_CFG_WAIT_FOR_INIT_COMPLETE = 55 ; -static const uint8_t EXPLR_SRQ_MBA_FARB0Q_CFG_FARB_CLOSE_ALL_PAGES = 56 ; -static const uint8_t EXPLR_SRQ_MBA_FARB0Q_CFG_PORT_FAIL_DISABLE = 57 ; -static const uint8_t EXPLR_SRQ_MBA_FARB0Q_RESERVED_58 = 58 ; -static const uint8_t EXPLR_SRQ_MBA_FARB0Q_CFG_INJECT_PARITY_ERR_CONSTANT = 59 ; -static const uint8_t EXPLR_SRQ_MBA_FARB0Q_CFG_FINISH_WR_BEFORE_RD = 60 ; -static const uint8_t EXPLR_SRQ_MBA_FARB0Q_CFG_OPT_RD_SIZE = 61 ; -static const uint8_t EXPLR_SRQ_MBA_FARB0Q_CFG_OPT_RD_SIZE_LEN = 3 ; - -static const uint8_t EXPLR_SRQ_MBA_FARB1Q_CFG_SLOT0_S0_CID = 0 ; -static const uint8_t EXPLR_SRQ_MBA_FARB1Q_CFG_SLOT0_S0_CID_LEN = 3 ; -static const uint8_t EXPLR_SRQ_MBA_FARB1Q_CFG_SLOT0_S1_CID = 3 ; -static const uint8_t EXPLR_SRQ_MBA_FARB1Q_CFG_SLOT0_S1_CID_LEN = 3 ; -static const uint8_t EXPLR_SRQ_MBA_FARB1Q_CFG_SLOT0_S2_CID = 6 ; -static const uint8_t EXPLR_SRQ_MBA_FARB1Q_CFG_SLOT0_S2_CID_LEN = 3 ; -static const uint8_t EXPLR_SRQ_MBA_FARB1Q_CFG_SLOT0_S3_CID = 9 ; -static const uint8_t EXPLR_SRQ_MBA_FARB1Q_CFG_SLOT0_S3_CID_LEN = 3 ; -static const uint8_t EXPLR_SRQ_MBA_FARB1Q_CFG_SLOT0_S4_CID = 12 ; -static const uint8_t EXPLR_SRQ_MBA_FARB1Q_CFG_SLOT0_S4_CID_LEN = 3 ; -static const uint8_t EXPLR_SRQ_MBA_FARB1Q_CFG_SLOT0_S5_CID = 15 ; -static const uint8_t EXPLR_SRQ_MBA_FARB1Q_CFG_SLOT0_S5_CID_LEN = 3 ; -static const uint8_t EXPLR_SRQ_MBA_FARB1Q_CFG_SLOT0_S6_CID = 18 ; -static const uint8_t EXPLR_SRQ_MBA_FARB1Q_CFG_SLOT0_S6_CID_LEN = 3 ; -static const uint8_t EXPLR_SRQ_MBA_FARB1Q_CFG_SLOT0_S7_CID = 21 ; -static const uint8_t EXPLR_SRQ_MBA_FARB1Q_CFG_SLOT0_S7_CID_LEN = 3 ; -static const uint8_t EXPLR_SRQ_MBA_FARB1Q_CFG_SLOT1_S0_CID = 24 ; -static const uint8_t EXPLR_SRQ_MBA_FARB1Q_CFG_SLOT1_S0_CID_LEN = 3 ; -static const uint8_t EXPLR_SRQ_MBA_FARB1Q_CFG_SLOT1_S1_CID = 27 ; -static const uint8_t EXPLR_SRQ_MBA_FARB1Q_CFG_SLOT1_S1_CID_LEN = 3 ; -static const uint8_t EXPLR_SRQ_MBA_FARB1Q_CFG_SLOT1_S2_CID = 30 ; -static const uint8_t EXPLR_SRQ_MBA_FARB1Q_CFG_SLOT1_S2_CID_LEN = 3 ; -static const uint8_t EXPLR_SRQ_MBA_FARB1Q_CFG_SLOT1_S3_CID = 33 ; -static const uint8_t EXPLR_SRQ_MBA_FARB1Q_CFG_SLOT1_S3_CID_LEN = 3 ; -static const uint8_t EXPLR_SRQ_MBA_FARB1Q_CFG_SLOT1_S4_CID = 36 ; -static const uint8_t EXPLR_SRQ_MBA_FARB1Q_CFG_SLOT1_S4_CID_LEN = 3 ; -static const uint8_t EXPLR_SRQ_MBA_FARB1Q_CFG_SLOT1_S5_CID = 39 ; -static const uint8_t EXPLR_SRQ_MBA_FARB1Q_CFG_SLOT1_S5_CID_LEN = 3 ; -static const uint8_t EXPLR_SRQ_MBA_FARB1Q_CFG_SLOT1_S6_CID = 42 ; -static const uint8_t EXPLR_SRQ_MBA_FARB1Q_CFG_SLOT1_S6_CID_LEN = 3 ; -static const uint8_t EXPLR_SRQ_MBA_FARB1Q_CFG_SLOT1_S7_CID = 45 ; -static const uint8_t EXPLR_SRQ_MBA_FARB1Q_CFG_SLOT1_S7_CID_LEN = 3 ; -static const uint8_t EXPLR_SRQ_MBA_FARB1Q_CFG_DIS_SMDR = 48 ; -static const uint8_t EXPLR_SRQ_MBA_FARB1Q_CFG_DDR4_PARITY_ON_CID_DIS = 49 ; -static const uint8_t EXPLR_SRQ_MBA_FARB1Q_CFG_READ_2CYC_PREAMBLE_EN = 50 ; -static const uint8_t EXPLR_SRQ_MBA_FARB1Q_CFG_WRITE_2CYC_PREAMBLE_EN = 51 ; -static const uint8_t EXPLR_SRQ_MBA_FARB1Q_CFG_RDCSGAP_DLY = 52 ; -static const uint8_t EXPLR_SRQ_MBA_FARB1Q_CFG_RDCSGAP_DLY_LEN = 3 ; -static const uint8_t EXPLR_SRQ_MBA_FARB1Q_CFG_WRCSGAP_DLY = 55 ; -static const uint8_t EXPLR_SRQ_MBA_FARB1Q_CFG_WRCSGAP_DLY_LEN = 3 ; -static const uint8_t EXPLR_SRQ_MBA_FARB1Q_CFG_RSV0 = 58 ; -static const uint8_t EXPLR_SRQ_MBA_FARB1Q_CFG_RSV0_LEN = 6 ; - -static const uint8_t EXPLR_SRQ_MBA_FARB2Q_CFG_RANK0_RD_ODT = 0 ; -static const uint8_t EXPLR_SRQ_MBA_FARB2Q_CFG_RANK0_RD_ODT_LEN = 4 ; -static const uint8_t EXPLR_SRQ_MBA_FARB2Q_CFG_RANK1_RD_ODT = 4 ; -static const uint8_t EXPLR_SRQ_MBA_FARB2Q_CFG_RANK1_RD_ODT_LEN = 4 ; -static const uint8_t EXPLR_SRQ_MBA_FARB2Q_CFG_RANK2_RD_ODT = 8 ; -static const uint8_t EXPLR_SRQ_MBA_FARB2Q_CFG_RANK2_RD_ODT_LEN = 4 ; -static const uint8_t EXPLR_SRQ_MBA_FARB2Q_CFG_RANK3_RD_ODT = 12 ; -static const uint8_t EXPLR_SRQ_MBA_FARB2Q_CFG_RANK3_RD_ODT_LEN = 4 ; -static const uint8_t EXPLR_SRQ_MBA_FARB2Q_CFG_RANK4_RD_ODT = 16 ; -static const uint8_t EXPLR_SRQ_MBA_FARB2Q_CFG_RANK4_RD_ODT_LEN = 4 ; -static const uint8_t EXPLR_SRQ_MBA_FARB2Q_CFG_RANK5_RD_ODT = 20 ; -static const uint8_t EXPLR_SRQ_MBA_FARB2Q_CFG_RANK5_RD_ODT_LEN = 4 ; -static const uint8_t EXPLR_SRQ_MBA_FARB2Q_CFG_RANK6_RD_ODT = 24 ; -static const uint8_t EXPLR_SRQ_MBA_FARB2Q_CFG_RANK6_RD_ODT_LEN = 4 ; -static const uint8_t EXPLR_SRQ_MBA_FARB2Q_CFG_RANK7_RD_ODT = 28 ; -static const uint8_t EXPLR_SRQ_MBA_FARB2Q_CFG_RANK7_RD_ODT_LEN = 4 ; -static const uint8_t EXPLR_SRQ_MBA_FARB2Q_CFG_RANK0_WR_ODT = 32 ; -static const uint8_t EXPLR_SRQ_MBA_FARB2Q_CFG_RANK0_WR_ODT_LEN = 4 ; -static const uint8_t EXPLR_SRQ_MBA_FARB2Q_CFG_RANK1_WR_ODT = 36 ; -static const uint8_t EXPLR_SRQ_MBA_FARB2Q_CFG_RANK1_WR_ODT_LEN = 4 ; -static const uint8_t EXPLR_SRQ_MBA_FARB2Q_CFG_RANK2_WR_ODT = 40 ; -static const uint8_t EXPLR_SRQ_MBA_FARB2Q_CFG_RANK2_WR_ODT_LEN = 4 ; -static const uint8_t EXPLR_SRQ_MBA_FARB2Q_CFG_RANK3_WR_ODT = 44 ; -static const uint8_t EXPLR_SRQ_MBA_FARB2Q_CFG_RANK3_WR_ODT_LEN = 4 ; -static const uint8_t EXPLR_SRQ_MBA_FARB2Q_CFG_RANK4_WR_ODT = 48 ; -static const uint8_t EXPLR_SRQ_MBA_FARB2Q_CFG_RANK4_WR_ODT_LEN = 4 ; -static const uint8_t EXPLR_SRQ_MBA_FARB2Q_CFG_RANK5_WR_ODT = 52 ; -static const uint8_t EXPLR_SRQ_MBA_FARB2Q_CFG_RANK5_WR_ODT_LEN = 4 ; -static const uint8_t EXPLR_SRQ_MBA_FARB2Q_CFG_RANK6_WR_ODT = 56 ; -static const uint8_t EXPLR_SRQ_MBA_FARB2Q_CFG_RANK6_WR_ODT_LEN = 4 ; -static const uint8_t EXPLR_SRQ_MBA_FARB2Q_CFG_RANK7_WR_ODT = 60 ; -static const uint8_t EXPLR_SRQ_MBA_FARB2Q_CFG_RANK7_WR_ODT_LEN = 4 ; - -static const uint8_t EXPLR_SRQ_MBA_FARB3Q_CFG_NM_N_PER_SLOT = 0 ; -static const uint8_t EXPLR_SRQ_MBA_FARB3Q_CFG_NM_N_PER_SLOT_LEN = 15 ; -static const uint8_t EXPLR_SRQ_MBA_FARB3Q_CFG_NM_N_PER_PORT = 15 ; -static const uint8_t EXPLR_SRQ_MBA_FARB3Q_CFG_NM_N_PER_PORT_LEN = 16 ; -static const uint8_t EXPLR_SRQ_MBA_FARB3Q_CFG_NM_M = 31 ; -static const uint8_t EXPLR_SRQ_MBA_FARB3Q_CFG_NM_M_LEN = 14 ; -static const uint8_t EXPLR_SRQ_MBA_FARB3Q_CFG_NM_RAS_WEIGHT = 45 ; -static const uint8_t EXPLR_SRQ_MBA_FARB3Q_CFG_NM_RAS_WEIGHT_LEN = 3 ; -static const uint8_t EXPLR_SRQ_MBA_FARB3Q_CFG_NM_CAS_WEIGHT = 48 ; -static const uint8_t EXPLR_SRQ_MBA_FARB3Q_CFG_NM_CAS_WEIGHT_LEN = 3 ; -static const uint8_t EXPLR_SRQ_MBA_FARB3Q_RESERVED_51 = 51 ; -static const uint8_t EXPLR_SRQ_MBA_FARB3Q_RESERVED_52 = 52 ; -static const uint8_t EXPLR_SRQ_MBA_FARB3Q_CFG_NM_CHANGE_AFTER_SYNC = 53 ; -static const uint8_t EXPLR_SRQ_MBA_FARB3Q_RESERVED_54_63 = 54 ; -static const uint8_t EXPLR_SRQ_MBA_FARB3Q_RESERVED_54_63_LEN = 10 ; - -static const uint8_t EXPLR_SRQ_MBA_FARB4Q_CFG_NOISE_WAIT_TIME = 0 ; -static const uint8_t EXPLR_SRQ_MBA_FARB4Q_CFG_NOISE_WAIT_TIME_LEN = 16 ; -static const uint8_t EXPLR_SRQ_MBA_FARB4Q_CFG_PRECHARGE_WAIT_TIME = 16 ; -static const uint8_t EXPLR_SRQ_MBA_FARB4Q_CFG_PRECHARGE_WAIT_TIME_LEN = 6 ; -static const uint8_t EXPLR_SRQ_MBA_FARB4Q_CFG_SIM_FAST_NOISE_WINDOW = 22 ; -static const uint8_t EXPLR_SRQ_MBA_FARB4Q_RESERVED_23_26 = 23 ; -static const uint8_t EXPLR_SRQ_MBA_FARB4Q_RESERVED_23_26_LEN = 4 ; -static const uint8_t EXPLR_SRQ_MBA_FARB4Q_EMERGENCY_N = 27 ; -static const uint8_t EXPLR_SRQ_MBA_FARB4Q_EMERGENCY_N_LEN = 15 ; -static const uint8_t EXPLR_SRQ_MBA_FARB4Q_EMERGENCY_M = 42 ; -static const uint8_t EXPLR_SRQ_MBA_FARB4Q_EMERGENCY_M_LEN = 14 ; -static const uint8_t EXPLR_SRQ_MBA_FARB4Q_RESERVED_56_63 = 56 ; -static const uint8_t EXPLR_SRQ_MBA_FARB4Q_RESERVED_56_63_LEN = 8 ; - -static const uint8_t EXPLR_SRQ_MBA_FARB5Q_RESERVED_0_3 = 0 ; -static const uint8_t EXPLR_SRQ_MBA_FARB5Q_RESERVED_0_3_LEN = 4 ; -static const uint8_t EXPLR_SRQ_MBA_FARB5Q_CFG_DDR_RESETN = 4 ; -static const uint8_t EXPLR_SRQ_MBA_FARB5Q_CFG_CCS_ADDR_MUX_SEL = 5 ; -static const uint8_t EXPLR_SRQ_MBA_FARB5Q_CFG_CCS_INST_RESET_ENABLE = 6 ; -static const uint8_t EXPLR_SRQ_MBA_FARB5Q_RESERVED_7_15 = 7 ; -static const uint8_t EXPLR_SRQ_MBA_FARB5Q_RESERVED_7_15_LEN = 9 ; - -static const uint8_t EXPLR_SRQ_MBA_FARB6Q_CFG_BW_SNAPSHOT = 0 ; -static const uint8_t EXPLR_SRQ_MBA_FARB6Q_CFG_BW_SNAPSHOT_LEN = 11 ; -static const uint8_t EXPLR_SRQ_MBA_FARB6Q_CFG_CKE_PUP_STATE = 11 ; -static const uint8_t EXPLR_SRQ_MBA_FARB6Q_CFG_CKE_PUP_STATE_LEN = 4 ; -static const uint8_t EXPLR_SRQ_MBA_FARB6Q_CFG_STR_STATE = 15 ; -static const uint8_t EXPLR_SRQ_MBA_FARB6Q_CFG_RRQ_DEPTH = 16 ; -static const uint8_t EXPLR_SRQ_MBA_FARB6Q_CFG_RRQ_DEPTH_LEN = 5 ; -static const uint8_t EXPLR_SRQ_MBA_FARB6Q_CFG_WRQ_DEPTH = 21 ; -static const uint8_t EXPLR_SRQ_MBA_FARB6Q_CFG_WRQ_DEPTH_LEN = 5 ; -static const uint8_t EXPLR_SRQ_MBA_FARB6Q_CFG_RCD_PARITY_DLY = 26 ; -static const uint8_t EXPLR_SRQ_MBA_FARB6Q_CFG_RCD_PARITY_DLY_LEN = 5 ; -static const uint8_t EXPLR_SRQ_MBA_FARB6Q_CFG_EVENT = 31 ; - -static const uint8_t EXPLR_SRQ_MBA_FARB7Q_EMER_THROTTLE_IP = 0 ; - -static const uint8_t EXPLR_SRQ_MBA_FARB8Q_SAFE_REFRESH_MODE = 0 ; - -static const uint8_t EXPLR_SRQ_MBA_FARB9Q_CFG_ZQ_PER_CAL_ENABLE = 0 ; -static const uint8_t EXPLR_SRQ_MBA_FARB9Q_CFG_ZQ_PER_CAL_INTERVAL_TB = 1 ; -static const uint8_t EXPLR_SRQ_MBA_FARB9Q_CFG_ZQ_PER_CAL_INTERVAL_TB_LEN = 2 ; -static const uint8_t EXPLR_SRQ_MBA_FARB9Q_CFG_ZQ_PER_CAL_INTERVAL = 3 ; -static const uint8_t EXPLR_SRQ_MBA_FARB9Q_CFG_ZQ_PER_CAL_INTERVAL_LEN = 9 ; -static const uint8_t EXPLR_SRQ_MBA_FARB9Q_RESERVED_12 = 12 ; -static const uint8_t EXPLR_SRQ_MBA_FARB9Q_CFG_ZQ_PER_CAL_RUN_LENGTH = 13 ; -static const uint8_t EXPLR_SRQ_MBA_FARB9Q_CFG_ZQ_PER_CAL_RUN_LENGTH_LEN = 8 ; -static const uint8_t EXPLR_SRQ_MBA_FARB9Q_CFG_ZQ_PER_CAL_RUN_LENGTH_TB = 21 ; -static const uint8_t EXPLR_SRQ_MBA_FARB9Q_CFG_ZQ_PER_CAL_RUN_LENGTH_TB_LEN = 2 ; -static const uint8_t EXPLR_SRQ_MBA_FARB9Q_RESERVED_23_31 = 23 ; -static const uint8_t EXPLR_SRQ_MBA_FARB9Q_RESERVED_23_31_LEN = 9 ; -static const uint8_t EXPLR_SRQ_MBA_FARB9Q_CFG_MC_PER_CAL_ENABLE = 32 ; -static const uint8_t EXPLR_SRQ_MBA_FARB9Q_CFG_MC_PER_CAL_INTERVAL_TB = 33 ; -static const uint8_t EXPLR_SRQ_MBA_FARB9Q_CFG_MC_PER_CAL_INTERVAL_TB_LEN = 2 ; -static const uint8_t EXPLR_SRQ_MBA_FARB9Q_CFG_MC_PER_CAL_INTERVAL = 35 ; -static const uint8_t EXPLR_SRQ_MBA_FARB9Q_CFG_MC_PER_CAL_INTERVAL_LEN = 9 ; -static const uint8_t EXPLR_SRQ_MBA_FARB9Q_CFG_MC_PER_CAL_FIXED_RUN_LENGTH_EN = 44 ; -static const uint8_t EXPLR_SRQ_MBA_FARB9Q_CFG_MC_PER_CAL_RUN_LENGTH = 45 ; -static const uint8_t EXPLR_SRQ_MBA_FARB9Q_CFG_MC_PER_CAL_RUN_LENGTH_LEN = 10 ; -static const uint8_t EXPLR_SRQ_MBA_FARB9Q_CFG_MC_PER_CAL_CTRLUPD_MIN = 55 ; -static const uint8_t EXPLR_SRQ_MBA_FARB9Q_CFG_MC_PER_CAL_CTRLUPD_MIN_LEN = 9 ; - -static const uint8_t EXPLR_SRQ_MBA_PMU0Q_READ_COUNT = 0 ; -static const uint8_t EXPLR_SRQ_MBA_PMU0Q_READ_COUNT_LEN = 32 ; -static const uint8_t EXPLR_SRQ_MBA_PMU0Q_WRITE_COUNT = 32 ; -static const uint8_t EXPLR_SRQ_MBA_PMU0Q_WRITE_COUNT_LEN = 32 ; - -static const uint8_t EXPLR_SRQ_MBA_PMU1Q_ACTIVATE_COUNT = 0 ; -static const uint8_t EXPLR_SRQ_MBA_PMU1Q_ACTIVATE_COUNT_LEN = 32 ; -static const uint8_t EXPLR_SRQ_MBA_PMU1Q_PU_COUNTS = 32 ; -static const uint8_t EXPLR_SRQ_MBA_PMU1Q_PU_COUNTS_LEN = 32 ; - -static const uint8_t EXPLR_SRQ_MBA_PMU2Q_FRAME_COUNT = 0 ; -static const uint8_t EXPLR_SRQ_MBA_PMU2Q_FRAME_COUNT_LEN = 32 ; -static const uint8_t EXPLR_SRQ_MBA_PMU2Q_STR_EXIT_COUNT = 32 ; -static const uint8_t EXPLR_SRQ_MBA_PMU2Q_STR_EXIT_COUNT_LEN = 8 ; - -static const uint8_t EXPLR_SRQ_MBA_PMU3Q_LOW_IDLE_THRESHOLD = 0 ; -static const uint8_t EXPLR_SRQ_MBA_PMU3Q_LOW_IDLE_THRESHOLD_LEN = 16 ; -static const uint8_t EXPLR_SRQ_MBA_PMU3Q_MED_IDLE_THRESHOLD = 16 ; -static const uint8_t EXPLR_SRQ_MBA_PMU3Q_MED_IDLE_THRESHOLD_LEN = 16 ; -static const uint8_t EXPLR_SRQ_MBA_PMU3Q_HIGH_IDLE_THRESHOLD = 32 ; -static const uint8_t EXPLR_SRQ_MBA_PMU3Q_HIGH_IDLE_THRESHOLD_LEN = 32 ; - -static const uint8_t EXPLR_SRQ_MBA_PMU4Q_BASE_IDLE_COUNT = 0 ; -static const uint8_t EXPLR_SRQ_MBA_PMU4Q_BASE_IDLE_COUNT_LEN = 32 ; -static const uint8_t EXPLR_SRQ_MBA_PMU4Q_LOW_IDLE_COUNT = 32 ; -static const uint8_t EXPLR_SRQ_MBA_PMU4Q_LOW_IDLE_COUNT_LEN = 32 ; - -static const uint8_t EXPLR_SRQ_MBA_PMU5Q_MED_IDLE_COUNT = 0 ; -static const uint8_t EXPLR_SRQ_MBA_PMU5Q_MED_IDLE_COUNT_LEN = 32 ; -static const uint8_t EXPLR_SRQ_MBA_PMU5Q_HIGH_IDLE_COUNT = 32 ; -static const uint8_t EXPLR_SRQ_MBA_PMU5Q_HIGH_IDLE_COUNT_LEN = 32 ; - -static const uint8_t EXPLR_SRQ_MBA_PMU6Q_EVENT0_COUNTER = 0 ; -static const uint8_t EXPLR_SRQ_MBA_PMU6Q_EVENT0_COUNTER_LEN = 16 ; -static const uint8_t EXPLR_SRQ_MBA_PMU6Q_EVENT1_COUNTER = 16 ; -static const uint8_t EXPLR_SRQ_MBA_PMU6Q_EVENT1_COUNTER_LEN = 16 ; -static const uint8_t EXPLR_SRQ_MBA_PMU6Q_EVENT2_COUNTER = 32 ; -static const uint8_t EXPLR_SRQ_MBA_PMU6Q_EVENT2_COUNTER_LEN = 16 ; -static const uint8_t EXPLR_SRQ_MBA_PMU6Q_EVENT3_COUNTER = 48 ; -static const uint8_t EXPLR_SRQ_MBA_PMU6Q_EVENT3_COUNTER_LEN = 16 ; - -static const uint8_t EXPLR_SRQ_MBA_PMU7Q_CFG_EVENT0_SELECT = 0 ; -static const uint8_t EXPLR_SRQ_MBA_PMU7Q_CFG_EVENT0_SELECT_LEN = 6 ; -static const uint8_t EXPLR_SRQ_MBA_PMU7Q_CFG_EVENT1_SELECT = 6 ; -static const uint8_t EXPLR_SRQ_MBA_PMU7Q_CFG_EVENT1_SELECT_LEN = 6 ; -static const uint8_t EXPLR_SRQ_MBA_PMU7Q_CFG_EVENT2_SELECT = 12 ; -static const uint8_t EXPLR_SRQ_MBA_PMU7Q_CFG_EVENT2_SELECT_LEN = 6 ; -static const uint8_t EXPLR_SRQ_MBA_PMU7Q_CFG_EVENT3_SELECT = 18 ; -static const uint8_t EXPLR_SRQ_MBA_PMU7Q_CFG_EVENT3_SELECT_LEN = 6 ; -static const uint8_t EXPLR_SRQ_MBA_PMU7Q_CFG_PRESCALER_C0 = 24 ; -static const uint8_t EXPLR_SRQ_MBA_PMU7Q_CFG_PRESCALER_C0_LEN = 2 ; -static const uint8_t EXPLR_SRQ_MBA_PMU7Q_CFG_PRESCALER_C1 = 26 ; -static const uint8_t EXPLR_SRQ_MBA_PMU7Q_CFG_PRESCALER_C1_LEN = 2 ; -static const uint8_t EXPLR_SRQ_MBA_PMU7Q_CFG_PRESCALER_C2 = 28 ; -static const uint8_t EXPLR_SRQ_MBA_PMU7Q_CFG_PRESCALER_C2_LEN = 2 ; -static const uint8_t EXPLR_SRQ_MBA_PMU7Q_CFG_PRESCALER_C3 = 30 ; -static const uint8_t EXPLR_SRQ_MBA_PMU7Q_CFG_PRESCALER_C3_LEN = 2 ; -static const uint8_t EXPLR_SRQ_MBA_PMU7Q_CASCADE = 32 ; -static const uint8_t EXPLR_SRQ_MBA_PMU7Q_CASCADE_LEN = 3 ; -static const uint8_t EXPLR_SRQ_MBA_PMU7Q_FREEZE = 35 ; -static const uint8_t EXPLR_SRQ_MBA_PMU7Q_CFG_PMU_START_RESET = 36 ; -static const uint8_t EXPLR_SRQ_MBA_PMU7Q_CFG_PMU_START_NO_RESET = 37 ; -static const uint8_t EXPLR_SRQ_MBA_PMU7Q_CFG_PMU_STOP = 38 ; -static const uint8_t EXPLR_SRQ_MBA_PMU7Q_CFG_RESET_PMU6_WHEN_READ = 39 ; - -static const uint8_t EXPLR_SRQ_MBA_PMU8Q_CFG_CMD0_TYPE = 0 ; -static const uint8_t EXPLR_SRQ_MBA_PMU8Q_CFG_CMD0_TYPE_LEN = 2 ; -static const uint8_t EXPLR_SRQ_MBA_PMU8Q_CFG_CMD0_MRANK_MATCH_EN = 2 ; -static const uint8_t EXPLR_SRQ_MBA_PMU8Q_CFG_CMD0_SRANK_MATCH_EN = 3 ; -static const uint8_t EXPLR_SRQ_MBA_PMU8Q_CFG_CMD0_BG_MATCH_EN = 4 ; -static const uint8_t EXPLR_SRQ_MBA_PMU8Q_CFG_CMD0_BANK_MATCH_EN = 5 ; -static const uint8_t EXPLR_SRQ_MBA_PMU8Q_CFG_CMD0_MRANK = 6 ; -static const uint8_t EXPLR_SRQ_MBA_PMU8Q_CFG_CMD0_MRANK_LEN = 3 ; -static const uint8_t EXPLR_SRQ_MBA_PMU8Q_CFG_CMD0_SRANK = 9 ; -static const uint8_t EXPLR_SRQ_MBA_PMU8Q_CFG_CMD0_SRANK_LEN = 3 ; -static const uint8_t EXPLR_SRQ_MBA_PMU8Q_CFG_CMD0_BG = 12 ; -static const uint8_t EXPLR_SRQ_MBA_PMU8Q_CFG_CMD0_BG_LEN = 2 ; -static const uint8_t EXPLR_SRQ_MBA_PMU8Q_CFG_CMD0_BANK = 14 ; -static const uint8_t EXPLR_SRQ_MBA_PMU8Q_CFG_CMD0_BANK_LEN = 3 ; -static const uint8_t EXPLR_SRQ_MBA_PMU8Q_CFG_CMD1_TYPE = 17 ; -static const uint8_t EXPLR_SRQ_MBA_PMU8Q_CFG_CMD1_TYPE_LEN = 2 ; -static const uint8_t EXPLR_SRQ_MBA_PMU8Q_CFG_CMD1_MRANK_MATCH_EN = 19 ; -static const uint8_t EXPLR_SRQ_MBA_PMU8Q_CFG_CMD1_SRANK_MATCH_EN = 20 ; -static const uint8_t EXPLR_SRQ_MBA_PMU8Q_CFG_CMD1_BG_MATCH_EN = 21 ; -static const uint8_t EXPLR_SRQ_MBA_PMU8Q_CFG_CMD1_BANK_MATCH_EN = 22 ; -static const uint8_t EXPLR_SRQ_MBA_PMU8Q_CFG_CMD1_MRANK = 23 ; -static const uint8_t EXPLR_SRQ_MBA_PMU8Q_CFG_CMD1_MRANK_LEN = 3 ; -static const uint8_t EXPLR_SRQ_MBA_PMU8Q_CFG_CMD1_SRANK = 26 ; -static const uint8_t EXPLR_SRQ_MBA_PMU8Q_CFG_CMD1_SRANK_LEN = 3 ; -static const uint8_t EXPLR_SRQ_MBA_PMU8Q_CFG_CMD1_BG = 29 ; -static const uint8_t EXPLR_SRQ_MBA_PMU8Q_CFG_CMD1_BG_LEN = 2 ; -static const uint8_t EXPLR_SRQ_MBA_PMU8Q_CFG_CMD1_BANK = 31 ; -static const uint8_t EXPLR_SRQ_MBA_PMU8Q_CFG_CMD1_BANK_LEN = 3 ; -static const uint8_t EXPLR_SRQ_MBA_PMU8Q_CFG_CMD2_TYPE = 34 ; -static const uint8_t EXPLR_SRQ_MBA_PMU8Q_CFG_CMD2_TYPE_LEN = 2 ; -static const uint8_t EXPLR_SRQ_MBA_PMU8Q_CFG_CMD2_MRANK_MATCH_EN = 36 ; -static const uint8_t EXPLR_SRQ_MBA_PMU8Q_CFG_CMD2_SRANK_MATCH_EN = 37 ; -static const uint8_t EXPLR_SRQ_MBA_PMU8Q_CFG_CMD2_BG_MATCH_EN = 38 ; -static const uint8_t EXPLR_SRQ_MBA_PMU8Q_CFG_CMD2_BANK_MATCH_EN = 39 ; -static const uint8_t EXPLR_SRQ_MBA_PMU8Q_CFG_CMD2_MRANK = 40 ; -static const uint8_t EXPLR_SRQ_MBA_PMU8Q_CFG_CMD2_MRANK_LEN = 3 ; -static const uint8_t EXPLR_SRQ_MBA_PMU8Q_CFG_CMD2_SRANK = 43 ; -static const uint8_t EXPLR_SRQ_MBA_PMU8Q_CFG_CMD2_SRANK_LEN = 3 ; -static const uint8_t EXPLR_SRQ_MBA_PMU8Q_CFG_CMD2_BG = 46 ; -static const uint8_t EXPLR_SRQ_MBA_PMU8Q_CFG_CMD2_BG_LEN = 2 ; -static const uint8_t EXPLR_SRQ_MBA_PMU8Q_CFG_CMD2_BANK = 48 ; -static const uint8_t EXPLR_SRQ_MBA_PMU8Q_CFG_CMD2_BANK_LEN = 3 ; -static const uint8_t EXPLR_SRQ_MBA_PMU8Q_RESERVED_51_63 = 51 ; -static const uint8_t EXPLR_SRQ_MBA_PMU8Q_RESERVED_51_63_LEN = 13 ; - -static const uint8_t EXPLR_SRQ_MBA_RRQ0Q_CFG_RRQ_SKIP_LIMIT = 0 ; -static const uint8_t EXPLR_SRQ_MBA_RRQ0Q_CFG_RRQ_SKIP_LIMIT_LEN = 6 ; -static const uint8_t EXPLR_SRQ_MBA_RRQ0Q_CFG_RRQ_FIFO_MODE = 6 ; -static const uint8_t EXPLR_SRQ_MBA_RRQ0Q_CFG_RRQ_SINGLE_THREAD_MODE = 7 ; -static const uint8_t EXPLR_SRQ_MBA_RRQ0Q_RESERVED_8_10 = 8 ; -static const uint8_t EXPLR_SRQ_MBA_RRQ0Q_RESERVED_8_10_LEN = 3 ; -static const uint8_t EXPLR_SRQ_MBA_RRQ0Q_CFG_DISABLE_RD_PG_MODE = 11 ; -static const uint8_t EXPLR_SRQ_MBA_RRQ0Q_CFG_DISABLE_FAST_ACT = 12 ; -static const uint8_t EXPLR_SRQ_MBA_RRQ0Q_CFG_RD_IDLE_ALLOW_WR = 13 ; -static const uint8_t EXPLR_SRQ_MBA_RRQ0Q_CFG_RD_IDLE_ALLOW_WR_LEN = 11 ; -static const uint8_t EXPLR_SRQ_MBA_RRQ0Q_CFG_RDBUFF_CAPACITY_LIMIT = 24 ; -static const uint8_t EXPLR_SRQ_MBA_RRQ0Q_CFG_RDBUFF_CAPACITY_LIMIT_LEN = 6 ; -static const uint8_t EXPLR_SRQ_MBA_RRQ0Q_CFG_SRQ_RRQ_DBG_SEL = 30 ; -static const uint8_t EXPLR_SRQ_MBA_RRQ0Q_CFG_SRQ_RRQ_DBG_SEL_LEN = 4 ; -static const uint8_t EXPLR_SRQ_MBA_RRQ0Q_RESERVED_34_56 = 34 ; -static const uint8_t EXPLR_SRQ_MBA_RRQ0Q_RESERVED_34_56_LEN = 23 ; -static const uint8_t EXPLR_SRQ_MBA_RRQ0Q_CFG_RRQ_ACT_NUM_READS_PENDING = 57 ; -static const uint8_t EXPLR_SRQ_MBA_RRQ0Q_CFG_RRQ_ACT_NUM_READS_PENDING_LEN = 4 ; -static const uint8_t EXPLR_SRQ_MBA_RRQ0Q_CFG_DISABLE_FAST_ACT_FIFO = 61 ; -static const uint8_t EXPLR_SRQ_MBA_RRQ0Q_CFG_RRQ_ENTRY0_ENABLE = 62 ; -static const uint8_t EXPLR_SRQ_MBA_RRQ0Q_CFG_CRIT_OW_FIRST_EN = 63 ; - -static const uint8_t EXPLR_SRQ_MBA_SYNCCNTLQ_SYNC_REF_EN = 0 ; -static const uint8_t EXPLR_SRQ_MBA_SYNCCNTLQ_SYNC_PC_EN = 1 ; -static const uint8_t EXPLR_SRQ_MBA_SYNCCNTLQ_SYNC_TIMEBASE_EN = 2 ; -static const uint8_t EXPLR_SRQ_MBA_SYNCCNTLQ_RESERVED_3_7 = 3 ; -static const uint8_t EXPLR_SRQ_MBA_SYNCCNTLQ_RESERVED_3_7_LEN = 5 ; - -static const uint8_t EXPLR_SRQ_MBA_TMR0Q_RRDM_DLY = 0 ; -static const uint8_t EXPLR_SRQ_MBA_TMR0Q_RRDM_DLY_LEN = 4 ; -static const uint8_t EXPLR_SRQ_MBA_TMR0Q_RRSMSR_DLY = 4 ; -static const uint8_t EXPLR_SRQ_MBA_TMR0Q_RRSMSR_DLY_LEN = 4 ; -static const uint8_t EXPLR_SRQ_MBA_TMR0Q_RRSMDR_DLY = 8 ; -static const uint8_t EXPLR_SRQ_MBA_TMR0Q_RRSMDR_DLY_LEN = 4 ; -static const uint8_t EXPLR_SRQ_MBA_TMR0Q_RROP_DLY = 12 ; -static const uint8_t EXPLR_SRQ_MBA_TMR0Q_RROP_DLY_LEN = 4 ; -static const uint8_t EXPLR_SRQ_MBA_TMR0Q_WWDM_DLY = 16 ; -static const uint8_t EXPLR_SRQ_MBA_TMR0Q_WWDM_DLY_LEN = 4 ; -static const uint8_t EXPLR_SRQ_MBA_TMR0Q_WWSMSR_DLY = 20 ; -static const uint8_t EXPLR_SRQ_MBA_TMR0Q_WWSMSR_DLY_LEN = 4 ; -static const uint8_t EXPLR_SRQ_MBA_TMR0Q_WWSMDR_DLY = 24 ; -static const uint8_t EXPLR_SRQ_MBA_TMR0Q_WWSMDR_DLY_LEN = 4 ; -static const uint8_t EXPLR_SRQ_MBA_TMR0Q_WWOP_DLY = 28 ; -static const uint8_t EXPLR_SRQ_MBA_TMR0Q_WWOP_DLY_LEN = 4 ; -static const uint8_t EXPLR_SRQ_MBA_TMR0Q_RWDM_DLY = 32 ; -static const uint8_t EXPLR_SRQ_MBA_TMR0Q_RWDM_DLY_LEN = 5 ; -static const uint8_t EXPLR_SRQ_MBA_TMR0Q_RWSMSR_DLY = 37 ; -static const uint8_t EXPLR_SRQ_MBA_TMR0Q_RWSMSR_DLY_LEN = 5 ; -static const uint8_t EXPLR_SRQ_MBA_TMR0Q_RWSMDR_DLY = 42 ; -static const uint8_t EXPLR_SRQ_MBA_TMR0Q_RWSMDR_DLY_LEN = 5 ; -static const uint8_t EXPLR_SRQ_MBA_TMR0Q_WRDM_DLY = 47 ; -static const uint8_t EXPLR_SRQ_MBA_TMR0Q_WRDM_DLY_LEN = 4 ; -static const uint8_t EXPLR_SRQ_MBA_TMR0Q_WRSMSR_DLY = 51 ; -static const uint8_t EXPLR_SRQ_MBA_TMR0Q_WRSMSR_DLY_LEN = 6 ; -static const uint8_t EXPLR_SRQ_MBA_TMR0Q_WRSMDR_DLY = 57 ; -static const uint8_t EXPLR_SRQ_MBA_TMR0Q_WRSMDR_DLY_LEN = 6 ; -static const uint8_t EXPLR_SRQ_MBA_TMR0Q_RESERVED_63 = 63 ; - -static const uint8_t EXPLR_SRQ_MBA_TMR1Q_RRSBG_DLY = 0 ; -static const uint8_t EXPLR_SRQ_MBA_TMR1Q_RRSBG_DLY_LEN = 4 ; -static const uint8_t EXPLR_SRQ_MBA_TMR1Q_WRSBG_DLY = 4 ; -static const uint8_t EXPLR_SRQ_MBA_TMR1Q_WRSBG_DLY_LEN = 6 ; -static const uint8_t EXPLR_SRQ_MBA_TMR1Q_CFG_TFAW = 10 ; -static const uint8_t EXPLR_SRQ_MBA_TMR1Q_CFG_TFAW_LEN = 6 ; -static const uint8_t EXPLR_SRQ_MBA_TMR1Q_CFG_TRCD = 16 ; -static const uint8_t EXPLR_SRQ_MBA_TMR1Q_CFG_TRCD_LEN = 5 ; -static const uint8_t EXPLR_SRQ_MBA_TMR1Q_CFG_TRP = 21 ; -static const uint8_t EXPLR_SRQ_MBA_TMR1Q_CFG_TRP_LEN = 5 ; -static const uint8_t EXPLR_SRQ_MBA_TMR1Q_CFG_TRAS = 26 ; -static const uint8_t EXPLR_SRQ_MBA_TMR1Q_CFG_TRAS_LEN = 6 ; -static const uint8_t EXPLR_SRQ_MBA_TMR1Q_CFG_SRQ_TMR_DBG_SEL = 32 ; -static const uint8_t EXPLR_SRQ_MBA_TMR1Q_CFG_SRQ_TMR_DBG_SEL_LEN = 5 ; -static const uint8_t EXPLR_SRQ_MBA_TMR1Q_RESERVED_37_40 = 37 ; -static const uint8_t EXPLR_SRQ_MBA_TMR1Q_RESERVED_37_40_LEN = 4 ; -static const uint8_t EXPLR_SRQ_MBA_TMR1Q_CFG_WR2PRE = 41 ; -static const uint8_t EXPLR_SRQ_MBA_TMR1Q_CFG_WR2PRE_LEN = 7 ; -static const uint8_t EXPLR_SRQ_MBA_TMR1Q_CFG_RD2PRE = 48 ; -static const uint8_t EXPLR_SRQ_MBA_TMR1Q_CFG_RD2PRE_LEN = 4 ; -static const uint8_t EXPLR_SRQ_MBA_TMR1Q_TRRD = 52 ; -static const uint8_t EXPLR_SRQ_MBA_TMR1Q_TRRD_LEN = 4 ; -static const uint8_t EXPLR_SRQ_MBA_TMR1Q_TRRD_SBG = 56 ; -static const uint8_t EXPLR_SRQ_MBA_TMR1Q_TRRD_SBG_LEN = 4 ; -static const uint8_t EXPLR_SRQ_MBA_TMR1Q_CFG_ACT_TO_DIFF_RANK_DLY = 60 ; -static const uint8_t EXPLR_SRQ_MBA_TMR1Q_CFG_ACT_TO_DIFF_RANK_DLY_LEN = 4 ; - -static const uint8_t EXPLR_SRQ_MBA_TMR2Q_CFG_BANK_BUSY_FSM_DIS = 0 ; -static const uint8_t EXPLR_SRQ_MBA_TMR2Q_CFG_BANK_BUSY_FSM_DIS_LEN = 20 ; -static const uint8_t EXPLR_SRQ_MBA_TMR2Q_CFG_BANK_BUSY_OPEN_PAGE_DIS = 20 ; -static const uint8_t EXPLR_SRQ_MBA_TMR2Q_CFG_BANK_BUSY_OPEN_PAGE_DIS_LEN = 12 ; -static const uint8_t EXPLR_SRQ_MBA_TMR2Q_RESERVED_32_63 = 32 ; -static const uint8_t EXPLR_SRQ_MBA_TMR2Q_RESERVED_32_63_LEN = 32 ; - -static const uint8_t EXPLR_SRQ_MBA_WRQ0Q_CFG_WRITE_HW_MARK = 0 ; -static const uint8_t EXPLR_SRQ_MBA_WRQ0Q_CFG_WRITE_HW_MARK_LEN = 5 ; -static const uint8_t EXPLR_SRQ_MBA_WRQ0Q_CFG_WRQ_FIFO_MODE = 5 ; -static const uint8_t EXPLR_SRQ_MBA_WRQ0Q_CFG_DISABLE_WR_PG_MODE = 6 ; -static const uint8_t EXPLR_SRQ_MBA_WRQ0Q_CFG_WRQ_ENTRY0_HP_DLY = 7 ; -static const uint8_t EXPLR_SRQ_MBA_WRQ0Q_CFG_WRQ_ENTRY0_HP_DLY_LEN = 12 ; -static const uint8_t EXPLR_SRQ_MBA_WRQ0Q_CFG_WRQ_FLUSH_WR_RANK = 19 ; -static const uint8_t EXPLR_SRQ_MBA_WRQ0Q_CFG_WRQ_ENABLE_NON_HP_WR = 20 ; -static const uint8_t EXPLR_SRQ_MBA_WRQ0Q_CFG_ENTRY0_MIN_FOR_RRQ_IDLE_WR = 21 ; -static const uint8_t EXPLR_SRQ_MBA_WRQ0Q_CFG_ENTRY0_MIN_FOR_RRQ_IDLE_WR_LEN = 12 ; -static const uint8_t EXPLR_SRQ_MBA_WRQ0Q_CFG_WRITE_LW_MARK = 33 ; -static const uint8_t EXPLR_SRQ_MBA_WRQ0Q_CFG_WRITE_LW_MARK_LEN = 5 ; -static const uint8_t EXPLR_SRQ_MBA_WRQ0Q_CFG_WRQ_SKIP_LIMIT = 38 ; -static const uint8_t EXPLR_SRQ_MBA_WRQ0Q_CFG_WRQ_SKIP_LIMIT_LEN = 6 ; -static const uint8_t EXPLR_SRQ_MBA_WRQ0Q_CFG_WRQ_SINGLE_THREAD_MODE = 44 ; -static const uint8_t EXPLR_SRQ_MBA_WRQ0Q_CFG_RQ_HANG_THRESHOLD = 45 ; -static const uint8_t EXPLR_SRQ_MBA_WRQ0Q_CFG_RQ_HANG_THRESHOLD_LEN = 8 ; -static const uint8_t EXPLR_SRQ_MBA_WRQ0Q_CFG_WRQ_SKIP_RRQ_ENTRIES_DIS = 53 ; -static const uint8_t EXPLR_SRQ_MBA_WRQ0Q_RESERVED_54 = 54 ; -static const uint8_t EXPLR_SRQ_MBA_WRQ0Q_CFG_WRQ_ACT_NUM_WRITES_PENDING = 55 ; -static const uint8_t EXPLR_SRQ_MBA_WRQ0Q_CFG_WRQ_ACT_NUM_WRITES_PENDING_LEN = 4 ; -static const uint8_t EXPLR_SRQ_MBA_WRQ0Q_CFG_WRQ_ALLOW_NEW_PAGE_COMMIT = 59 ; -static const uint8_t EXPLR_SRQ_MBA_WRQ0Q_CFG_SRQ_WRQ_DBG_SEL = 60 ; -static const uint8_t EXPLR_SRQ_MBA_WRQ0Q_CFG_SRQ_WRQ_DBG_SEL_LEN = 4 ; - -static const uint8_t EXPLR_SRQ_SRQCFG0_MODE_ECC_CHK_DIS = 0 ; -static const uint8_t EXPLR_SRQ_SRQCFG0_MODE_ECC_COR_DIS = 1 ; -static const uint8_t EXPLR_SRQ_SRQCFG0_RMW_RBUF_PTR_MASK = 2 ; -static const uint8_t EXPLR_SRQ_SRQCFG0_RMW_RBUF_PTR_MASK_LEN = 14 ; -static const uint8_t EXPLR_SRQ_SRQCFG0_MCB_PAUSE = 16 ; -static const uint8_t EXPLR_SRQ_SRQCFG0_MCB_CREDIT_UPDATE = 17 ; -static const uint8_t EXPLR_SRQ_SRQCFG0_MCB_CRD_INIT = 18 ; -static const uint8_t EXPLR_SRQ_SRQCFG0_MCB_CRD_INIT_LEN = 4 ; -static const uint8_t EXPLR_SRQ_SRQCFG0_TRACE_UPDATE = 22 ; -static const uint8_t EXPLR_SRQ_SRQCFG0_CLEAR = 23 ; -static const uint8_t EXPLR_SRQ_SRQCFG0_HOLD_ACUM = 24 ; -static const uint8_t EXPLR_SRQ_SRQCFG0_ERR_INJ0 = 25 ; -static const uint8_t EXPLR_SRQ_SRQCFG0_ERR_INJ1 = 26 ; -static const uint8_t EXPLR_SRQ_SRQCFG0_TBD0 = 27 ; -static const uint8_t EXPLR_SRQ_SRQCFG0_NCF_CGT_DIS = 28 ; -static const uint8_t EXPLR_SRQ_SRQCFG0_NCF_CGT_DIS_LEN = 3 ; -static const uint8_t EXPLR_SRQ_SRQCFG0_NCF_DRAM_CMD_FLUSH_EN = 31 ; - -static const uint8_t EXPLR_SRQ_SRQFIRQ_MBA_RECOVERABLE_ERROR = 0 ; -static const uint8_t EXPLR_SRQ_SRQFIRQ_MBA_NONRECOVERABLE_ERROR = 1 ; -static const uint8_t EXPLR_SRQ_SRQFIRQ_REFRESH_OVERRUN = 2 ; -static const uint8_t EXPLR_SRQ_SRQFIRQ_WAT_ERROR = 3 ; -static const uint8_t EXPLR_SRQ_SRQFIRQ_RCD_PARITY_ERROR = 4 ; -static const uint8_t EXPLR_SRQ_SRQFIRQ_NCF_MCB_LOGIC_ERROR = 5 ; -static const uint8_t EXPLR_SRQ_SRQFIRQ_EMERGENCY_THROTTLE = 6 ; -static const uint8_t EXPLR_SRQ_SRQFIRQ_NCF_MCB_PARITY_ERROR = 7 ; -static const uint8_t EXPLR_SRQ_SRQFIRQ_DDR_MBA_EVENT_N = 8 ; -static const uint8_t EXPLR_SRQ_SRQFIRQ_WRQ_RRQ_HANG_ERR = 9 ; -static const uint8_t EXPLR_SRQ_SRQFIRQ_SM_1HOT_ERR = 10 ; -static const uint8_t EXPLR_SRQ_SRQFIRQ_REG_PARITY_ERROR = 11 ; -static const uint8_t EXPLR_SRQ_SRQFIRQ_CMD_PARITY_ERROR = 12 ; -static const uint8_t EXPLR_SRQ_SRQFIRQ_PORT_FAIL = 13 ; -static const uint8_t EXPLR_SRQ_SRQFIRQ_INFO_REG_PARITY_ERROR = 14 ; -static const uint8_t EXPLR_SRQ_SRQFIRQ_DEBUG_PARITY_ERROR = 15 ; -static const uint8_t EXPLR_SRQ_SRQFIRQ_WDF_ERROR0 = 16 ; -static const uint8_t EXPLR_SRQ_SRQFIRQ_WDF_ERROR1 = 17 ; -static const uint8_t EXPLR_SRQ_SRQFIRQ_WDF_ERROR2 = 18 ; -static const uint8_t EXPLR_SRQ_SRQFIRQ_WDF_ERROR3 = 19 ; -static const uint8_t EXPLR_SRQ_SRQFIRQ_WDF_ERROR4 = 20 ; -static const uint8_t EXPLR_SRQ_SRQFIRQ_WDF_ERROR5 = 21 ; -static const uint8_t EXPLR_SRQ_SRQFIRQ_WDF_ERROR6 = 22 ; -static const uint8_t EXPLR_SRQ_SRQFIRQ_WDF_ERROR7 = 23 ; -static const uint8_t EXPLR_SRQ_SRQFIRQ_NCF_UE = 24 ; -static const uint8_t EXPLR_SRQ_SRQFIRQ_TBD_FREE = 25 ; -static const uint8_t EXPLR_SRQ_SRQFIRQ_NCF_LOGIC_ERROR = 26 ; -static const uint8_t EXPLR_SRQ_SRQFIRQ_NCF_PARITY_ERROR = 27 ; -static const uint8_t EXPLR_SRQ_SRQFIRQ_NCF_CORR_ERROR = 28 ; -static const uint8_t EXPLR_SRQ_SRQFIRQ_INTERNAL_SCOM_ERROR = 29 ; -static const uint8_t EXPLR_SRQ_SRQFIRQ_INTERNAL_SCOM_ERROR_COPY = 30 ; - -static const uint8_t EXPLR_SRQ_SRQFIRWOF_FIR_WOF = 0 ; -static const uint8_t EXPLR_SRQ_SRQFIRWOF_FIR_WOF_LEN = 31 ; - -static const uint8_t EXPLR_SRQ_SRQFIR_ACTION0_FIR = 0 ; -static const uint8_t EXPLR_SRQ_SRQFIR_ACTION0_FIR_LEN = 31 ; - -static const uint8_t EXPLR_SRQ_SRQFIR_ACTION1_FIR = 0 ; -static const uint8_t EXPLR_SRQ_SRQFIR_ACTION1_FIR_LEN = 31 ; - -static const uint8_t EXPLR_SRQ_SRQFIR_MASK_MBA = 0 ; -static const uint8_t EXPLR_SRQ_SRQFIR_MASK_MBA_LEN = 31 ; - -static const uint8_t EXPLR_SRQ_SRQTRAP0_DEBUG_BUS = 0 ; -static const uint8_t EXPLR_SRQ_SRQTRAP0_DEBUG_BUS_LEN = 64 ; - -static const uint8_t EXPLR_SRQ_SRQTRAP1_DEBUG_BUS = 0 ; -static const uint8_t EXPLR_SRQ_SRQTRAP1_DEBUG_BUS_LEN = 24 ; -static const uint8_t EXPLR_SRQ_SRQTRAP1_NCF_SYNDROME = 24 ; -static const uint8_t EXPLR_SRQ_SRQTRAP1_NCF_SYNDROME_LEN = 8 ; -static const uint8_t EXPLR_SRQ_SRQTRAP1_REFBLK_SYNDROME = 32 ; -static const uint8_t EXPLR_SRQ_SRQTRAP1_REFBLK_SYNDROME_LEN = 8 ; -static const uint8_t EXPLR_SRQ_SRQTRAP1_NCF_INVALID_CMD_CODE = 40 ; -static const uint8_t EXPLR_SRQ_SRQTRAP1_NCF_INVALID_CMD_CODE_LEN = 4 ; -static const uint8_t EXPLR_SRQ_SRQTRAP1_REFBLK_INVALID_CMD_CODE = 44 ; -static const uint8_t EXPLR_SRQ_SRQTRAP1_REFBLK_INVALID_CMD_CODE_LEN = 4 ; -static const uint8_t EXPLR_SRQ_SRQTRAP1_MCB_CREDITS = 48 ; -static const uint8_t EXPLR_SRQ_SRQTRAP1_MCB_CREDITS_LEN = 4 ; -static const uint8_t EXPLR_SRQ_SRQTRAP1_NCF_FSM_ENCODE = 52 ; -static const uint8_t EXPLR_SRQ_SRQTRAP1_NCF_FSM_ENCODE_LEN = 4 ; -static const uint8_t EXPLR_SRQ_SRQTRAP1_REFBLK_FSM_ENCODE = 56 ; -static const uint8_t EXPLR_SRQ_SRQTRAP1_REFBLK_FSM_ENCODE_LEN = 3 ; -static const uint8_t EXPLR_SRQ_SRQTRAP1_MCB_STATUS = 59 ; -static const uint8_t EXPLR_SRQ_SRQTRAP1_MCB_STATUS_LEN = 2 ; -static const uint8_t EXPLR_SRQ_SRQTRAP1_TBD = 61 ; -static const uint8_t EXPLR_SRQ_SRQTRAP1_TBD_LEN = 3 ; - -static const uint8_t EXPLR_TLXT_ERR_HOLD_LAT_FIR_MASK_PAR = 0 ; -static const uint8_t EXPLR_TLXT_ERR_HOLD_LAT_FIR_ACTION0_PAR = 1 ; -static const uint8_t EXPLR_TLXT_ERR_HOLD_LAT_FIR_ACTION1_PAR = 2 ; - -static const uint8_t EXPLR_TLXT_ERR_MASK_LAT_FIR_PAR = 0 ; -static const uint8_t EXPLR_TLXT_ERR_MASK_LAT_FIR_ACTION0_PAR = 1 ; -static const uint8_t EXPLR_TLXT_ERR_MASK_LAT_FIR_ACTION1_PAR = 2 ; - -static const uint8_t EXPLR_TLXT_TLXCFG0_TRAP_CLEAR = 0 ; -static const uint8_t EXPLR_TLXT_TLXCFG0_EARLY_WDONE_DISABLE = 1 ; -static const uint8_t EXPLR_TLXT_TLXCFG0_EARLY_WDONE_DISABLE_LEN = 2 ; -static const uint8_t EXPLR_TLXT_TLXCFG0_TRAP_UPDATE = 3 ; -static const uint8_t EXPLR_TLXT_TLXCFG0_HOLD_ACUM = 4 ; -static const uint8_t EXPLR_TLXT_TLXCFG0_TBD = 5 ; -static const uint8_t EXPLR_TLXT_TLXCFG0_TBD_LEN = 5 ; -static const uint8_t EXPLR_TLXT_TLXCFG0_DCP1_RETURN_PAUSE = 10 ; -static const uint8_t EXPLR_TLXT_TLXCFG0_DCP1_CREDIT_UPDATE = 11 ; -static const uint8_t EXPLR_TLXT_TLXCFG0_VC0_RETURN_PAUSE = 12 ; -static const uint8_t EXPLR_TLXT_TLXCFG0_VC0_CREDIT_UPDATE = 13 ; -static const uint8_t EXPLR_TLXT_TLXCFG0_VC1_RETURN_PAUSE = 14 ; -static const uint8_t EXPLR_TLXT_TLXCFG0_VC1_CREDIT_UPDATE = 15 ; -static const uint8_t EXPLR_TLXT_TLXCFG0_DCP1_INIT = 16 ; -static const uint8_t EXPLR_TLXT_TLXCFG0_DCP1_INIT_LEN = 16 ; -static const uint8_t EXPLR_TLXT_TLXCFG0_VC0_INIT = 32 ; -static const uint8_t EXPLR_TLXT_TLXCFG0_VC0_INIT_LEN = 16 ; -static const uint8_t EXPLR_TLXT_TLXCFG0_VC1_INIT = 48 ; -static const uint8_t EXPLR_TLXT_TLXCFG0_VC1_INIT_LEN = 16 ; - -static const uint8_t EXPLR_TLXT_TLXCFG1_SLOW_CLOCK = 0 ; -static const uint8_t EXPLR_TLXT_TLXCFG1_SHUTDOWN_MODE = 1 ; -static const uint8_t EXPLR_TLXT_TLXCFG1_SHUTDOWN_MODE_LEN = 2 ; -static const uint8_t EXPLR_TLXT_TLXCFG1_SHUTDOWN_ON_OPT_ERR = 3 ; -static const uint8_t EXPLR_TLXT_TLXCFG1_SHUTDOWN_ON_MMIO_BAD = 4 ; -static const uint8_t EXPLR_TLXT_TLXCFG1_SHUTDOWN_ON_DFLOW_ERR = 5 ; -static const uint8_t EXPLR_TLXT_TLXCFG1_SHUTDOWN_ON_BAR0_BAD = 6 ; -static const uint8_t EXPLR_TLXT_TLXCFG1_RESERVED = 7 ; -static const uint8_t EXPLR_TLXT_TLXCFG1_TLXR_DEBSEL_LO = 8 ; -static const uint8_t EXPLR_TLXT_TLXCFG1_TLXR_DEBSEL_LO_LEN = 4 ; -static const uint8_t EXPLR_TLXT_TLXCFG1_TLXR_DEBSEL_HI = 12 ; -static const uint8_t EXPLR_TLXT_TLXCFG1_TLXR_DEBSEL_HI_LEN = 4 ; -static const uint8_t EXPLR_TLXT_TLXCFG1_TLXT_DBG_DIAL = 16 ; -static const uint8_t EXPLR_TLXT_TLXCFG1_TLXT_DBG_DIAL_LEN = 16 ; -static const uint8_t EXPLR_TLXT_TLXCFG1_HI_BW_THRESHOLD = 32 ; -static const uint8_t EXPLR_TLXT_TLXCFG1_HI_BW_THRESHOLD_LEN = 3 ; -static const uint8_t EXPLR_TLXT_TLXCFG1_MID_BW_THRESHOLD = 35 ; -static const uint8_t EXPLR_TLXT_TLXCFG1_MID_BW_THRESHOLD_LEN = 3 ; -static const uint8_t EXPLR_TLXT_TLXCFG1_HI_BW_DIS = 38 ; -static const uint8_t EXPLR_TLXT_TLXCFG1_MID_BW_ENAB = 39 ; -static const uint8_t EXPLR_TLXT_TLXCFG1_HI_BW_ENAB_RD_THRESH = 40 ; -static const uint8_t EXPLR_TLXT_TLXCFG1_LOW_LAT_RD_DIS = 41 ; -static const uint8_t EXPLR_TLXT_TLXCFG1_CLK_GATE_DIS = 42 ; -static const uint8_t EXPLR_TLXT_TLXCFG1_CFEI_ENAB = 43 ; -static const uint8_t EXPLR_TLXT_TLXCFG1_CFEI_PERSIST = 44 ; -static const uint8_t EXPLR_TLXT_TLXCFG1_CFEI_BIT0 = 45 ; -static const uint8_t EXPLR_TLXT_TLXCFG1_CFEI_BIT1 = 46 ; -static const uint8_t EXPLR_TLXT_TLXCFG1_TBD = 47 ; -static const uint8_t EXPLR_TLXT_TLXCFG1_TLXT_INTRP_CMDFLAG_0 = 48 ; -static const uint8_t EXPLR_TLXT_TLXCFG1_TLXT_INTRP_CMDFLAG_0_LEN = 4 ; -static const uint8_t EXPLR_TLXT_TLXCFG1_TLXT_INTRP_CMDFLAG_1 = 52 ; -static const uint8_t EXPLR_TLXT_TLXCFG1_TLXT_INTRP_CMDFLAG_1_LEN = 4 ; -static const uint8_t EXPLR_TLXT_TLXCFG1_TLXT_INTRP_CMDFLAG_2 = 56 ; -static const uint8_t EXPLR_TLXT_TLXCFG1_TLXT_INTRP_CMDFLAG_2_LEN = 4 ; -static const uint8_t EXPLR_TLXT_TLXCFG1_TLXT_INTRP_CMDFLAG_3 = 60 ; -static const uint8_t EXPLR_TLXT_TLXCFG1_TLXT_INTRP_CMDFLAG_3_LEN = 4 ; - -static const uint8_t EXPLR_TLXT_TLXCFG2_TLXC_WAT_EN_REG = 0 ; -static const uint8_t EXPLR_TLXT_TLXCFG2_TLXC_WAT_EN_REG_LEN = 24 ; -static const uint8_t EXPLR_TLXT_TLXCFG2_TBD = 24 ; -static const uint8_t EXPLR_TLXT_TLXCFG2_TBD_LEN = 40 ; - -static const uint8_t EXPLR_TLXT_TLXFIRACT0_FIR_ACTION0 = 0 ; -static const uint8_t EXPLR_TLXT_TLXFIRACT0_FIR_ACTION0_LEN = 30 ; - -static const uint8_t EXPLR_TLXT_TLXFIRACT1_FIR_ACTION1 = 0 ; -static const uint8_t EXPLR_TLXT_TLXFIRACT1_FIR_ACTION1_LEN = 30 ; - -static const uint8_t EXPLR_TLXT_TLXFIRMASK_FIR_MASK = 0 ; -static const uint8_t EXPLR_TLXT_TLXFIRMASK_FIR_MASK_LEN = 30 ; - -static const uint8_t EXPLR_TLXT_TLXFIRQ_INFO_REG_PARITY_ERROR = 0 ; -static const uint8_t EXPLR_TLXT_TLXFIRQ_CTRL_REG_PARITY_ERROR = 1 ; -static const uint8_t EXPLR_TLXT_TLXFIRQ_TLX_VC0_MAX_CRD_ERROR = 2 ; -static const uint8_t EXPLR_TLXT_TLXFIRQ_TLX_VC1_MAX_CRD_ERROR = 3 ; -static const uint8_t EXPLR_TLXT_TLXFIRQ_TLX_DCP0_MAX_CRD_ERROR = 4 ; -static const uint8_t EXPLR_TLXT_TLXFIRQ_TLX_DCP1_MAX_CRD_ERROR = 5 ; -static const uint8_t EXPLR_TLXT_TLXFIRQ_CREDIT_MGMT_ERROR = 6 ; -static const uint8_t EXPLR_TLXT_TLXFIRQ_CREDIT_MGMT_PERROR = 7 ; -static const uint8_t EXPLR_TLXT_TLXFIRQ_TLXT_PARITY_ERROR = 8 ; -static const uint8_t EXPLR_TLXT_TLXFIRQ_TLXT_RECOVERABLE_ERROR = 9 ; -static const uint8_t EXPLR_TLXT_TLXFIRQ_TLXT_CONFIG_ERROR = 10 ; -static const uint8_t EXPLR_TLXT_TLXFIRQ_TLXT_INFORMATIONAL_PERROR = 11 ; -static const uint8_t EXPLR_TLXT_TLXFIRQ_TLXT_HARD_ERROR = 12 ; -static const uint8_t EXPLR_TLXT_TLXFIRQ_RESERVED_10 = 13 ; -static const uint8_t EXPLR_TLXT_TLXFIRQ_RESERVED_10_LEN = 3 ; -static const uint8_t EXPLR_TLXT_TLXFIRQ_TLXR_SHUTDOWN = 16 ; -static const uint8_t EXPLR_TLXT_TLXFIRQ_TLXR_BAR0_OR_MMIO_NF = 17 ; -static const uint8_t EXPLR_TLXT_TLXFIRQ_TLXR_OC_MALFORMED = 18 ; -static const uint8_t EXPLR_TLXT_TLXFIRQ_TLXR_OC_PROTOCOL_ERROR = 19 ; -static const uint8_t EXPLR_TLXT_TLXFIRQ_TLXR_ADDR_XLAT = 20 ; -static const uint8_t EXPLR_TLXT_TLXFIRQ_TLXR_METADATA_UNC_DPERR = 21 ; -static const uint8_t EXPLR_TLXT_TLXFIRQ_TLXR_OC_UNSUPPORTED = 22 ; -static const uint8_t EXPLR_TLXT_TLXFIRQ_TLXR_OC_FATAL = 23 ; -static const uint8_t EXPLR_TLXT_TLXFIRQ_TLXR_CONTROL_ERROR = 24 ; -static const uint8_t EXPLR_TLXT_TLXFIRQ_TLXR_INTERNAL_ERROR = 25 ; -static const uint8_t EXPLR_TLXT_TLXFIRQ_TLXR_INFORMATIONAL = 26 ; -static const uint8_t EXPLR_TLXT_TLXFIRQ_TLXR_TRACE_STOP = 27 ; -static const uint8_t EXPLR_TLXT_TLXFIRQ_INTERNAL_SCOM_ERROR = 28 ; -static const uint8_t EXPLR_TLXT_TLXFIRQ_INTERNAL_SCOM_ERROR_CLONE = 29 ; - -static const uint8_t EXPLR_TLXT_TLXFIRWOF_FIR_WOF = 0 ; -static const uint8_t EXPLR_TLXT_TLXFIRWOF_FIR_WOF_LEN = 30 ; - -static const uint8_t EXPLR_TLXT_TLXTINTHLD0_TLXT_INTHLD_0_REG = 0 ; -static const uint8_t EXPLR_TLXT_TLXTINTHLD0_TLXT_INTHLD_0_REG_LEN = 64 ; - -static const uint8_t EXPLR_TLXT_TLXTINTHLD1_TLXT_INTHLD_1_REG = 0 ; -static const uint8_t EXPLR_TLXT_TLXTINTHLD1_TLXT_INTHLD_1_REG_LEN = 64 ; - -static const uint8_t EXPLR_TLXT_TLXTINTHLD2_TLXT_INTHLD_2_REG = 0 ; -static const uint8_t EXPLR_TLXT_TLXTINTHLD2_TLXT_INTHLD_2_REG_LEN = 64 ; - -static const uint8_t EXPLR_TLXT_TLXTINTHLD3_TLXT_INTHLD_3_REG = 0 ; -static const uint8_t EXPLR_TLXT_TLXTINTHLD3_TLXT_INTHLD_3_REG_LEN = 64 ; - -static const uint8_t EXPLR_TLXT_TLXTRAP0_DEBUG_BUS = 0 ; -static const uint8_t EXPLR_TLXT_TLXTRAP0_DEBUG_BUS_LEN = 64 ; - -static const uint8_t EXPLR_TLXT_TLXTRAP1_DEBUG_BUS = 0 ; -static const uint8_t EXPLR_TLXT_TLXTRAP1_DEBUG_BUS_LEN = 64 ; - -static const uint8_t EXPLR_TLXT_TLXTTRAP2_DEBUG_BUS = 0 ; -static const uint8_t EXPLR_TLXT_TLXTTRAP2_DEBUG_BUS_LEN = 64 ; - -static const uint8_t EXPLR_TLXT_TLXTTRAP3_DEBUG_BUS = 0 ; -static const uint8_t EXPLR_TLXT_TLXTTRAP3_DEBUG_BUS_LEN = 64 ; - -static const uint8_t EXPLR_TLXT_TLXTTRAP4_DEBUG_BUS = 0 ; -static const uint8_t EXPLR_TLXT_TLXTTRAP4_DEBUG_BUS_LEN = 64 ; - -static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_TLXR_UNUSED = 0 ; -static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_TLXR_UNUSED_LEN = 5 ; -static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_SPARE_7 = 5 ; -static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_TLXR_SHUTDOWN = 6 ; -static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_MMIO_BAD_WR_RESP_NF = 7 ; -static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_BAR0_PERR_NF = 8 ; -static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_BAD_TEMPLATE_OPCODE_COMBO = 9 ; -static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_SPARE_6 = 10 ; -static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_BAD_CREDIT_RETURN_SLOT = 11 ; -static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_BAD_TEMPLATE_0_FORMAT = 12 ; -static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_RESERVED_FIELD_VALUE = 13 ; -static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_DATA_SEQ_ERR = 14 ; -static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_RD_BDY_ERR = 15 ; -static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_WR_BDY_ERR = 16 ; -static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_SPARE_5 = 17 ; -static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_BAD_INTRP_RESP_TAG = 18 ; -static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_BAD_MEMCTL = 19 ; -static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_SPARE_4 = 20 ; -static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_SPARE_3 = 21 ; -static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_SPARE_2 = 22 ; -static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_ADDRESS_DROPPED = 23 ; -static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_ADDR_XLAT_ERROR_RD = 24 ; -static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_ADDR_XLAT_ERROR_WR = 25 ; -static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_PATTERN_CORRUPT = 26 ; -static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_DATAFLOW_PERR_NF = 27 ; -static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_METADATA_UNC = 28 ; -static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_UNSUPPORTED_PR_RD_DDR = 29 ; -static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_UNSUPPORTED_RD_MEM = 30 ; -static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_UNSUPPORTED_WRITE = 31 ; -static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_UNSUPPORTED_PR_LENGTH = 32 ; -static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_UNSUPPORTED_PAD_MEM = 33 ; -static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_PAD_MEM_LEN_ERR = 34 ; -static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_UNSUPPORTED_WRITE_LENGTH = 35 ; -static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_UNSUPPORTED_READ_LENGTH = 36 ; -static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_UNSUPPORTED_OPCODE = 37 ; -static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_UNSUPPORTED_TEMPLATE = 38 ; -static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_UNSUPPORTED_DATA_CARRIER = 39 ; -static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_BUFF_CNTL_PERR = 40 ; -static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_D_LIST_UNC = 41 ; -static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_TAGSTORE_UNC = 42 ; -static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_B_MGMT_3 = 43 ; -static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_SPARE_1 = 44 ; -static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_FLIT_PERR = 45 ; -static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_MMIO_WD_PERR = 46 ; -static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_MMIO_WD_INV = 47 ; -static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_SRQ_WD_PERR = 48 ; -static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_SRQ_WD_INV = 49 ; -static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_D_LIST_UNDERFLOW = 50 ; -static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_DATAFLOW_PERR_F = 51 ; -static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_D_LIST_OVERFLOW = 52 ; -static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_MMIO_BAD_WR_RESP_F = 53 ; -static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_BAR0_PERR_F = 54 ; -static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_B_MGMT_1 = 55 ; -static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_B_MGMT_2 = 56 ; -static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_ADDR_XLATE_HOLE = 57 ; -static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_BAD_DATA_RXD = 58 ; -static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_METADATA_CORR = 59 ; -static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_TAG_BUFFER_CORR = 60 ; -static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_D_LIST_CORR = 61 ; -static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_EPOW_SIGNALLED = 62 ; -static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_TRACE_STOP = 63 ; - -static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_MASK_ERRMASK = 0 ; -static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_MASK_ERRMASK_LEN = 64 ; - -static const uint8_t EXPLR_TLXT_TLX_ERR1_REPORTQ_TLXT_PERRORS = 0 ; -static const uint8_t EXPLR_TLXT_TLX_ERR1_REPORTQ_TLXT_PERRORS_LEN = 37 ; -static const uint8_t EXPLR_TLXT_TLX_ERR1_REPORTQ_TLXT_ERRORS = 37 ; -static const uint8_t EXPLR_TLXT_TLX_ERR1_REPORTQ_TLXT_ERRORS_LEN = 27 ; - -static const uint8_t EXPLR_TLXT_TLX_ERR1_REPORTQ_MASK_ERRMASK = 0 ; -static const uint8_t EXPLR_TLXT_TLX_ERR1_REPORTQ_MASK_ERRMASK_LEN = 64 ; - -static const uint8_t EXPLR_TLXT_TLX_ERR2_REPORTQ_TLXC_PERRORS = 0 ; -static const uint8_t EXPLR_TLXT_TLX_ERR2_REPORTQ_TLXC_PERRORS_LEN = 8 ; -static const uint8_t EXPLR_TLXT_TLX_ERR2_REPORTQ_TLXC_ERRORS = 8 ; -static const uint8_t EXPLR_TLXT_TLX_ERR2_REPORTQ_TLXC_ERRORS_LEN = 6 ; -static const uint8_t EXPLR_TLXT_TLX_ERR2_REPORTQ_INTHLD_PERROR = 14 ; -static const uint8_t EXPLR_TLXT_TLX_ERR2_REPORTQ_INTHLD_PERROR_LEN = 4 ; -static const uint8_t EXPLR_TLXT_TLX_ERR2_REPORTQ_TLXC_SPARE = 18 ; -static const uint8_t EXPLR_TLXT_TLX_ERR2_REPORTQ_TLXC_SPARE_LEN = 14 ; - -static const uint8_t EXPLR_TLXT_TLX_ERR2_REPORTQ_MASK_ERRMASK = 0 ; -static const uint8_t EXPLR_TLXT_TLX_ERR2_REPORTQ_MASK_ERRMASK_LEN = 32 ; +static const uint8_t EXPLR_SRQ_MBAREF0Q_CFG_PER_BANK_REFRESH = 3 ; +static const uint8_t EXPLR_SRQ_MBAREF0Q_RESERVED_4 = 4 ; +static const uint8_t EXPLR_SRQ_MBAREF0Q_CFG_REFRESH_PRIORITY_THRESHOLD = 5 ; +static const uint8_t EXPLR_SRQ_MBAREF0Q_CFG_REFRESH_PRIORITY_THRESHOLD_LEN = 3 ; +static const uint8_t EXPLR_SRQ_MBAREF0Q_CFG_REFRESH_INTERVAL = 8 ; +static const uint8_t EXPLR_SRQ_MBAREF0Q_CFG_REFRESH_INTERVAL_LEN = 11 ; +static const uint8_t EXPLR_SRQ_MBAREF0Q_CFG_REFRESH_RESET_INTERVAL = 19 ; +static const uint8_t EXPLR_SRQ_MBAREF0Q_CFG_REFRESH_RESET_INTERVAL_LEN = 11 ; +static const uint8_t EXPLR_SRQ_MBAREF0Q_CFG_TRFC = 30 ; +static const uint8_t EXPLR_SRQ_MBAREF0Q_CFG_TRFC_LEN = 10 ; +static const uint8_t EXPLR_SRQ_MBAREF0Q_CFG_REFR_TSV_STACK = 40 ; +static const uint8_t EXPLR_SRQ_MBAREF0Q_CFG_REFR_TSV_STACK_LEN = 10 ; +static const uint8_t EXPLR_SRQ_MBAREF0Q_CFG_REFR_CHECK_INTERVAL = 50 ; +static const uint8_t EXPLR_SRQ_MBAREF0Q_CFG_REFR_CHECK_INTERVAL_LEN = 11 ; +static const uint8_t EXPLR_SRQ_MBAREF0Q_CFG_TRFC_STACK_GATE_ALL_REF = 61 ; +static const uint8_t EXPLR_SRQ_MBAREF0Q_RESERVED_62_63 = 62 ; +static const uint8_t EXPLR_SRQ_MBAREF0Q_RESERVED_62_63_LEN = 2 ; + +static const uint8_t EXPLR_SRQ_MBAREFAQ_CFG_STATIC_IDLE_DLY = 0 ; +static const uint8_t EXPLR_SRQ_MBAREFAQ_CFG_STATIC_IDLE_DLY_LEN = 4 ; +static const uint8_t EXPLR_SRQ_MBAREFAQ_CFG_LP_SUB_CNT = 4 ; +static const uint8_t EXPLR_SRQ_MBAREFAQ_CFG_LP_SUB_CNT_LEN = 2 ; +static const uint8_t EXPLR_SRQ_MBAREFAQ_CFG_REFRESH_HP_RANK_BLOCK_ENABLE = 6 ; +static const uint8_t EXPLR_SRQ_MBAREFAQ_CFG_HP_WR_GATE_LP_REF_DIS = 7 ; +static const uint8_t EXPLR_SRQ_MBAREFAQ_RESERVED_8_9 = 8 ; +static const uint8_t EXPLR_SRQ_MBAREFAQ_RESERVED_8_9_LEN = 2 ; +static const uint8_t EXPLR_SRQ_MBAREFAQ_CFG_REF_BLOCK_STOP_DLY = 10 ; +static const uint8_t EXPLR_SRQ_MBAREFAQ_CFG_REF_BLOCK_STOP_DLY_LEN = 6 ; +static const uint8_t EXPLR_SRQ_MBAREFAQ_CFG_TSTAB = 16 ; +static const uint8_t EXPLR_SRQ_MBAREFAQ_CFG_TSTAB_LEN = 13 ; +static const uint8_t EXPLR_SRQ_MBAREFAQ_RESERVED_29_31 = 29 ; +static const uint8_t EXPLR_SRQ_MBAREFAQ_RESERVED_29_31_LEN = 3 ; + +static const uint8_t EXPLR_SRQ_MBARPC0Q_CFG_LP_CTRL_ENABLE = 0 ; +static const uint8_t EXPLR_SRQ_MBARPC0Q_CFG_LP_DATA_ENABLE = 1 ; +static const uint8_t EXPLR_SRQ_MBARPC0Q_CFG_MIN_MAX_DOMAINS_ENABLE = 2 ; +static const uint8_t EXPLR_SRQ_MBARPC0Q_CFG_MIN_MAX_DOMAINS = 3 ; +static const uint8_t EXPLR_SRQ_MBARPC0Q_CFG_MIN_MAX_DOMAINS_LEN = 3 ; +static const uint8_t EXPLR_SRQ_MBARPC0Q_CFG_PUP_AVAIL = 6 ; +static const uint8_t EXPLR_SRQ_MBARPC0Q_CFG_PUP_AVAIL_LEN = 5 ; +static const uint8_t EXPLR_SRQ_MBARPC0Q_CFG_PDN_PUP = 11 ; +static const uint8_t EXPLR_SRQ_MBARPC0Q_CFG_PDN_PUP_LEN = 5 ; +static const uint8_t EXPLR_SRQ_MBARPC0Q_CFG_PUP_PDN = 16 ; +static const uint8_t EXPLR_SRQ_MBARPC0Q_CFG_PUP_PDN_LEN = 5 ; +static const uint8_t EXPLR_SRQ_MBARPC0Q_CFG_QUAD_RANK_ENC = 21 ; +static const uint8_t EXPLR_SRQ_MBARPC0Q_CFG_MIN_DOMAIN_REDUCTION_ENABLE = 22 ; +static const uint8_t EXPLR_SRQ_MBARPC0Q_CFG_MIN_DOMAIN_REDUCTION_TIME = 23 ; +static const uint8_t EXPLR_SRQ_MBARPC0Q_CFG_MIN_DOMAIN_REDUCTION_TIME_LEN = 10 ; +static const uint8_t EXPLR_SRQ_MBARPC0Q_CFG_PUP_AFTER_ACTIVATE_WAIT_ENABLE = 33 ; +static const uint8_t EXPLR_SRQ_MBARPC0Q_CFG_PUP_AFTER_ACTIVATE_WAIT_TIME = 34 ; +static const uint8_t EXPLR_SRQ_MBARPC0Q_CFG_PUP_AFTER_ACTIVATE_WAIT_TIME_LEN = 8 ; +static const uint8_t EXPLR_SRQ_MBARPC0Q_CFG_CONC_LP_DATA_DISABLE = 42 ; +static const uint8_t EXPLR_SRQ_MBARPC0Q_CFG_MIN_DOMAIN_REDUCTION_CNT_REFR_INT = 43 ; +static const uint8_t EXPLR_SRQ_MBARPC0Q_CFG_EMER_MIN_MAX_DOMAIN = 44 ; +static const uint8_t EXPLR_SRQ_MBARPC0Q_CFG_EMER_MIN_MAX_DOMAIN_LEN = 3 ; +static const uint8_t EXPLR_SRQ_MBARPC0Q_CFG_PUP_ALL_WRITES_PENDING = 47 ; +static const uint8_t EXPLR_SRQ_MBARPC0Q_CFG_ALWAYS_WAIT_ACT_TIME = 48 ; +static const uint8_t EXPLR_SRQ_MBARPC0Q_CFG_TLP_RESP = 49 ; +static const uint8_t EXPLR_SRQ_MBARPC0Q_CFG_TLP_RESP_LEN = 5 ; +static const uint8_t EXPLR_SRQ_MBARPC0Q_CFG_TLP_WAKEUP = 54 ; +static const uint8_t EXPLR_SRQ_MBARPC0Q_CFG_TLP_WAKEUP_LEN = 5 ; +static const uint8_t EXPLR_SRQ_MBARPC0Q_CFG_CONC_CCS_STR_EN = 59 ; +static const uint8_t EXPLR_SRQ_MBARPC0Q_RESERVED_60_63 = 60 ; +static const uint8_t EXPLR_SRQ_MBARPC0Q_RESERVED_60_63_LEN = 4 ; + +static const uint8_t EXPLR_SRQ_MBASTR0Q_CFG_STR_ENABLE = 0 ; +static const uint8_t EXPLR_SRQ_MBASTR0Q_CFG_DIS_CLK_IN_STR = 1 ; +static const uint8_t EXPLR_SRQ_MBASTR0Q_CFG_ENTER_STR_TIME = 2 ; +static const uint8_t EXPLR_SRQ_MBASTR0Q_CFG_ENTER_STR_TIME_LEN = 10 ; +static const uint8_t EXPLR_SRQ_MBASTR0Q_CFG_TCKESR = 12 ; +static const uint8_t EXPLR_SRQ_MBASTR0Q_CFG_TCKESR_LEN = 5 ; +static const uint8_t EXPLR_SRQ_MBASTR0Q_CFG_TCKSRE = 17 ; +static const uint8_t EXPLR_SRQ_MBASTR0Q_CFG_TCKSRE_LEN = 5 ; +static const uint8_t EXPLR_SRQ_MBASTR0Q_CFG_TCKSRX = 22 ; +static const uint8_t EXPLR_SRQ_MBASTR0Q_CFG_TCKSRX_LEN = 5 ; +static const uint8_t EXPLR_SRQ_MBASTR0Q_CFG_TXSDLL = 27 ; +static const uint8_t EXPLR_SRQ_MBASTR0Q_CFG_TXSDLL_LEN = 11 ; +static const uint8_t EXPLR_SRQ_MBASTR0Q_CFG_TRFC_COUNTER_DIS = 38 ; +static const uint8_t EXPLR_SRQ_MBASTR0Q_CFG_TRFC_COUNTER_DIS_LEN = 8 ; +static const uint8_t EXPLR_SRQ_MBASTR0Q_CFG_SAFE_REFRESH_INTERVAL = 46 ; +static const uint8_t EXPLR_SRQ_MBASTR0Q_CFG_SAFE_REFRESH_INTERVAL_LEN = 11 ; +static const uint8_t EXPLR_SRQ_MBASTR0Q_CFG_OCC_DEADMAN_TIMER_SEL = 57 ; +static const uint8_t EXPLR_SRQ_MBASTR0Q_CFG_OCC_DEADMAN_TIMER_SEL_LEN = 4 ; +static const uint8_t EXPLR_SRQ_MBASTR0Q_CFG_OCC_DEADMAN_TB_SEL = 61 ; +static const uint8_t EXPLR_SRQ_MBASTR0Q_CFG_FORCE_STR = 62 ; +static const uint8_t EXPLR_SRQ_MBASTR0Q_CFG_EPOW_DISABLE = 63 ; + +static const uint8_t EXPLR_SRQ_MBA_DBG0Q_CFG_DBG_SRQ_ENABLE = 0 ; +static const uint8_t EXPLR_SRQ_MBA_DBG0Q_CFG_DBG_SRQ_SEL0 = 1 ; +static const uint8_t EXPLR_SRQ_MBA_DBG0Q_CFG_DBG_SRQ_SEL0_LEN = 3 ; +static const uint8_t EXPLR_SRQ_MBA_DBG0Q_CFG_DBG_SRQ_SEL1 = 4 ; +static const uint8_t EXPLR_SRQ_MBA_DBG0Q_CFG_DBG_SRQ_SEL1_LEN = 3 ; +static const uint8_t EXPLR_SRQ_MBA_DBG0Q_CFG_DBG_SRQ_SEL2 = 7 ; +static const uint8_t EXPLR_SRQ_MBA_DBG0Q_CFG_DBG_SRQ_SEL2_LEN = 3 ; +static const uint8_t EXPLR_SRQ_MBA_DBG0Q_CFG_DBG_SRQ_SEL3 = 10 ; +static const uint8_t EXPLR_SRQ_MBA_DBG0Q_CFG_DBG_SRQ_SEL3_LEN = 3 ; +static const uint8_t EXPLR_SRQ_MBA_DBG0Q_CFG_DBG_SRQ_SEL4 = 13 ; +static const uint8_t EXPLR_SRQ_MBA_DBG0Q_CFG_DBG_SRQ_SEL4_LEN = 3 ; +static const uint8_t EXPLR_SRQ_MBA_DBG0Q_CFG_DBG_SRQ_SEL5 = 16 ; +static const uint8_t EXPLR_SRQ_MBA_DBG0Q_CFG_DBG_SRQ_SEL5_LEN = 3 ; +static const uint8_t EXPLR_SRQ_MBA_DBG0Q_CFG_DBG_SRQ_SEL6 = 19 ; +static const uint8_t EXPLR_SRQ_MBA_DBG0Q_CFG_DBG_SRQ_SEL6_LEN = 3 ; +static const uint8_t EXPLR_SRQ_MBA_DBG0Q_CFG_DBG_SRQ_SEL7 = 22 ; +static const uint8_t EXPLR_SRQ_MBA_DBG0Q_CFG_DBG_SRQ_SEL7_LEN = 3 ; +static const uint8_t EXPLR_SRQ_MBA_DBG0Q_CFG_DBG_SRQ_SETUP0_FLIP = 25 ; +static const uint8_t EXPLR_SRQ_MBA_DBG0Q_CFG_DBG_SRQ_SETUP1_FLIP = 26 ; +static const uint8_t EXPLR_SRQ_MBA_DBG0Q_CFG_DBG_SRQ_SETUP2_FLIP = 27 ; +static const uint8_t EXPLR_SRQ_MBA_DBG0Q_CFG_DBG_SRQ_SETUP3_FLIP = 28 ; +static const uint8_t EXPLR_SRQ_MBA_DBG0Q_CFG_DBG_SRQ_SETUP4_FLIP = 29 ; +static const uint8_t EXPLR_SRQ_MBA_DBG0Q_CFG_DBG_SRQ_SETUP5_FLIP = 30 ; +static const uint8_t EXPLR_SRQ_MBA_DBG0Q_CFG_DBG_SRQ_SETUP6_FLIP = 31 ; +static const uint8_t EXPLR_SRQ_MBA_DBG0Q_CFG_DBG_SRQ_SETUP7_FLIP = 32 ; +static const uint8_t EXPLR_SRQ_MBA_DBG0Q_RESERVED_33_47 = 33 ; +static const uint8_t EXPLR_SRQ_MBA_DBG0Q_RESERVED_33_47_LEN = 15 ; +static const uint8_t EXPLR_SRQ_MBA_DBG0Q_CFG_WAT_FARB_RRQ_GT = 48 ; +static const uint8_t EXPLR_SRQ_MBA_DBG0Q_CFG_WAT_FARB_RRQ_GT_LEN = 4 ; +static const uint8_t EXPLR_SRQ_MBA_DBG0Q_CFG_WAT_FARB_WRQ_GT = 52 ; +static const uint8_t EXPLR_SRQ_MBA_DBG0Q_CFG_WAT_FARB_WRQ_GT_LEN = 4 ; +static const uint8_t EXPLR_SRQ_MBA_DBG0Q_CFG_WAT_FARB_REF_GT = 56 ; +static const uint8_t EXPLR_SRQ_MBA_DBG0Q_CFG_WAT_FARB_REF_GT_LEN = 4 ; +static const uint8_t EXPLR_SRQ_MBA_DBG0Q_RESERVED_60_63 = 60 ; +static const uint8_t EXPLR_SRQ_MBA_DBG0Q_RESERVED_60_63_LEN = 4 ; + +static const uint8_t EXPLR_SRQ_MBA_DBG1Q_CFG_WAT_FORCE_WR_ENTRY0_HP = 0 ; +static const uint8_t EXPLR_SRQ_MBA_DBG1Q_CFG_WAT_FORCE_WR_ENTRY0_HP_LEN = 4 ; +static const uint8_t EXPLR_SRQ_MBA_DBG1Q_CFG_WAT_FORCE_RD_ENTRY0_HP = 4 ; +static const uint8_t EXPLR_SRQ_MBA_DBG1Q_CFG_WAT_FORCE_RD_ENTRY0_HP_LEN = 4 ; +static const uint8_t EXPLR_SRQ_MBA_DBG1Q_CFG_WAT_FP_DIS = 8 ; +static const uint8_t EXPLR_SRQ_MBA_DBG1Q_CFG_WAT_FP_DIS_LEN = 4 ; +static const uint8_t EXPLR_SRQ_MBA_DBG1Q_CFG_WAT_DIS_RD_PG = 12 ; +static const uint8_t EXPLR_SRQ_MBA_DBG1Q_CFG_WAT_DIS_RD_PG_LEN = 4 ; +static const uint8_t EXPLR_SRQ_MBA_DBG1Q_CFG_WAT_DIS_WR_PG = 16 ; +static const uint8_t EXPLR_SRQ_MBA_DBG1Q_CFG_WAT_DIS_WR_PG_LEN = 4 ; +static const uint8_t EXPLR_SRQ_MBA_DBG1Q_CFG_WAT_PUP_ALL = 20 ; +static const uint8_t EXPLR_SRQ_MBA_DBG1Q_CFG_WAT_PUP_ALL_LEN = 4 ; +static const uint8_t EXPLR_SRQ_MBA_DBG1Q_CFG_WAT_EXIT_STR = 24 ; +static const uint8_t EXPLR_SRQ_MBA_DBG1Q_CFG_WAT_EXIT_STR_LEN = 4 ; +static const uint8_t EXPLR_SRQ_MBA_DBG1Q_CFG_WAT_REF_HP = 28 ; +static const uint8_t EXPLR_SRQ_MBA_DBG1Q_CFG_WAT_REF_HP_LEN = 4 ; +static const uint8_t EXPLR_SRQ_MBA_DBG1Q_CFG_WAT_REF_SYNC = 32 ; +static const uint8_t EXPLR_SRQ_MBA_DBG1Q_CFG_WAT_REF_SYNC_LEN = 4 ; +static const uint8_t EXPLR_SRQ_MBA_DBG1Q_CFG_WAT_REF_SAFE = 36 ; +static const uint8_t EXPLR_SRQ_MBA_DBG1Q_CFG_WAT_REF_SAFE_LEN = 4 ; +static const uint8_t EXPLR_SRQ_MBA_DBG1Q_RESERVED_40_43 = 40 ; +static const uint8_t EXPLR_SRQ_MBA_DBG1Q_RESERVED_40_43_LEN = 4 ; +static const uint8_t EXPLR_SRQ_MBA_DBG1Q_CFG_WAT_MCBIST_GT = 44 ; +static const uint8_t EXPLR_SRQ_MBA_DBG1Q_CFG_WAT_MCBIST_GT_LEN = 4 ; +static const uint8_t EXPLR_SRQ_MBA_DBG1Q_CFG_WAT_NCF_RM_INVALID_CMD = 48 ; +static const uint8_t EXPLR_SRQ_MBA_DBG1Q_CFG_WAT_NCF_RM_INVALID_CMD_LEN = 4 ; +static const uint8_t EXPLR_SRQ_MBA_DBG1Q_CFG_WAT_SET_FIR = 52 ; +static const uint8_t EXPLR_SRQ_MBA_DBG1Q_CFG_WAT_SET_FIR_LEN = 4 ; +static const uint8_t EXPLR_SRQ_MBA_DBG1Q_CFG_WAT_EMER_TH = 56 ; +static const uint8_t EXPLR_SRQ_MBA_DBG1Q_CFG_WAT_EMER_TH_LEN = 4 ; +static const uint8_t EXPLR_SRQ_MBA_DBG1Q_CFG_WAT_START_RECOVERY = 60 ; +static const uint8_t EXPLR_SRQ_MBA_DBG1Q_CFG_WAT_START_RECOVERY_LEN = 4 ; + +static const uint8_t EXPLR_SRQ_MBA_DSM0Q_CFG_RODT_START_DLY = 0 ; +static const uint8_t EXPLR_SRQ_MBA_DSM0Q_CFG_RODT_START_DLY_LEN = 6 ; +static const uint8_t EXPLR_SRQ_MBA_DSM0Q_CFG_RODT_END_DLY = 6 ; +static const uint8_t EXPLR_SRQ_MBA_DSM0Q_CFG_RODT_END_DLY_LEN = 6 ; +static const uint8_t EXPLR_SRQ_MBA_DSM0Q_CFG_WODT_START_DLY = 12 ; +static const uint8_t EXPLR_SRQ_MBA_DSM0Q_CFG_WODT_START_DLY_LEN = 6 ; +static const uint8_t EXPLR_SRQ_MBA_DSM0Q_CFG_WODT_END_DLY = 18 ; +static const uint8_t EXPLR_SRQ_MBA_DSM0Q_CFG_WODT_END_DLY_LEN = 6 ; +static const uint8_t EXPLR_SRQ_MBA_DSM0Q_CFG_WRDONE_DLY = 24 ; +static const uint8_t EXPLR_SRQ_MBA_DSM0Q_CFG_WRDONE_DLY_LEN = 6 ; +static const uint8_t EXPLR_SRQ_MBA_DSM0Q_CFG_WRDATA_DLY = 30 ; +static const uint8_t EXPLR_SRQ_MBA_DSM0Q_CFG_WRDATA_DLY_LEN = 6 ; +static const uint8_t EXPLR_SRQ_MBA_DSM0Q_CFG_RDTAG_DLY = 36 ; +static const uint8_t EXPLR_SRQ_MBA_DSM0Q_CFG_RDTAG_DLY_LEN = 6 ; +static const uint8_t EXPLR_SRQ_MBA_DSM0Q_CFG_RDCSLAT_DLY = 42 ; +static const uint8_t EXPLR_SRQ_MBA_DSM0Q_CFG_RDCSLAT_DLY_LEN = 5 ; +static const uint8_t EXPLR_SRQ_MBA_DSM0Q_CFG_RDDATA_EN_DLY = 47 ; +static const uint8_t EXPLR_SRQ_MBA_DSM0Q_CFG_RDDATA_EN_DLY_LEN = 5 ; +static const uint8_t EXPLR_SRQ_MBA_DSM0Q_CFG_WRCSLAT_DLY = 52 ; +static const uint8_t EXPLR_SRQ_MBA_DSM0Q_CFG_WRCSLAT_DLY_LEN = 5 ; +static const uint8_t EXPLR_SRQ_MBA_DSM0Q_CFG_WRDATA_EN_DLY = 57 ; +static const uint8_t EXPLR_SRQ_MBA_DSM0Q_CFG_WRDATA_EN_DLY_LEN = 5 ; +static const uint8_t EXPLR_SRQ_MBA_DSM0Q_CFG_RDTAG_DLY_MSB = 62 ; +static const uint8_t EXPLR_SRQ_MBA_DSM0Q_CFG_RDTAG_DLY_MSB_LEN = 2 ; + +static const uint8_t EXPLR_SRQ_MBA_ERR_REPORTQ_PC_PCFSM_1HOT = 0 ; +static const uint8_t EXPLR_SRQ_MBA_ERR_REPORTQ_STRFSM_1HOT = 1 ; +static const uint8_t EXPLR_SRQ_MBA_ERR_REPORTQ_FARB_RECVFSM_1HOT = 2 ; +static const uint8_t EXPLR_SRQ_MBA_ERR_REPORTQ_PC_PE = 3 ; +static const uint8_t EXPLR_SRQ_MBA_ERR_REPORTQ_RRQ_PE = 4 ; +static const uint8_t EXPLR_SRQ_MBA_ERR_REPORTQ_WRQ_PE = 5 ; +static const uint8_t EXPLR_SRQ_MBA_ERR_REPORTQ_DSM_PE = 6 ; +static const uint8_t EXPLR_SRQ_MBA_ERR_REPORTQ_TMR_PE = 7 ; +static const uint8_t EXPLR_SRQ_MBA_ERR_REPORTQ_FARB_PE = 8 ; +static const uint8_t EXPLR_SRQ_MBA_ERR_REPORTQ_WRQ_HANG = 9 ; +static const uint8_t EXPLR_SRQ_MBA_ERR_REPORTQ_RRQ_HANG = 10 ; +static const uint8_t EXPLR_SRQ_MBA_ERR_REPORTQ_FARB_CMD_PE_HOLD_OUT = 11 ; +static const uint8_t EXPLR_SRQ_MBA_ERR_REPORTQ_DSM_CMD_PE_HOLD_OUT = 12 ; +static const uint8_t EXPLR_SRQ_MBA_ERR_REPORTQ_NCF_UE = 13 ; +static const uint8_t EXPLR_SRQ_MBA_ERR_REPORTQ_NCF_UE_LEN = 2 ; +static const uint8_t EXPLR_SRQ_MBA_ERR_REPORTQ_NCF_TBD = 15 ; +static const uint8_t EXPLR_SRQ_MBA_ERR_REPORTQ_NCF_TBD_LEN = 2 ; +static const uint8_t EXPLR_SRQ_MBA_ERR_REPORTQ_NCF_MCB_LOGIC_ERROR = 17 ; +static const uint8_t EXPLR_SRQ_MBA_ERR_REPORTQ_NCF_MCB_LOGIC_ERROR_LEN = 5 ; +static const uint8_t EXPLR_SRQ_MBA_ERR_REPORTQ_NCF_LOGIC_ERROR = 22 ; +static const uint8_t EXPLR_SRQ_MBA_ERR_REPORTQ_NCF_LOGIC_ERROR_LEN = 15 ; +static const uint8_t EXPLR_SRQ_MBA_ERR_REPORTQ_NCF_MCB_PARITY_ERROR = 37 ; +static const uint8_t EXPLR_SRQ_MBA_ERR_REPORTQ_NCF_MCB_PARITY_ERROR_LEN = 5 ; +static const uint8_t EXPLR_SRQ_MBA_ERR_REPORTQ_NCF_PARITY_ERROR = 42 ; +static const uint8_t EXPLR_SRQ_MBA_ERR_REPORTQ_NCF_PARITY_ERROR_LEN = 11 ; +static const uint8_t EXPLR_SRQ_MBA_ERR_REPORTQ_NCF_CE = 53 ; +static const uint8_t EXPLR_SRQ_MBA_ERR_REPORTQ_NCF_CE_LEN = 4 ; + +static const uint8_t EXPLR_SRQ_MBA_ERR_REPORTQ_MASK_ERRMASK = 0 ; +static const uint8_t EXPLR_SRQ_MBA_ERR_REPORTQ_MASK_ERRMASK_LEN = 57 ; + +static const uint8_t EXPLR_SRQ_MBA_FARB0Q_CFG_CID2_AS_PAR_ENABLE = 0 ; +static const uint8_t EXPLR_SRQ_MBA_FARB0Q_CFG_QUAD_RANK_ENC_4DATA_CSN_ENABLE = 1 ; +static const uint8_t EXPLR_SRQ_MBA_FARB0Q_RESERVED_2_15 = 2 ; +static const uint8_t EXPLR_SRQ_MBA_FARB0Q_RESERVED_2_15_LEN = 14 ; +static const uint8_t EXPLR_SRQ_MBA_FARB0Q_CFG_INIT_START = 16 ; +static const uint8_t EXPLR_SRQ_MBA_FARB0Q_CFG_2N_ADDR = 17 ; +static const uint8_t EXPLR_SRQ_MBA_FARB0Q_CFG_DDP_ADDR_MODE = 18 ; +static const uint8_t EXPLR_SRQ_MBA_FARB0Q_CFG_PLANAR_ADDR_MODE = 19 ; +static const uint8_t EXPLR_SRQ_MBA_FARB0Q_CFG_ACT_SAME_RANK_HOLD_TIME = 20 ; +static const uint8_t EXPLR_SRQ_MBA_FARB0Q_CFG_ACT_SAME_RANK_HOLD_TIME_LEN = 4 ; +static const uint8_t EXPLR_SRQ_MBA_FARB0Q_CFG_MAX_READS_IN_A_ROW = 24 ; +static const uint8_t EXPLR_SRQ_MBA_FARB0Q_CFG_MAX_READS_IN_A_ROW_LEN = 7 ; +static const uint8_t EXPLR_SRQ_MBA_FARB0Q_CFG_MAX_WRITES_IN_A_ROW = 31 ; +static const uint8_t EXPLR_SRQ_MBA_FARB0Q_CFG_MAX_WRITES_IN_A_ROW_LEN = 7 ; +static const uint8_t EXPLR_SRQ_MBA_FARB0Q_CFG_PARITY_AFTER_CMD = 38 ; +static const uint8_t EXPLR_SRQ_MBA_FARB0Q_CFG_HYNIX_MDS_MODE = 39 ; +static const uint8_t EXPLR_SRQ_MBA_FARB0Q_CFG_INJECT_PARITY_ERR_ADDR5 = 40 ; +static const uint8_t EXPLR_SRQ_MBA_FARB0Q_CFG_BW_WINDOW_SIZE = 41 ; +static const uint8_t EXPLR_SRQ_MBA_FARB0Q_CFG_BW_WINDOW_SIZE_LEN = 2 ; +static const uint8_t EXPLR_SRQ_MBA_FARB0Q_RESERVED_43_47 = 43 ; +static const uint8_t EXPLR_SRQ_MBA_FARB0Q_RESERVED_43_47_LEN = 5 ; +static const uint8_t EXPLR_SRQ_MBA_FARB0Q_CFG_RCD_PROTECTION_TIME = 48 ; +static const uint8_t EXPLR_SRQ_MBA_FARB0Q_CFG_RCD_PROTECTION_TIME_LEN = 6 ; +static const uint8_t EXPLR_SRQ_MBA_FARB0Q_CFG_DISABLE_RCD_RECOVERY = 54 ; +static const uint8_t EXPLR_SRQ_MBA_FARB0Q_CFG_WAIT_FOR_INIT_COMPLETE = 55 ; +static const uint8_t EXPLR_SRQ_MBA_FARB0Q_CFG_FARB_CLOSE_ALL_PAGES = 56 ; +static const uint8_t EXPLR_SRQ_MBA_FARB0Q_CFG_PORT_FAIL_DISABLE = 57 ; +static const uint8_t EXPLR_SRQ_MBA_FARB0Q_CFG_DBG_HALF_DIMM = 58 ; +static const uint8_t EXPLR_SRQ_MBA_FARB0Q_CFG_INJECT_PARITY_ERR_CONSTANT = 59 ; +static const uint8_t EXPLR_SRQ_MBA_FARB0Q_CFG_FINISH_WR_BEFORE_RD = 60 ; +static const uint8_t EXPLR_SRQ_MBA_FARB0Q_CFG_OPT_RD_SIZE = 61 ; +static const uint8_t EXPLR_SRQ_MBA_FARB0Q_CFG_OPT_RD_SIZE_LEN = 3 ; + +static const uint8_t EXPLR_SRQ_MBA_FARB1Q_CFG_SLOT0_S0_CID = 0 ; +static const uint8_t EXPLR_SRQ_MBA_FARB1Q_CFG_SLOT0_S0_CID_LEN = 3 ; +static const uint8_t EXPLR_SRQ_MBA_FARB1Q_CFG_SLOT0_S1_CID = 3 ; +static const uint8_t EXPLR_SRQ_MBA_FARB1Q_CFG_SLOT0_S1_CID_LEN = 3 ; +static const uint8_t EXPLR_SRQ_MBA_FARB1Q_CFG_SLOT0_S2_CID = 6 ; +static const uint8_t EXPLR_SRQ_MBA_FARB1Q_CFG_SLOT0_S2_CID_LEN = 3 ; +static const uint8_t EXPLR_SRQ_MBA_FARB1Q_CFG_SLOT0_S3_CID = 9 ; +static const uint8_t EXPLR_SRQ_MBA_FARB1Q_CFG_SLOT0_S3_CID_LEN = 3 ; +static const uint8_t EXPLR_SRQ_MBA_FARB1Q_CFG_SLOT0_S4_CID = 12 ; +static const uint8_t EXPLR_SRQ_MBA_FARB1Q_CFG_SLOT0_S4_CID_LEN = 3 ; +static const uint8_t EXPLR_SRQ_MBA_FARB1Q_CFG_SLOT0_S5_CID = 15 ; +static const uint8_t EXPLR_SRQ_MBA_FARB1Q_CFG_SLOT0_S5_CID_LEN = 3 ; +static const uint8_t EXPLR_SRQ_MBA_FARB1Q_CFG_SLOT0_S6_CID = 18 ; +static const uint8_t EXPLR_SRQ_MBA_FARB1Q_CFG_SLOT0_S6_CID_LEN = 3 ; +static const uint8_t EXPLR_SRQ_MBA_FARB1Q_CFG_SLOT0_S7_CID = 21 ; +static const uint8_t EXPLR_SRQ_MBA_FARB1Q_CFG_SLOT0_S7_CID_LEN = 3 ; +static const uint8_t EXPLR_SRQ_MBA_FARB1Q_CFG_SLOT1_S0_CID = 24 ; +static const uint8_t EXPLR_SRQ_MBA_FARB1Q_CFG_SLOT1_S0_CID_LEN = 3 ; +static const uint8_t EXPLR_SRQ_MBA_FARB1Q_CFG_SLOT1_S1_CID = 27 ; +static const uint8_t EXPLR_SRQ_MBA_FARB1Q_CFG_SLOT1_S1_CID_LEN = 3 ; +static const uint8_t EXPLR_SRQ_MBA_FARB1Q_CFG_SLOT1_S2_CID = 30 ; +static const uint8_t EXPLR_SRQ_MBA_FARB1Q_CFG_SLOT1_S2_CID_LEN = 3 ; +static const uint8_t EXPLR_SRQ_MBA_FARB1Q_CFG_SLOT1_S3_CID = 33 ; +static const uint8_t EXPLR_SRQ_MBA_FARB1Q_CFG_SLOT1_S3_CID_LEN = 3 ; +static const uint8_t EXPLR_SRQ_MBA_FARB1Q_CFG_SLOT1_S4_CID = 36 ; +static const uint8_t EXPLR_SRQ_MBA_FARB1Q_CFG_SLOT1_S4_CID_LEN = 3 ; +static const uint8_t EXPLR_SRQ_MBA_FARB1Q_CFG_SLOT1_S5_CID = 39 ; +static const uint8_t EXPLR_SRQ_MBA_FARB1Q_CFG_SLOT1_S5_CID_LEN = 3 ; +static const uint8_t EXPLR_SRQ_MBA_FARB1Q_CFG_SLOT1_S6_CID = 42 ; +static const uint8_t EXPLR_SRQ_MBA_FARB1Q_CFG_SLOT1_S6_CID_LEN = 3 ; +static const uint8_t EXPLR_SRQ_MBA_FARB1Q_CFG_SLOT1_S7_CID = 45 ; +static const uint8_t EXPLR_SRQ_MBA_FARB1Q_CFG_SLOT1_S7_CID_LEN = 3 ; +static const uint8_t EXPLR_SRQ_MBA_FARB1Q_CFG_DIS_SMDR = 48 ; +static const uint8_t EXPLR_SRQ_MBA_FARB1Q_CFG_DDR4_PARITY_ON_CID_DIS = 49 ; +static const uint8_t EXPLR_SRQ_MBA_FARB1Q_CFG_READ_2CYC_PREAMBLE_EN = 50 ; +static const uint8_t EXPLR_SRQ_MBA_FARB1Q_CFG_WRITE_2CYC_PREAMBLE_EN = 51 ; +static const uint8_t EXPLR_SRQ_MBA_FARB1Q_CFG_RDCSGAP_DLY = 52 ; +static const uint8_t EXPLR_SRQ_MBA_FARB1Q_CFG_RDCSGAP_DLY_LEN = 3 ; +static const uint8_t EXPLR_SRQ_MBA_FARB1Q_CFG_WRCSGAP_DLY = 55 ; +static const uint8_t EXPLR_SRQ_MBA_FARB1Q_CFG_WRCSGAP_DLY_LEN = 3 ; +static const uint8_t EXPLR_SRQ_MBA_FARB1Q_CFG_RDCSLAT_DLY_MSB = 58 ; +static const uint8_t EXPLR_SRQ_MBA_FARB1Q_CFG_RDCSLAT_DLY_MSB_LEN = 3 ; +static const uint8_t EXPLR_SRQ_MBA_FARB1Q_CFG_RDDATA_EN_DLY_MSB = 61 ; +static const uint8_t EXPLR_SRQ_MBA_FARB1Q_CFG_RDDATA_EN_DLY_MSB_LEN = 3 ; + +static const uint8_t EXPLR_SRQ_MBA_FARB2Q_CFG_RANK0_RD_ODT = 0 ; +static const uint8_t EXPLR_SRQ_MBA_FARB2Q_CFG_RANK0_RD_ODT_LEN = 4 ; +static const uint8_t EXPLR_SRQ_MBA_FARB2Q_CFG_RANK1_RD_ODT = 4 ; +static const uint8_t EXPLR_SRQ_MBA_FARB2Q_CFG_RANK1_RD_ODT_LEN = 4 ; +static const uint8_t EXPLR_SRQ_MBA_FARB2Q_CFG_RANK2_RD_ODT = 8 ; +static const uint8_t EXPLR_SRQ_MBA_FARB2Q_CFG_RANK2_RD_ODT_LEN = 4 ; +static const uint8_t EXPLR_SRQ_MBA_FARB2Q_CFG_RANK3_RD_ODT = 12 ; +static const uint8_t EXPLR_SRQ_MBA_FARB2Q_CFG_RANK3_RD_ODT_LEN = 4 ; +static const uint8_t EXPLR_SRQ_MBA_FARB2Q_CFG_RANK4_RD_ODT = 16 ; +static const uint8_t EXPLR_SRQ_MBA_FARB2Q_CFG_RANK4_RD_ODT_LEN = 4 ; +static const uint8_t EXPLR_SRQ_MBA_FARB2Q_CFG_RANK5_RD_ODT = 20 ; +static const uint8_t EXPLR_SRQ_MBA_FARB2Q_CFG_RANK5_RD_ODT_LEN = 4 ; +static const uint8_t EXPLR_SRQ_MBA_FARB2Q_CFG_RANK6_RD_ODT = 24 ; +static const uint8_t EXPLR_SRQ_MBA_FARB2Q_CFG_RANK6_RD_ODT_LEN = 4 ; +static const uint8_t EXPLR_SRQ_MBA_FARB2Q_CFG_RANK7_RD_ODT = 28 ; +static const uint8_t EXPLR_SRQ_MBA_FARB2Q_CFG_RANK7_RD_ODT_LEN = 4 ; +static const uint8_t EXPLR_SRQ_MBA_FARB2Q_CFG_RANK0_WR_ODT = 32 ; +static const uint8_t EXPLR_SRQ_MBA_FARB2Q_CFG_RANK0_WR_ODT_LEN = 4 ; +static const uint8_t EXPLR_SRQ_MBA_FARB2Q_CFG_RANK1_WR_ODT = 36 ; +static const uint8_t EXPLR_SRQ_MBA_FARB2Q_CFG_RANK1_WR_ODT_LEN = 4 ; +static const uint8_t EXPLR_SRQ_MBA_FARB2Q_CFG_RANK2_WR_ODT = 40 ; +static const uint8_t EXPLR_SRQ_MBA_FARB2Q_CFG_RANK2_WR_ODT_LEN = 4 ; +static const uint8_t EXPLR_SRQ_MBA_FARB2Q_CFG_RANK3_WR_ODT = 44 ; +static const uint8_t EXPLR_SRQ_MBA_FARB2Q_CFG_RANK3_WR_ODT_LEN = 4 ; +static const uint8_t EXPLR_SRQ_MBA_FARB2Q_CFG_RANK4_WR_ODT = 48 ; +static const uint8_t EXPLR_SRQ_MBA_FARB2Q_CFG_RANK4_WR_ODT_LEN = 4 ; +static const uint8_t EXPLR_SRQ_MBA_FARB2Q_CFG_RANK5_WR_ODT = 52 ; +static const uint8_t EXPLR_SRQ_MBA_FARB2Q_CFG_RANK5_WR_ODT_LEN = 4 ; +static const uint8_t EXPLR_SRQ_MBA_FARB2Q_CFG_RANK6_WR_ODT = 56 ; +static const uint8_t EXPLR_SRQ_MBA_FARB2Q_CFG_RANK6_WR_ODT_LEN = 4 ; +static const uint8_t EXPLR_SRQ_MBA_FARB2Q_CFG_RANK7_WR_ODT = 60 ; +static const uint8_t EXPLR_SRQ_MBA_FARB2Q_CFG_RANK7_WR_ODT_LEN = 4 ; + +static const uint8_t EXPLR_SRQ_MBA_FARB3Q_CFG_NM_N_PER_SLOT = 0 ; +static const uint8_t EXPLR_SRQ_MBA_FARB3Q_CFG_NM_N_PER_SLOT_LEN = 15 ; +static const uint8_t EXPLR_SRQ_MBA_FARB3Q_CFG_NM_N_PER_PORT = 15 ; +static const uint8_t EXPLR_SRQ_MBA_FARB3Q_CFG_NM_N_PER_PORT_LEN = 16 ; +static const uint8_t EXPLR_SRQ_MBA_FARB3Q_CFG_NM_M = 31 ; +static const uint8_t EXPLR_SRQ_MBA_FARB3Q_CFG_NM_M_LEN = 14 ; +static const uint8_t EXPLR_SRQ_MBA_FARB3Q_CFG_NM_RAS_WEIGHT = 45 ; +static const uint8_t EXPLR_SRQ_MBA_FARB3Q_CFG_NM_RAS_WEIGHT_LEN = 3 ; +static const uint8_t EXPLR_SRQ_MBA_FARB3Q_CFG_NM_CAS_WEIGHT = 48 ; +static const uint8_t EXPLR_SRQ_MBA_FARB3Q_CFG_NM_CAS_WEIGHT_LEN = 3 ; +static const uint8_t EXPLR_SRQ_MBA_FARB3Q_RESERVED_51 = 51 ; +static const uint8_t EXPLR_SRQ_MBA_FARB3Q_RESERVED_52 = 52 ; +static const uint8_t EXPLR_SRQ_MBA_FARB3Q_CFG_NM_CHANGE_AFTER_SYNC = 53 ; +static const uint8_t EXPLR_SRQ_MBA_FARB3Q_RESERVED_54_63 = 54 ; +static const uint8_t EXPLR_SRQ_MBA_FARB3Q_RESERVED_54_63_LEN = 10 ; + +static const uint8_t EXPLR_SRQ_MBA_FARB4Q_CFG_NOISE_WAIT_TIME = 0 ; +static const uint8_t EXPLR_SRQ_MBA_FARB4Q_CFG_NOISE_WAIT_TIME_LEN = 16 ; +static const uint8_t EXPLR_SRQ_MBA_FARB4Q_CFG_PRECHARGE_WAIT_TIME = 16 ; +static const uint8_t EXPLR_SRQ_MBA_FARB4Q_CFG_PRECHARGE_WAIT_TIME_LEN = 6 ; +static const uint8_t EXPLR_SRQ_MBA_FARB4Q_CFG_SIM_FAST_NOISE_WINDOW = 22 ; +static const uint8_t EXPLR_SRQ_MBA_FARB4Q_RESERVED_23_26 = 23 ; +static const uint8_t EXPLR_SRQ_MBA_FARB4Q_RESERVED_23_26_LEN = 4 ; +static const uint8_t EXPLR_SRQ_MBA_FARB4Q_EMERGENCY_N = 27 ; +static const uint8_t EXPLR_SRQ_MBA_FARB4Q_EMERGENCY_N_LEN = 15 ; +static const uint8_t EXPLR_SRQ_MBA_FARB4Q_EMERGENCY_M = 42 ; +static const uint8_t EXPLR_SRQ_MBA_FARB4Q_EMERGENCY_M_LEN = 14 ; +static const uint8_t EXPLR_SRQ_MBA_FARB4Q_RESERVED_56_63 = 56 ; +static const uint8_t EXPLR_SRQ_MBA_FARB4Q_RESERVED_56_63_LEN = 8 ; + +static const uint8_t EXPLR_SRQ_MBA_FARB5Q_RESERVED_0_3 = 0 ; +static const uint8_t EXPLR_SRQ_MBA_FARB5Q_RESERVED_0_3_LEN = 4 ; +static const uint8_t EXPLR_SRQ_MBA_FARB5Q_CFG_DDR_RESETN = 4 ; +static const uint8_t EXPLR_SRQ_MBA_FARB5Q_CFG_CCS_ADDR_MUX_SEL = 5 ; +static const uint8_t EXPLR_SRQ_MBA_FARB5Q_CFG_CCS_INST_RESET_ENABLE = 6 ; +static const uint8_t EXPLR_SRQ_MBA_FARB5Q_RESERVED_7_15 = 7 ; +static const uint8_t EXPLR_SRQ_MBA_FARB5Q_RESERVED_7_15_LEN = 9 ; + +static const uint8_t EXPLR_SRQ_MBA_FARB6Q_CFG_BW_SNAPSHOT = 0 ; +static const uint8_t EXPLR_SRQ_MBA_FARB6Q_CFG_BW_SNAPSHOT_LEN = 11 ; +static const uint8_t EXPLR_SRQ_MBA_FARB6Q_CFG_CKE_PUP_STATE = 11 ; +static const uint8_t EXPLR_SRQ_MBA_FARB6Q_CFG_CKE_PUP_STATE_LEN = 4 ; +static const uint8_t EXPLR_SRQ_MBA_FARB6Q_CFG_STR_STATE = 15 ; +static const uint8_t EXPLR_SRQ_MBA_FARB6Q_CFG_RRQ_DEPTH = 16 ; +static const uint8_t EXPLR_SRQ_MBA_FARB6Q_CFG_RRQ_DEPTH_LEN = 5 ; +static const uint8_t EXPLR_SRQ_MBA_FARB6Q_CFG_WRQ_DEPTH = 21 ; +static const uint8_t EXPLR_SRQ_MBA_FARB6Q_CFG_WRQ_DEPTH_LEN = 5 ; +static const uint8_t EXPLR_SRQ_MBA_FARB6Q_CFG_RCD_PARITY_DLY = 26 ; +static const uint8_t EXPLR_SRQ_MBA_FARB6Q_CFG_RCD_PARITY_DLY_LEN = 5 ; +static const uint8_t EXPLR_SRQ_MBA_FARB6Q_CFG_EVENT = 31 ; +static const uint8_t EXPLR_SRQ_MBA_FARB6Q_CFG_INIT_COMPLETE = 32 ; + +static const uint8_t EXPLR_SRQ_MBA_FARB7Q_EMER_THROTTLE_IP = 0 ; + +static const uint8_t EXPLR_SRQ_MBA_FARB8Q_SAFE_REFRESH_MODE = 0 ; + +static const uint8_t EXPLR_SRQ_MBA_FARB9Q_CFG_ZQ_PER_CAL_ENABLE = 0 ; +static const uint8_t EXPLR_SRQ_MBA_FARB9Q_CFG_ZQ_PER_CAL_INTERVAL_TB = 1 ; +static const uint8_t EXPLR_SRQ_MBA_FARB9Q_CFG_ZQ_PER_CAL_INTERVAL_TB_LEN = 2 ; +static const uint8_t EXPLR_SRQ_MBA_FARB9Q_CFG_ZQ_PER_CAL_INTERVAL = 3 ; +static const uint8_t EXPLR_SRQ_MBA_FARB9Q_CFG_ZQ_PER_CAL_INTERVAL_LEN = 9 ; +static const uint8_t EXPLR_SRQ_MBA_FARB9Q_RESERVED_12 = 12 ; +static const uint8_t EXPLR_SRQ_MBA_FARB9Q_CFG_ZQ_PER_CAL_RUN_LENGTH = 13 ; +static const uint8_t EXPLR_SRQ_MBA_FARB9Q_CFG_ZQ_PER_CAL_RUN_LENGTH_LEN = 8 ; +static const uint8_t EXPLR_SRQ_MBA_FARB9Q_CFG_ZQ_PER_CAL_RUN_LENGTH_TB = 21 ; +static const uint8_t EXPLR_SRQ_MBA_FARB9Q_CFG_ZQ_PER_CAL_RUN_LENGTH_TB_LEN = 2 ; +static const uint8_t EXPLR_SRQ_MBA_FARB9Q_RESERVED_23_28 = 23 ; +static const uint8_t EXPLR_SRQ_MBA_FARB9Q_RESERVED_23_28_LEN = 6 ; +static const uint8_t EXPLR_SRQ_MBA_FARB9Q_CFG_CTRLUPD_SINGLE_REQ = 29 ; +static const uint8_t EXPLR_SRQ_MBA_FARB9Q_CFG_CTRLUPD_AFTER_PHY_INT = 30 ; +static const uint8_t EXPLR_SRQ_MBA_FARB9Q_CFG_CTRLUPD_AFTER_ERR = 31 ; +static const uint8_t EXPLR_SRQ_MBA_FARB9Q_CFG_MC_PER_CAL_ENABLE = 32 ; +static const uint8_t EXPLR_SRQ_MBA_FARB9Q_CFG_MC_PER_CAL_INTERVAL_TB = 33 ; +static const uint8_t EXPLR_SRQ_MBA_FARB9Q_CFG_MC_PER_CAL_INTERVAL_TB_LEN = 2 ; +static const uint8_t EXPLR_SRQ_MBA_FARB9Q_CFG_MC_PER_CAL_INTERVAL = 35 ; +static const uint8_t EXPLR_SRQ_MBA_FARB9Q_CFG_MC_PER_CAL_INTERVAL_LEN = 9 ; +static const uint8_t EXPLR_SRQ_MBA_FARB9Q_CFG_MC_PER_CAL_FIXED_RUN_LENGTH_EN = 44 ; +static const uint8_t EXPLR_SRQ_MBA_FARB9Q_CFG_MC_PER_CAL_RUN_LENGTH = 45 ; +static const uint8_t EXPLR_SRQ_MBA_FARB9Q_CFG_MC_PER_CAL_RUN_LENGTH_LEN = 10 ; +static const uint8_t EXPLR_SRQ_MBA_FARB9Q_CFG_MC_PER_CAL_CTRLUPD_MIN = 55 ; +static const uint8_t EXPLR_SRQ_MBA_FARB9Q_CFG_MC_PER_CAL_CTRLUPD_MIN_LEN = 9 ; + +static const uint8_t EXPLR_SRQ_MBA_PMU0Q_READ_COUNT = 0 ; +static const uint8_t EXPLR_SRQ_MBA_PMU0Q_READ_COUNT_LEN = 32 ; +static const uint8_t EXPLR_SRQ_MBA_PMU0Q_WRITE_COUNT = 32 ; +static const uint8_t EXPLR_SRQ_MBA_PMU0Q_WRITE_COUNT_LEN = 32 ; + +static const uint8_t EXPLR_SRQ_MBA_PMU1Q_ACTIVATE_COUNT = 0 ; +static const uint8_t EXPLR_SRQ_MBA_PMU1Q_ACTIVATE_COUNT_LEN = 32 ; +static const uint8_t EXPLR_SRQ_MBA_PMU1Q_PU_COUNTS = 32 ; +static const uint8_t EXPLR_SRQ_MBA_PMU1Q_PU_COUNTS_LEN = 32 ; + +static const uint8_t EXPLR_SRQ_MBA_PMU2Q_FRAME_COUNT = 0 ; +static const uint8_t EXPLR_SRQ_MBA_PMU2Q_FRAME_COUNT_LEN = 32 ; +static const uint8_t EXPLR_SRQ_MBA_PMU2Q_STR_EXIT_COUNT = 32 ; +static const uint8_t EXPLR_SRQ_MBA_PMU2Q_STR_EXIT_COUNT_LEN = 8 ; + +static const uint8_t EXPLR_SRQ_MBA_PMU3Q_LOW_IDLE_THRESHOLD = 0 ; +static const uint8_t EXPLR_SRQ_MBA_PMU3Q_LOW_IDLE_THRESHOLD_LEN = 16 ; +static const uint8_t EXPLR_SRQ_MBA_PMU3Q_MED_IDLE_THRESHOLD = 16 ; +static const uint8_t EXPLR_SRQ_MBA_PMU3Q_MED_IDLE_THRESHOLD_LEN = 16 ; +static const uint8_t EXPLR_SRQ_MBA_PMU3Q_HIGH_IDLE_THRESHOLD = 32 ; +static const uint8_t EXPLR_SRQ_MBA_PMU3Q_HIGH_IDLE_THRESHOLD_LEN = 32 ; + +static const uint8_t EXPLR_SRQ_MBA_PMU4Q_BASE_IDLE_COUNT = 0 ; +static const uint8_t EXPLR_SRQ_MBA_PMU4Q_BASE_IDLE_COUNT_LEN = 32 ; +static const uint8_t EXPLR_SRQ_MBA_PMU4Q_LOW_IDLE_COUNT = 32 ; +static const uint8_t EXPLR_SRQ_MBA_PMU4Q_LOW_IDLE_COUNT_LEN = 32 ; + +static const uint8_t EXPLR_SRQ_MBA_PMU5Q_MED_IDLE_COUNT = 0 ; +static const uint8_t EXPLR_SRQ_MBA_PMU5Q_MED_IDLE_COUNT_LEN = 32 ; +static const uint8_t EXPLR_SRQ_MBA_PMU5Q_HIGH_IDLE_COUNT = 32 ; +static const uint8_t EXPLR_SRQ_MBA_PMU5Q_HIGH_IDLE_COUNT_LEN = 32 ; + +static const uint8_t EXPLR_SRQ_MBA_PMU6Q_EVENT0_COUNTER = 0 ; +static const uint8_t EXPLR_SRQ_MBA_PMU6Q_EVENT0_COUNTER_LEN = 16 ; +static const uint8_t EXPLR_SRQ_MBA_PMU6Q_EVENT1_COUNTER = 16 ; +static const uint8_t EXPLR_SRQ_MBA_PMU6Q_EVENT1_COUNTER_LEN = 16 ; +static const uint8_t EXPLR_SRQ_MBA_PMU6Q_EVENT2_COUNTER = 32 ; +static const uint8_t EXPLR_SRQ_MBA_PMU6Q_EVENT2_COUNTER_LEN = 16 ; +static const uint8_t EXPLR_SRQ_MBA_PMU6Q_EVENT3_COUNTER = 48 ; +static const uint8_t EXPLR_SRQ_MBA_PMU6Q_EVENT3_COUNTER_LEN = 16 ; + +static const uint8_t EXPLR_SRQ_MBA_PMU7Q_CFG_EVENT0_SELECT = 0 ; +static const uint8_t EXPLR_SRQ_MBA_PMU7Q_CFG_EVENT0_SELECT_LEN = 6 ; +static const uint8_t EXPLR_SRQ_MBA_PMU7Q_CFG_EVENT1_SELECT = 6 ; +static const uint8_t EXPLR_SRQ_MBA_PMU7Q_CFG_EVENT1_SELECT_LEN = 6 ; +static const uint8_t EXPLR_SRQ_MBA_PMU7Q_CFG_EVENT2_SELECT = 12 ; +static const uint8_t EXPLR_SRQ_MBA_PMU7Q_CFG_EVENT2_SELECT_LEN = 6 ; +static const uint8_t EXPLR_SRQ_MBA_PMU7Q_CFG_EVENT3_SELECT = 18 ; +static const uint8_t EXPLR_SRQ_MBA_PMU7Q_CFG_EVENT3_SELECT_LEN = 6 ; +static const uint8_t EXPLR_SRQ_MBA_PMU7Q_CFG_PRESCALER_C0 = 24 ; +static const uint8_t EXPLR_SRQ_MBA_PMU7Q_CFG_PRESCALER_C0_LEN = 2 ; +static const uint8_t EXPLR_SRQ_MBA_PMU7Q_CFG_PRESCALER_C1 = 26 ; +static const uint8_t EXPLR_SRQ_MBA_PMU7Q_CFG_PRESCALER_C1_LEN = 2 ; +static const uint8_t EXPLR_SRQ_MBA_PMU7Q_CFG_PRESCALER_C2 = 28 ; +static const uint8_t EXPLR_SRQ_MBA_PMU7Q_CFG_PRESCALER_C2_LEN = 2 ; +static const uint8_t EXPLR_SRQ_MBA_PMU7Q_CFG_PRESCALER_C3 = 30 ; +static const uint8_t EXPLR_SRQ_MBA_PMU7Q_CFG_PRESCALER_C3_LEN = 2 ; +static const uint8_t EXPLR_SRQ_MBA_PMU7Q_CASCADE = 32 ; +static const uint8_t EXPLR_SRQ_MBA_PMU7Q_CASCADE_LEN = 3 ; +static const uint8_t EXPLR_SRQ_MBA_PMU7Q_FREEZE = 35 ; +static const uint8_t EXPLR_SRQ_MBA_PMU7Q_CFG_PMU_START_RESET = 36 ; +static const uint8_t EXPLR_SRQ_MBA_PMU7Q_CFG_PMU_START_NO_RESET = 37 ; +static const uint8_t EXPLR_SRQ_MBA_PMU7Q_CFG_PMU_STOP = 38 ; +static const uint8_t EXPLR_SRQ_MBA_PMU7Q_CFG_RESET_PMU6_WHEN_READ = 39 ; + +static const uint8_t EXPLR_SRQ_MBA_PMU8Q_CFG_CMD0_TYPE = 0 ; +static const uint8_t EXPLR_SRQ_MBA_PMU8Q_CFG_CMD0_TYPE_LEN = 2 ; +static const uint8_t EXPLR_SRQ_MBA_PMU8Q_CFG_CMD0_MRANK_MATCH_EN = 2 ; +static const uint8_t EXPLR_SRQ_MBA_PMU8Q_CFG_CMD0_SRANK_MATCH_EN = 3 ; +static const uint8_t EXPLR_SRQ_MBA_PMU8Q_CFG_CMD0_BG_MATCH_EN = 4 ; +static const uint8_t EXPLR_SRQ_MBA_PMU8Q_CFG_CMD0_BANK_MATCH_EN = 5 ; +static const uint8_t EXPLR_SRQ_MBA_PMU8Q_CFG_CMD0_MRANK = 6 ; +static const uint8_t EXPLR_SRQ_MBA_PMU8Q_CFG_CMD0_MRANK_LEN = 3 ; +static const uint8_t EXPLR_SRQ_MBA_PMU8Q_CFG_CMD0_SRANK = 9 ; +static const uint8_t EXPLR_SRQ_MBA_PMU8Q_CFG_CMD0_SRANK_LEN = 3 ; +static const uint8_t EXPLR_SRQ_MBA_PMU8Q_CFG_CMD0_BG = 12 ; +static const uint8_t EXPLR_SRQ_MBA_PMU8Q_CFG_CMD0_BG_LEN = 2 ; +static const uint8_t EXPLR_SRQ_MBA_PMU8Q_CFG_CMD0_BANK = 14 ; +static const uint8_t EXPLR_SRQ_MBA_PMU8Q_CFG_CMD0_BANK_LEN = 3 ; +static const uint8_t EXPLR_SRQ_MBA_PMU8Q_CFG_CMD1_TYPE = 17 ; +static const uint8_t EXPLR_SRQ_MBA_PMU8Q_CFG_CMD1_TYPE_LEN = 2 ; +static const uint8_t EXPLR_SRQ_MBA_PMU8Q_CFG_CMD1_MRANK_MATCH_EN = 19 ; +static const uint8_t EXPLR_SRQ_MBA_PMU8Q_CFG_CMD1_SRANK_MATCH_EN = 20 ; +static const uint8_t EXPLR_SRQ_MBA_PMU8Q_CFG_CMD1_BG_MATCH_EN = 21 ; +static const uint8_t EXPLR_SRQ_MBA_PMU8Q_CFG_CMD1_BANK_MATCH_EN = 22 ; +static const uint8_t EXPLR_SRQ_MBA_PMU8Q_CFG_CMD1_MRANK = 23 ; +static const uint8_t EXPLR_SRQ_MBA_PMU8Q_CFG_CMD1_MRANK_LEN = 3 ; +static const uint8_t EXPLR_SRQ_MBA_PMU8Q_CFG_CMD1_SRANK = 26 ; +static const uint8_t EXPLR_SRQ_MBA_PMU8Q_CFG_CMD1_SRANK_LEN = 3 ; +static const uint8_t EXPLR_SRQ_MBA_PMU8Q_CFG_CMD1_BG = 29 ; +static const uint8_t EXPLR_SRQ_MBA_PMU8Q_CFG_CMD1_BG_LEN = 2 ; +static const uint8_t EXPLR_SRQ_MBA_PMU8Q_CFG_CMD1_BANK = 31 ; +static const uint8_t EXPLR_SRQ_MBA_PMU8Q_CFG_CMD1_BANK_LEN = 3 ; +static const uint8_t EXPLR_SRQ_MBA_PMU8Q_CFG_CMD2_TYPE = 34 ; +static const uint8_t EXPLR_SRQ_MBA_PMU8Q_CFG_CMD2_TYPE_LEN = 2 ; +static const uint8_t EXPLR_SRQ_MBA_PMU8Q_CFG_CMD2_MRANK_MATCH_EN = 36 ; +static const uint8_t EXPLR_SRQ_MBA_PMU8Q_CFG_CMD2_SRANK_MATCH_EN = 37 ; +static const uint8_t EXPLR_SRQ_MBA_PMU8Q_CFG_CMD2_BG_MATCH_EN = 38 ; +static const uint8_t EXPLR_SRQ_MBA_PMU8Q_CFG_CMD2_BANK_MATCH_EN = 39 ; +static const uint8_t EXPLR_SRQ_MBA_PMU8Q_CFG_CMD2_MRANK = 40 ; +static const uint8_t EXPLR_SRQ_MBA_PMU8Q_CFG_CMD2_MRANK_LEN = 3 ; +static const uint8_t EXPLR_SRQ_MBA_PMU8Q_CFG_CMD2_SRANK = 43 ; +static const uint8_t EXPLR_SRQ_MBA_PMU8Q_CFG_CMD2_SRANK_LEN = 3 ; +static const uint8_t EXPLR_SRQ_MBA_PMU8Q_CFG_CMD2_BG = 46 ; +static const uint8_t EXPLR_SRQ_MBA_PMU8Q_CFG_CMD2_BG_LEN = 2 ; +static const uint8_t EXPLR_SRQ_MBA_PMU8Q_CFG_CMD2_BANK = 48 ; +static const uint8_t EXPLR_SRQ_MBA_PMU8Q_CFG_CMD2_BANK_LEN = 3 ; +static const uint8_t EXPLR_SRQ_MBA_PMU8Q_RESERVED_51_63 = 51 ; +static const uint8_t EXPLR_SRQ_MBA_PMU8Q_RESERVED_51_63_LEN = 13 ; + +static const uint8_t EXPLR_SRQ_MBA_RRQ0Q_CFG_RRQ_SKIP_LIMIT = 0 ; +static const uint8_t EXPLR_SRQ_MBA_RRQ0Q_CFG_RRQ_SKIP_LIMIT_LEN = 6 ; +static const uint8_t EXPLR_SRQ_MBA_RRQ0Q_CFG_RRQ_FIFO_MODE = 6 ; +static const uint8_t EXPLR_SRQ_MBA_RRQ0Q_CFG_RRQ_SINGLE_THREAD_MODE = 7 ; +static const uint8_t EXPLR_SRQ_MBA_RRQ0Q_RESERVED_8_10 = 8 ; +static const uint8_t EXPLR_SRQ_MBA_RRQ0Q_RESERVED_8_10_LEN = 3 ; +static const uint8_t EXPLR_SRQ_MBA_RRQ0Q_CFG_DISABLE_RD_PG_MODE = 11 ; +static const uint8_t EXPLR_SRQ_MBA_RRQ0Q_CFG_DISABLE_FAST_ACT = 12 ; +static const uint8_t EXPLR_SRQ_MBA_RRQ0Q_CFG_RD_IDLE_ALLOW_WR = 13 ; +static const uint8_t EXPLR_SRQ_MBA_RRQ0Q_CFG_RD_IDLE_ALLOW_WR_LEN = 11 ; +static const uint8_t EXPLR_SRQ_MBA_RRQ0Q_CFG_RDBUFF_CAPACITY_LIMIT = 24 ; +static const uint8_t EXPLR_SRQ_MBA_RRQ0Q_CFG_RDBUFF_CAPACITY_LIMIT_LEN = 6 ; +static const uint8_t EXPLR_SRQ_MBA_RRQ0Q_CFG_SRQ_RRQ_DBG_SEL = 30 ; +static const uint8_t EXPLR_SRQ_MBA_RRQ0Q_CFG_SRQ_RRQ_DBG_SEL_LEN = 4 ; +static const uint8_t EXPLR_SRQ_MBA_RRQ0Q_RESERVED_34_56 = 34 ; +static const uint8_t EXPLR_SRQ_MBA_RRQ0Q_RESERVED_34_56_LEN = 23 ; +static const uint8_t EXPLR_SRQ_MBA_RRQ0Q_CFG_RRQ_ACT_NUM_READS_PENDING = 57 ; +static const uint8_t EXPLR_SRQ_MBA_RRQ0Q_CFG_RRQ_ACT_NUM_READS_PENDING_LEN = 4 ; +static const uint8_t EXPLR_SRQ_MBA_RRQ0Q_CFG_DISABLE_FAST_ACT_FIFO = 61 ; +static const uint8_t EXPLR_SRQ_MBA_RRQ0Q_CFG_RRQ_ENTRY0_ENABLE = 62 ; +static const uint8_t EXPLR_SRQ_MBA_RRQ0Q_CFG_CRIT_OW_FIRST_EN = 63 ; + +static const uint8_t EXPLR_SRQ_MBA_SYNCCNTLQ_SYNC_REF_EN = 0 ; +static const uint8_t EXPLR_SRQ_MBA_SYNCCNTLQ_SYNC_PC_EN = 1 ; +static const uint8_t EXPLR_SRQ_MBA_SYNCCNTLQ_SYNC_TIMEBASE_EN = 2 ; +static const uint8_t EXPLR_SRQ_MBA_SYNCCNTLQ_RESERVED_3_7 = 3 ; +static const uint8_t EXPLR_SRQ_MBA_SYNCCNTLQ_RESERVED_3_7_LEN = 5 ; + +static const uint8_t EXPLR_SRQ_MBA_TMR0Q_RRDM_DLY = 0 ; +static const uint8_t EXPLR_SRQ_MBA_TMR0Q_RRDM_DLY_LEN = 4 ; +static const uint8_t EXPLR_SRQ_MBA_TMR0Q_RRSMSR_DLY = 4 ; +static const uint8_t EXPLR_SRQ_MBA_TMR0Q_RRSMSR_DLY_LEN = 4 ; +static const uint8_t EXPLR_SRQ_MBA_TMR0Q_RRSMDR_DLY = 8 ; +static const uint8_t EXPLR_SRQ_MBA_TMR0Q_RRSMDR_DLY_LEN = 4 ; +static const uint8_t EXPLR_SRQ_MBA_TMR0Q_RROP_DLY = 12 ; +static const uint8_t EXPLR_SRQ_MBA_TMR0Q_RROP_DLY_LEN = 4 ; +static const uint8_t EXPLR_SRQ_MBA_TMR0Q_WWDM_DLY = 16 ; +static const uint8_t EXPLR_SRQ_MBA_TMR0Q_WWDM_DLY_LEN = 4 ; +static const uint8_t EXPLR_SRQ_MBA_TMR0Q_WWSMSR_DLY = 20 ; +static const uint8_t EXPLR_SRQ_MBA_TMR0Q_WWSMSR_DLY_LEN = 4 ; +static const uint8_t EXPLR_SRQ_MBA_TMR0Q_WWSMDR_DLY = 24 ; +static const uint8_t EXPLR_SRQ_MBA_TMR0Q_WWSMDR_DLY_LEN = 4 ; +static const uint8_t EXPLR_SRQ_MBA_TMR0Q_WWOP_DLY = 28 ; +static const uint8_t EXPLR_SRQ_MBA_TMR0Q_WWOP_DLY_LEN = 4 ; +static const uint8_t EXPLR_SRQ_MBA_TMR0Q_RWDM_DLY = 32 ; +static const uint8_t EXPLR_SRQ_MBA_TMR0Q_RWDM_DLY_LEN = 5 ; +static const uint8_t EXPLR_SRQ_MBA_TMR0Q_RWSMSR_DLY = 37 ; +static const uint8_t EXPLR_SRQ_MBA_TMR0Q_RWSMSR_DLY_LEN = 5 ; +static const uint8_t EXPLR_SRQ_MBA_TMR0Q_RWSMDR_DLY = 42 ; +static const uint8_t EXPLR_SRQ_MBA_TMR0Q_RWSMDR_DLY_LEN = 5 ; +static const uint8_t EXPLR_SRQ_MBA_TMR0Q_WRDM_DLY = 47 ; +static const uint8_t EXPLR_SRQ_MBA_TMR0Q_WRDM_DLY_LEN = 4 ; +static const uint8_t EXPLR_SRQ_MBA_TMR0Q_WRSMSR_DLY = 51 ; +static const uint8_t EXPLR_SRQ_MBA_TMR0Q_WRSMSR_DLY_LEN = 6 ; +static const uint8_t EXPLR_SRQ_MBA_TMR0Q_WRSMDR_DLY = 57 ; +static const uint8_t EXPLR_SRQ_MBA_TMR0Q_WRSMDR_DLY_LEN = 6 ; +static const uint8_t EXPLR_SRQ_MBA_TMR0Q_RESERVED_63 = 63 ; + +static const uint8_t EXPLR_SRQ_MBA_TMR1Q_RRSBG_DLY = 0 ; +static const uint8_t EXPLR_SRQ_MBA_TMR1Q_RRSBG_DLY_LEN = 4 ; +static const uint8_t EXPLR_SRQ_MBA_TMR1Q_WRSBG_DLY = 4 ; +static const uint8_t EXPLR_SRQ_MBA_TMR1Q_WRSBG_DLY_LEN = 6 ; +static const uint8_t EXPLR_SRQ_MBA_TMR1Q_CFG_TFAW = 10 ; +static const uint8_t EXPLR_SRQ_MBA_TMR1Q_CFG_TFAW_LEN = 6 ; +static const uint8_t EXPLR_SRQ_MBA_TMR1Q_CFG_TRCD = 16 ; +static const uint8_t EXPLR_SRQ_MBA_TMR1Q_CFG_TRCD_LEN = 5 ; +static const uint8_t EXPLR_SRQ_MBA_TMR1Q_CFG_TRP = 21 ; +static const uint8_t EXPLR_SRQ_MBA_TMR1Q_CFG_TRP_LEN = 5 ; +static const uint8_t EXPLR_SRQ_MBA_TMR1Q_CFG_TRAS = 26 ; +static const uint8_t EXPLR_SRQ_MBA_TMR1Q_CFG_TRAS_LEN = 6 ; +static const uint8_t EXPLR_SRQ_MBA_TMR1Q_CFG_TRAS_MSB = 32 ; +static const uint8_t EXPLR_SRQ_MBA_TMR1Q_CFG_TRCD_MSB = 33 ; +static const uint8_t EXPLR_SRQ_MBA_TMR1Q_CFG_TRP_MSB = 34 ; +static const uint8_t EXPLR_SRQ_MBA_TMR1Q_CFG_RD2PRE_MSB = 35 ; +static const uint8_t EXPLR_SRQ_MBA_TMR1Q_CFG_RD2PRE_MSB_LEN = 4 ; +static const uint8_t EXPLR_SRQ_MBA_TMR1Q_CFG_WR2PRE_MSB = 39 ; +static const uint8_t EXPLR_SRQ_MBA_TMR1Q_RESERVED_40 = 40 ; +static const uint8_t EXPLR_SRQ_MBA_TMR1Q_CFG_WR2PRE = 41 ; +static const uint8_t EXPLR_SRQ_MBA_TMR1Q_CFG_WR2PRE_LEN = 7 ; +static const uint8_t EXPLR_SRQ_MBA_TMR1Q_CFG_RD2PRE = 48 ; +static const uint8_t EXPLR_SRQ_MBA_TMR1Q_CFG_RD2PRE_LEN = 4 ; +static const uint8_t EXPLR_SRQ_MBA_TMR1Q_TRRD = 52 ; +static const uint8_t EXPLR_SRQ_MBA_TMR1Q_TRRD_LEN = 4 ; +static const uint8_t EXPLR_SRQ_MBA_TMR1Q_TRRD_SBG = 56 ; +static const uint8_t EXPLR_SRQ_MBA_TMR1Q_TRRD_SBG_LEN = 4 ; +static const uint8_t EXPLR_SRQ_MBA_TMR1Q_CFG_ACT_TO_DIFF_RANK_DLY = 60 ; +static const uint8_t EXPLR_SRQ_MBA_TMR1Q_CFG_ACT_TO_DIFF_RANK_DLY_LEN = 4 ; + +static const uint8_t EXPLR_SRQ_MBA_TMR2Q_CFG_BANK_BUSY_FSM_DIS = 0 ; +static const uint8_t EXPLR_SRQ_MBA_TMR2Q_CFG_BANK_BUSY_FSM_DIS_LEN = 20 ; +static const uint8_t EXPLR_SRQ_MBA_TMR2Q_CFG_BANK_BUSY_OPEN_PAGE_DIS = 20 ; +static const uint8_t EXPLR_SRQ_MBA_TMR2Q_CFG_BANK_BUSY_OPEN_PAGE_DIS_LEN = 12 ; +static const uint8_t EXPLR_SRQ_MBA_TMR2Q_CFG_SRQ_TMR_DBG_SEL = 32 ; +static const uint8_t EXPLR_SRQ_MBA_TMR2Q_CFG_SRQ_TMR_DBG_SEL_LEN = 5 ; +static const uint8_t EXPLR_SRQ_MBA_TMR2Q_RESERVED_37_39 = 37 ; +static const uint8_t EXPLR_SRQ_MBA_TMR2Q_RESERVED_37_39_LEN = 3 ; +static const uint8_t EXPLR_SRQ_MBA_TMR2Q_CFG_READ_WRITE_SWITCH_DLY = 40 ; +static const uint8_t EXPLR_SRQ_MBA_TMR2Q_CFG_READ_WRITE_SWITCH_DLY_LEN = 8 ; +static const uint8_t EXPLR_SRQ_MBA_TMR2Q_CFG_WRITE_READ_SWITCH_DLY = 48 ; +static const uint8_t EXPLR_SRQ_MBA_TMR2Q_CFG_WRITE_READ_SWITCH_DLY_LEN = 8 ; +static const uint8_t EXPLR_SRQ_MBA_TMR2Q_REFRESH_RESET_RANK = 56 ; +static const uint8_t EXPLR_SRQ_MBA_TMR2Q_REFRESH_RESET_RANK_LEN = 6 ; +static const uint8_t EXPLR_SRQ_MBA_TMR2Q_RESERVED_62_63 = 62 ; +static const uint8_t EXPLR_SRQ_MBA_TMR2Q_RESERVED_62_63_LEN = 2 ; + +static const uint8_t EXPLR_SRQ_MBA_WRQ0Q_CFG_WRITE_HW_MARK = 0 ; +static const uint8_t EXPLR_SRQ_MBA_WRQ0Q_CFG_WRITE_HW_MARK_LEN = 5 ; +static const uint8_t EXPLR_SRQ_MBA_WRQ0Q_CFG_WRQ_FIFO_MODE = 5 ; +static const uint8_t EXPLR_SRQ_MBA_WRQ0Q_CFG_DISABLE_WR_PG_MODE = 6 ; +static const uint8_t EXPLR_SRQ_MBA_WRQ0Q_CFG_WRQ_ENTRY0_HP_DLY = 7 ; +static const uint8_t EXPLR_SRQ_MBA_WRQ0Q_CFG_WRQ_ENTRY0_HP_DLY_LEN = 12 ; +static const uint8_t EXPLR_SRQ_MBA_WRQ0Q_CFG_WRQ_FLUSH_WR_RANK = 19 ; +static const uint8_t EXPLR_SRQ_MBA_WRQ0Q_CFG_WRQ_ENABLE_NON_HP_WR = 20 ; +static const uint8_t EXPLR_SRQ_MBA_WRQ0Q_CFG_ENTRY0_MIN_FOR_RRQ_IDLE_WR = 21 ; +static const uint8_t EXPLR_SRQ_MBA_WRQ0Q_CFG_ENTRY0_MIN_FOR_RRQ_IDLE_WR_LEN = 12 ; +static const uint8_t EXPLR_SRQ_MBA_WRQ0Q_CFG_WRITE_LW_MARK = 33 ; +static const uint8_t EXPLR_SRQ_MBA_WRQ0Q_CFG_WRITE_LW_MARK_LEN = 5 ; +static const uint8_t EXPLR_SRQ_MBA_WRQ0Q_CFG_WRQ_SKIP_LIMIT = 38 ; +static const uint8_t EXPLR_SRQ_MBA_WRQ0Q_CFG_WRQ_SKIP_LIMIT_LEN = 6 ; +static const uint8_t EXPLR_SRQ_MBA_WRQ0Q_CFG_WRQ_SINGLE_THREAD_MODE = 44 ; +static const uint8_t EXPLR_SRQ_MBA_WRQ0Q_CFG_RQ_HANG_THRESHOLD = 45 ; +static const uint8_t EXPLR_SRQ_MBA_WRQ0Q_CFG_RQ_HANG_THRESHOLD_LEN = 8 ; +static const uint8_t EXPLR_SRQ_MBA_WRQ0Q_CFG_WRQ_SKIP_RRQ_ENTRIES_DIS = 53 ; +static const uint8_t EXPLR_SRQ_MBA_WRQ0Q_RESERVED_54 = 54 ; +static const uint8_t EXPLR_SRQ_MBA_WRQ0Q_CFG_WRQ_ACT_NUM_WRITES_PENDING = 55 ; +static const uint8_t EXPLR_SRQ_MBA_WRQ0Q_CFG_WRQ_ACT_NUM_WRITES_PENDING_LEN = 4 ; +static const uint8_t EXPLR_SRQ_MBA_WRQ0Q_CFG_WRQ_ALLOW_NEW_PAGE_COMMIT = 59 ; +static const uint8_t EXPLR_SRQ_MBA_WRQ0Q_CFG_SRQ_WRQ_DBG_SEL = 60 ; +static const uint8_t EXPLR_SRQ_MBA_WRQ0Q_CFG_SRQ_WRQ_DBG_SEL_LEN = 4 ; + +static const uint8_t EXPLR_SRQ_SRQCFG0_MODE_ECC_CHK_DIS = 0 ; +static const uint8_t EXPLR_SRQ_SRQCFG0_MODE_ECC_COR_DIS = 1 ; +static const uint8_t EXPLR_SRQ_SRQCFG0_RMW_RBUF_PTR_MASK = 2 ; +static const uint8_t EXPLR_SRQ_SRQCFG0_RMW_RBUF_PTR_MASK_LEN = 14 ; +static const uint8_t EXPLR_SRQ_SRQCFG0_MCB_PAUSE = 16 ; +static const uint8_t EXPLR_SRQ_SRQCFG0_MCB_CREDIT_UPDATE = 17 ; +static const uint8_t EXPLR_SRQ_SRQCFG0_MCB_CRD_INIT = 18 ; +static const uint8_t EXPLR_SRQ_SRQCFG0_MCB_CRD_INIT_LEN = 4 ; +static const uint8_t EXPLR_SRQ_SRQCFG0_TRACE_UPDATE = 22 ; +static const uint8_t EXPLR_SRQ_SRQCFG0_CLEAR = 23 ; +static const uint8_t EXPLR_SRQ_SRQCFG0_HOLD_ACUM = 24 ; +static const uint8_t EXPLR_SRQ_SRQCFG0_ERR_INJ0 = 25 ; +static const uint8_t EXPLR_SRQ_SRQCFG0_ERR_INJ1 = 26 ; +static const uint8_t EXPLR_SRQ_SRQCFG0_TBD0 = 27 ; +static const uint8_t EXPLR_SRQ_SRQCFG0_NCF_CGT_DIS = 28 ; +static const uint8_t EXPLR_SRQ_SRQCFG0_NCF_CGT_DIS_LEN = 3 ; +static const uint8_t EXPLR_SRQ_SRQCFG0_NCF_DRAM_CMD_FLUSH_EN = 31 ; + +static const uint8_t EXPLR_SRQ_SRQFIRQ_MBA_RECOVERABLE_ERROR = 0 ; +static const uint8_t EXPLR_SRQ_SRQFIRQ_MBA_NONRECOVERABLE_ERROR = 1 ; +static const uint8_t EXPLR_SRQ_SRQFIRQ_REFRESH_OVERRUN = 2 ; +static const uint8_t EXPLR_SRQ_SRQFIRQ_WAT_ERROR = 3 ; +static const uint8_t EXPLR_SRQ_SRQFIRQ_RCD_PARITY_ERROR = 4 ; +static const uint8_t EXPLR_SRQ_SRQFIRQ_NCF_MCB_LOGIC_ERROR = 5 ; +static const uint8_t EXPLR_SRQ_SRQFIRQ_EMERGENCY_THROTTLE = 6 ; +static const uint8_t EXPLR_SRQ_SRQFIRQ_NCF_MCB_PARITY_ERROR = 7 ; +static const uint8_t EXPLR_SRQ_SRQFIRQ_DDR_MBA_EVENT_N = 8 ; +static const uint8_t EXPLR_SRQ_SRQFIRQ_WRQ_RRQ_HANG_ERR = 9 ; +static const uint8_t EXPLR_SRQ_SRQFIRQ_SM_1HOT_ERR = 10 ; +static const uint8_t EXPLR_SRQ_SRQFIRQ_REG_PARITY_ERROR = 11 ; +static const uint8_t EXPLR_SRQ_SRQFIRQ_CMD_PARITY_ERROR = 12 ; +static const uint8_t EXPLR_SRQ_SRQFIRQ_PORT_FAIL = 13 ; +static const uint8_t EXPLR_SRQ_SRQFIRQ_INFO_REG_PARITY_ERROR = 14 ; +static const uint8_t EXPLR_SRQ_SRQFIRQ_DEBUG_PARITY_ERROR = 15 ; +static const uint8_t EXPLR_SRQ_SRQFIRQ_WDF_ERROR0 = 16 ; +static const uint8_t EXPLR_SRQ_SRQFIRQ_WDF_ERROR1 = 17 ; +static const uint8_t EXPLR_SRQ_SRQFIRQ_WDF_ERROR2 = 18 ; +static const uint8_t EXPLR_SRQ_SRQFIRQ_WDF_ERROR3 = 19 ; +static const uint8_t EXPLR_SRQ_SRQFIRQ_WDF_ERROR4 = 20 ; +static const uint8_t EXPLR_SRQ_SRQFIRQ_WDF_ERROR5 = 21 ; +static const uint8_t EXPLR_SRQ_SRQFIRQ_WDF_ERROR6 = 22 ; +static const uint8_t EXPLR_SRQ_SRQFIRQ_WDF_ERROR7 = 23 ; +static const uint8_t EXPLR_SRQ_SRQFIRQ_NCF_UE = 24 ; +static const uint8_t EXPLR_SRQ_SRQFIRQ_TBD_FREE = 25 ; +static const uint8_t EXPLR_SRQ_SRQFIRQ_NCF_LOGIC_ERROR = 26 ; +static const uint8_t EXPLR_SRQ_SRQFIRQ_NCF_PARITY_ERROR = 27 ; +static const uint8_t EXPLR_SRQ_SRQFIRQ_NCF_CORR_ERROR = 28 ; +static const uint8_t EXPLR_SRQ_SRQFIRQ_INTERNAL_SCOM_ERROR = 29 ; +static const uint8_t EXPLR_SRQ_SRQFIRQ_INTERNAL_SCOM_ERROR_COPY = 30 ; + +static const uint8_t EXPLR_SRQ_SRQFIRWOF_FIR_WOF = 0 ; +static const uint8_t EXPLR_SRQ_SRQFIRWOF_FIR_WOF_LEN = 31 ; + +static const uint8_t EXPLR_SRQ_SRQFIR_ACTION0_FIR = 0 ; +static const uint8_t EXPLR_SRQ_SRQFIR_ACTION0_FIR_LEN = 31 ; + +static const uint8_t EXPLR_SRQ_SRQFIR_ACTION1_FIR = 0 ; +static const uint8_t EXPLR_SRQ_SRQFIR_ACTION1_FIR_LEN = 31 ; + +static const uint8_t EXPLR_SRQ_SRQFIR_MASK_MBA = 0 ; +static const uint8_t EXPLR_SRQ_SRQFIR_MASK_MBA_LEN = 31 ; + +static const uint8_t EXPLR_SRQ_SRQTRAP0_DEBUG_BUS = 0 ; +static const uint8_t EXPLR_SRQ_SRQTRAP0_DEBUG_BUS_LEN = 64 ; + +static const uint8_t EXPLR_SRQ_SRQTRAP1_DEBUG_BUS = 0 ; +static const uint8_t EXPLR_SRQ_SRQTRAP1_DEBUG_BUS_LEN = 24 ; +static const uint8_t EXPLR_SRQ_SRQTRAP1_NCF_SYNDROME = 24 ; +static const uint8_t EXPLR_SRQ_SRQTRAP1_NCF_SYNDROME_LEN = 8 ; +static const uint8_t EXPLR_SRQ_SRQTRAP1_REFBLK_SYNDROME = 32 ; +static const uint8_t EXPLR_SRQ_SRQTRAP1_REFBLK_SYNDROME_LEN = 8 ; +static const uint8_t EXPLR_SRQ_SRQTRAP1_NCF_INVALID_CMD_CODE = 40 ; +static const uint8_t EXPLR_SRQ_SRQTRAP1_NCF_INVALID_CMD_CODE_LEN = 4 ; +static const uint8_t EXPLR_SRQ_SRQTRAP1_REFBLK_INVALID_CMD_CODE = 44 ; +static const uint8_t EXPLR_SRQ_SRQTRAP1_REFBLK_INVALID_CMD_CODE_LEN = 4 ; +static const uint8_t EXPLR_SRQ_SRQTRAP1_MCB_CREDITS = 48 ; +static const uint8_t EXPLR_SRQ_SRQTRAP1_MCB_CREDITS_LEN = 4 ; +static const uint8_t EXPLR_SRQ_SRQTRAP1_NCF_FSM_ENCODE = 52 ; +static const uint8_t EXPLR_SRQ_SRQTRAP1_NCF_FSM_ENCODE_LEN = 4 ; +static const uint8_t EXPLR_SRQ_SRQTRAP1_REFBLK_FSM_ENCODE = 56 ; +static const uint8_t EXPLR_SRQ_SRQTRAP1_REFBLK_FSM_ENCODE_LEN = 3 ; +static const uint8_t EXPLR_SRQ_SRQTRAP1_MCB_STATUS = 59 ; +static const uint8_t EXPLR_SRQ_SRQTRAP1_MCB_STATUS_LEN = 2 ; +static const uint8_t EXPLR_SRQ_SRQTRAP1_TBD = 61 ; +static const uint8_t EXPLR_SRQ_SRQTRAP1_TBD_LEN = 3 ; + +static const uint8_t EXPLR_TLXT_ERR_HOLD_LAT_FIR_MASK_PAR = 0 ; +static const uint8_t EXPLR_TLXT_ERR_HOLD_LAT_FIR_ACTION0_PAR = 1 ; +static const uint8_t EXPLR_TLXT_ERR_HOLD_LAT_FIR_ACTION1_PAR = 2 ; + +static const uint8_t EXPLR_TLXT_ERR_MASK_LAT_FIR_PAR = 0 ; +static const uint8_t EXPLR_TLXT_ERR_MASK_LAT_FIR_ACTION0_PAR = 1 ; +static const uint8_t EXPLR_TLXT_ERR_MASK_LAT_FIR_ACTION1_PAR = 2 ; + +static const uint8_t EXPLR_TLXT_TLXCFG0_TRAP_CLEAR = 0 ; +static const uint8_t EXPLR_TLXT_TLXCFG0_EARLY_WDONE_DISABLE = 1 ; +static const uint8_t EXPLR_TLXT_TLXCFG0_EARLY_WDONE_DISABLE_LEN = 2 ; +static const uint8_t EXPLR_TLXT_TLXCFG0_TRAP_UPDATE = 3 ; +static const uint8_t EXPLR_TLXT_TLXCFG0_HOLD_ACUM = 4 ; +static const uint8_t EXPLR_TLXT_TLXCFG0_TBD = 5 ; +static const uint8_t EXPLR_TLXT_TLXCFG0_TBD_LEN = 5 ; +static const uint8_t EXPLR_TLXT_TLXCFG0_DCP1_RETURN_PAUSE = 10 ; +static const uint8_t EXPLR_TLXT_TLXCFG0_DCP1_CREDIT_UPDATE = 11 ; +static const uint8_t EXPLR_TLXT_TLXCFG0_VC0_RETURN_PAUSE = 12 ; +static const uint8_t EXPLR_TLXT_TLXCFG0_VC0_CREDIT_UPDATE = 13 ; +static const uint8_t EXPLR_TLXT_TLXCFG0_VC1_RETURN_PAUSE = 14 ; +static const uint8_t EXPLR_TLXT_TLXCFG0_VC1_CREDIT_UPDATE = 15 ; +static const uint8_t EXPLR_TLXT_TLXCFG0_DCP1_INIT = 16 ; +static const uint8_t EXPLR_TLXT_TLXCFG0_DCP1_INIT_LEN = 16 ; +static const uint8_t EXPLR_TLXT_TLXCFG0_VC0_INIT = 32 ; +static const uint8_t EXPLR_TLXT_TLXCFG0_VC0_INIT_LEN = 16 ; +static const uint8_t EXPLR_TLXT_TLXCFG0_VC1_INIT = 48 ; +static const uint8_t EXPLR_TLXT_TLXCFG0_VC1_INIT_LEN = 16 ; + +static const uint8_t EXPLR_TLXT_TLXCFG1_SLOW_CLOCK = 0 ; +static const uint8_t EXPLR_TLXT_TLXCFG1_SHUTDOWN_MODE = 1 ; +static const uint8_t EXPLR_TLXT_TLXCFG1_SHUTDOWN_MODE_LEN = 2 ; +static const uint8_t EXPLR_TLXT_TLXCFG1_SHUTDOWN_ON_OPT_ERR = 3 ; +static const uint8_t EXPLR_TLXT_TLXCFG1_SHUTDOWN_ON_MMIO_BAD = 4 ; +static const uint8_t EXPLR_TLXT_TLXCFG1_SHUTDOWN_ON_DFLOW_ERR = 5 ; +static const uint8_t EXPLR_TLXT_TLXCFG1_SHUTDOWN_ON_BAR0_BAD = 6 ; +static const uint8_t EXPLR_TLXT_TLXCFG1_IGNORE_A4_ON_PR_RD = 7 ; +static const uint8_t EXPLR_TLXT_TLXCFG1_TLXR_DEBSEL_LO = 8 ; +static const uint8_t EXPLR_TLXT_TLXCFG1_TLXR_DEBSEL_LO_LEN = 4 ; +static const uint8_t EXPLR_TLXT_TLXCFG1_TLXR_DEBSEL_HI = 12 ; +static const uint8_t EXPLR_TLXT_TLXCFG1_TLXR_DEBSEL_HI_LEN = 4 ; +static const uint8_t EXPLR_TLXT_TLXCFG1_TLXT_DBG_DIAL = 16 ; +static const uint8_t EXPLR_TLXT_TLXCFG1_TLXT_DBG_DIAL_LEN = 16 ; +static const uint8_t EXPLR_TLXT_TLXCFG1_HI_BW_THRESHOLD = 32 ; +static const uint8_t EXPLR_TLXT_TLXCFG1_HI_BW_THRESHOLD_LEN = 3 ; +static const uint8_t EXPLR_TLXT_TLXCFG1_MID_BW_THRESHOLD = 35 ; +static const uint8_t EXPLR_TLXT_TLXCFG1_MID_BW_THRESHOLD_LEN = 3 ; +static const uint8_t EXPLR_TLXT_TLXCFG1_HI_BW_DIS = 38 ; +static const uint8_t EXPLR_TLXT_TLXCFG1_MID_BW_ENAB = 39 ; +static const uint8_t EXPLR_TLXT_TLXCFG1_HI_BW_ENAB_RD_THRESH = 40 ; +static const uint8_t EXPLR_TLXT_TLXCFG1_LOW_LAT_RD_DIS = 41 ; +static const uint8_t EXPLR_TLXT_TLXCFG1_CLK_GATE_DIS = 42 ; +static const uint8_t EXPLR_TLXT_TLXCFG1_CFEI_ENAB = 43 ; +static const uint8_t EXPLR_TLXT_TLXCFG1_CFEI_PERSIST = 44 ; +static const uint8_t EXPLR_TLXT_TLXCFG1_CFEI_BIT0 = 45 ; +static const uint8_t EXPLR_TLXT_TLXCFG1_CFEI_BIT1 = 46 ; +static const uint8_t EXPLR_TLXT_TLXCFG1_LOW_LAT_DEGRADE_DIS = 47 ; +static const uint8_t EXPLR_TLXT_TLXCFG1_TLXT_INTRP_CMDFLAG_0 = 48 ; +static const uint8_t EXPLR_TLXT_TLXCFG1_TLXT_INTRP_CMDFLAG_0_LEN = 4 ; +static const uint8_t EXPLR_TLXT_TLXCFG1_TLXT_INTRP_CMDFLAG_1 = 52 ; +static const uint8_t EXPLR_TLXT_TLXCFG1_TLXT_INTRP_CMDFLAG_1_LEN = 4 ; +static const uint8_t EXPLR_TLXT_TLXCFG1_TLXT_INTRP_CMDFLAG_2 = 56 ; +static const uint8_t EXPLR_TLXT_TLXCFG1_TLXT_INTRP_CMDFLAG_2_LEN = 4 ; +static const uint8_t EXPLR_TLXT_TLXCFG1_TLXT_INTRP_CMDFLAG_3 = 60 ; +static const uint8_t EXPLR_TLXT_TLXCFG1_TLXT_INTRP_CMDFLAG_3_LEN = 4 ; + +static const uint8_t EXPLR_TLXT_TLXCFG2_TLXC_WAT_EN_REG = 0 ; +static const uint8_t EXPLR_TLXT_TLXCFG2_TLXC_WAT_EN_REG_LEN = 24 ; +static const uint8_t EXPLR_TLXT_TLXCFG2_XSTOP_RD_GATE_DIS = 24 ; +static const uint8_t EXPLR_TLXT_TLXCFG2_TBD = 25 ; +static const uint8_t EXPLR_TLXT_TLXCFG2_TBD_LEN = 39 ; + +static const uint8_t EXPLR_TLXT_TLXFIRACT0_FIR_ACTION0 = 0 ; +static const uint8_t EXPLR_TLXT_TLXFIRACT0_FIR_ACTION0_LEN = 30 ; + +static const uint8_t EXPLR_TLXT_TLXFIRACT1_FIR_ACTION1 = 0 ; +static const uint8_t EXPLR_TLXT_TLXFIRACT1_FIR_ACTION1_LEN = 30 ; + +static const uint8_t EXPLR_TLXT_TLXFIRMASK_FIR_MASK = 0 ; +static const uint8_t EXPLR_TLXT_TLXFIRMASK_FIR_MASK_LEN = 30 ; + +static const uint8_t EXPLR_TLXT_TLXFIRQ_INFO_REG_PARITY_ERROR = 0 ; +static const uint8_t EXPLR_TLXT_TLXFIRQ_CTRL_REG_PARITY_ERROR = 1 ; +static const uint8_t EXPLR_TLXT_TLXFIRQ_TLX_VC0_MAX_CRD_ERROR = 2 ; +static const uint8_t EXPLR_TLXT_TLXFIRQ_TLX_VC1_MAX_CRD_ERROR = 3 ; +static const uint8_t EXPLR_TLXT_TLXFIRQ_TLX_DCP0_MAX_CRD_ERROR = 4 ; +static const uint8_t EXPLR_TLXT_TLXFIRQ_TLX_DCP3_MAX_CRD_ERROR = 5 ; +static const uint8_t EXPLR_TLXT_TLXFIRQ_CREDIT_MGMT_ERROR = 6 ; +static const uint8_t EXPLR_TLXT_TLXFIRQ_CREDIT_MGMT_PERROR = 7 ; +static const uint8_t EXPLR_TLXT_TLXFIRQ_TLXT_PARITY_ERROR = 8 ; +static const uint8_t EXPLR_TLXT_TLXFIRQ_TLXT_RECOVERABLE_ERROR = 9 ; +static const uint8_t EXPLR_TLXT_TLXFIRQ_TLXT_CONFIG_ERROR = 10 ; +static const uint8_t EXPLR_TLXT_TLXFIRQ_TLXT_INFORMATIONAL_PERROR = 11 ; +static const uint8_t EXPLR_TLXT_TLXFIRQ_TLXT_HARD_ERROR = 12 ; +static const uint8_t EXPLR_TLXT_TLXFIRQ_RESERVED_10 = 13 ; +static const uint8_t EXPLR_TLXT_TLXFIRQ_RESERVED_10_LEN = 3 ; +static const uint8_t EXPLR_TLXT_TLXFIRQ_TLXR_SHUTDOWN = 16 ; +static const uint8_t EXPLR_TLXT_TLXFIRQ_TLXR_BAR0_OR_MMIO_NF = 17 ; +static const uint8_t EXPLR_TLXT_TLXFIRQ_TLXR_OC_MALFORMED = 18 ; +static const uint8_t EXPLR_TLXT_TLXFIRQ_TLXR_OC_PROTOCOL_ERROR = 19 ; +static const uint8_t EXPLR_TLXT_TLXFIRQ_TLXR_ADDR_XLAT = 20 ; +static const uint8_t EXPLR_TLXT_TLXFIRQ_TLXR_METADATA_UNC_DPERR = 21 ; +static const uint8_t EXPLR_TLXT_TLXFIRQ_TLXR_OC_UNSUPPORTED = 22 ; +static const uint8_t EXPLR_TLXT_TLXFIRQ_TLXR_OC_FATAL = 23 ; +static const uint8_t EXPLR_TLXT_TLXFIRQ_TLXR_CONTROL_ERROR = 24 ; +static const uint8_t EXPLR_TLXT_TLXFIRQ_TLXR_INTERNAL_ERROR = 25 ; +static const uint8_t EXPLR_TLXT_TLXFIRQ_TLXR_INFORMATIONAL = 26 ; +static const uint8_t EXPLR_TLXT_TLXFIRQ_TLXR_TRACE_STOP = 27 ; +static const uint8_t EXPLR_TLXT_TLXFIRQ_INTERNAL_SCOM_ERROR = 28 ; +static const uint8_t EXPLR_TLXT_TLXFIRQ_INTERNAL_SCOM_ERROR_CLONE = 29 ; + +static const uint8_t EXPLR_TLXT_TLXFIRWOF_FIR_WOF = 0 ; +static const uint8_t EXPLR_TLXT_TLXFIRWOF_FIR_WOF_LEN = 30 ; + +static const uint8_t EXPLR_TLXT_TLXTINTHLD0_TLXT_INTHLD_0_REG = 0 ; +static const uint8_t EXPLR_TLXT_TLXTINTHLD0_TLXT_INTHLD_0_REG_LEN = 64 ; + +static const uint8_t EXPLR_TLXT_TLXTINTHLD1_TLXT_INTHLD_1_REG = 0 ; +static const uint8_t EXPLR_TLXT_TLXTINTHLD1_TLXT_INTHLD_1_REG_LEN = 64 ; + +static const uint8_t EXPLR_TLXT_TLXTINTHLD2_TLXT_INTHLD_2_REG = 0 ; +static const uint8_t EXPLR_TLXT_TLXTINTHLD2_TLXT_INTHLD_2_REG_LEN = 64 ; + +static const uint8_t EXPLR_TLXT_TLXTINTHLD3_TLXT_INTHLD_3_REG = 0 ; +static const uint8_t EXPLR_TLXT_TLXTINTHLD3_TLXT_INTHLD_3_REG_LEN = 64 ; + +static const uint8_t EXPLR_TLXT_TLXTRAP0_DEBUG_BUS = 0 ; +static const uint8_t EXPLR_TLXT_TLXTRAP0_DEBUG_BUS_LEN = 64 ; + +static const uint8_t EXPLR_TLXT_TLXTRAP1_DEBUG_BUS = 0 ; +static const uint8_t EXPLR_TLXT_TLXTRAP1_DEBUG_BUS_LEN = 64 ; + +static const uint8_t EXPLR_TLXT_TLXTTRAP2_DEBUG_BUS = 0 ; +static const uint8_t EXPLR_TLXT_TLXTTRAP2_DEBUG_BUS_LEN = 64 ; + +static const uint8_t EXPLR_TLXT_TLXTTRAP3_DEBUG_BUS = 0 ; +static const uint8_t EXPLR_TLXT_TLXTTRAP3_DEBUG_BUS_LEN = 64 ; + +static const uint8_t EXPLR_TLXT_TLXTTRAP4_DEBUG_BUS = 0 ; +static const uint8_t EXPLR_TLXT_TLXTTRAP4_DEBUG_BUS_LEN = 64 ; + +static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_TLXR_UNUSED = 0 ; +static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_TLXR_UNUSED_LEN = 5 ; +static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_SPARE_7 = 5 ; +static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_TLXR_SHUTDOWN = 6 ; +static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_MMIO_BAD_WR_RESP_NF = 7 ; +static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_BAR0_PERR_NF = 8 ; +static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_BAD_TEMPLATE_OPCODE_COMBO = 9 ; +static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_SPARE_6 = 10 ; +static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_BAD_CREDIT_RETURN_SLOT = 11 ; +static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_BAD_TEMPLATE_0_FORMAT = 12 ; +static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_RESERVED_FIELD_VALUE = 13 ; +static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_DATA_SEQ_ERR = 14 ; +static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_RD_BDY_ERR = 15 ; +static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_WR_BDY_ERR = 16 ; +static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_SPARE_5 = 17 ; +static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_BAD_INTRP_RESP_TAG = 18 ; +static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_BAD_MEMCTL = 19 ; +static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_SPARE_4 = 20 ; +static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_SPARE_3 = 21 ; +static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_SPARE_2 = 22 ; +static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_ADDRESS_DROPPED = 23 ; +static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_ADDR_XLAT_ERROR_RD = 24 ; +static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_ADDR_XLAT_ERROR_WR = 25 ; +static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_PATTERN_CORRUPT = 26 ; +static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_DATAFLOW_PERR_NF = 27 ; +static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_METADATA_UNC = 28 ; +static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_UNSUPPORTED_PR_RD_DDR = 29 ; +static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_UNSUPPORTED_RD_MEM = 30 ; +static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_UNSUPPORTED_WRITE = 31 ; +static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_UNSUPPORTED_PR_LENGTH = 32 ; +static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_UNSUPPORTED_PAD_MEM = 33 ; +static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_PAD_MEM_LEN_ERR = 34 ; +static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_UNSUPPORTED_WRITE_LENGTH = 35 ; +static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_UNSUPPORTED_READ_LENGTH = 36 ; +static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_UNSUPPORTED_OPCODE = 37 ; +static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_UNSUPPORTED_TEMPLATE = 38 ; +static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_UNSUPPORTED_DATA_CARRIER = 39 ; +static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_BUFF_CNTL_PERR = 40 ; +static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_D_LIST_UNC = 41 ; +static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_TAGSTORE_UNC = 42 ; +static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_B_MGMT_3 = 43 ; +static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_SPARE_1 = 44 ; +static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_FLIT_PERR = 45 ; +static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_MMIO_WD_PERR = 46 ; +static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_MMIO_WD_INV = 47 ; +static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_SRQ_WD_PERR = 48 ; +static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_SRQ_WD_INV = 49 ; +static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_D_LIST_UNDERFLOW = 50 ; +static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_DATAFLOW_PERR_F = 51 ; +static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_D_LIST_OVERFLOW = 52 ; +static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_MMIO_BAD_WR_RESP_F = 53 ; +static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_BAR0_PERR_F = 54 ; +static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_B_MGMT_1 = 55 ; +static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_B_MGMT_2 = 56 ; +static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_ADDR_XLATE_HOLE = 57 ; +static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_BAD_DATA_RXD = 58 ; +static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_METADATA_CORR = 59 ; +static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_TAG_BUFFER_CORR = 60 ; +static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_D_LIST_CORR = 61 ; +static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_EPOW_SIGNALLED = 62 ; +static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_TRACE_STOP = 63 ; + +static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_MASK_ERRMASK = 0 ; +static const uint8_t EXPLR_TLXT_TLX_ERR0_REPORTQ_MASK_ERRMASK_LEN = 64 ; + +static const uint8_t EXPLR_TLXT_TLX_ERR1_REPORTQ_TLXT_PERRORS = 0 ; +static const uint8_t EXPLR_TLXT_TLX_ERR1_REPORTQ_TLXT_PERRORS_LEN = 37 ; +static const uint8_t EXPLR_TLXT_TLX_ERR1_REPORTQ_TLXT_ERRORS = 37 ; +static const uint8_t EXPLR_TLXT_TLX_ERR1_REPORTQ_TLXT_ERRORS_LEN = 27 ; + +static const uint8_t EXPLR_TLXT_TLX_ERR1_REPORTQ_MASK_ERRMASK = 0 ; +static const uint8_t EXPLR_TLXT_TLX_ERR1_REPORTQ_MASK_ERRMASK_LEN = 64 ; + +static const uint8_t EXPLR_TLXT_TLX_ERR2_REPORTQ_TLXC_PERRORS = 0 ; +static const uint8_t EXPLR_TLXT_TLX_ERR2_REPORTQ_TLXC_PERRORS_LEN = 8 ; +static const uint8_t EXPLR_TLXT_TLX_ERR2_REPORTQ_TLXC_ERRORS = 8 ; +static const uint8_t EXPLR_TLXT_TLX_ERR2_REPORTQ_TLXC_ERRORS_LEN = 6 ; +static const uint8_t EXPLR_TLXT_TLX_ERR2_REPORTQ_INTHLD_PERROR = 14 ; +static const uint8_t EXPLR_TLXT_TLX_ERR2_REPORTQ_INTHLD_PERROR_LEN = 4 ; +static const uint8_t EXPLR_TLXT_TLX_ERR2_REPORTQ_DATA_TAKEN_BUT_NOT_VALID = 18 ; +static const uint8_t EXPLR_TLXT_TLX_ERR2_REPORTQ_INTRP_REQ_SM_PERRORS = 19 ; +static const uint8_t EXPLR_TLXT_TLX_ERR2_REPORTQ_INTRP_REQ_SM_PERRORS_LEN = 4 ; +static const uint8_t EXPLR_TLXT_TLX_ERR2_REPORTQ_TL_2SL_4SL_PKT_FULL_PERR = 23 ; +static const uint8_t EXPLR_TLXT_TLX_ERR2_REPORTQ_TLXC_SPARE = 24 ; +static const uint8_t EXPLR_TLXT_TLX_ERR2_REPORTQ_TLXC_SPARE_LEN = 8 ; + +static const uint8_t EXPLR_TLXT_TLX_ERR2_REPORTQ_MASK_ERRMASK = 0 ; +static const uint8_t EXPLR_TLXT_TLX_ERR2_REPORTQ_MASK_ERRMASK_LEN = 32 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_ADDR_TRAP_REG_PCB_ADDRESS_OF_LAST_TRANSACTION_WITH_ERROR = 0 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_ADDR_TRAP_REG_PCB_ADDRESS_OF_LAST_TRANSACTION_WITH_ERROR_LEN = 16 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_ADDR_TRAP_REG_PCB_READ_NOTWRITE_OF_LAST_TRANSACTION_WITH_ERROR = 16 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_ADDR_TRAP_REG_RESERVED_LAST_LT = 17 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_ADDR_TRAP_REG_RESERVED_LAST_LT = 17 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_ADDR_TRAP_REG_SERIAL2PARALLEL_STATE_MACHINE_AT_TIME_OF_ERROR = 18 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_ADDR_TRAP_REG_SERIAL2PARALLEL_STATE_MACHINE_AT_TIME_OF_ERROR_LEN = 13 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_ADDR_TRAP_REG_SATELLITE_ACKNOWLEDGE_BIT_RETURN_PARITY = 31 ; @@ -6124,38 +6286,38 @@ static const uint8_t EXPLR_TP_MB_UNIT_TOP_ADDR_TRAP_REG_SATELLITE_ACKNOWLEDGE_BI static const uint8_t EXPLR_TP_MB_UNIT_TOP_ADDR_TRAP_REG_SATELLITE_ACKNOWLEDGE_BIT_ACCESS_VIOLATION = 33 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_ADDR_TRAP_REG_SATELLITE_ACKNOWLEDGE_BIT_INVALID_REGISTER = 34 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_ATOMIC_LOCK_MASK_LATCH_REG_MASK = 0 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_ATOMIC_LOCK_MASK_LATCH_REG_MASK_LEN = 32 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_ATOMIC_LOCK_MASK_LATCH_REG_MASK = 0 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_ATOMIC_LOCK_MASK_LATCH_REG_MASK_LEN = 32 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST1_COND_REG_1_COND1_SEL_A = 0 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST1_COND_REG_1_COND1_SEL_A = 0 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST1_COND_REG_1_COND1_SEL_A_LEN = 8 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST1_COND_REG_1_COND1_SEL_B = 8 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST1_COND_REG_1_COND1_SEL_B = 8 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST1_COND_REG_1_COND1_SEL_B_LEN = 8 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST1_COND_REG_1_COND2_SEL_A = 16 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST1_COND_REG_1_COND2_SEL_A = 16 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST1_COND_REG_1_COND2_SEL_A_LEN = 8 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST1_COND_REG_1_COND2_SEL_B = 24 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST1_COND_REG_1_COND2_SEL_B = 24 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST1_COND_REG_1_COND2_SEL_B_LEN = 8 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST1_COND_REG_1_C1_INAROW_MODE = 32 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST1_COND_REG_1_C1_INAROW_MODE = 32 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST1_COND_REG_1_AND_TRIGGER_MODE1 = 33 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST1_COND_REG_1_NOT_TRIGGER_MODE1 = 34 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST1_COND_REG_1_EDGE_TRIGGER_MODE1 = 35 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST1_COND_REG_1_UNUSED = 36 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST1_COND_REG_1_UNUSED_LEN = 3 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST1_COND_REG_1_C2_INAROW_MODE = 39 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST1_COND_REG_1_UNUSED = 36 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST1_COND_REG_1_UNUSED_LEN = 3 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST1_COND_REG_1_C2_INAROW_MODE = 39 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST1_COND_REG_1_AND_TRIGGER_MODE2 = 40 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST1_COND_REG_1_NOT_TRIGGER_MODE2 = 41 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST1_COND_REG_1_EDGE_TRIGGER_MODE2 = 42 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST1_COND_REG_1_UNUSED_2 = 43 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST1_COND_REG_1_UNUSED_2_LEN = 3 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST1_COND_REG_1_UNUSED_2 = 43 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST1_COND_REG_1_UNUSED_2_LEN = 3 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST1_COND_REG_1_COND3_ENABLE_RESET = 46 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST1_COND_REG_1_EXACT_TO_MODE = 47 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST1_COND_REG_1_EXACT_TO_MODE = 47 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST1_COND_REG_1_RESET_C2TIMER_ON_C1 = 48 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST1_COND_REG_1_RESET_C3_ON_C0 = 49 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST1_COND_REG_1_SLOW_TO_MODE = 50 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST1_COND_REG_1_RESET_C3_ON_C0 = 49 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST1_COND_REG_1_SLOW_TO_MODE = 50 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST1_COND_REG_1_EXACT_RESET_C3_ON_TO = 51 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST1_COND_REG_1_C1_COUNT_LT = 52 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST1_COND_REG_1_C1_COUNT_LT = 52 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST1_COND_REG_1_C1_COUNT_LT_LEN = 4 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST1_COND_REG_1_C2_COUNT_LT = 56 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST1_COND_REG_1_C2_COUNT_LT = 56 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST1_COND_REG_1_C2_COUNT_LT_LEN = 4 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST1_COND_REG_1_RESET_C3_SELECT = 60 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST1_COND_REG_1_RESET_C3_SELECT_LEN = 3 ; @@ -6168,38 +6330,38 @@ static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST1_COND_REG_2_CROSS_COUPLE_SELE static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST1_COND_REG_2_CROSS_COUPLE_SELECT_A_LEN = 5 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST1_COND_REG_2_CROSS_COUPLE_SELECT_B = 15 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST1_COND_REG_2_CROSS_COUPLE_SELECT_B_LEN = 5 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST1_COND_REG_2_TO_CMP_LT = 20 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST1_COND_REG_2_TO_CMP_LT_LEN = 24 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST1_COND_REG_2_TO_CMP_LT = 20 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST1_COND_REG_2_TO_CMP_LT_LEN = 24 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST2_COND_REG_1_COND1_SEL_A = 0 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST2_COND_REG_1_COND1_SEL_A = 0 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST2_COND_REG_1_COND1_SEL_A_LEN = 8 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST2_COND_REG_1_COND1_SEL_B = 8 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST2_COND_REG_1_COND1_SEL_B = 8 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST2_COND_REG_1_COND1_SEL_B_LEN = 8 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST2_COND_REG_1_COND2_SEL_A = 16 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST2_COND_REG_1_COND2_SEL_A = 16 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST2_COND_REG_1_COND2_SEL_A_LEN = 8 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST2_COND_REG_1_COND2_SEL_B = 24 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST2_COND_REG_1_COND2_SEL_B = 24 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST2_COND_REG_1_COND2_SEL_B_LEN = 8 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST2_COND_REG_1_C1_INAROW_MODE = 32 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST2_COND_REG_1_C1_INAROW_MODE = 32 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST2_COND_REG_1_AND_TRIGGER_MODE1 = 33 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST2_COND_REG_1_NOT_TRIGGER_MODE1 = 34 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST2_COND_REG_1_EDGE_TRIGGER_MODE1 = 35 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST2_COND_REG_1_UNUSED = 36 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST2_COND_REG_1_UNUSED_LEN = 3 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST2_COND_REG_1_C2_INAROW_MODE = 39 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST2_COND_REG_1_UNUSED = 36 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST2_COND_REG_1_UNUSED_LEN = 3 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST2_COND_REG_1_C2_INAROW_MODE = 39 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST2_COND_REG_1_AND_TRIGGER_MODE2 = 40 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST2_COND_REG_1_NOT_TRIGGER_MODE2 = 41 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST2_COND_REG_1_EDGE_TRIGGER_MODE2 = 42 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST2_COND_REG_1_UNUSED_2 = 43 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST2_COND_REG_1_UNUSED_2_LEN = 3 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST2_COND_REG_1_UNUSED_2 = 43 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST2_COND_REG_1_UNUSED_2_LEN = 3 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST2_COND_REG_1_COND3_ENABLE_RESET = 46 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST2_COND_REG_1_EXACT_TO_MODE = 47 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST2_COND_REG_1_EXACT_TO_MODE = 47 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST2_COND_REG_1_RESET_C2TIMER_ON_C1 = 48 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST2_COND_REG_1_RESET_C3_ON_C0 = 49 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST2_COND_REG_1_SLOW_TO_MODE = 50 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST2_COND_REG_1_RESET_C3_ON_C0 = 49 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST2_COND_REG_1_SLOW_TO_MODE = 50 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST2_COND_REG_1_EXACT_RESET_C3_ON_TO = 51 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST2_COND_REG_1_C1_COUNT_LT = 52 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST2_COND_REG_1_C1_COUNT_LT = 52 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST2_COND_REG_1_C1_COUNT_LT_LEN = 4 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST2_COND_REG_1_C2_COUNT_LT = 56 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST2_COND_REG_1_C2_COUNT_LT = 56 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST2_COND_REG_1_C2_COUNT_LT_LEN = 4 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST2_COND_REG_1_RESET_C3_SELECT = 60 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST2_COND_REG_1_RESET_C3_SELECT_LEN = 3 ; @@ -6212,24 +6374,24 @@ static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST2_COND_REG_2_CROSS_COUPLE_SELE static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST2_COND_REG_2_CROSS_COUPLE_SELECT_A_LEN = 5 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST2_COND_REG_2_CROSS_COUPLE_SELECT_B = 15 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST2_COND_REG_2_CROSS_COUPLE_SELECT_B_LEN = 5 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST2_COND_REG_2_TO_CMP_LT = 20 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST2_COND_REG_2_TO_CMP_LT_LEN = 24 ; - -static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_MODE_REG_GLB_BRCST = 0 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_MODE_REG_GLB_BRCST_LEN = 3 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_MODE_REG_TRACE_SEL = 3 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_MODE_REG_TRACE_SEL_LEN = 3 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_MODE_REG_TRIG_SEL = 6 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_MODE_REG_TRIG_SEL_LEN = 2 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST2_COND_REG_2_TO_CMP_LT = 20 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_INST2_COND_REG_2_TO_CMP_LT_LEN = 24 ; + +static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_MODE_REG_GLB_BRCST = 0 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_MODE_REG_GLB_BRCST_LEN = 3 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_MODE_REG_TRACE_SEL = 3 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_MODE_REG_TRACE_SEL_LEN = 3 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_MODE_REG_TRIG_SEL = 6 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_MODE_REG_TRIG_SEL_LEN = 2 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_MODE_REG_STOP_ON_XSTOP_SELECTION = 8 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_MODE_REG_STOP_ON_RECOV_ERR_SELECTION = 9 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_MODE_REG_STOP_ON_SPATTN_SELECTION = 10 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_MODE_REG_FREEZE_SEL = 11 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_MODE_REG_SYNC_BRCST = 12 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_MODE_REG_SYNC_BRCST_LEN = 2 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_MODE_REG_TRACE_RUN_STATUS = 17 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_MODE_REG_TRACE_RUN_STATUS_LEN = 2 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_MODE_REG_IS_FROZEN_STATUS = 19 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_MODE_REG_FREEZE_SEL = 11 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_MODE_REG_SYNC_BRCST = 12 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_MODE_REG_SYNC_BRCST_LEN = 2 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_MODE_REG_TRACE_RUN_STATUS = 17 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_MODE_REG_TRACE_RUN_STATUS_LEN = 2 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_MODE_REG_IS_FROZEN_STATUS = 19 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_MODE_REG_INST1_CONDITION_HISTORY_STATUS = 20 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_MODE_REG_INST1_CONDITION_HISTORY_STATUS_LEN = 3 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_MODE_REG_INST2_CONDITION_HISTORY_STATUS = 23 ; @@ -6241,17 +6403,17 @@ static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_MODE_REG_INST4_CONDITION_HISTORY_S static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_TRACE_MODE_REG_2_RUNN_COUNT_COMPARE_VALUE = 0 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_TRACE_MODE_REG_2_RUNN_COUNT_COMPARE_VALUE_LEN = 16 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_TRACE_MODE_REG_2_IMM_FREEZE = 16 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_TRACE_MODE_REG_2_STOP_ON_ERR = 17 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_TRACE_MODE_REG_2_IMM_FREEZE = 16 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_TRACE_MODE_REG_2_STOP_ON_ERR = 17 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_TRACE_MODE_REG_2_BANK_ON_RUNN_MATCH = 18 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_TRACE_MODE_REG_2_FORCE_TEST = 19 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_TRACE_MODE_REG_2_ACCUM_HIST = 20 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_TRACE_MODE_REG_2_FORCE_TEST = 19 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_TRACE_MODE_REG_2_ACCUM_HIST = 20 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_TRACE_MODE_REG_2_FRZ_COUNT_ON_FRZ = 21 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_TRACE_REG_0_INST1_COND3_ENABLE = 0 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_TRACE_REG_0_INST2_COND3_ENABLE = 1 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_TRACE_REG_0_INST3_COND3_ENABLE = 2 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_TRACE_REG_0_INST4_COND3_ENABLE = 3 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_TRACE_REG_0_INST1_COND3_ENABLE = 0 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_TRACE_REG_0_INST2_COND3_ENABLE = 1 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_TRACE_REG_0_INST3_COND3_ENABLE = 2 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_TRACE_REG_0_INST4_COND3_ENABLE = 3 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_TRACE_REG_0_INST1_SLOW_LFSR_MODE = 4 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_TRACE_REG_0_INST2_SLOW_LFSR_MODE = 5 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_TRACE_REG_0_INST3_SLOW_LFSR_MODE = 6 ; @@ -6268,20 +6430,20 @@ static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_TRACE_REG_0_INST2_CONDITION2_TRIG_ static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_TRACE_REG_0_INST2_CONDITION2_TRIG_SEL_LEN = 2 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_TRACE_REG_0_INST2_C2_TIMEOUT_TRIG_SEL = 18 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_TRACE_REG_0_INST2_C2_TIMEOUT_TRIG_SEL_LEN = 2 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_TRACE_REG_0_EXT_TRIG_ON_STOP = 32 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_TRACE_REG_0_EXT_TRIG_ON_FREEZE = 33 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_TRACE_REG_0_CORE_RAS0_TRIG_SEL = 34 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_TRACE_REG_0_EXT_TRIG_ON_STOP = 32 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_TRACE_REG_0_EXT_TRIG_ON_FREEZE = 33 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_TRACE_REG_0_CORE_RAS0_TRIG_SEL = 34 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_TRACE_REG_0_CORE_RAS0_TRIG_SEL_LEN = 5 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_TRACE_REG_0_CORE_RAS1_TRIG_SEL = 39 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_TRACE_REG_0_CORE_RAS1_TRIG_SEL = 39 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_TRACE_REG_0_CORE_RAS1_TRIG_SEL_LEN = 5 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_TRACE_REG_0_PC_TP_TRIG_SEL = 44 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_TRACE_REG_0_PC_TP_TRIG_SEL_LEN = 2 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_TRACE_REG_0_ARM_SEL = 46 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_TRACE_REG_0_ARM_SEL_LEN = 4 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_TRACE_REG_0_TRIG0_LEVEL_SEL = 50 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_TRACE_REG_0_TRIG0_LEVEL_SEL_LEN = 4 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_TRACE_REG_0_TRIG1_LEVEL_SEL = 54 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_TRACE_REG_0_TRIG1_LEVEL_SEL_LEN = 4 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_TRACE_REG_0_PC_TP_TRIG_SEL = 44 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_TRACE_REG_0_PC_TP_TRIG_SEL_LEN = 2 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_TRACE_REG_0_ARM_SEL = 46 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_TRACE_REG_0_ARM_SEL_LEN = 4 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_TRACE_REG_0_TRIG0_LEVEL_SEL = 50 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_TRACE_REG_0_TRIG0_LEVEL_SEL_LEN = 4 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_TRACE_REG_0_TRIG1_LEVEL_SEL = 54 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_TRACE_REG_0_TRIG1_LEVEL_SEL_LEN = 4 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_TRACE_REG_1_INST1_CONDITION1_ACTION_DO = 0 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_TRACE_REG_1_INST1_CONDITION1_ACTION_DO_LEN = 2 ; @@ -6315,23 +6477,23 @@ static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_TRACE_REG_1_INST2_CHECKSTOP_MODE_L static const uint8_t EXPLR_TP_MB_UNIT_TOP_DBG_TRACE_REG_1_INST2_CHECKSTOP_MODE_SELECTOR = 55 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_DEBUG_TRACE_CONTROL_SCOM_TRACE_START = 0 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_DEBUG_TRACE_CONTROL_SCOM_TRACE_STOP = 1 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_DEBUG_TRACE_CONTROL_SCOM_TRACE_STOP = 1 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_DEBUG_TRACE_CONTROL_SCOM_TRACE_RESET = 2 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_ERR_HOLD_LAT_FIR_MASK_PAR = 0 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_ERR_HOLD_LAT_FIR_ACTION0_PAR = 1 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_ERR_HOLD_LAT_FIR_ACTION1_PAR = 2 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_ERR_HOLD_LAT_FIR_MASK_PAR = 0 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_ERR_HOLD_LAT_FIR_ACTION0_PAR = 1 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_ERR_HOLD_LAT_FIR_ACTION1_PAR = 2 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_ERR_MASK_FIR_PAR = 0 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_ERR_MASK_FIR_ACTION0_PAR = 1 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_ERR_MASK_FIR_ACTION1_PAR = 2 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_ERR_MASK_FIR_PAR = 0 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_ERR_MASK_FIR_ACTION0_PAR = 1 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_ERR_MASK_FIR_ACTION1_PAR = 2 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_ERR_RPT_MASK_PCB_WDATA_PARITY_ERROR = 0 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_ERR_RPT_MASK_PCB_WDATA_PARITY_ERROR = 0 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_ERR_RPT_MASK_PCB_ADDRESS_PARITY_ERROR = 1 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_ERR_RPT_MASK_DL_RETURN_WDATA_PARITY_ERROR = 2 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_ERR_RPT_MASK_DL_RETURN_P0_ERROR = 3 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_ERR_RPT_MASK_UL_RDATA_PARITY_ERROR = 4 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_ERR_RPT_MASK_UL_P0_ERROR = 5 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_ERR_RPT_MASK_DL_RETURN_P0_ERROR = 3 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_ERR_RPT_MASK_UL_RDATA_PARITY_ERROR = 4 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_ERR_RPT_MASK_UL_P0_ERROR = 5 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_ERR_RPT_MASK_PARITY_ERROR_ON_INTERFACE_MACHINE = 6 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_ERR_RPT_MASK_PARITY_ERROR_ON_P2S_MACHINE = 7 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_ERR_RPT_MASK_TIMEOUT_WHILE_WAITING_FOR_ULCCH = 8 ; @@ -6341,26 +6503,26 @@ static const uint8_t EXPLR_TP_MB_UNIT_TOP_ERR_RPT_MASK_PSCOM_PARALLEL_WRITE_NVLD static const uint8_t EXPLR_TP_MB_UNIT_TOP_ERR_RPT_MASK_PSCOM_PARALLEL_READ_NVLD = 12 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_ERR_RPT_MASK_PSCOM_PARALLEL_ADDR_INVALID = 13 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_ERR_RPT_MASK_PCB_COMMAND_PARITY_ERROR = 14 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_ERR_RPT_MASK_GENERAL_TIMEOUT = 15 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_ERR_RPT_MASK_GENERAL_TIMEOUT = 15 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_ERR_RPT_MASK_SATELLITE_ACKNOWLEDGE_ACCESS_VIOLATION = 16 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_ERR_RPT_MASK_SATELLITE_ACKNOWLEDGE_INVALID_REGISTER = 17 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_FIR_MASK_IN0 = 0 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_FIR_MASK_IN1 = 1 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_FIR_MASK_IN2 = 2 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_FIR_MASK_IN3 = 3 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_FIR_MASK_IN4 = 4 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_FIR_MASK_IN5 = 5 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_FIR_MASK_IN6 = 6 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_FIR_MASK_IN7 = 7 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_FIR_MASK_IN8 = 8 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_FIR_MASK_IN9 = 9 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_FIR_MASK_IN10 = 10 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_FIR_MASK_IN11 = 11 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_FIR_MASK_IN12 = 12 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_FIR_MASK_IN14 = 13 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_FIR_MASK_IN14_LEN = 13 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_FIR_MASK_IN26 = 26 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_FIR_MASK_IN0 = 0 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_FIR_MASK_IN1 = 1 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_FIR_MASK_IN2 = 2 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_FIR_MASK_IN3 = 3 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_FIR_MASK_IN4 = 4 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_FIR_MASK_IN5 = 5 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_FIR_MASK_IN6 = 6 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_FIR_MASK_IN7 = 7 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_FIR_MASK_IN8 = 8 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_FIR_MASK_IN9 = 9 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_FIR_MASK_IN10 = 10 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_FIR_MASK_IN11 = 11 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_FIR_MASK_IN12 = 12 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_FIR_MASK_IN14 = 13 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_FIR_MASK_IN14_LEN = 13 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_FIR_MASK_IN26 = 26 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_ABORT_ON_ERROR_REG_MASK_READ_ADDR_P = 0 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_ABORT_ON_ERROR_REG_MASK_WRITE_ADDR_P = 1 ; @@ -6380,8 +6542,15 @@ static const uint8_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_AXI_PARITY_ERROR_REG_FIRST_PR_ static const uint8_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_AXI_PARITY_ERROR_REG_FIRST_PR_WR_DATA_ERR = 11 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_AXI_PARITY_ERROR_REG_SECOND_PR_WR_ADDRESS_ERR = 12 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_AXI_PARITY_ERROR_REG_SECOND_PR_WR_DATA_ERR = 13 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_AXI_PARITY_ERROR_REG_RESERVED = 14 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_AXI_PARITY_ERROR_REG_RESERVED_LEN = 18 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_AXI_PARITY_ERROR_REG_ERR_ON_FSM = 14 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_AXI_PARITY_ERROR_REG_ERR_ON_SM1_STATE = 15 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_AXI_PARITY_ERROR_REG_ERR_ON_AXI2PCB = 16 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_AXI_PARITY_ERROR_REG_ERR_ON_AXI2PCB_MASK = 17 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_AXI_PARITY_ERROR_REG_ERR_ON_AXI2PCB_TIMER = 18 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_AXI_PARITY_ERROR_REG_ERR_ON_AXI2PCB_ABORT_ON = 19 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_AXI_PARITY_ERROR_REG_ERR_ON = 20 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_AXI_PARITY_ERROR_REG_RESERVED = 21 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_AXI_PARITY_ERROR_REG_RESERVED_LEN = 11 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_AXI_PARITY_ERROR_REG_SLAVE_ADDR = 32 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_AXI_PARITY_ERROR_REG_SLAVE_ADDR_LEN = 32 ; @@ -6390,10 +6559,10 @@ static const uint8_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_ERROR_MASK_REG_PARITY_RSP_DATA static const uint8_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_ERROR_MASK_REG_PARITY_RSP_DATA_1 = 2 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_ERROR_MASK_REG_PARITY_RSP_DATA_2 = 3 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_ERROR_MASK_REG_PARITY_RSP_DATA_3 = 4 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_ERROR_MASK_REG_TIMEOUT = 5 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_ERROR_MASK_REG_TIMEOUT = 5 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_ERROR_MASK_REG_INT_ADDR_ACCESS = 6 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_ERROR_MASK_REG_PIB2GIF = 7 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_ERROR_MASK_REG_PCB_ERR_CODE = 8 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_ERROR_MASK_REG_PIB2GIF = 7 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_ERROR_MASK_REG_PCB_ERR_CODE = 8 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_ERROR_MASK_REG_PCB_ERR_CODE_LEN = 3 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_ERROR_MASK_REG_AXI_READ_ADDR_PARITY = 11 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_ERROR_MASK_REG_AXI_WRITE_ADDR_PARITY = 12 ; @@ -6402,158 +6571,216 @@ static const uint8_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_ERROR_MASK_REG_AXI_WRITE_DATA_ static const uint8_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_ERROR_MASK_REG_AXI_WRITE_DATA_PARITY_15_8 = 15 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_ERROR_MASK_REG_AXI_WRITE_DATA_PARITY_7_0 = 16 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_ERROR_MASK_REG_PIB2GIF_PARITY = 17 ; - -static const uint8_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_ERROR_REG_PARITY_RSP_INFO = 0 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_ERROR_REG_PARITY_RSP_DATA_0 = 1 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_ERROR_REG_PARITY_RSP_DATA_1 = 2 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_ERROR_REG_PARITY_RSP_DATA_2 = 3 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_ERROR_REG_PARITY_RSP_DATA_3 = 4 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_ERROR_REG_TIMEOUT = 5 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_ERROR_REG_INT_ADDR_ACCESS = 6 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_ERROR_REG_INVALID_ACCESS = 7 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_ERROR_REG_PCB_ERR_CODE = 8 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_ERROR_REG_PCB_ERR_CODE_LEN = 3 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_ERROR_MASK_REG_PARITY_ON_STATE_MACHINE = 18 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_ERROR_MASK_REG_PARITY_ON_SM1 = 19 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_ERROR_MASK_REG_PARITY_ON = 21 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_ERROR_MASK_REG_PARITY_ON_TIMER = 22 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_ERROR_MASK_REG_PARITY_ON_ABORT_ON = 23 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_ERROR_MASK_REG_PARITY_ON_PARITY = 24 ; + +static const uint8_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_ERROR_REG_PARITY_RSP_INFO = 0 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_ERROR_REG_PARITY_RSP_DATA_0 = 1 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_ERROR_REG_PARITY_RSP_DATA_1 = 2 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_ERROR_REG_PARITY_RSP_DATA_2 = 3 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_ERROR_REG_PARITY_RSP_DATA_3 = 4 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_ERROR_REG_TIMEOUT = 5 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_ERROR_REG_INT_ADDR_ACCESS = 6 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_ERROR_REG_INVALID_ACCESS = 7 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_ERROR_REG_PCB_ERR_CODE = 8 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_ERROR_REG_PCB_ERR_CODE_LEN = 3 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_ERROR_REG_AXI_READ_ADDR_PARITY = 11 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_ERROR_REG_AXI_WRITE_ADDR_PARITY = 12 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_ERROR_REG_AXI_WRITE_DATA_PARITY_31_24 = 13 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_ERROR_REG_AXI_WRITE_DATA_PARITY_23_16 = 14 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_ERROR_REG_AXI_WRITE_DATA_PARITY_15_8 = 15 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_ERROR_REG_AXI_WRITE_DATA_PARITY_7_0 = 16 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_ERROR_REG_PIB2GIF_PARITY = 17 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_ERROR_REG_PIB2GIF_PARITY = 17 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_RESET_REG_RESET_STATEMACHINE = 63 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_TIMER_REG_COUNT = 48 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_TIMER_REG_COUNT_LEN = 16 ; - -static const uint8_t EXPLR_TP_MB_UNIT_TOP_HOLD_OUT_REG_SPARE_LATCH_UNUSED = 0 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_HOLD_OUT_REG_OUT = 1 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_HOLD_OUT_REG_OUT_LEN = 18 ; - -static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_IN0 = 0 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_IN1 = 1 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_IN2 = 2 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_IN3 = 3 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_IN4 = 4 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_IN5 = 5 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_IN6 = 6 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_IN7 = 7 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_IN8 = 8 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_IN9 = 9 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_IN10 = 10 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_IN10_LEN = 53 ; - -static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_ACTION0_IN = 0 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_ACTION0_IN_LEN = 63 ; - -static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_ACTION1_IN = 0 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_ACTION1_IN_LEN = 63 ; - -static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_MASK_LFIR_IN = 0 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_MASK_LFIR_IN_LEN = 63 ; - -static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_XSTOP_ERR_IN0 = 0 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_XSTOP_ERR_IN1 = 1 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_XSTOP_ERR_IN2 = 2 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_XSTOP_ERR_IN3 = 3 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_XSTOP_ERR_IN4 = 4 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_XSTOP_ERR_IN5 = 5 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_XSTOP_ERR_IN6 = 6 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_XSTOP_ERR_IN7 = 7 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_XSTOP_ERR_IN8 = 8 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_XSTOP_ERR_IN9 = 9 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_XSTOP_ERR_IN10 = 10 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_XSTOP_ERR_IN11 = 11 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_XSTOP_ERR_IN12 = 12 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_XSTOP_ERR_IN13 = 13 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_XSTOP_ERR_IN14 = 14 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_XSTOP_ERR_IN15 = 15 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_XSTOP_ERR_IN16 = 16 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_XSTOP_ERR_IN17 = 17 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_XSTOP_ERR_IN18 = 18 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_XSTOP_ERR_IN19 = 19 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_XSTOP_ERR_IN20 = 20 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_XSTOP_ERR_IN21 = 21 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_XSTOP_ERR_IN22 = 22 ; - -static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_XSTOP_MASK_IN = 0 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_XSTOP_MASK_IN_LEN = 22 ; - -static const uint8_t EXPLR_TP_MB_UNIT_TOP_MODE_REG_IN0 = 0 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_MODE_REG_IN1 = 1 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_MODE_REG_IN2 = 2 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_MODE_REG_IN3 = 3 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_MODE_REG_IN4 = 4 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_MODE_REG_IN5 = 5 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_MODE_REG_IN6 = 6 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_MODE_REG_IN7 = 7 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_MODE_REG_IN8 = 8 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_MODE_REG_IN9 = 9 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_MODE_REG_IN10 = 10 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_MODE_REG_IN11 = 11 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_MODE_REG_IN = 12 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_MODE_REG_IN_LEN = 4 ; - -static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_UNUSED_0 = 0 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_UNUSED_1 = 1 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_UNUSED_2 = 2 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_UNUSED_3 = 3 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_UNUSED_4 = 4 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_UNUSED_5 = 5 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_UNUSED_6 = 6 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_UNUSED_7 = 7 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_UNUSED_8 = 8 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_UNUSED_9 = 9 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_PCS_GPBC_IRQ_106 = 10 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_MOORTEC_PVT = 11 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_PCS_GPBC_IRQ_111 = 12 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_PCS_GPBC_IRQ_112 = 13 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_TOP_DIGITAL_IO__FAIL_N = 14 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_PROC_SS__TOP_FATAL = 15 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_PROC_SS__TOP_NON_FATAL = 16 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_OCMB_DOORBELL_INT_7 = 17 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_OCMB_DOORBELL_INT_6 = 18 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_OCMB_DOORBELL_INT_5 = 19 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_OCMB_DOORBELL_INT_4 = 20 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_OCMB_DOORBELL_INT_3 = 21 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_OCMB_DOORBELL_INT_2 = 22 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_OCMB_DOORBELL_INT_1 = 23 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_OCMB_DOORBELL_INT_0 = 24 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_TOP_DIGITAL_IO__DDR_EVENTB = 25 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_DDR4_PHY__FATAL = 26 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_DDR4_PHY__NON_FATAL = 27 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_DDR4_PHY__DDR_PHY_IRQ0 = 28 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_FOXHOUND_LANE_7__FATAL = 29 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_FOXHOUND_LANE_6__FATAL = 30 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_FOXHOUND_LANE_5__FATAL = 31 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_FOXHOUND_LANE_4__FATAL = 32 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_FOXHOUND_LANE_3__FATAL = 33 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_FOXHOUND_LANE_2__FATAL = 34 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_FOXHOUND_LANE_1__FATAL = 35 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_FOXHOUND_LANE_0__FATAL = 36 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_FOXHOUND_LANE_7__NON_FATAL = 37 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_FOXHOUND_LANE_6__NON_FATAL = 38 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_FOXHOUND_LANE_5__NON_FATAL = 39 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_FOXHOUND_LANE_4__NON_FATAL = 40 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_FOXHOUND_LANE_3__NON_FATAL = 41 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_FOXHOUND_LANE_2__NON_FATAL = 42 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_FOXHOUND_LANE_1__NON_FATAL = 43 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_FOXHOUND_LANE_0__NON_FATAL = 44 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_FOXHOUND_LANE_7__SERDES_INT = 45 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_FOXHOUND_LANE_6__SERDES_INT = 46 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_FOXHOUND_LANE_5__SERDES_INT = 47 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_FOXHOUND_LANE_4__SERDES_INT = 48 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_FOXHOUND_LANE_3__SERDES_INT = 49 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_FOXHOUND_LANE_2__SERDES_INT = 50 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_FOXHOUND_LANE_1__SERDES_INT = 51 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_FOXHOUND_LANE_0__SERDES_INT = 52 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_TIMER_REG_COUNT = 48 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_GIF2PCB_TIMER_REG_COUNT_LEN = 16 ; + +static const uint8_t EXPLR_TP_MB_UNIT_TOP_HOLD_OUT_REG_SPARE_LATCH_UNUSED = 0 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_HOLD_OUT_REG_OUT = 1 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_HOLD_OUT_REG_OUT_LEN = 18 ; + +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_IN0 = 0 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_IN1 = 1 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_IN2 = 2 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_IN3 = 3 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_IN4 = 4 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_IN5 = 5 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_IN6 = 6 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_IN7 = 7 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_IN8 = 8 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_IN9 = 9 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_UNUSED_0 = 10 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_UNUSED_1 = 11 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_UNUSED_2 = 12 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_UNUSED_3 = 13 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_UNUSED_4 = 14 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_UNUSED_5 = 15 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_UNUSED_6 = 16 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_UNUSED_7 = 17 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_UNUSED_8 = 18 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_DLL_IRQ = 19 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_PCS_GPBC_IRQ_106 = 20 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_MOORTEC_PVT = 21 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_PCS_GPBC_IRQ_111 = 22 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_PCS_GPBC_IRQ_112 = 23 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_TOP_DIGITAL_IO__FAIL_N = 24 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_PROC_SS__TOP_FATAL = 25 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_PROC_SS__TOP_NON_FATAL = 26 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_OCMB_DOORBELL_INT_7 = 27 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_OCMB_DOORBELL_INT_6 = 28 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_OCMB_DOORBELL_INT_5 = 29 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_OCMB_DOORBELL_INT_4 = 30 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_OCMB_DOORBELL_INT_3 = 31 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_OCMB_DOORBELL_INT_2 = 32 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_OCMB_DOORBELL_INT_1 = 33 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_OCMB_DOORBELL_INT_0 = 34 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_TOP_DIGITAL_IO__DDR_EVENTB = 35 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_DDR4_PHY__FATAL = 36 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_DDR4_PHY__NON_FATAL = 37 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_DDR4_PHY__DDR_PHY_IRQ0 = 38 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_FOXHOUND_LANE_7__FATAL = 39 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_FOXHOUND_LANE_6__FATAL = 40 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_FOXHOUND_LANE_5__FATAL = 41 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_FOXHOUND_LANE_4__FATAL = 42 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_FOXHOUND_LANE_3__FATAL = 43 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_FOXHOUND_LANE_2__FATAL = 44 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_FOXHOUND_LANE_1__FATAL = 45 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_FOXHOUND_LANE_0__FATAL = 46 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_FOXHOUND_LANE_7__NON_FATAL = 47 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_FOXHOUND_LANE_6__NON_FATAL = 48 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_FOXHOUND_LANE_5__NON_FATAL = 49 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_FOXHOUND_LANE_4__NON_FATAL = 50 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_FOXHOUND_LANE_3__NON_FATAL = 51 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_FOXHOUND_LANE_2__NON_FATAL = 52 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_FOXHOUND_LANE_1__NON_FATAL = 53 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_FOXHOUND_LANE_0__NON_FATAL = 54 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_FOXHOUND_LANE_7__SERDES_INT = 55 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_FOXHOUND_LANE_6__SERDES_INT = 56 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_FOXHOUND_LANE_5__SERDES_INT = 57 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_FOXHOUND_LANE_4__SERDES_INT = 58 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_FOXHOUND_LANE_3__SERDES_INT = 59 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_FOXHOUND_LANE_2__SERDES_INT = 60 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_FOXHOUND_LANE_1__SERDES_INT = 61 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_FOXHOUND_LANE_0__SERDES_INT = 62 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_IN63 = 63 ; + +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_ACTION0_IN = 0 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_ACTION0_IN_LEN = 64 ; + +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_ACTION1_IN = 0 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_ACTION1_IN_LEN = 64 ; + +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_MASK_LFIR_IN = 0 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_FIR_MASK_LFIR_IN_LEN = 64 ; + +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_XSTOP_ERR_IN0 = 0 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_XSTOP_ERR_IN1 = 1 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_XSTOP_ERR_IN2 = 2 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_XSTOP_ERR_IN3 = 3 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_XSTOP_ERR_IN4 = 4 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_XSTOP_ERR_IN5 = 5 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_XSTOP_ERR_IN6 = 6 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_XSTOP_ERR_IN7 = 7 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_XSTOP_ERR_IN8 = 8 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_XSTOP_ERR_IN9 = 9 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_XSTOP_ERR_IN10 = 10 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_XSTOP_ERR_IN11 = 11 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_XSTOP_ERR_IN12 = 12 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_XSTOP_ERR_IN13 = 13 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_XSTOP_ERR_IN14 = 14 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_XSTOP_ERR_IN15 = 15 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_XSTOP_ERR_IN16 = 16 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_XSTOP_ERR_IN17 = 17 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_XSTOP_ERR_IN18 = 18 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_XSTOP_ERR_IN19 = 19 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_XSTOP_ERR_IN20 = 20 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_XSTOP_ERR_IN21 = 21 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_XSTOP_ERR_IN22 = 22 ; + +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_XSTOP_MASK_IN = 0 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_LOCAL_XSTOP_MASK_IN_LEN = 22 ; + +static const uint8_t EXPLR_TP_MB_UNIT_TOP_MODE_REG_IN0 = 0 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_MODE_REG_IN1 = 1 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_MODE_REG_IN2 = 2 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_MODE_REG_IN3 = 3 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_MODE_REG_IN4 = 4 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_MODE_REG_IN5 = 5 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_MODE_REG_IN6 = 6 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_MODE_REG_IN7 = 7 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_MODE_REG_IN8 = 8 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_MODE_REG_IN9 = 9 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_MODE_REG_IN10 = 10 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_MODE_REG_IN11 = 11 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_MODE_REG_IN = 12 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_MODE_REG_IN_LEN = 4 ; + +static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_UNUSED_0 = 0 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_UNUSED_1 = 1 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_UNUSED_2 = 2 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_UNUSED_3 = 3 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_UNUSED_4 = 4 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_UNUSED_5 = 5 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_UNUSED_6 = 6 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_UNUSED_7 = 7 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_UNUSED_8 = 8 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_DLL_IRQ = 9 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_PCS_GPBC_IRQ_106 = 10 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_MOORTEC_PVT = 11 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_PCS_GPBC_IRQ_111 = 12 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_PCS_GPBC_IRQ_112 = 13 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_TOP_DIGITAL_IO__FAIL_N = 14 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_PROC_SS__TOP_FATAL = 15 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_PROC_SS__TOP_NON_FATAL = 16 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_OCMB_DOORBELL_INT_7 = 17 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_OCMB_DOORBELL_INT_6 = 18 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_OCMB_DOORBELL_INT_5 = 19 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_OCMB_DOORBELL_INT_4 = 20 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_OCMB_DOORBELL_INT_3 = 21 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_OCMB_DOORBELL_INT_2 = 22 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_OCMB_DOORBELL_INT_1 = 23 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_OCMB_DOORBELL_INT_0 = 24 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_TOP_DIGITAL_IO__DDR_EVENTB = 25 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_DDR4_PHY__FATAL = 26 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_DDR4_PHY__NON_FATAL = 27 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_DDR4_PHY__DDR_PHY_IRQ0 = 28 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_FOXHOUND_LANE_7__FATAL = 29 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_FOXHOUND_LANE_6__FATAL = 30 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_FOXHOUND_LANE_5__FATAL = 31 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_FOXHOUND_LANE_4__FATAL = 32 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_FOXHOUND_LANE_3__FATAL = 33 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_FOXHOUND_LANE_2__FATAL = 34 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_FOXHOUND_LANE_1__FATAL = 35 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_FOXHOUND_LANE_0__FATAL = 36 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_FOXHOUND_LANE_7__NON_FATAL = 37 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_FOXHOUND_LANE_6__NON_FATAL = 38 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_FOXHOUND_LANE_5__NON_FATAL = 39 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_FOXHOUND_LANE_4__NON_FATAL = 40 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_FOXHOUND_LANE_3__NON_FATAL = 41 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_FOXHOUND_LANE_2__NON_FATAL = 42 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_FOXHOUND_LANE_1__NON_FATAL = 43 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_FOXHOUND_LANE_0__NON_FATAL = 44 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_FOXHOUND_LANE_7__SERDES_INT = 45 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_FOXHOUND_LANE_6__SERDES_INT = 46 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_FOXHOUND_LANE_5__SERDES_INT = 47 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_FOXHOUND_LANE_4__SERDES_INT = 48 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_FOXHOUND_LANE_3__SERDES_INT = 49 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_FOXHOUND_LANE_2__SERDES_INT = 50 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_FOXHOUND_LANE_1__SERDES_INT = 51 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_MSG_REG_FOXHOUND_LANE_0__SERDES_INT = 52 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_ABORT_ON_ERROR_REG_MASK_READ_ADDR_P = 61 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_ABORT_ON_ERROR_REG_MASK_WRITE_ADDR_P = 62 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_ABORT_ON_ERROR_REG_MASK_WRITE_DATA_P = 63 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_ERROR_MASK2_REG_ERROR_MASK2_REG = 0 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_ERROR_MASK2_REG_ERROR_MASK2_REG_LEN = 64 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_ERROR_MASK2_REG_MASK_TP_MSG = 0 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_ERROR_MASK2_REG_MASK_TP_MSG_LEN = 64 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_ERROR_MASK_REG_PARITY_REQ_DATA_0 = 0 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_ERROR_MASK_REG_PARITY_REQ_DATA_1 = 1 ; @@ -6562,65 +6789,83 @@ static const uint8_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_ERROR_MASK_REG_PARITY_REQ_DATA static const uint8_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_ERROR_MASK_REG_PARITY_REQ_ADDR_0 = 4 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_ERROR_MASK_REG_PARITY_REQ_ADDR_1 = 5 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_ERROR_MASK_REG_PARITY_REQ_CTRL = 6 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_ERROR_MASK_REG_TIMEOUT = 7 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_ERROR_MASK_REG_TIMEOUT = 7 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_ERROR_MASK_REG_INT_ADDR_ACCESS = 8 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_ERROR_MASK_REG_GIF2PCB = 32 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_ERROR_MASK_REG_GIF2PCB_LEN = 7 ; - -static const uint8_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_ERROR_REG_PARITY_REQ_DATA_0 = 0 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_ERROR_REG_PARITY_REQ_DATA_1 = 1 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_ERROR_REG_PARITY_REQ_DATA_2 = 2 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_ERROR_REG_PARITY_REQ_DATA_3 = 3 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_ERROR_REG_PARITY_REQ_ADDR_0 = 4 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_ERROR_REG_PARITY_REQ_ADDR_1 = 5 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_ERROR_REG_PARITY_REQ_CTRL = 6 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_ERROR_REG_TIMEOUT = 7 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_ERROR_REG_INT_ADDR_ACCESS = 8 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_ERROR_REG_ERROR_REG_UNUSED1 = 9 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_ERROR_REG_ERROR_REG_UNUSED1_LEN = 23 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_ERROR_REG_GIF2PCB = 32 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_ERROR_REG_GIF2PCB_LEN = 14 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_ERROR_REG_GIF2PCB_ERROR_REG = 46 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_ERROR_REG_GIF2PCB_ERROR_REG_LEN = 4 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_ERROR_REG_ERROR_REG_UNUSED2 = 50 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_ERROR_MASK_REG_PARITY_ON_FSM = 9 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_ERROR_MASK_REG_PARITY_ON_REG0 = 10 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_ERROR_MASK_REG_PARITY_ON_REG1 = 11 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_ERROR_MASK_REG_PARITY_ON_REG2 = 12 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_ERROR_MASK_REG_PARITY_ON_REG3 = 13 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_ERROR_MASK_REG_PARITY_ON_REG4 = 14 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_ERROR_MASK_REG_PARITY_ON_REG5 = 15 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_ERROR_MASK_REG_INVALID_ADDRESS = 16 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_ERROR_MASK_REG_MASK_ERROR_REG_UNUSED1 = 17 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_ERROR_MASK_REG_MASK_ERROR_REG_UNUSED1_LEN = 15 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_ERROR_MASK_REG_GIF2PCB = 32 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_ERROR_MASK_REG_GIF2PCB_LEN = 18 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_ERROR_MASK_REG_MASK_ERROR_REG_UNUSED2 = 50 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_ERROR_MASK_REG_MASK_ERROR_REG_UNUSED2_LEN = 14 ; + +static const uint8_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_ERROR_REG_PARITY_REQ_DATA_0 = 0 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_ERROR_REG_PARITY_REQ_DATA_1 = 1 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_ERROR_REG_PARITY_REQ_DATA_2 = 2 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_ERROR_REG_PARITY_REQ_DATA_3 = 3 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_ERROR_REG_PARITY_REQ_ADDR_0 = 4 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_ERROR_REG_PARITY_REQ_ADDR_1 = 5 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_ERROR_REG_PARITY_REQ_CTRL = 6 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_ERROR_REG_TIMEOUT = 7 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_ERROR_REG_INT_ADDR_ACCESS = 8 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_ERROR_REG_PARITY_ON_FSM = 9 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_ERROR_REG_PARITY_ON_REG0 = 10 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_ERROR_REG_PARITY_ON_REG1 = 11 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_ERROR_REG_PARITY_ON_REG2 = 12 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_ERROR_REG_PARITY_ON_REG3 = 13 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_ERROR_REG_PARITY_ON_REG4 = 14 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_ERROR_REG_PARITY_ON_REG5 = 15 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_ERROR_REG_INVALID_ADDRESS = 16 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_ERROR_REG_ERROR_REG_UNUSED1 = 17 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_ERROR_REG_ERROR_REG_UNUSED1_LEN = 15 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_ERROR_REG_GIF2PCB = 32 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_ERROR_REG_GIF2PCB_LEN = 18 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_ERROR_REG_ERROR_REG_UNUSED2 = 50 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_ERROR_REG_ERROR_REG_UNUSED2_LEN = 14 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_ERROR_REG2_TP_MSG_REG = 0 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_ERROR_REG2_TP_MSG_REG_LEN = 64 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_ERROR_REG2_TP_MSG_REG = 0 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_ERROR_REG2_TP_MSG_REG_LEN = 64 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_TIMER_REG_COUNT = 48 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_TIMER_REG_COUNT_LEN = 16 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_TIMER_REG_COUNT = 48 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_PIB2GIF_TIMER_REG_COUNT_LEN = 16 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_PSCOM_ERROR_MASK_PCB_WDATA_PARITY = 0 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_PSCOM_ERROR_MASK_PCB_ADDRESS_PARITY = 1 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_PSCOM_ERROR_MASK_PCB_WDATA_PARITY = 0 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_PSCOM_ERROR_MASK_PCB_ADDRESS_PARITY = 1 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_PSCOM_ERROR_MASK_DL_RETURN_WDATA_PARITY = 2 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_PSCOM_ERROR_MASK_DL_RETURN_P0 = 3 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_PSCOM_ERROR_MASK_UL_RDATA_PARITY = 4 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_PSCOM_ERROR_MASK_UL_P0 = 5 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_PSCOM_ERROR_MASK_DL_RETURN_P0 = 3 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_PSCOM_ERROR_MASK_UL_RDATA_PARITY = 4 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_PSCOM_ERROR_MASK_UL_P0 = 5 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_PSCOM_ERROR_MASK_PARITY_ON_INTERFACE_MACHINE = 6 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_PSCOM_ERROR_MASK_PARITY_ON_P2S_MACHINE = 7 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_PSCOM_ERROR_MASK_TIMEOUT_WHILE_WAITING_FOR_ULCCH = 8 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_PSCOM_ERROR_MASK_TIMEOUT_WHILE_WAITING_FOR_DLDCH_RETURN = 9 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_PSCOM_ERROR_MASK_TIMEOUT_WHILE_WAITING_FOR_ULDCH = 10 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_PSCOM_ERROR_MASK_PARALLEL_WRITE_NVLD = 11 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_PSCOM_ERROR_MASK_PARALLEL_READ_NVLD = 12 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_PSCOM_ERROR_MASK_PARALLEL_READ_NVLD = 12 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_PSCOM_ERROR_MASK_PARALLEL_ADDR_INVALID = 13 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_PSCOM_ERROR_MASK_PCB_COMMAND_PARITY = 14 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_PSCOM_ERROR_MASK_GENERAL_TIMEOUT = 15 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_PSCOM_ERROR_MASK_PCB_COMMAND_PARITY = 14 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_PSCOM_ERROR_MASK_GENERAL_TIMEOUT = 15 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_PSCOM_ERROR_MASK_SATELLITE_ACKNOWLEDGE_ACCESS_VIOLATION = 16 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_PSCOM_ERROR_MASK_SATELLITE_ACKNOWLEDGE_INVALID_REGISTER = 17 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_PSCOM_MODE_REG_ABORT_ON_PCB_ADDR_PARITY_ERROR = 0 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_PSCOM_MODE_REG_ABORT_ON_PCB_WDATA_PARITY_ERROR = 1 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_PSCOM_MODE_REG_UNUSED_BIT_2 = 2 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_PSCOM_MODE_REG_UNUSED_BIT_2 = 2 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_PSCOM_MODE_REG_ABORT_ON_DL_RETURN_WDATA_PARITY_ERROR = 3 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_PSCOM_MODE_REG_WATCHDOG_ENABLE = 4 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_PSCOM_MODE_REG_SCOM_HANG_LIMIT = 5 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_PSCOM_MODE_REG_SCOM_HANG_LIMIT_LEN = 2 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_PSCOM_MODE_REG_FORCE_ALL_RINGS = 7 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_PSCOM_MODE_REG_WATCHDOG_ENABLE = 4 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_PSCOM_MODE_REG_SCOM_HANG_LIMIT = 5 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_PSCOM_MODE_REG_SCOM_HANG_LIMIT_LEN = 2 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_PSCOM_MODE_REG_FORCE_ALL_RINGS = 7 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_PSCOM_MODE_REG_FSM_SELFRESET_ON_STATEVEC_PARITYERROR_ENABLE = 8 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_PSCOM_MODE_REG_RESERVED_LT = 9 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_PSCOM_MODE_REG_RESERVED_LT_LEN = 3 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_PSCOM_MODE_REG_RESERVED_LT = 9 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_PSCOM_MODE_REG_RESERVED_LT_LEN = 3 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_PSCOM_STATUS_ERROR_REG_ACCUMULATED_PCB_WDATA_PARITY = 0 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_PSCOM_STATUS_ERROR_REG_ACCUMULATED_PCB_ADDRESS_PARITY = 1 ; @@ -6662,74 +6907,74 @@ static const uint8_t EXPLR_TP_MB_UNIT_TOP_PSCOM_STATUS_ERROR_REG_TRAPPED_GENERAL static const uint8_t EXPLR_TP_MB_UNIT_TOP_PSCOM_STATUS_ERROR_REG_TRAPPED_SATELLITE_ACKNOWLEDGE_ACCESS_VIOLATION = 34 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_PSCOM_STATUS_ERROR_REG_TRAPPED_SATELLITE_ACKNOWLEDGE_INVALID_REGISTER = 35 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_RFIR_IN0 = 0 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_RFIR_LFIR_RECOV_ERR = 1 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_RFIR_IN4 = 2 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_RFIR_IN5 = 3 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_RFIR_IN6 = 4 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_RFIR_IN7 = 5 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_RFIR_IN8 = 6 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_RFIR_IN9 = 7 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_RFIR_IN10 = 8 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_RFIR_IN11 = 9 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_RFIR_IN12 = 10 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_RFIR_IN13 = 11 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_RFIR_IN14 = 12 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_RFIR_IN14_LEN = 12 ; - -static const uint8_t EXPLR_TP_MB_UNIT_TOP_RING_FENCE_MASK_LATCH_REG_ENABLE = 1 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_RFIR_IN0 = 0 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_RFIR_LFIR_RECOV_ERR = 1 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_RFIR_IN4 = 2 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_RFIR_IN5 = 3 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_RFIR_IN6 = 4 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_RFIR_IN7 = 5 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_RFIR_IN8 = 6 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_RFIR_IN9 = 7 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_RFIR_IN10 = 8 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_RFIR_IN11 = 9 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_RFIR_IN12 = 10 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_RFIR_IN13 = 11 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_RFIR_IN14 = 12 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_RFIR_IN14_LEN = 12 ; + +static const uint8_t EXPLR_TP_MB_UNIT_TOP_RING_FENCE_MASK_LATCH_REG_ENABLE = 1 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_RING_FENCE_MASK_LATCH_REG_ENABLE_LEN = 31 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_SPATTN_IN0 = 0 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_SPATTN_IN1 = 1 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_SPATTN_IN2 = 2 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_SPATTN_IN3 = 3 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_SPATTN_IN4 = 4 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_SPATTN_IN5 = 5 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_SPATTN_IN6 = 6 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_SPATTN_IN7 = 7 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_SPATTN_IN8 = 8 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_SPATTN_IN9 = 9 ; - -static const uint8_t EXPLR_TP_MB_UNIT_TOP_SPA_MASK_IN = 0 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_SPA_MASK_IN_LEN = 10 ; - -static const uint8_t EXPLR_TP_MB_UNIT_TOP_SUM_MASK_REG_SMASK_IN = 0 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_SUM_MASK_REG_SMASK_IN_LEN = 5 ; - -static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_HI_DATA_REG_DATA = 0 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_HI_DATA_REG_DATA_LEN = 64 ; - -static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_LO_DATA_REG_DATA = 0 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_LO_DATA_REG_DATA_LEN = 32 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_LO_DATA_REG_ADDRESS = 32 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_LO_DATA_REG_ADDRESS_LEN = 10 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_LO_DATA_REG_LAST_BANK = 42 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_LO_DATA_REG_LAST_BANK_LEN = 9 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_LO_DATA_REG_LAST_BANK_VALID = 51 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_LO_DATA_REG_WRITE_ON_RUN = 52 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_LO_DATA_REG_RUNNING = 53 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_LO_DATA_REG_HOLD_ADDRESS = 54 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_LO_DATA_REG_HOLD_ADDRESS_LEN = 10 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_SPATTN_IN0 = 0 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_SPATTN_IN1 = 1 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_SPATTN_IN2 = 2 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_SPATTN_IN3 = 3 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_SPATTN_IN4 = 4 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_SPATTN_IN5 = 5 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_SPATTN_IN6 = 6 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_SPATTN_IN7 = 7 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_SPATTN_IN8 = 8 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_SPATTN_IN9 = 9 ; + +static const uint8_t EXPLR_TP_MB_UNIT_TOP_SPA_MASK_IN = 0 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_SPA_MASK_IN_LEN = 10 ; + +static const uint8_t EXPLR_TP_MB_UNIT_TOP_SUM_MASK_REG_SMASK_IN = 0 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_SUM_MASK_REG_SMASK_IN_LEN = 5 ; + +static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_HI_DATA_REG_DATA = 0 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_HI_DATA_REG_DATA_LEN = 64 ; + +static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_LO_DATA_REG_DATA = 0 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_LO_DATA_REG_DATA_LEN = 32 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_LO_DATA_REG_ADDRESS = 32 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_LO_DATA_REG_ADDRESS_LEN = 10 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_LO_DATA_REG_LAST_BANK = 42 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_LO_DATA_REG_LAST_BANK_LEN = 9 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_LO_DATA_REG_LAST_BANK_VALID = 51 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_LO_DATA_REG_WRITE_ON_RUN = 52 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_LO_DATA_REG_RUNNING = 53 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_LO_DATA_REG_HOLD_ADDRESS = 54 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_LO_DATA_REG_HOLD_ADDRESS_LEN = 10 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRCTRL_CONFIG_STORE_ON_TRIG_MODE = 0 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRCTRL_CONFIG_WRITE_ON_RUN_MODE = 1 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRCTRL_CONFIG_EXTEND_TRIG_MODE = 2 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRCTRL_CONFIG_EXTEND_TRIG_MODE_LEN = 8 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRCTRL_CONFIG_BANK_MODE = 10 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRCTRL_CONFIG_ENH_MODE = 11 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRCTRL_CONFIG_BANK_MODE = 10 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRCTRL_CONFIG_ENH_MODE = 11 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRCTRL_CONFIG_LOCAL_CLOCK_GATE_CONTROL = 12 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRCTRL_CONFIG_LOCAL_CLOCK_GATE_CONTROL_LEN = 2 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRCTRL_CONFIG_SELECT_CONTROL = 14 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRCTRL_CONFIG_SELECT_CONTROL = 14 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRCTRL_CONFIG_SELECT_CONTROL_LEN = 4 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRCTRL_CONFIG_RUN_HOLD_OFF = 18 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRCTRL_CONFIG_RUN_STATUS = 19 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRCTRL_CONFIG_RUN_STICKY = 20 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRCTRL_CONFIG_RUN_HOLD_OFF = 18 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRCTRL_CONFIG_RUN_STATUS = 19 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRCTRL_CONFIG_RUN_STICKY = 20 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRCTRL_CONFIG_DISABLE_BANK_EDGE_DETECT = 21 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRCTRL_CONFIG_TRA_MASTER_CLOCK_ENABLE = 22 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRCTRL_CONFIG_DISABLE_RD_ACT = 23 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRCTRL_CONFIG_TRA_MUX_SEL = 24 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRCTRL_CONFIG_CONTROL_UNUSED = 25 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRCTRL_CONFIG_DISABLE_RD_ACT = 23 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRCTRL_CONFIG_TRA_MUX_SEL = 24 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRCTRL_CONFIG_CONTROL_UNUSED = 25 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRCTRL_CONFIG_CONTROL_UNUSED_LEN = 3 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_0_CMP_MSK_LT_B_TO_63 = 0 ; @@ -6738,41 +6983,41 @@ static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_0_CMP_MSK_LT_B_TO_ static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_1_CMP_MSK_LT_B_64_TO_87 = 0 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_1_CMP_MSK_LT_B_64_TO_87_LEN = 24 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_2_PATTERNA = 0 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_2_PATTERNA_LEN = 24 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_2_PATTERNB = 24 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_2_PATTERNB_LEN = 24 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_2_PATTERNA = 0 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_2_PATTERNA_LEN = 24 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_2_PATTERNB = 24 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_2_PATTERNB_LEN = 24 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_3_PATTERNC = 0 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_3_PATTERNC_LEN = 24 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_3_PATTERND = 24 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_3_PATTERND_LEN = 24 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_3_PATTERNC = 0 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_3_PATTERNC_LEN = 24 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_3_PATTERND = 24 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_3_PATTERND_LEN = 24 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_4_MASKA = 0 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_4_MASKA_LEN = 24 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_4_MASKB = 24 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_4_MASKB_LEN = 24 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_4_MASKA = 0 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_4_MASKA_LEN = 24 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_4_MASKB = 24 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_4_MASKB_LEN = 24 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_5_MASKC = 0 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_5_MASKC_LEN = 24 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_5_MASKD = 24 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_5_MASKD_LEN = 24 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_5_MASKC = 0 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_5_MASKC_LEN = 24 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_5_MASKD = 24 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_5_MASKD_LEN = 24 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_9_DISABLE_COMPRESSION = 0 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_9_ERROR_BIT_COMPRESSION_CARE_MASK = 1 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_9_MATCHA_MUXSEL = 2 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_9_MATCHA_MUXSEL = 2 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_9_MATCHA_MUXSEL_LEN = 2 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_9_MATCHB_MUXSEL = 4 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_9_MATCHB_MUXSEL = 4 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_9_MATCHB_MUXSEL_LEN = 2 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_9_MATCHC_MUXSEL = 6 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_9_MATCHC_MUXSEL = 6 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_9_MATCHC_MUXSEL_LEN = 2 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_9_MATCHD_MUXSEL = 8 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_9_MATCHD_MUXSEL = 8 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_9_MATCHD_MUXSEL_LEN = 2 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_9_TRIG0_OR_MASK = 10 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_9_TRIG0_OR_MASK = 10 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_9_TRIG0_OR_MASK_LEN = 4 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_9_TRIG0_AND_MASK = 14 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_9_TRIG0_AND_MASK_LEN = 4 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_9_TRIG1_OR_MASK = 18 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_9_TRIG1_OR_MASK = 18 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_9_TRIG1_OR_MASK_LEN = 4 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_9_TRIG1_AND_MASK = 22 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_9_TRIG1_AND_MASK_LEN = 4 ; @@ -6782,172 +7027,172 @@ static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_9_MATCH_NOT_MODE = static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_9_MATCH_NOT_MODE_LEN = 4 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_9_ERROR_CMP_MASK = 32 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_9_ERROR_CMP_PATTERN = 33 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_9_TRIG0_ERR_CMP = 34 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_9_TRIG1_ERR_CMP = 35 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_9_TRIG0_ERR_CMP = 34 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_9_TRIG1_ERR_CMP = 35 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_9_DD1_STRETCH_TRIGGER_PULSES = 36 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_9_UNIT_TC_TRA_FIR_ERR = 37 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_9_SPARE_LT = 38 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_9_SPARE_LT_LEN = 2 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_9_SPARE_LT = 38 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_TRACE_TRDATA_CONFIG_9_SPARE_LT_LEN = 2 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_WRITE_PROTECT_ENABLE_REG_RING_LOCKING = 0 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_WRITE_PROTECT_ENABLE_REG_RESERVED_RING_LOCKING = 1 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_WRITE_PROTECT_RINGS_REG_RINGS = 0 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_WRITE_PROTECT_RINGS_REG_RINGS_LEN = 32 ; - -static const uint8_t EXPLR_TP_MB_UNIT_TOP_XFIR_IN0 = 0 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_XFIR_IN1 = 1 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_XFIR_IN2 = 2 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_XFIR_IN3 = 3 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_XFIR_IN4 = 4 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_XFIR_IN5 = 5 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_XFIR_IN6 = 6 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_XFIR_IN7 = 7 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_XFIR_IN8 = 8 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_XFIR_IN9 = 9 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_XFIR_IN10 = 10 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_XFIR_IN11 = 11 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_XFIR_IN12 = 12 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_XFIR_IN13 = 13 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_XFIR_IN14 = 14 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_XFIR_IN14_LEN = 12 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_XFIR_IN26 = 26 ; - -static const uint8_t EXPLR_TP_MB_UNIT_TOP_XTRA_TRACE_MODE_DATA = 0 ; -static const uint8_t EXPLR_TP_MB_UNIT_TOP_XTRA_TRACE_MODE_DATA_LEN = 64 ; - -static const uint8_t EXPLR_WDF_AACR_BUFFER = 0 ; -static const uint8_t EXPLR_WDF_AACR_ADDRESS = 1 ; -static const uint8_t EXPLR_WDF_AACR_ADDRESS_LEN = 9 ; -static const uint8_t EXPLR_WDF_AACR_AUTOINC = 10 ; -static const uint8_t EXPLR_WDF_AACR_ECCGEN = 11 ; -static const uint8_t EXPLR_WDF_AACR_PASSTHRU = 12 ; - -static const uint8_t EXPLR_WDF_AADR_DATA = 0 ; -static const uint8_t EXPLR_WDF_AADR_DATA_LEN = 64 ; - -static const uint8_t EXPLR_WDF_AAER_META_ECC_SPARE = 0 ; -static const uint8_t EXPLR_WDF_AAER_META_ECC_SPARE_LEN = 16 ; - -static const uint8_t EXPLR_WDF_DQS0R_CFG_BYTE0_SWIZZLE = 0 ; -static const uint8_t EXPLR_WDF_DQS0R_CFG_BYTE0_SWIZZLE_LEN = 11 ; -static const uint8_t EXPLR_WDF_DQS0R_CFG_BYTE1_SWIZZLE = 11 ; -static const uint8_t EXPLR_WDF_DQS0R_CFG_BYTE1_SWIZZLE_LEN = 11 ; -static const uint8_t EXPLR_WDF_DQS0R_CFG_BYTE2_SWIZZLE = 22 ; -static const uint8_t EXPLR_WDF_DQS0R_CFG_BYTE2_SWIZZLE_LEN = 11 ; -static const uint8_t EXPLR_WDF_DQS0R_CFG_BYTE3_SWIZZLE = 33 ; -static const uint8_t EXPLR_WDF_DQS0R_CFG_BYTE3_SWIZZLE_LEN = 11 ; -static const uint8_t EXPLR_WDF_DQS0R_CFG_BYTE4_SWIZZLE = 44 ; -static const uint8_t EXPLR_WDF_DQS0R_CFG_BYTE4_SWIZZLE_LEN = 11 ; - -static const uint8_t EXPLR_WDF_DQS1R_CFG_BYTE5_SWIZZLE = 0 ; -static const uint8_t EXPLR_WDF_DQS1R_CFG_BYTE5_SWIZZLE_LEN = 11 ; -static const uint8_t EXPLR_WDF_DQS1R_CFG_BYTE6_SWIZZLE = 11 ; -static const uint8_t EXPLR_WDF_DQS1R_CFG_BYTE6_SWIZZLE_LEN = 11 ; -static const uint8_t EXPLR_WDF_DQS1R_CFG_BYTE7_SWIZZLE = 22 ; -static const uint8_t EXPLR_WDF_DQS1R_CFG_BYTE7_SWIZZLE_LEN = 11 ; -static const uint8_t EXPLR_WDF_DQS1R_CFG_BYTE8_SWIZZLE = 33 ; -static const uint8_t EXPLR_WDF_DQS1R_CFG_BYTE8_SWIZZLE_LEN = 11 ; -static const uint8_t EXPLR_WDF_DQS1R_CFG_ODD_RANK_SWIZZLE_EN = 44 ; -static const uint8_t EXPLR_WDF_DQS1R_CFG_BYTE9_SWIZZLE = 45 ; -static const uint8_t EXPLR_WDF_DQS1R_CFG_BYTE9_SWIZZLE_LEN = 11 ; - -static const uint8_t EXPLR_WDF_WECR_CFG_WDF_ECC_CHK_DISABLE = 0 ; -static const uint8_t EXPLR_WDF_WECR_CFG_WDF_ECC_COR_DISABLE = 1 ; -static const uint8_t EXPLR_WDF_WECR_CFG_CRC_MODE_EN = 2 ; -static const uint8_t EXPLR_WDF_WECR_CFG_CRC_MODE_X8 = 3 ; -static const uint8_t EXPLR_WDF_WECR_CFG_FORCE_DFI_CG_ALWAYS_ON = 4 ; -static const uint8_t EXPLR_WDF_WECR_CFG_WDF_INTEGRITY_CHECK_DISABLE = 5 ; -static const uint8_t EXPLR_WDF_WECR_CFG_WDF_CG_FORCE = 6 ; -static const uint8_t EXPLR_WDF_WECR_CFG_WDF_SPARE7_11 = 7 ; -static const uint8_t EXPLR_WDF_WECR_CFG_WDF_SPARE7_11_LEN = 5 ; -static const uint8_t EXPLR_WDF_WECR_CFG_WDF_TRACE_SEL = 12 ; -static const uint8_t EXPLR_WDF_WECR_CFG_WDF_TRACE_SEL_LEN = 4 ; -static const uint8_t EXPLR_WDF_WECR_CFG_WDF_WAT_EN = 16 ; -static const uint8_t EXPLR_WDF_WECR_CFG_WDF_WAT_EN_LEN = 4 ; - -static const uint8_t EXPLR_WDF_WERR_DQS0R_PE = 0 ; -static const uint8_t EXPLR_WDF_WERR_DQS1R_PE = 1 ; -static const uint8_t EXPLR_WDF_WERR_AACR_PE = 2 ; -static const uint8_t EXPLR_WDF_WERR_AADR_PE = 3 ; -static const uint8_t EXPLR_WDF_WERR_AAER_PE = 4 ; -static const uint8_t EXPLR_WDF_WERR_WECR_PE = 5 ; -static const uint8_t EXPLR_WDF_WERR_WSPAR_PE = 8 ; -static const uint8_t EXPLR_WDF_WERR_WMSK_PE = 9 ; -static const uint8_t EXPLR_WDF_WERR_RDF_BE_PE = 15 ; -static const uint8_t EXPLR_WDF_WERR_TLXR_WR_PE = 16 ; -static const uint8_t EXPLR_WDF_WERR_TLXR_BAD_PE = 17 ; -static const uint8_t EXPLR_WDF_WERR_TLXR_BE_PE = 18 ; -static const uint8_t EXPLR_WDF_WERR_SRQ_IF_PE = 19 ; -static const uint8_t EXPLR_WDF_WERR_RDF_IF_PE = 20 ; -static const uint8_t EXPLR_WDF_WERR_MMIO_IF_PE = 21 ; -static const uint8_t EXPLR_WDF_WERR_CONTROL_PE = 22 ; -static const uint8_t EXPLR_WDF_WERR_ECCGEN_ERR = 23 ; -static const uint8_t EXPLR_WDF_WERR_WBUF_FUNC_UE = 24 ; -static const uint8_t EXPLR_WDF_WERR_RMWBUF_FUNC_UE = 25 ; -static const uint8_t EXPLR_WDF_WERR_BEBUF_FUNC_UE = 26 ; -static const uint8_t EXPLR_WDF_WERR_BE_PE = 27 ; -static const uint8_t EXPLR_WDF_WERR_INTEGRITY_ERR = 28 ; -static const uint8_t EXPLR_WDF_WERR_WBUF_MMIO_UE = 29 ; -static const uint8_t EXPLR_WDF_WERR_SCOM_FSM_PE = 32 ; -static const uint8_t EXPLR_WDF_WERR_RMWBUF_SCOM_UE = 33 ; -static const uint8_t EXPLR_WDF_WERR_BEBUF_SCOM_UE = 34 ; -static const uint8_t EXPLR_WDF_WERR_WBUF_CE = 48 ; -static const uint8_t EXPLR_WDF_WERR_RMWBUF_CE = 49 ; -static const uint8_t EXPLR_WDF_WERR_BEBUF_CE = 50 ; - -static const uint8_t EXPLR_WDF_WESR_SYNDROME = 0 ; -static const uint8_t EXPLR_WDF_WESR_SYNDROME_LEN = 8 ; -static const uint8_t EXPLR_WDF_WESR_SEVERITY = 8 ; -static const uint8_t EXPLR_WDF_WESR_PART = 9 ; -static const uint8_t EXPLR_WDF_WESR_SOURCE = 10 ; -static const uint8_t EXPLR_WDF_WESR_SOURCE_LEN = 3 ; - -static const uint8_t EXPLR_WDF_WMSK_DQS0R_PE = 0 ; -static const uint8_t EXPLR_WDF_WMSK_DQS1R_PE = 1 ; -static const uint8_t EXPLR_WDF_WMSK_AACR_PE = 2 ; -static const uint8_t EXPLR_WDF_WMSK_AADR_PE = 3 ; -static const uint8_t EXPLR_WDF_WMSK_AAER_PE = 4 ; -static const uint8_t EXPLR_WDF_WMSK_WECR_PE = 5 ; -static const uint8_t EXPLR_WDF_WMSK_WSPAR_PE = 8 ; -static const uint8_t EXPLR_WDF_WMSK_WMSK_PE = 9 ; -static const uint8_t EXPLR_WDF_WMSK_RDF_BE_PE = 15 ; -static const uint8_t EXPLR_WDF_WMSK_TLXR_WR_PE = 16 ; -static const uint8_t EXPLR_WDF_WMSK_TLXR_BAD_PE = 17 ; -static const uint8_t EXPLR_WDF_WMSK_TLXR_BE_PE = 18 ; -static const uint8_t EXPLR_WDF_WMSK_SRQ_IF_PE = 19 ; -static const uint8_t EXPLR_WDF_WMSK_RDF_IF_PE = 20 ; -static const uint8_t EXPLR_WDF_WMSK_MMIO_IF_PE = 21 ; -static const uint8_t EXPLR_WDF_WMSK_CONTROL_PE = 22 ; -static const uint8_t EXPLR_WDF_WMSK_ECCGEN_ERR = 23 ; -static const uint8_t EXPLR_WDF_WMSK_WBUF_FUNC_UE = 24 ; -static const uint8_t EXPLR_WDF_WMSK_RMWBUF_FUNC_UE = 25 ; -static const uint8_t EXPLR_WDF_WMSK_BEBUF_FUNC_UE = 26 ; -static const uint8_t EXPLR_WDF_WMSK_BE_PE = 27 ; -static const uint8_t EXPLR_WDF_WMSK_INTEGRITY_ERR = 28 ; -static const uint8_t EXPLR_WDF_WMSK_WBUF_MMIO_UE = 29 ; -static const uint8_t EXPLR_WDF_WMSK_SCOM_FSM_PE = 32 ; -static const uint8_t EXPLR_WDF_WMSK_RMWBUF_SCOM_UE = 33 ; -static const uint8_t EXPLR_WDF_WMSK_BEBUF_SCOM_UE = 34 ; -static const uint8_t EXPLR_WDF_WMSK_WBUF_CE = 48 ; -static const uint8_t EXPLR_WDF_WMSK_RMWBUF_CE = 49 ; -static const uint8_t EXPLR_WDF_WMSK_BEBUF_CE = 50 ; - -static const uint8_t EXPLR_WDF_WSPAR_CFG_STEERING_R0_LEFT = 0 ; -static const uint8_t EXPLR_WDF_WSPAR_CFG_STEERING_R0_LEFT_LEN = 5 ; -static const uint8_t EXPLR_WDF_WSPAR_CFG_STEERING_R0_RIGHT = 5 ; -static const uint8_t EXPLR_WDF_WSPAR_CFG_STEERING_R0_RIGHT_LEN = 5 ; -static const uint8_t EXPLR_WDF_WSPAR_CFG_STEERING_R1_LEFT = 10 ; -static const uint8_t EXPLR_WDF_WSPAR_CFG_STEERING_R1_LEFT_LEN = 5 ; -static const uint8_t EXPLR_WDF_WSPAR_CFG_STEERING_R1_RIGHT = 15 ; -static const uint8_t EXPLR_WDF_WSPAR_CFG_STEERING_R1_RIGHT_LEN = 5 ; -static const uint8_t EXPLR_WDF_WSPAR_CFG_STEERING_R2_LEFT = 20 ; -static const uint8_t EXPLR_WDF_WSPAR_CFG_STEERING_R2_LEFT_LEN = 5 ; -static const uint8_t EXPLR_WDF_WSPAR_CFG_STEERING_R2_RIGHT = 25 ; -static const uint8_t EXPLR_WDF_WSPAR_CFG_STEERING_R2_RIGHT_LEN = 5 ; -static const uint8_t EXPLR_WDF_WSPAR_CFG_STEERING_R3_LEFT = 30 ; -static const uint8_t EXPLR_WDF_WSPAR_CFG_STEERING_R3_LEFT_LEN = 5 ; -static const uint8_t EXPLR_WDF_WSPAR_CFG_STEERING_R3_RIGHT = 35 ; -static const uint8_t EXPLR_WDF_WSPAR_CFG_STEERING_R3_RIGHT_LEN = 5 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_WRITE_PROTECT_RINGS_REG_RINGS = 0 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_WRITE_PROTECT_RINGS_REG_RINGS_LEN = 32 ; + +static const uint8_t EXPLR_TP_MB_UNIT_TOP_XFIR_IN0 = 0 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_XFIR_IN1 = 1 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_XFIR_IN2 = 2 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_XFIR_IN3 = 3 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_XFIR_IN4 = 4 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_XFIR_IN5 = 5 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_XFIR_IN6 = 6 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_XFIR_IN7 = 7 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_XFIR_IN8 = 8 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_XFIR_IN9 = 9 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_XFIR_IN10 = 10 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_XFIR_IN11 = 11 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_XFIR_IN12 = 12 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_XFIR_IN13 = 13 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_XFIR_IN14 = 14 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_XFIR_IN14_LEN = 12 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_XFIR_IN26 = 26 ; + +static const uint8_t EXPLR_TP_MB_UNIT_TOP_XTRA_TRACE_MODE_DATA = 0 ; +static const uint8_t EXPLR_TP_MB_UNIT_TOP_XTRA_TRACE_MODE_DATA_LEN = 64 ; + +static const uint8_t EXPLR_WDF_AACR_BUFFER = 0 ; +static const uint8_t EXPLR_WDF_AACR_ADDRESS = 1 ; +static const uint8_t EXPLR_WDF_AACR_ADDRESS_LEN = 9 ; +static const uint8_t EXPLR_WDF_AACR_AUTOINC = 10 ; +static const uint8_t EXPLR_WDF_AACR_ECCGEN = 11 ; +static const uint8_t EXPLR_WDF_AACR_PASSTHRU = 12 ; + +static const uint8_t EXPLR_WDF_AADR_DATA = 0 ; +static const uint8_t EXPLR_WDF_AADR_DATA_LEN = 64 ; + +static const uint8_t EXPLR_WDF_AAER_META_ECC_SPARE = 0 ; +static const uint8_t EXPLR_WDF_AAER_META_ECC_SPARE_LEN = 16 ; + +static const uint8_t EXPLR_WDF_DQS0R_CFG_BYTE0_SWIZZLE = 0 ; +static const uint8_t EXPLR_WDF_DQS0R_CFG_BYTE0_SWIZZLE_LEN = 11 ; +static const uint8_t EXPLR_WDF_DQS0R_CFG_BYTE1_SWIZZLE = 11 ; +static const uint8_t EXPLR_WDF_DQS0R_CFG_BYTE1_SWIZZLE_LEN = 11 ; +static const uint8_t EXPLR_WDF_DQS0R_CFG_BYTE2_SWIZZLE = 22 ; +static const uint8_t EXPLR_WDF_DQS0R_CFG_BYTE2_SWIZZLE_LEN = 11 ; +static const uint8_t EXPLR_WDF_DQS0R_CFG_BYTE3_SWIZZLE = 33 ; +static const uint8_t EXPLR_WDF_DQS0R_CFG_BYTE3_SWIZZLE_LEN = 11 ; +static const uint8_t EXPLR_WDF_DQS0R_CFG_BYTE4_SWIZZLE = 44 ; +static const uint8_t EXPLR_WDF_DQS0R_CFG_BYTE4_SWIZZLE_LEN = 11 ; + +static const uint8_t EXPLR_WDF_DQS1R_CFG_BYTE5_SWIZZLE = 0 ; +static const uint8_t EXPLR_WDF_DQS1R_CFG_BYTE5_SWIZZLE_LEN = 11 ; +static const uint8_t EXPLR_WDF_DQS1R_CFG_BYTE6_SWIZZLE = 11 ; +static const uint8_t EXPLR_WDF_DQS1R_CFG_BYTE6_SWIZZLE_LEN = 11 ; +static const uint8_t EXPLR_WDF_DQS1R_CFG_BYTE7_SWIZZLE = 22 ; +static const uint8_t EXPLR_WDF_DQS1R_CFG_BYTE7_SWIZZLE_LEN = 11 ; +static const uint8_t EXPLR_WDF_DQS1R_CFG_BYTE8_SWIZZLE = 33 ; +static const uint8_t EXPLR_WDF_DQS1R_CFG_BYTE8_SWIZZLE_LEN = 11 ; +static const uint8_t EXPLR_WDF_DQS1R_CFG_ODD_RANK_SWIZZLE_EN = 44 ; +static const uint8_t EXPLR_WDF_DQS1R_CFG_BYTE9_SWIZZLE = 45 ; +static const uint8_t EXPLR_WDF_DQS1R_CFG_BYTE9_SWIZZLE_LEN = 11 ; + +static const uint8_t EXPLR_WDF_WECR_CFG_WDF_ECC_CHK_DISABLE = 0 ; +static const uint8_t EXPLR_WDF_WECR_CFG_WDF_ECC_COR_DISABLE = 1 ; +static const uint8_t EXPLR_WDF_WECR_CFG_CRC_MODE_EN = 2 ; +static const uint8_t EXPLR_WDF_WECR_CFG_CRC_MODE_X8 = 3 ; +static const uint8_t EXPLR_WDF_WECR_CFG_FORCE_DFI_CG_ALWAYS_ON = 4 ; +static const uint8_t EXPLR_WDF_WECR_CFG_WDF_INTEGRITY_CHECK_DISABLE = 5 ; +static const uint8_t EXPLR_WDF_WECR_CFG_WDF_CG_FORCE = 6 ; +static const uint8_t EXPLR_WDF_WECR_CFG_WDF_SPARE7_11 = 7 ; +static const uint8_t EXPLR_WDF_WECR_CFG_WDF_SPARE7_11_LEN = 5 ; +static const uint8_t EXPLR_WDF_WECR_CFG_WDF_TRACE_SEL = 12 ; +static const uint8_t EXPLR_WDF_WECR_CFG_WDF_TRACE_SEL_LEN = 4 ; +static const uint8_t EXPLR_WDF_WECR_CFG_WDF_WAT_EN = 16 ; +static const uint8_t EXPLR_WDF_WECR_CFG_WDF_WAT_EN_LEN = 4 ; + +static const uint8_t EXPLR_WDF_WERR_DQS0R_PE = 0 ; +static const uint8_t EXPLR_WDF_WERR_DQS1R_PE = 1 ; +static const uint8_t EXPLR_WDF_WERR_AACR_PE = 2 ; +static const uint8_t EXPLR_WDF_WERR_AADR_PE = 3 ; +static const uint8_t EXPLR_WDF_WERR_AAER_PE = 4 ; +static const uint8_t EXPLR_WDF_WERR_WECR_PE = 5 ; +static const uint8_t EXPLR_WDF_WERR_WSPAR_PE = 8 ; +static const uint8_t EXPLR_WDF_WERR_WMSK_PE = 9 ; +static const uint8_t EXPLR_WDF_WERR_RDF_BE_PE = 15 ; +static const uint8_t EXPLR_WDF_WERR_TLXR_WR_PE = 16 ; +static const uint8_t EXPLR_WDF_WERR_TLXR_BAD_PE = 17 ; +static const uint8_t EXPLR_WDF_WERR_TLXR_BE_PE = 18 ; +static const uint8_t EXPLR_WDF_WERR_SRQ_IF_PE = 19 ; +static const uint8_t EXPLR_WDF_WERR_RDF_IF_PE = 20 ; +static const uint8_t EXPLR_WDF_WERR_MMIO_IF_PE = 21 ; +static const uint8_t EXPLR_WDF_WERR_CONTROL_PE = 22 ; +static const uint8_t EXPLR_WDF_WERR_ECCGEN_ERR = 23 ; +static const uint8_t EXPLR_WDF_WERR_WBUF_FUNC_UE = 24 ; +static const uint8_t EXPLR_WDF_WERR_RMWBUF_FUNC_UE = 25 ; +static const uint8_t EXPLR_WDF_WERR_BEBUF_FUNC_UE = 26 ; +static const uint8_t EXPLR_WDF_WERR_BE_PE = 27 ; +static const uint8_t EXPLR_WDF_WERR_INTEGRITY_ERR = 28 ; +static const uint8_t EXPLR_WDF_WERR_WBUF_MMIO_UE = 29 ; +static const uint8_t EXPLR_WDF_WERR_SCOM_FSM_PE = 32 ; +static const uint8_t EXPLR_WDF_WERR_RMWBUF_SCOM_UE = 33 ; +static const uint8_t EXPLR_WDF_WERR_BEBUF_SCOM_UE = 34 ; +static const uint8_t EXPLR_WDF_WERR_WBUF_CE = 48 ; +static const uint8_t EXPLR_WDF_WERR_RMWBUF_CE = 49 ; +static const uint8_t EXPLR_WDF_WERR_BEBUF_CE = 50 ; + +static const uint8_t EXPLR_WDF_WESR_SYNDROME = 0 ; +static const uint8_t EXPLR_WDF_WESR_SYNDROME_LEN = 8 ; +static const uint8_t EXPLR_WDF_WESR_SEVERITY = 8 ; +static const uint8_t EXPLR_WDF_WESR_PART = 9 ; +static const uint8_t EXPLR_WDF_WESR_SOURCE = 10 ; +static const uint8_t EXPLR_WDF_WESR_SOURCE_LEN = 3 ; + +static const uint8_t EXPLR_WDF_WMSK_DQS0R_PE = 0 ; +static const uint8_t EXPLR_WDF_WMSK_DQS1R_PE = 1 ; +static const uint8_t EXPLR_WDF_WMSK_AACR_PE = 2 ; +static const uint8_t EXPLR_WDF_WMSK_AADR_PE = 3 ; +static const uint8_t EXPLR_WDF_WMSK_AAER_PE = 4 ; +static const uint8_t EXPLR_WDF_WMSK_WECR_PE = 5 ; +static const uint8_t EXPLR_WDF_WMSK_WSPAR_PE = 8 ; +static const uint8_t EXPLR_WDF_WMSK_WMSK_PE = 9 ; +static const uint8_t EXPLR_WDF_WMSK_RDF_BE_PE = 15 ; +static const uint8_t EXPLR_WDF_WMSK_TLXR_WR_PE = 16 ; +static const uint8_t EXPLR_WDF_WMSK_TLXR_BAD_PE = 17 ; +static const uint8_t EXPLR_WDF_WMSK_TLXR_BE_PE = 18 ; +static const uint8_t EXPLR_WDF_WMSK_SRQ_IF_PE = 19 ; +static const uint8_t EXPLR_WDF_WMSK_RDF_IF_PE = 20 ; +static const uint8_t EXPLR_WDF_WMSK_MMIO_IF_PE = 21 ; +static const uint8_t EXPLR_WDF_WMSK_CONTROL_PE = 22 ; +static const uint8_t EXPLR_WDF_WMSK_ECCGEN_ERR = 23 ; +static const uint8_t EXPLR_WDF_WMSK_WBUF_FUNC_UE = 24 ; +static const uint8_t EXPLR_WDF_WMSK_RMWBUF_FUNC_UE = 25 ; +static const uint8_t EXPLR_WDF_WMSK_BEBUF_FUNC_UE = 26 ; +static const uint8_t EXPLR_WDF_WMSK_BE_PE = 27 ; +static const uint8_t EXPLR_WDF_WMSK_INTEGRITY_ERR = 28 ; +static const uint8_t EXPLR_WDF_WMSK_WBUF_MMIO_UE = 29 ; +static const uint8_t EXPLR_WDF_WMSK_SCOM_FSM_PE = 32 ; +static const uint8_t EXPLR_WDF_WMSK_RMWBUF_SCOM_UE = 33 ; +static const uint8_t EXPLR_WDF_WMSK_BEBUF_SCOM_UE = 34 ; +static const uint8_t EXPLR_WDF_WMSK_WBUF_CE = 48 ; +static const uint8_t EXPLR_WDF_WMSK_RMWBUF_CE = 49 ; +static const uint8_t EXPLR_WDF_WMSK_BEBUF_CE = 50 ; + +static const uint8_t EXPLR_WDF_WSPAR_CFG_STEERING_R0_LEFT = 0 ; +static const uint8_t EXPLR_WDF_WSPAR_CFG_STEERING_R0_LEFT_LEN = 5 ; +static const uint8_t EXPLR_WDF_WSPAR_CFG_STEERING_R0_RIGHT = 5 ; +static const uint8_t EXPLR_WDF_WSPAR_CFG_STEERING_R0_RIGHT_LEN = 5 ; +static const uint8_t EXPLR_WDF_WSPAR_CFG_STEERING_R1_LEFT = 10 ; +static const uint8_t EXPLR_WDF_WSPAR_CFG_STEERING_R1_LEFT_LEN = 5 ; +static const uint8_t EXPLR_WDF_WSPAR_CFG_STEERING_R1_RIGHT = 15 ; +static const uint8_t EXPLR_WDF_WSPAR_CFG_STEERING_R1_RIGHT_LEN = 5 ; +static const uint8_t EXPLR_WDF_WSPAR_CFG_STEERING_R2_LEFT = 20 ; +static const uint8_t EXPLR_WDF_WSPAR_CFG_STEERING_R2_LEFT_LEN = 5 ; +static const uint8_t EXPLR_WDF_WSPAR_CFG_STEERING_R2_RIGHT = 25 ; +static const uint8_t EXPLR_WDF_WSPAR_CFG_STEERING_R2_RIGHT_LEN = 5 ; +static const uint8_t EXPLR_WDF_WSPAR_CFG_STEERING_R3_LEFT = 30 ; +static const uint8_t EXPLR_WDF_WSPAR_CFG_STEERING_R3_LEFT_LEN = 5 ; +static const uint8_t EXPLR_WDF_WSPAR_CFG_STEERING_R3_RIGHT = 35 ; +static const uint8_t EXPLR_WDF_WSPAR_CFG_STEERING_R3_RIGHT_LEN = 5 ; #endif diff --git a/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_getidec.C b/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_getidec.C index 5e0e5425a..e4eb162e1 100644 --- a/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_getidec.C +++ b/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_getidec.C @@ -37,6 +37,7 @@ #include <exp_getidec.H> #include <lib/shared/exp_consts.H> #include <chips/ocmb/explorer/common/include/explorer_scom_addresses.H> +#include <chips/ocmb/explorer/common/include/explorer_scom_addresses_fixes.H> #include <chips/ocmb/explorer/common/include/explorer_scom_addresses_fld.H> #include <chips/ocmb/explorer/common/include/explorer_scom_addresses_fld_fixes.H> #include <generic/memory/mss_git_data_helper.H> diff --git a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/ccs/ccs_traits_explorer.H b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/ccs/ccs_traits_explorer.H index 965b98057..3411a677c 100644 --- a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/ccs/ccs_traits_explorer.H +++ b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/ccs/ccs_traits_explorer.H @@ -96,15 +96,11 @@ class ccsTraits<mss::mc_type::EXPLORER> UE_DISABLE = EXPLR_MCBIST_CCS_MODEQ_UE_DISABLE, DATA_COMPARE_BURST_SEL = EXPLR_MCBIST_CCS_MODEQ_DATA_COMPARE_BURST_SEL, DATA_COMPARE_BURST_SEL_LEN = EXPLR_MCBIST_CCS_MODEQ_DATA_COMPARE_BURST_SEL_LEN, - DDR_CAL_TIMEOUT_CNT = EXPLR_MCBIST_CCS_MODEQ_DDR_CAL_TIMEOUT_CNT, - DDR_CAL_TIMEOUT_CNT_LEN = EXPLR_MCBIST_CCS_MODEQ_DDR_CAL_TIMEOUT_CNT_LEN, CFG_PARITY_AFTER_CMD = EXPLR_MCBIST_CCS_MODEQ_CFG_PARITY_AFTER_CMD, COPY_CKE_TO_SPARE_CKE = EXPLR_MCBIST_CCS_MODEQ_COPY_CKE_TO_SPARE_CKE, DISABLE_ECC_ARRAY_CHK = EXPLR_MCBIST_CCS_MODEQ_DISABLE_ECC_ARRAY_CHK, DISABLE_ECC_ARRAY_CORRECTION = EXPLR_MCBIST_CCS_MODEQ_DISABLE_ECC_ARRAY_CORRECTION, CFG_DGEN_FIXED_MODE = EXPLR_MCBIST_CCS_MODEQ_CFG_DGEN_FIXED_MODE, - DDR_CAL_TIMEOUT_CNT_MULT = EXPLR_MCBIST_CCS_MODEQ_DDR_CAL_TIMEOUT_CNT_MULT, - DDR_CAL_TIMEOUT_CNT_MULT_LEN = EXPLR_MCBIST_CCS_MODEQ_DDR_CAL_TIMEOUT_CNT_MULT_LEN, IDLE_PAT_ADDRESS_0_13 = EXPLR_MCBIST_CCS_MODEQ_IDLE_PAT_ADDRESS_0_13, IDLE_PAT_ADDRESS_0_13_LEN = EXPLR_MCBIST_CCS_MODEQ_IDLE_PAT_ADDRESS_0_13_LEN, IDLE_PAT_ADDRESS_17 = EXPLR_MCBIST_CCS_MODEQ_IDLE_PAT_ADDRESS_17, @@ -157,8 +153,6 @@ class ccsTraits<mss::mc_type::EXPLORER> ARR0_DDR_CID_2 = EXPLR_MCBIST_CCS_INST_ARR0_00_DDR_CID_2, ARR0_DDR_ODT = EXPLR_MCBIST_CCS_INST_ARR0_00_DDR_ODT, ARR0_DDR_ODT_LEN = EXPLR_MCBIST_CCS_INST_ARR0_00_DDR_ODT_LEN, - ARR0_DDR_CAL_TYPE = EXPLR_MCBIST_CCS_INST_ARR0_00_DDR_CAL_TYPE, - ARR0_DDR_CAL_TYPE_LEN = EXPLR_MCBIST_CCS_INST_ARR0_00_DDR_CAL_TYPE_LEN, ARR0_DDR_PARITY = EXPLR_MCBIST_CCS_INST_ARR0_00_DDR_PARITY, ARR0_DDR_BANK_2 = EXPLR_MCBIST_CCS_INST_ARR0_00_DDR_BANK_2, ARR0_LOOP_BREAK_MODE = EXPLR_MCBIST_CCS_INST_ARR0_00_LOOP_BREAK_MODE, @@ -172,9 +166,6 @@ class ccsTraits<mss::mc_type::EXPLORER> ARR1_READ_OR_WRITE_DATA = EXPLR_MCBIST_CCS_INST_ARR1_00_READ_OR_WRITE_DATA, ARR1_READ_OR_WRITE_DATA_LEN = EXPLR_MCBIST_CCS_INST_ARR1_00_READ_OR_WRITE_DATA_LEN, ARR1_READ_COMPARE_REQUIRED = EXPLR_MCBIST_CCS_INST_ARR1_00_READ_COMPARE_REQUIRED, - ARR1_DDR_CAL_RANK = EXPLR_MCBIST_CCS_INST_ARR1_00_DDR_CAL_RANK, - ARR1_DDR_CAL_RANK_LEN = EXPLR_MCBIST_CCS_INST_ARR1_00_DDR_CAL_RANK_LEN, - ARR1_DDR_CALIBRATION_ENABLE = EXPLR_MCBIST_CCS_INST_ARR1_00_DDR_CALIBRATION_ENABLE, ARR1_END = EXPLR_MCBIST_CCS_INST_ARR1_00_END, ARR1_GOTO_CMD = EXPLR_MCBIST_CCS_INST_ARR1_00_GOTO_CMD, ARR1_GOTO_CMD_LEN = EXPLR_MCBIST_CCS_INST_ARR1_00_GOTO_CMD_LEN, diff --git a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/exp_getecid_utils.C b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/exp_getecid_utils.C index 427f2a3ea..86eb99850 100644 --- a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/exp_getecid_utils.C +++ b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/exp_getecid_utils.C @@ -36,6 +36,7 @@ #include <lib/i2c/exp_i2c.H> #include <lib/shared/exp_consts.H> #include <explorer_scom_addresses.H> +#include <explorer_scom_addresses_fixes.H> #include <explorer_scom_addresses_fld_fixes.H> #include <mss_explorer_attribute_setters.H> #include <generic/memory/lib/utils/mss_buffer_utils.H> diff --git a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/mc/exp_port.H b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/mc/exp_port.H index 441e4dfac..dc46fc7bc 100644 --- a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/mc/exp_port.H +++ b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/mc/exp_port.H @@ -103,7 +103,7 @@ class portTraits< mss::mc_type::EXPLORER > ECC_USE_ADDR_HASH = EXPLR_RDF_RECR_MBSECCQ_USE_ADDRESS_HASH, PORT_FAIL_DISABLE = EXPLR_SRQ_MBA_FARB0Q_CFG_PORT_FAIL_DISABLE, - DFI_INIT_START = EXPLR_SRQ_MBA_FARB0Q_CFG_MISR_FEEDBACK_ENABLE, + DFI_INIT_START = EXPLR_SRQ_MBA_FARB0Q_CFG_INIT_START, RCD_RECOVERY_DISABLE = EXPLR_SRQ_MBA_FARB0Q_CFG_DISABLE_RCD_RECOVERY, RECR_ENABLE_UE_NOISE_WINDOW = EXPLR_RDF_RECR_MBSECCQ_ENABLE_UE_NOISE_WINDOW, diff --git a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/omi/exp_omi_utils.C b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/omi/exp_omi_utils.C index aad9a91ab..7fcf4362a 100644 --- a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/omi/exp_omi_utils.C +++ b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/omi/exp_omi_utils.C @@ -69,7 +69,7 @@ fapi2::ReturnCode setup_omi_dl0_config0( "Error reading EXPLR_DLX_DL0_CONFIG0 on %s", mss::c_str(i_target)); // CFG_DL0_HALF_WIDTH_BACKOFF_ENABLE: dl0 x4 backoff enabled - l_config0.writeBit<EXPLR_DLX_DL0_CONFIG0_CFG_X4_BACKOFF_ENABLE>(i_dl_x4_backoff_en); + l_config0.writeBit<EXPLR_DLX_DL0_CONFIG0_CFG_HALF_WIDTH_BACKOFF_ENABLE>(i_dl_x4_backoff_en); // CFG_DL0_TRAIN_MODE: dl0 train mode l_config0.insertFromRight<EXPLR_DLX_DL0_CONFIG0_CFG_TRAIN_MODE, |
