Add new pnorLayoutAxone.xml w/ new EECACHE section

This commit introduces a new pnor layout which will be used
when the simics_axone.config file is used. (Note: axone.config
was renamed to simics_axone.config). This new layout introduces
the EECACHE section which will be used to store copies of the
various EEPROMS in the system. The eventual goal is to be able to
remove the MVPD/DJVPD sections in PNOR and only use this EECACHE
section

Change-Id: Ifae610c4dd7f3aa9c87a5ca911cc4faa1ba2a98a
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70172
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Matt Derksen <mderkse1@us.ibm.com>
Reviewed-by: Roland Veloz <rveloz@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>

8 files changed, 370 insertions, 13 deletions

diff --git a/makefile b/makefile
index cfd8c9d58..16217fd5d 100644
--- a/makefile
+++ b/makefile
@@ -5,7 +5,7 @@
 #
 # OpenPOWER HostBoot Project
 #
-# Contributors Listed Below - COPYRIGHT 2010,2017
+# Contributors Listed Below - COPYRIGHT 2010,2019
 # [+] International Business Machines Corp.
 #
 #
@@ -36,8 +36,9 @@ SKIP_CONFIG_FILE_LOAD = 1
 IMAGE_PASS_POST += $(GENDIR)/hwp_id.html
 CLEAN_TARGETS   += $(GENDIR)/hwp_id.html
 
-# Name of file to indicate if hostboot is building an fsp release.
+# Name of file to indicate which release Hostboot is building for
 HB_FSP_RELEASE = $(GENDIR)/hb_fsp_release
+HB_AXONE_RELEASE = $(GENDIR)/hb_simics_axone_release
 
 ifndef BUILD_MINIMAL
 IMAGE_PASS_POST += cscope ctags
@@ -74,6 +75,7 @@ check_istep_modules: $(OBJS)
 GENCONFIG_TOOL = src/build/tools/hbGenConfig
 
 # At end of rule, create HB_FSP_RELEASE file if compiling with fsprelease.config
+# or create HB_AXONE_RELEASE if compiling with simics_axone.config
 $(GENDIR)/.$(notdir $(CONFIG_FILE)).config: \
     $(shell find -name HBconfig) \
     $(filter-out $(GENDIR)/.$(notdir $(CONFIG_FILE)).config,\
@@ -88,6 +90,10 @@ $(GENDIR)/.$(notdir $(CONFIG_FILE)).config: \
 	@rm -f $(wildcard $(GENDIR)/.*.config)
 	@touch $@
 	@rm -f $(HB_FSP_RELEASE)
+	@rm -f $(HB_AXONE_RELEASE)
     ifneq (,$(findstring fsprelease.config, $(strip $(CONFIG_FILE))))
 	    @touch $(HB_FSP_RELEASE)
     endif
+    ifneq (,$(findstring simics_axone.config, $(strip $(CONFIG_FILE))))
+	    @touch $(HB_AXONE_RELEASE)
+    endif
diff --git a/src/build/buildpnor/pnorLayoutAxone.xml b/src/build/buildpnor/pnorLayoutAxone.xml
new file mode 100644
index 000000000..f34256482
--- /dev/null
+++ b/src/build/buildpnor/pnorLayoutAxone.xml
@@ -0,0 +1,336 @@
+<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
+<!-- This is an automatically generated prolog.                             -->
+<!--                                                                        -->
+<!-- $Source: src/build/buildpnor/pnorLayoutAxone.xml $                     -->
+<!--                                                                        -->
+<!-- OpenPOWER HostBoot Project                                             -->
+<!--                                                                        -->
+<!-- Contributors Listed Below - COPYRIGHT 2012,2019                        -->
+<!-- [+] International Business Machines Corp.                              -->
+<!--                                                                        -->
+<!--                                                                        -->
+<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
+<!-- you may not use this file except in compliance with the License.       -->
+<!-- You may obtain a copy of the License at                                -->
+<!--                                                                        -->
+<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
+<!--                                                                        -->
+<!-- Unless required by applicable law or agreed to in writing, software    -->
+<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
+<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
+<!-- implied. See the License for the specific language governing           -->
+<!-- permissions and limitations under the License.                         -->
+<!--                                                                        -->
+<!-- IBM_PROLOG_END_TAG                                                     -->
+<!--
+Layout Description
+<metadata> Element -> Contains high-level information about the PNOR layout.
+    <chipSize>     -> Size of the chip that the pnor image will reside on
+    <imageSize>    -> Size of PNOR image in bytes.
+    <blockSize>    -> size of erase blocks in bytes.
+    <tocSize>      -> size of each partition table
+    <sideAOffset>  -> Location of Side A Partition Table
+    <sideBOffset>  -> Location of Side B Partition Table
+    <side>         -> Contains information about the side
+        <id>            -> Id of the side (A or B)
+        <arrangement>   -> Tag that specifies the arrangement of the side
+                           (A-B-D or A-D-B)
+                           A-B-D: Primary TOC (A),Backup TOC (B), and Section Information (Data - D)
+                           A-D-B: Primary TOC (A), Section Information (Data - D), Backup TOC (B)
+        <golden/> -> Indicates that the side of the PNOR is golden
+</metadata>
+<section> Element -> Contains information about a PNOR Partition
+    <description>   -> Text description of the partition.
+                       Does not have to be machine readable.
+    <eyeCatch>      -> Name of the Partition
+    <physicalOffset>-> Offset of the Partition in PNOR
+                       in bytes.
+    <physicalSize>  -> Size of the Partition in bytes.
+    <side>          -> Side that this section is associated with.
+                       could be (A, B, or sideless)
+                       A - Section is associated with side A
+                       B - Section is associated with side B
+                       sideless - Indicates partition will be in both TOCs but
+                                  only one copy of the partition should be created
+    <testonly/>     -> Indicates partition is used for internal testing only.
+                       Partition should be skipped in production environments.
+    <ecc/>          -> Indicates Partition should be ECC protected
+    <sha512Version/>-> Indicates Partition uses SHA512 for version information.
+    <sha512perEC/>  -> Indicates SHA512 is used to indicate version for each
+                       EC-specific image within the Partition.
+    <preserved/>    -> Indicates Partition is preserved across code updates.
+</section>
+-->
+
+<pnor>
+    <metadata>
+        <imageSize>0x4000000</imageSize>
+        <chipSize>0x4000000</chipSize>
+        <blockSize>0x1000</blockSize>
+        <tocSize>0x8000</tocSize>
+        <!--TODO: RTC 123734 - remove side offsets once hwsv implements new
+        layout-->
+        <sideAOffset>0x3FF7000</sideAOffset>
+        <sideBOffset>0x0</sideBOffset>
+        <arrangement>A-D-B</arrangement>
+        <side>
+            <id>B</id>
+        </side>
+    </metadata>
+    <section>
+        <description>Hostboot Error Logs (144K)</description>
+        <eyeCatch>HBEL</eyeCatch>
+        <physicalOffset>0x8000</physicalOffset>
+        <physicalRegionSize>0x24000</physicalRegionSize>
+        <side>sideless</side>
+        <ecc/>
+    </section>
+    <section>
+        <description>Guard Data (20K)</description>
+        <eyeCatch>GUARD</eyeCatch>
+        <physicalOffset>0x2C000</physicalOffset>
+        <physicalRegionSize>0x5000</physicalRegionSize>
+        <side>sideless</side>
+        <ecc/>
+    </section>
+    <section>
+        <description>DIMM JEDEC (288K)</description>
+        <eyeCatch>DJVPD</eyeCatch>
+        <!--NOTE: MUST update standalone.simics if offset changes -->
+         <physicalOffset>0x31000</physicalOffset>
+        <physicalRegionSize>0x48000</physicalRegionSize>
+        <side>sideless</side>
+        <ecc/>
+    </section>
+    <section>
+        <description>Module VPD (576K)</description>
+        <eyeCatch>MVPD</eyeCatch>
+        <!--NOTE: MUST update standalone.simics if offset changes -->
+        <physicalOffset>0x79000</physicalOffset>
+        <physicalRegionSize>0x90000</physicalRegionSize>
+        <side>sideless</side>
+        <ecc/>
+    </section>
+    <section>
+        <description>Centaur VPD (288K)</description>
+        <eyeCatch>CVPD</eyeCatch>
+        <!--NOTE: MUST update standalone.simics if offset changes -->
+        <physicalOffset>0x109000</physicalOffset>
+        <physicalRegionSize>0x48000</physicalRegionSize>
+        <side>sideless</side>
+        <ecc/>
+    </section>
+    <section>
+        <description>Hostboot Base (1MB)</description>
+        <eyeCatch>HBB</eyeCatch>
+        <physicalOffset>0x151000</physicalOffset>
+        <physicalRegionSize>0x100000</physicalRegionSize>
+        <side>sideless</side>
+        <sha512Version/>
+        <ecc/>
+    </section>
+    <section>
+        <description>Hostboot Data (2MB)</description>
+        <eyeCatch>HBD</eyeCatch>
+        <physicalOffset>0x251000</physicalOffset>
+        <physicalRegionSize>0x200000</physicalRegionSize>
+        <sha512Version/>
+        <side>sideless</side>
+        <ecc/>
+    </section>
+    <section>
+        <description>Hostboot Extended image (12MB w/o ECC)</description>
+        <eyeCatch>HBI</eyeCatch>
+        <physicalOffset>0x451000</physicalOffset>
+        <physicalRegionSize>0xD80000</physicalRegionSize>
+        <sha512Version/>
+        <side>sideless</side>
+        <ecc/>
+    </section>
+    <section>
+        <description>SBE-IPL (Staging Area) (752K)</description>
+        <eyeCatch>SBE</eyeCatch>
+        <physicalOffset>0x11D1000</physicalOffset>
+        <physicalRegionSize>0xBC000</physicalRegionSize>
+        <sha512perEC/>
+        <sha512Version/>
+        <side>sideless</side>
+        <ecc/>
+    </section>
+    <section>
+        <description>HCODE Ref Image (1.125MB)</description>
+        <eyeCatch>HCODE</eyeCatch>
+        <physicalOffset>0x128D000</physicalOffset>
+        <physicalRegionSize>0x120000</physicalRegionSize>
+        <sha512Version/>
+        <side>sideless</side>
+        <ecc/>
+    </section>
+    <section>
+        <description>Hostboot Runtime Services for Sapphire (7.0MB)</description>
+        <eyeCatch>HBRT</eyeCatch>
+        <physicalOffset>0x13AD000</physicalOffset>
+        <physicalRegionSize>0x700000</physicalRegionSize>
+        <sha512Version/>
+        <side>sideless</side>
+        <ecc/>
+    </section>
+    <section>
+        <description>Payload (21.375MB)</description>
+        <eyeCatch>PAYLOAD</eyeCatch>
+        <physicalOffset>0x1AAD000</physicalOffset>
+        <physicalRegionSize>0x1560000</physicalRegionSize>
+        <sha512Version/>
+        <side>sideless</side>
+        <ecc/>
+    </section>
+    <section>
+        <description>Special PNOR Test Space (36K)</description>
+        <eyeCatch>TEST</eyeCatch>
+        <physicalOffset>0x300D000</physicalOffset>
+        <physicalRegionSize>0x9000</physicalRegionSize>
+        <testonly/>
+        <side>sideless</side>
+        <ecc/>
+    </section>
+    <section>
+        <!-- Note there is no <sha512Version/> tag on purpose to avoid hostboot
+             from skipping header. Signing is forced in build pnor phase -->
+        <description>Special PNOR Test Space with Header (36K)</description>
+        <eyeCatch>TESTRO</eyeCatch>
+        <physicalOffset>0x3016000</physicalOffset>
+        <physicalRegionSize>0x9000</physicalRegionSize>
+        <side>sideless</side>
+        <testonly/>
+        <preserved/>
+        <readOnly/>
+        <ecc/>
+    </section>
+    <section>
+        <description>Hostboot Bootloader (28K)</description>
+        <eyeCatch>HBBL</eyeCatch>
+        <physicalOffset>0x301F000</physicalOffset>
+        <!-- Physical Size includes Header rounded to ECC valid size -->
+        <!-- Max size of actual HBBL content is 20K and 22.5K with ECC -->
+        <physicalRegionSize>0x7000</physicalRegionSize>
+        <side>sideless</side>
+        <sha512Version/>
+        <ecc/>
+    </section>
+    <section>
+        <description>Global Data (36K)</description>
+        <eyeCatch>GLOBAL</eyeCatch>
+        <physicalOffset>0x3026000</physicalOffset>
+        <physicalRegionSize>0x9000</physicalRegionSize>
+        <side>sideless</side>
+        <ecc/>
+    </section>
+    <section>
+        <description>Ref Image Ring Overrides (20K)</description>
+        <eyeCatch>RINGOVD</eyeCatch>
+        <physicalOffset>0x302F000</physicalOffset>
+        <physicalRegionSize>0x5000</physicalRegionSize>
+        <side>sideless</side>
+        <ecc/>
+    </section>
+    <section>
+        <description>SecureBoot Key Transition Partition (16K)</description>
+        <eyeCatch>SBKT</eyeCatch>
+        <physicalOffset>0x3034000</physicalOffset>
+        <physicalRegionSize>0x4000</physicalRegionSize>
+        <side>sideless</side>
+        <ecc/>
+    </section>
+    <section>
+        <description>OCC Lid (1.125M)</description>
+        <eyeCatch>OCC</eyeCatch>
+        <physicalOffset>0x3038000</physicalOffset>
+        <physicalRegionSize>0x120000</physicalRegionSize>
+        <sha512Version/>
+        <side>sideless</side>
+        <ecc/>
+    </section>
+    <section>
+        <description>VFRT data for WOF (12MB)</description>
+        <!-- We need 266KB per module sort, going to support
+             40 tables by default, plus ECC  -->
+        <eyeCatch>WOFDATA</eyeCatch>
+        <physicalOffset>0x3158000</physicalOffset>
+        <physicalRegionSize>0xC00000</physicalRegionSize>
+        <side>sideless</side>
+        <sha512Version/>
+        <ecc/>
+    </section>
+    <section>
+        <description>FIRDATA (12K)</description>
+        <eyeCatch>FIRDATA</eyeCatch>
+        <physicalOffset>0x3D58000</physicalOffset>
+        <physicalRegionSize>0x3000</physicalRegionSize>
+        <side>sideless</side>
+        <ecc/>
+    </section>
+    <section>
+        <description>Memory Data (128K)</description>
+        <eyeCatch>MEMD</eyeCatch>
+        <physicalOffset>0x3D5B000</physicalOffset>
+        <physicalRegionSize>0x20000</physicalRegionSize>
+        <side>sideless</side>
+        <sha512Version/>
+        <ecc/>
+    </section>
+    <section>
+        <description>Secureboot Test Load (12K)</description>
+        <eyeCatch>TESTLOAD</eyeCatch>
+        <physicalOffset>0x3D7B000</physicalOffset>
+        <physicalRegionSize>0x3000</physicalRegionSize>
+        <side>sideless</side>
+        <sha512Version/>
+        <ecc/>
+    </section>
+    <section>
+        <description>Centaur Hw Ref Image (12K)</description>
+        <eyeCatch>CENHWIMG</eyeCatch>
+        <physicalOffset>0x3D7E000</physicalOffset>
+        <physicalRegionSize>0x3000</physicalRegionSize>
+        <sha512Version/>
+        <side>sideless</side>
+        <ecc/>
+    </section>
+    <section>
+        <description>Secure Boot (144K)</description>
+        <eyeCatch>SECBOOT</eyeCatch>
+        <physicalOffset>0x3D81000</physicalOffset>
+        <physicalRegionSize>0x24000</physicalRegionSize>
+        <side>sideless</side>
+        <ecc/>
+        <preserved/>
+    </section>
+    <section>
+        <description>Open CAPI Memory Buffer (OCMB) Firmware (300K)</description>
+        <eyeCatch>OCMBFW</eyeCatch>
+        <physicalOffset>0x3DA5000</physicalOffset>
+        <physicalRegionSize>0x4B000</physicalRegionSize>
+        <side>sideless</side>
+        <sha512Version/>
+        <readOnly/>
+        <ecc/>
+    </section>
+    <section>
+        <description>HDAT Data (16K)</description>
+        <eyeCatch>HDAT</eyeCatch>
+        <physicalOffset>0x3DF0000</physicalOffset>
+        <physicalRegionSize>0x4000</physicalRegionSize>
+        <side>sideless</side>
+        <sha512Version/>
+        <ecc/>
+    </section>
+    <section>
+        <description>Eeprom Cache(512K)</description>
+        <eyeCatch>EECACHE</eyeCatch>
+        <physicalOffset>0x3E14000</physicalOffset>
+        <physicalRegionSize>0x80000</physicalRegionSize>
+        <side>sideless</side>
+        <sha512Version/>
+        <ecc/>
+    </section>
+</pnor>
diff --git a/src/build/configs/axone.config b/src/build/configs/simics_axone.config
index 965b1dc60..965b1dc60 100644
--- a/src/build/configs/axone.config
+++ b/src/build/configs/simics_axone.config
diff --git a/src/build/mkrules/dist.targets.mk b/src/build/mkrules/dist.targets.mk
index 2ab00d9d7..d2302f3ba 100755
--- a/src/build/mkrules/dist.targets.mk
+++ b/src/build/mkrules/dist.targets.mk
@@ -305,6 +305,7 @@ fsp.tar_CONTENTS = \
     src/build/buildpnor/imprintHwKeyHash \
     src/build/buildpnor/defaultPnorLayout.xml \
     src/build/buildpnor/pnorLayoutFSP.xml \
+    src/build/buildpnor/pnorLayoutAxone.xml \
     $(if $(FAKEPNOR), src/build/buildpnor/pnorLayoutFake.xml, ) \
     $(if $(FAKEPNOR), img/vbu_NIMBUS_targeting.bin, ) \
     $(if $(FAKEPNOR), img/vbu_NIMBUS_targeting.bin.protected, ) \
diff --git a/src/build/mkrules/hbfw/img/makefile b/src/build/mkrules/hbfw/img/makefile
index 4f5a72219..1bfb01cea 100755
--- a/src/build/mkrules/hbfw/img/makefile
+++ b/src/build/mkrules/hbfw/img/makefile
@@ -5,7 +5,7 @@
 #
 # OpenPOWER HostBoot Project
 #
-# Contributors Listed Below - COPYRIGHT 2012,2018
+# Contributors Listed Below - COPYRIGHT 2012,2019
 # [+] International Business Machines Corp.
 #
 #
@@ -180,13 +180,18 @@ Secure Boot Signing Config:\n\
     Libs to preload      [${SIGNING_LIBS}]\n\
     Path                 [${PATH}]\n\n"
 
-# Default to using FSP layout for common file purposes and use existing hb
-# techniques to enable default layout when appropriate.
+# Use FSP layout for any FSP based system
+# Use Default layout for standalone simics
+# Use Axone layout for Axone simics
 PNOR_LAYOUT = ${pnorLayoutFSP.xml:P}
-.if (${DEFAULT_PNOR} == 1)
+.if (${PNOR_LAYOUT_SELECTED} == 1)
     PNOR_LAYOUT = ${defaultPnorLayout.xml:P}
 .endif
 
+.if (${PNOR_LAYOUT_SELECTED} == 2)
+    PNOR_LAYOUT = ${pnorLayoutAxone.xml:P}
+.endif
+
 # Since this makefile is only ever used for an FSP signing environment, then
 # we can just specify that we want an fspbuild here without any condition.
 BUILD_TYPE_PARAMS = --build-type fspbuild
@@ -201,7 +206,7 @@ BUILD_TYPE_PARAMS = --build-type fspbuild
 # Decide which PNOR to build
 .if (${FAKEPNOR} == "")
     # Parameters passed into GEN_PNOR_IMAGE_SCRIPT.
-    .if (${DEFAULT_PNOR} == 1)
+    .if (${PNOR_LAYOUT_SELECTED} == 1)
         GEN_DEFAULT_BIN_FILES = HBBL=${HBBL_IMG},HBB=${HBB_IMG},HBI=${HBI_IMG},HBRT=${HBRT_IMG},TEST=EMPTY,TESTRO=EMPTY,TESTLOAD=EMPTY,HBEL=EMPTY,GUARD=EMPTY,GLOBAL=EMPTY,PAYLOAD=EMPTY,CVPD=EMPTY,MVPD=EMPTY,DJVPD=EMPTY,RINGOVD=EMPTY,SBKT=EMPTY,FIRDATA=EMPTY,MEMD=${${ZZ_MEMD_IMG}:P}
     .else
         GEN_DEFAULT_BIN_FILES = HBBL=${HBBL_IMG},HBB=${HBB_IMG},HBI=${HBI_IMG},HBRT=${HBRT_IMG},HBEL=EMPTY,GUARD=EMPTY,GLOBAL=EMPTY,CVPD=EMPTY,MVPD=EMPTY,DJVPD=EMPTY,RINGOVD=EMPTY,SBKT=EMPTY,MEMD=${${ZZ_MEMD_IMG}:P}
@@ -406,7 +411,7 @@ ZZ2U_HBD_FINAL_IMG = ZZ-2U.HBD.bin
 # Decide which PNOR to build
 .if (${FAKEPNOR} == "")
     # Paramemters passed into GEN_PNOR_IMAGE_SCRIPT.
-    .if (${DEFAULT_PNOR} == 1)
+    .if (${PNOR_LAYOUT_SELECTED} == 1)
         GEN_NIMBUS_BIN_FILES = NIMBUS:SBE=${${NIMBUS_SBE_IMG}:P},HCODE=${${NIMBUS_HCODE_IMG}:P},OCC=${${NIMBUS_OCC_IMG}:P},HBD=${${NIMBUS_HBD_IMG}:P},CENHWIMG=${NIMBUS_CENHWIMG_IMG}
         GEN_CUMULUS_BIN_FILES = CUMULUS:SBE=${${CUMULUS_SBE_IMG}:P},HCODE=${${CUMULUS_HCODE_IMG}:P},OCC=${${CUMULUS_OCC_IMG}:P},HBD=${${CUMULUS_HBD_IMG}:P},CENHWIMG=${${CUMULUS_CENHWIMG_IMG}:P}
         GEN_CUMULUS_CDIMM_BIN_FILES = CUMULUS_CDIMM:SBE=${${CUMULUS_SBE_IMG}:P},HCODE=${${CUMULUS_HCODE_IMG}:P},OCC=${${CUMULUS_OCC_IMG}:P},HBD=${${CUMULUS_CDIMM_HBD_IMG}:P},CENHWIMG=${${CUMULUS_CENHWIMG_IMG}:P}
@@ -463,7 +468,7 @@ gen_system_specific_images_bypass_cache : dump-secureboot-config
 gen_system_specific_images: build_sbe_partitions .PMAKE
 	@${MAKE:T:R} gen_system_specific_images_bypass_cache
 
-.if (${DEFAULT_PNOR} == 1)
+.if (${PNOR_LAYOUT_SELECTED} == 1)
     HOSTBOOT_DEFAULT_SECTIONS = HBBL=${HBBL_FINAL_IMG},HBB=${HBB_FINAL_IMG},HBI=${HBI_FINAL_IMG},HBRT=${HBRT_FINAL_IMG},TEST=${TEST_FINAL_IMG},TESTRO=${TESTRO_FINAL_IMG},TESTLOAD=${TESTLOAD_FINAL_IMG},HBEL=${HBEL_FINAL_IMG},GUARD=${GUARD_FINAL_IMG},GLOBAL=${GLOBAL_FINAL_IMG},PAYLOAD=${PAYLOAD_FINAL_IMG},CVPD=${CVPD_FINAL_IMG},MVPD=${MVPD_FINAL_IMG},DJVPD=${DJVPD_FINAL_IMG},RINGOVD=${RINGOVD_FINAL_IMG},SBKT=${SBKT_FINAL_IMG},FIRDATA=${FIRDATA_FINAL_IMG}
     NIMBUS_SECT = HBD=${NIMBUS_HBD_FINAL_IMG},SBE=${NIMBUS_SBE_FINAL_IMG},HCODE=${NIMBUS_HCODE_FINAL_IMG},OCC=${NIMBUS_OCC_FINAL_IMG},WOFDATA=${ZZ_WOFDATA_FINAL_IMG},CENHWIMG=${NIMBUS_CENHWIMG_FINAL_IMG},MEMD=${ZZ_MEMD_FINAL_IMG}
     CUMULUS_SECT = HBD=${CUMULUS_HBD_FINAL_IMG},SBE=${CUMULUS_SBE_FINAL_IMG},HCODE=${CUMULUS_HCODE_FINAL_IMG},OCC=${CUMULUS_OCC_FINAL_IMG},WOFDATA=${ZEPPELIN_WOFDATA_FINAL_IMG},CENHWIMG=${CUMULUS_CENHWIMG_FINAL_IMG},MEMD=${ZEPPELIN_MEMD_FINAL_IMG}
diff --git a/src/build/tools/hbDistribute b/src/build/tools/hbDistribute
index 8c501ad97..94816df8d 100755
--- a/src/build/tools/hbDistribute
+++ b/src/build/tools/hbDistribute
@@ -6,7 +6,7 @@
 #
 # OpenPOWER HostBoot Project
 #
-# Contributors Listed Below - COPYRIGHT 2012,2018
+# Contributors Listed Below - COPYRIGHT 2012,2019
 # [+] International Business Machines Corp.
 #
 #
@@ -210,9 +210,16 @@ fi
 # Note this file is generated in the hb config file rule in top level makefile
 if [[ -f ${PROJECT_ROOT}/obj/genfiles/hb_fsp_release ]]; then
     echo "FSP build, using fsp pnor xml layout"
+    # PNOR_LAYOUT_SELECTED == 0 is FSP XML
+    export PNOR_LAYOUT_SELECTED=0
+elif [[ -f ${PROJECT_ROOT}/obj/genfiles/hb_simics_axone_release ]]; then
+    echo "Axone build, using axone pnor xml layout"
+    # PNOR_LAYOUT_SELECTED == 2 is AXONE XML
+    export PNOR_LAYOUT_SELECTED=2
 else
+    # PNOR_LAYOUT_SELECTED == 1 is DEFAULT XML
     echo "Non FSP build, using default pnor xml layout"
-    export DEFAULT_PNOR=1
+    export PNOR_LAYOUT_SELECTED=1
 fi
 
 # Clean up preivous rand files. Should only be needed if a previous call failed.
diff --git a/src/include/usr/pnor/pnor_const.H b/src/include/usr/pnor/pnor_const.H
index e8716c12c..d2515b70f 100644
--- a/src/include/usr/pnor/pnor_const.H
+++ b/src/include/usr/pnor/pnor_const.H
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2015,2018                        */
+/* Contributors Listed Below - COPYRIGHT 2015,2019                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -75,6 +75,7 @@ enum SectionId
     TESTLOAD,       /**< Secureboot test load */
     CENTAUR_HW_IMG, /**< Centaur HCODE Reference image */
     HDAT,           /**< HDAT data */
+    EECACHE,
 #endif
     NUM_SECTIONS,   /**< Number of defined sections */
 
diff --git a/src/usr/pnor/pnor_utils.C b/src/usr/pnor/pnor_utils.C
index 44a4bd03d..68df913e0 100644
--- a/src/usr/pnor/pnor_utils.C
+++ b/src/usr/pnor/pnor_utils.C
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2011,2018                        */
+/* Contributors Listed Below - COPYRIGHT 2011,2019                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -449,6 +449,7 @@ const char * PNOR::SectionIdToString( uint32_t i_secIdIndex )
         "TESTLOAD",    /**< PNOR::TESTLOAD       : Secureboot Test Load */
         "CENHWIMG",    /**< PNOR::CENTAUR_HW_IMG : Centaur HCODE ref image   */
         "HDAT",        /**< PNOR::HDAT           : Hdat Data */
+        "EECACHE",     /**< PNOR::EECACHE        : Cached data from various EEPROMs */
 #endif
     };