diff options
| author | Stephen Cprek <smcprek@us.ibm.com> | 2013-08-09 16:12:28 -0500 |
|---|---|---|
| committer | A. Patrick Williams III <iawillia@us.ibm.com> | 2013-09-12 10:04:53 -0500 |
| commit | 90a1f442e0560ac159e34042cfbed558549e7b6a (patch) | |
| tree | e7c45b4c4277314d0d63798ba6e1e07119a80fec | |
| parent | fd1a15f8ee4bae8bbfb2eb076129cb184b4cb2ec (diff) | |
| download | talos-hostboot-90a1f442e0560ac159e34042cfbed558549e7b6a.tar.gz talos-hostboot-90a1f442e0560ac159e34042cfbed558549e7b6a.zip | |
Added defaults to attributes where none was specified
Change-Id: I9e3c01cbfbb738eeb4dddd21fd92a6048e538481
RTC: 53049
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/5757
Tested-by: Jenkins Server
Reviewed-by: Brian H. Horton <brianh@linux.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
| -rw-r--r-- | src/usr/hwpf/hwp/memory_attributes.xml | 15 | ||||
| -rw-r--r-- | src/usr/targeting/common/xmltohb/attribute_types.xml | 309 | ||||
| -rw-r--r-- | src/usr/targeting/common/xmltohb/attribute_types_hb.xml | 13 | ||||
| -rw-r--r-- | src/usr/targeting/common/xmltohb/simics_MURANO.system.xml | 208 | ||||
| -rw-r--r-- | src/usr/targeting/common/xmltohb/simics_VENICE.system.xml | 373 | ||||
| -rw-r--r-- | src/usr/targeting/common/xmltohb/target_types.xml | 22 | ||||
| -rw-r--r-- | src/usr/targeting/common/xmltohb/vbu_MURANO.system.xml | 176 | ||||
| -rw-r--r-- | src/usr/targeting/common/xmltohb/vbu_VENICE.system.xml | 129 |
8 files changed, 872 insertions, 373 deletions
diff --git a/src/usr/hwpf/hwp/memory_attributes.xml b/src/usr/hwpf/hwp/memory_attributes.xml index 1f140743a..af1fb78d3 100644 --- a/src/usr/hwpf/hwp/memory_attributes.xml +++ b/src/usr/hwpf/hwp/memory_attributes.xml @@ -3161,6 +3161,21 @@ Firmware shares some code with the processor, so the attribute is named so they <persistent/> </attribute> +<!-- Mark Bellows said it will be removed +<attribute> + <id>ATTR_MEMB_NEST_FREQ</id> + <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType> + <description>Frequency of the Centaur NEST PLL in MHz. +consumer: cen_mem_pll_initf +firmware notes: Platforms should initialize the attribute to the correct value for the system.</description> + <valueType>uint32</valueType> + <platInit/> + <writeable/> + <odmVisable/> + <odmChangeable/> +</attribute> +--> + <attribute> <id>ATTR_CDIMM_SENSOR_MAP_PRIMARY</id> <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType> diff --git a/src/usr/targeting/common/xmltohb/attribute_types.xml b/src/usr/targeting/common/xmltohb/attribute_types.xml index 35aea2402..2573a3de9 100644 --- a/src/usr/targeting/common/xmltohb/attribute_types.xml +++ b/src/usr/targeting/common/xmltohb/attribute_types.xml @@ -317,7 +317,6 @@ <description>Scratch attribute that can be used for dev/test</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -334,7 +333,6 @@ <description>Scratch attribute that can be used for dev/test</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -351,7 +349,6 @@ <description>Scratch attribute that can be used for dev/test</description> <simpleType> <uint32_t> - <default>0</default> </uint32_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -368,7 +365,6 @@ <description>Scratch attribute that can be used for dev/test</description> <simpleType> <uint32_t> - <default>0</default> </uint32_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -385,7 +381,6 @@ <description>Scratch attribute that can be used for dev/test</description> <simpleType> <uint64_t> - <default>0</default> </uint64_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -402,7 +397,6 @@ <description>Scratch attribute that can be used for dev/test</description> <simpleType> <uint64_t> - <default>0</default> </uint64_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -419,7 +413,6 @@ <description>Scratch attribute that can be used for dev/test</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> <array>32</array> </simpleType> @@ -437,7 +430,6 @@ <description>Scratch attribute that can be used for dev/test</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> <array>2, 3, 4</array> </simpleType> @@ -455,7 +447,6 @@ <description>Scratch attribute that can be used for dev/test</description> <simpleType> <uint32_t> - <default>0</default> </uint32_t> <array>8</array> </simpleType> @@ -473,7 +464,6 @@ <description>Scratch attribute that can be used for dev/test</description> <simpleType> <uint32_t> - <default>0</default> </uint32_t> <array>2,3</array> </simpleType> @@ -491,7 +481,6 @@ <description>Scratch attribute that can be used for dev/test</description> <simpleType> <uint64_t> - <default>0</default> </uint64_t> <array>4</array> </simpleType> @@ -509,7 +498,6 @@ <description>Scratch attribute that can be used for dev/test</description> <simpleType> <uint64_t> - <default>0</default> </uint64_t> <array>2,2</array> </simpleType> @@ -569,7 +557,6 @@ <description>Dummy attribute on the heap with zero initialization</description> <simpleType> <uint8_t> - <default>5</default> </uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -1165,7 +1152,6 @@ <description>attribute indicating the chip target's EC level</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -1182,7 +1168,6 @@ <description>attribute indicating the chip's ID</description> <simpleType> <uint32_t> - <default>0</default> </uint32_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -1211,7 +1196,6 @@ <description>L2 tier0 read epsilon register value.</description> <simpleType> <uint32_t> - <default>0</default> </uint32_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -1228,7 +1212,6 @@ <description>L2 tier1 read epsilon register value.</description> <simpleType> <uint32_t> - <default>0</default> </uint32_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -1245,7 +1228,6 @@ <description>L2 tier2 read epsilon register value.</description> <simpleType> <uint32_t> - <default>0</default> </uint32_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -1262,7 +1244,6 @@ <description>L2 force tier2 read epsilon protect (all tiers).</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -1279,7 +1260,6 @@ <description>L2 write epsilon register value.</description> <simpleType> <uint32_t> - <default>0</default> </uint32_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -1296,7 +1276,6 @@ <description>L3 tier0 read epsilon register value.</description> <simpleType> <uint32_t> - <default>0</default> </uint32_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -1313,7 +1292,6 @@ <description>L3 tier1 read epsilon register value.</description> <simpleType> <uint32_t> - <default>0</default> </uint32_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -1330,7 +1308,6 @@ <description>L3 tier2 read epsilon register value.</description> <simpleType> <uint32_t> - <default>0</default> </uint32_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -1347,7 +1324,6 @@ <description>L3 force tier2 read epsilon protect (all tiers).</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -1364,7 +1340,6 @@ <description>L3 write epsilon register value.</description> <simpleType> <uint32_t> - <default>0</default> </uint32_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -2532,7 +2507,6 @@ <description>Base Address for all mainstore behind this processor</description> <simpleType> <uint64_t> - <default>0</default> </uint64_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -2549,7 +2523,6 @@ <description>Base Address for all mirrored mainstore behind this processor</description> <simpleType> <uint64_t> - <default>0</default> </uint64_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -3440,13 +3413,16 @@ Selects which voltage level to place the Core and ECO domain PFETs upon Winkle e </hwpfToHbAttrMap> </attribute> +<!-- TODO RTC:52835 add default 0 --> <attribute> <id>PM_PFET_POWERUP_CORE_DELAY0</id> <description> PROC_CHIP Attribute </description> <simpleType> - <uint32_t></uint32_t> + <uint32_t> + <default>0</default> + </uint32_t> </simpleType> <persistency>non-volatile</persistency> <readable/> @@ -3456,13 +3432,16 @@ Selects which voltage level to place the Core and ECO domain PFETs upon Winkle e </hwpfToHbAttrMap> </attribute> +<!-- TODO RTC:52835 add default 0 --> <attribute> <id>PM_PFET_POWERUP_CORE_DELAY1</id> <description> PROC_CHIP Attribute </description> <simpleType> - <uint32_t></uint32_t> + <uint32_t> + <default>0</default> + </uint32_t> </simpleType> <persistency>non-volatile</persistency> <readable/> @@ -3527,13 +3506,16 @@ Selects which voltage level to place the Core and ECO domain PFETs upon Winkle e </hwpfToHbAttrMap> </attribute> +<!-- TODO RTC:52835 add default 0 --> <attribute> <id>PM_PFET_POWERDOWN_CORE_DELAY0</id> <description> PROC_CHIP Attribute </description> <simpleType> - <uint32_t></uint32_t> + <uint32_t> + <default>0</default> + </uint32_t> </simpleType> <persistency>non-volatile</persistency> <readable/> @@ -3543,13 +3525,16 @@ Selects which voltage level to place the Core and ECO domain PFETs upon Winkle e </hwpfToHbAttrMap> </attribute> +<!-- TODO RTC:52835 add default 0 --> <attribute> <id>PM_PFET_POWERDOWN_CORE_DELAY1</id> <description> PROC_CHIP Attribute </description> <simpleType> - <uint32_t></uint32_t> + <uint32_t> + <default>0</default> + </uint32_t> </simpleType> <persistency>non-volatile</persistency> <readable/> @@ -3614,13 +3599,16 @@ Selects which voltage level to place the Core and ECO domain PFETs upon Winkle e </hwpfToHbAttrMap> </attribute> +<!-- TODO RTC:52835 add default 0 --> <attribute> <id>PM_PFET_POWERUP_ECO_DELAY0</id> <description> PROC_CHIP Attribute </description> <simpleType> - <uint32_t></uint32_t> + <uint32_t> + <default>0</default> + </uint32_t> </simpleType> <persistency>non-volatile</persistency> <readable/> @@ -3630,13 +3618,16 @@ Selects which voltage level to place the Core and ECO domain PFETs upon Winkle e </hwpfToHbAttrMap> </attribute> +<!-- TODO RTC:52835 add default 0 --> <attribute> <id>PM_PFET_POWERUP_ECO_DELAY1</id> <description> PROC_CHIP Attribute </description> <simpleType> - <uint32_t></uint32_t> + <uint32_t> + <default>0</default> + </uint32_t> </simpleType> <persistency>non-volatile</persistency> <readable/> @@ -3701,13 +3692,16 @@ Selects which voltage level to place the Core and ECO domain PFETs upon Winkle e </hwpfToHbAttrMap> </attribute> +<!-- TODO RTC:52835 add default 0 --> <attribute> <id>PM_PFET_POWERDOWN_ECO_DELAY0</id> <description> PROC_CHIP Attribute </description> <simpleType> - <uint32_t></uint32_t> + <uint32_t> + <default>0</default> + </uint32_t> </simpleType> <persistency>non-volatile</persistency> <readable/> @@ -3717,13 +3711,16 @@ Selects which voltage level to place the Core and ECO domain PFETs upon Winkle e </hwpfToHbAttrMap> </attribute> +<!-- TODO RTC:52835 add default 0 --> <attribute> <id>PM_PFET_POWERDOWN_ECO_DELAY1</id> <description> PROC_CHIP Attribute </description> <simpleType> - <uint32_t></uint32_t> + <uint32_t> + <default>0</default> + </uint32_t> </simpleType> <persistency>non-volatile</persistency> <readable/> @@ -4366,7 +4363,9 @@ Divider for the 1us PBAX hang pulse. A hang is detected after two divided hang Provided by the Machine Readable Workbook. </description> <simpleType> - <uint8_t></uint8_t> + <uint8_t> + <default>0</default> + </uint8_t> </simpleType> <persistency>non-volatile</persistency> <readable/> @@ -4399,6 +4398,7 @@ Divider for the 1us PBAX hang pulse. A hang is detected after two divided hang </hwpfToHbAttrMap> </attribute> +<!-- TODO RTC:52835 add default 0 --> <attribute> <id>PM_SPIVID_PORT_ENABLE</id> <description> @@ -5644,7 +5644,7 @@ firmware notes: Used as override attribute for pstate procedure <uint64_t></uint64_t> <array>32</array> </simpleType> - <persistency>volatile</persistency> + <persistency>volatile-zeroed</persistency> <readable/> <writeable/> <hwpfToHbAttrMap> @@ -5723,7 +5723,9 @@ firmware notes: Used as override attribute for pstate procedure 64-bit address representing BAR RA </description> <simpleType> - <uint64_t></uint64_t> + <uint64_t> + <default>0x0000000000000000</default> + </uint64_t> </simpleType> <persistency>non-volatile</persistency> <readable/> @@ -5763,7 +5765,10 @@ firmware notes: Used as override attribute for pstate procedure mask applied to RA 14:43 </description> <simpleType> - <uint64_t></uint64_t> + <uint64_t> + <!-- 64Mb --> + <default>0x0000000004000000</default> + </uint64_t> </simpleType> <persistency>non-volatile</persistency> <readable/> @@ -5802,7 +5807,9 @@ firmware notes: Used as override attribute for pstate procedure 64-bit address representing BAR RA </description> <simpleType> - <uint64_t></uint64_t> + <uint64_t> + <default>0x0000000000000000</default> + </uint64_t> </simpleType> <persistency>non-volatile</persistency> <readable/> @@ -5853,7 +5860,10 @@ firmware notes: Used as override attribute for pstate procedure mask applied to RA 14:43 </description> <simpleType> - <uint64_t></uint64_t> + <uint64_t> + <!-- 64Mb --> + <default>0x0000000004000000</default> + </uint64_t> </simpleType> <persistency>non-volatile</persistency> <readable/> @@ -5872,7 +5882,9 @@ firmware notes: Used as override attribute for pstate procedure 64-bit address representing BAR RA </description> <simpleType> - <uint64_t></uint64_t> + <uint64_t> + <default>0x0000000000000000</default> + </uint64_t> </simpleType> <persistency>non-volatile</persistency> <readable/> @@ -5891,7 +5903,10 @@ firmware notes: Used as override attribute for pstate procedure mask applied to RA 14:43 </description> <simpleType> - <uint64_t></uint64_t> + <uint64_t> + <!-- 64Mb --> + <default>0x0000000004000000</default> + </uint64_t> </simpleType> <persistency>non-volatile</persistency> <readable/> @@ -5911,7 +5926,9 @@ firmware notes: Used as override attribute for pstate procedure 64-bit proc_sbe_security_setup_vector </description> <simpleType> - <uint64_t></uint64_t> + <uint64_t> + <default>0x0000000000000000</default> + </uint64_t> </simpleType> <persistency>non-volatile</persistency> <readable/> @@ -5928,7 +5945,6 @@ firmware notes: Used as override attribute for pstate procedure <description>DRAM Voltage. Initialized and used by HWPs.</description> <simpleType> <uint32_t> - <default>0</default> </uint32_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -5945,7 +5961,6 @@ firmware notes: Used as override attribute for pstate procedure <description>Frequency of memory channel in MHz. Initialized and used by HWPs.</description> <simpleType> <uint32_t> - <default>0</default> </uint32_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -5962,7 +5977,6 @@ firmware notes: Used as override attribute for pstate procedure <description>DIMM Manufacturer ID Code. Initialized and used by HWPs.</description> <simpleType> <uint32_t> - <default>0</default> </uint32_t> <array>2,2</array><!-- [drop][port] --> </simpleType> @@ -5980,7 +5994,6 @@ firmware notes: Used as override attribute for pstate procedure <description>DIMM ranks configured. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> <array>2,2</array><!-- [drop][port] --> </simpleType> @@ -5998,7 +6011,6 @@ firmware notes: Used as override attribute for pstate procedure <description>Number of ranks per DIMM. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> <array>2,2</array><!-- [drop][port] --> </simpleType> @@ -6016,7 +6028,6 @@ firmware notes: Used as override attribute for pstate procedure <description>Type of DIMM. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -6033,7 +6044,6 @@ firmware notes: Used as override attribute for pstate procedure <description>DIMM is a custom DIMM. Sometimes this is known as a CDIMM, but technically, we could support Custom DIMMs of different types than an UDIMM, such as RDIMM and LRDIMM. Created in mss_eff_cnfg</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -6050,7 +6060,6 @@ firmware notes: Used as override attribute for pstate procedure <description>DRAM Device Width. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -6067,7 +6076,6 @@ firmware notes: Used as override attribute for pstate procedure <description>DRAM Generation. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -6084,7 +6092,6 @@ firmware notes: Used as override attribute for pstate procedure <description>Primary RankGroup0. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> <array>2</array> </simpleType> @@ -6102,7 +6109,6 @@ firmware notes: Used as override attribute for pstate procedure <description>Primary RankGroup1. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> <array>2</array> </simpleType> @@ -6120,7 +6126,6 @@ firmware notes: Used as override attribute for pstate procedure <description>Primary RankGroup2. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> <array>2</array> </simpleType> @@ -6138,7 +6143,6 @@ firmware notes: Used as override attribute for pstate procedure <description>Primary RankGroup3. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> <array>2</array> </simpleType> @@ -6156,7 +6160,6 @@ firmware notes: Used as override attribute for pstate procedure <description>Secondary RankGroup0. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> <array>2</array> </simpleType> @@ -6174,7 +6177,6 @@ firmware notes: Used as override attribute for pstate procedure <description>Secondary RankGroup1. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> <array>2</array> </simpleType> @@ -6192,7 +6194,6 @@ firmware notes: Used as override attribute for pstate procedure <description>Secondary RankGroup2. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> <array>2</array> </simpleType> @@ -6210,7 +6211,6 @@ firmware notes: Used as override attribute for pstate procedure <description>Secondary RankGroup3. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> <array>2</array> </simpleType> @@ -6228,7 +6228,6 @@ firmware notes: Used as override attribute for pstate procedure <description>Tertiary RankGroup0. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> <array>2</array> </simpleType> @@ -6246,7 +6245,6 @@ firmware notes: Used as override attribute for pstate procedure <description>Tertiary RankGroup1. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> <array>2</array> </simpleType> @@ -6264,7 +6262,6 @@ firmware notes: Used as override attribute for pstate procedure <description>Tertiary RankGroup2. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> <array>2</array> </simpleType> @@ -6282,7 +6279,6 @@ firmware notes: Used as override attribute for pstate procedure <description>Tertiary RankGroup3. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> <array>2</array> </simpleType> @@ -6300,7 +6296,6 @@ firmware notes: Used as override attribute for pstate procedure <description>Quaternary RankGroup0. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> <array>2</array> </simpleType> @@ -6318,7 +6313,6 @@ firmware notes: Used as override attribute for pstate procedure <description>Quaternary RankGroup1. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> <array>2</array> </simpleType> @@ -6336,7 +6330,6 @@ firmware notes: Used as override attribute for pstate procedure <description>Quaternary RankGroup2. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> <array>2</array> </simpleType> @@ -6354,7 +6347,6 @@ firmware notes: Used as override attribute for pstate procedure <description>Quaternary RankGroup3. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> <array>2</array> </simpleType> @@ -6376,7 +6368,6 @@ firmware notes: Used as override attribute for pstate procedure <description>Rank Read ODT. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> <array>2,2,4</array> </simpleType> @@ -6394,7 +6385,6 @@ firmware notes: Used as override attribute for pstate procedure <description>Rank Write ODT. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> <array>2,2,4</array> </simpleType> @@ -6412,7 +6402,6 @@ firmware notes: Used as override attribute for pstate procedure <description>DRAM Ron. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> <array>2,2</array><!-- [drop][port] --> </simpleType> @@ -6430,7 +6419,6 @@ firmware notes: Used as override attribute for pstate procedure <description>DRAM Rtt_Nom. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> <array>2,2,4</array> </simpleType> @@ -6448,7 +6436,6 @@ firmware notes: Used as override attribute for pstate procedure <description>DRAM Rtt_WR. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> <array>2,2,4</array> </simpleType> @@ -6466,7 +6453,6 @@ firmware notes: Used as override attribute for pstate procedure <description>DRAM Write Vref. Initialized and used by HWPs.</description> <simpleType> <uint32_t> - <default>0</default> </uint32_t> <array>2</array> </simpleType> @@ -6484,7 +6470,6 @@ firmware notes: Used as override attribute for pstate procedure <description>DRAM Write Vref for DDR4. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> <array>2</array> </simpleType> @@ -6502,7 +6487,6 @@ firmware notes: Used as override attribute for pstate procedure <description>Centaur DQ and DQS Drive Impedance. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> <array>2</array> </simpleType> @@ -6520,7 +6504,6 @@ firmware notes: Used as override attribute for pstate procedure <description>Centaur Address Drive Impedance. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> <array>2</array> </simpleType> @@ -6538,7 +6521,6 @@ firmware notes: Used as override attribute for pstate procedure <description>Centaur Control Drive Impedance. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> <array>2</array> </simpleType> @@ -6556,7 +6538,6 @@ firmware notes: Used as override attribute for pstate procedure <description>Centaur Clock Drive Impedance. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> <array>2</array> </simpleType> @@ -6574,7 +6555,6 @@ firmware notes: Used as override attribute for pstate procedure <description>Centaur Spare Clock Drive Impedance. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> <array>2</array> </simpleType> @@ -6592,7 +6572,6 @@ firmware notes: Used as override attribute for pstate procedure <description>Centaur DQ and DQS Receiver Impedance. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> <array>2</array> </simpleType> @@ -6610,7 +6589,6 @@ firmware notes: Used as override attribute for pstate procedure <description>Centaur DQ and DQS Slew Rate. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> <array>2</array> </simpleType> @@ -6628,7 +6606,6 @@ firmware notes: Used as override attribute for pstate procedure <description>Centaur Address Slew Rate. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> <array>2</array> </simpleType> @@ -6646,7 +6623,6 @@ firmware notes: Used as override attribute for pstate procedure <description>Centaur Clock Slew Rate. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> <array>2</array> </simpleType> @@ -6664,7 +6640,6 @@ firmware notes: Used as override attribute for pstate procedure <description>Centaur Spare Clock Slew Rate. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> <array>2</array> </simpleType> @@ -6682,7 +6657,6 @@ firmware notes: Used as override attribute for pstate procedure <description>Centaur Control Slew Rate. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> <array>2</array> </simpleType> @@ -6700,7 +6674,6 @@ firmware notes: Used as override attribute for pstate procedure <description>Centaur Read Vref. Initialized and used by HWPs.</description> <simpleType> <uint32_t> - <default>0</default> </uint32_t> <array>2</array> </simpleType> @@ -6720,7 +6693,6 @@ firmware notes: Used as override attribute for pstate procedure <description>Enables for which impedance values can be used and tested in a timing test. Initialized and used by HWPs.</description> <simpleType> <uint32_t> - <default>0</default> </uint32_t> <array>2</array> </simpleType> @@ -6738,7 +6710,6 @@ firmware notes: Used as override attribute for pstate procedure <description>Enables for which impedance values can be used and tested in a timing test. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> <array>2</array> </simpleType> @@ -6756,7 +6727,6 @@ firmware notes: Used as override attribute for pstate procedure <description>Enables for which impedance values can be used and tested in a timing test. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> <array>2</array> </simpleType> @@ -6774,7 +6744,6 @@ firmware notes: Used as override attribute for pstate procedure <description>Enables for which impedance values can be used and tested in a timing test. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> <array>2</array> </simpleType> @@ -6792,7 +6761,6 @@ firmware notes: Used as override attribute for pstate procedure <description>Enables for which impedance values can be used and tested in a timing test. Initialized and used by HWPs.</description> <simpleType> <uint32_t> - <default>0</default> </uint32_t> <array>2</array> </simpleType> @@ -6810,7 +6778,6 @@ firmware notes: Used as override attribute for pstate procedure <description>Slew Rates that can be selected during timing adjustments. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> <array>2</array> </simpleType> @@ -6828,7 +6795,6 @@ firmware notes: Used as override attribute for pstate procedure <description>Slew Rates that can be selected during timing adjustments. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> <array>2</array> </simpleType> @@ -6846,7 +6812,6 @@ firmware notes: Used as override attribute for pstate procedure <description>Slew Rates that can be selected during timing adjustments. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> <array>2</array> </simpleType> @@ -6864,7 +6829,6 @@ firmware notes: Used as override attribute for pstate procedure <description>Slew Rates that can be selected during timing adjustments. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> <array>2</array> </simpleType> @@ -6882,7 +6846,6 @@ firmware notes: Used as override attribute for pstate procedure <description>Slew Rates that can be selected during timing adjustments. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> <array>2</array> </simpleType> @@ -6900,7 +6863,6 @@ firmware notes: Used as override attribute for pstate procedure <description>Enables for which VREF to use on the WR Schmoo. Initialized and used by HWPs.</description> <simpleType> <uint32_t> - <default>0</default> </uint32_t> <array>2</array> </simpleType> @@ -6918,7 +6880,6 @@ firmware notes: Used as override attribute for pstate procedure <description>Enables for which VREF to use on the WR Schmoo for DDR4. Initialized and used by HWPs.</description> <simpleType> <uint32_t> - <default>0</default> </uint32_t> <array>2</array> </simpleType> @@ -6936,7 +6897,6 @@ firmware notes: Used as override attribute for pstate procedure <description>Enables for which VREF value can be used in timing adjustments. Initialized and used by HWPs.</description> <simpleType> <uint32_t> - <default>0</default> </uint32_t> <array>2</array> </simpleType> @@ -6954,7 +6914,6 @@ firmware notes: Used as override attribute for pstate procedure <description>DIMM Size. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> <array>2,2</array><!-- [drop][port] --> </simpleType> @@ -6972,7 +6931,6 @@ firmware notes: Used as override attribute for pstate procedure <description>Number of DRAM banks. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -6989,7 +6947,6 @@ firmware notes: Used as override attribute for pstate procedure <description>Number of DRAM rows. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -7006,7 +6963,6 @@ firmware notes: Used as override attribute for pstate procedure <description>Number of DRAM columns. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -7023,7 +6979,6 @@ firmware notes: Used as override attribute for pstate procedure <description>DRAM Density. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -7040,7 +6995,6 @@ firmware notes: Used as override attribute for pstate procedure <description>DRAM RAS to CAS Delay. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -7057,7 +7011,6 @@ firmware notes: Used as override attribute for pstate procedure <description>DRAM Row ACT to Row ACT Delay. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -7074,7 +7027,6 @@ firmware notes: Used as override attribute for pstate procedure <description>DRAM Row Precharge Delay. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -7091,7 +7043,6 @@ firmware notes: Used as override attribute for pstate procedure <description>DRAM ACT to Precharge Delay. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -7108,7 +7059,6 @@ firmware notes: Used as override attribute for pstate procedure <description>DRAM ACT to ACT/Refresh Delay. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -7125,7 +7075,6 @@ firmware notes: Used as override attribute for pstate procedure <description>Refresh Interval. Initialized and used by HWPs.</description> <simpleType> <uint32_t> - <default>0</default> </uint32_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -7142,7 +7091,6 @@ firmware notes: Used as override attribute for pstate procedure <description>DRAM Refresh Recovery Delay. Initialized and used by HWPs.</description> <simpleType> <uint32_t> - <default>0</default> </uint32_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -7159,7 +7107,6 @@ firmware notes: Used as override attribute for pstate procedure <description>DRAM Internal Write to Read Delay. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -7176,7 +7123,6 @@ firmware notes: Used as override attribute for pstate procedure <description>DRAM Internal Read to Precharge Delay. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -7193,7 +7139,6 @@ firmware notes: Used as override attribute for pstate procedure <description>DRAM Four ACT Window Delay. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -7210,7 +7155,6 @@ firmware notes: Used as override attribute for pstate procedure <description>DRAM Burst Length. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -7227,7 +7171,6 @@ firmware notes: Used as override attribute for pstate procedure <description>DRAM CAS Latency. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -7244,7 +7187,6 @@ firmware notes: Used as override attribute for pstate procedure <description>DRAM Additive Latency. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -7261,7 +7203,6 @@ firmware notes: Used as override attribute for pstate procedure <description>DRAM CAS Write Latency. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -7278,7 +7219,6 @@ firmware notes: Used as override attribute for pstate procedure <description>DRAM Read Burst Type. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -7295,7 +7235,6 @@ firmware notes: Used as override attribute for pstate procedure <description>DRAM Test Mode. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -7312,7 +7251,6 @@ firmware notes: Used as override attribute for pstate procedure <description>DRAM DLL Reset. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -7329,7 +7267,6 @@ firmware notes: Used as override attribute for pstate procedure <description>DRAM Write Recovery. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -7346,7 +7283,6 @@ firmware notes: Used as override attribute for pstate procedure <description>DRAM DLL Precharge PD. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -7363,7 +7299,6 @@ firmware notes: Used as override attribute for pstate procedure <description>DRAM DLL Enable. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -7380,7 +7315,6 @@ firmware notes: Used as override attribute for pstate procedure <description>DRAM TDQS. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -7397,7 +7331,6 @@ firmware notes: Used as override attribute for pstate procedure <description>DRAM Write Level Enable. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -7414,7 +7347,6 @@ firmware notes: Used as override attribute for pstate procedure <description>DRAM output buffer. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -7431,7 +7363,6 @@ firmware notes: Used as override attribute for pstate procedure <description>DRAM Partial Array Self-Refresh. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -7448,7 +7379,6 @@ firmware notes: Used as override attribute for pstate procedure <description>DRAM Auto Self-Refresh. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -7465,7 +7395,6 @@ firmware notes: Used as override attribute for pstate procedure <description>DRAM Self-Refresh Temperature Range. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -7482,7 +7411,6 @@ firmware notes: Used as override attribute for pstate procedure <description>Multi Purpose Register Location. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -7499,7 +7427,6 @@ firmware notes: Used as override attribute for pstate procedure <description>Multi Purpose Register Mode. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -7516,7 +7443,6 @@ firmware notes: Used as override attribute for pstate procedure <description>DIMM RCD Control Word. Initialized and used by HWPs.</description> <simpleType> <uint64_t> - <default>0</default> </uint64_t> <array>2,2</array><!-- [drop][port] --> </simpleType> @@ -7534,7 +7460,6 @@ firmware notes: Used as override attribute for pstate procedure <description>DIMM RCD IBT. Initialized and used by HWPs.</description> <simpleType> <uint32_t> - <default>0</default> </uint32_t> <array>2,2</array><!-- [drop][port] --> </simpleType> @@ -7552,7 +7477,6 @@ firmware notes: Used as override attribute for pstate procedure <description>DIMM RCD Mirror mode. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> <array>2,2</array><!-- [drop][port] --> </simpleType> @@ -7570,7 +7494,6 @@ firmware notes: Used as override attribute for pstate procedure <description>Specifies the schmoo mode to use during draminit_train_adv. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -7587,7 +7510,6 @@ firmware notes: Used as override attribute for pstate procedure <description>Specifies the schmoo mode to use during draminit_train_adv. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -7604,7 +7526,6 @@ firmware notes: Used as override attribute for pstate procedure <description>Specifies the schmoo test to run during draminit_train_adv. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -7621,7 +7542,6 @@ firmware notes: Used as override attribute for pstate procedure <description>Specifies the schmoo parameters to use during draminit_train_adv. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -7638,7 +7558,6 @@ firmware notes: Used as override attribute for pstate procedure <description>Specifies the schmoo minimum margin to use during draminit_train_adv. Used to signal possible SI issues in memory.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -7655,7 +7574,6 @@ firmware notes: Used as override attribute for pstate procedure <description>Specifies the schmoo minimum margin to use during draminit_train_adv. Used to signal possible SI issues in memory.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -7672,7 +7590,6 @@ firmware notes: Used as override attribute for pstate procedure <description>Specifies the schmoo minimum margin to use during draminit_train_adv. Used to signal possible SI issues in memory.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -7689,7 +7606,6 @@ firmware notes: Used as override attribute for pstate procedure <description>Specifies the schmoo minimum margin to use during draminit_train_adv. Used to signal possible SI issues in memory.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -7706,7 +7622,6 @@ firmware notes: Used as override attribute for pstate procedure <description>Specifies the schmoo minimum margin to use during draminit_train_adv. Used to signal possible SI issues in memory.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -7723,7 +7638,6 @@ firmware notes: Used as override attribute for pstate procedure <description>Specifies the memcal interval in clocks. Initialized and used by HWPs.</description> <simpleType> <uint32_t> - <default>0</default> </uint32_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -7740,7 +7654,6 @@ firmware notes: Used as override attribute for pstate procedure <description>Specifies the zqcal interval in clocks. Initialized and used by HWPs.</description> <simpleType> <uint32_t> - <default>0</default> </uint32_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -7757,7 +7670,6 @@ firmware notes: Used as override attribute for pstate procedure <description>Specifies the memory topology type. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> <array>2,2</array><!-- [drop][port] --> </simpleType> @@ -7775,7 +7687,6 @@ firmware notes: Used as override attribute for pstate procedure <description>Specifies the number of DIMM dimensions that are valid per port. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -7792,7 +7703,6 @@ firmware notes: Used as override attribute for pstate procedure <description>Specifies the DRAM package type. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> <array>2,2</array><!-- [drop][port] --> </simpleType> @@ -7810,7 +7720,6 @@ firmware notes: Used as override attribute for pstate procedure <description>Specifies the number of master ranks per DIMM. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> <array>2,2</array><!-- [drop][port] --> </simpleType> @@ -7828,7 +7737,6 @@ firmware notes: Used as override attribute for pstate procedure <description>Specifies the number of DRAM packages per rank. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> <array>2,2</array><!-- [drop][port] --> </simpleType> @@ -7846,7 +7754,6 @@ firmware notes: Used as override attribute for pstate procedure <description>Specifies the number of DRAM dies per package. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> <array>2,2</array><!-- [drop][port] --> </simpleType> @@ -7864,7 +7771,6 @@ firmware notes: Used as override attribute for pstate procedure <description>DIMM throttle numerator. Initialized and used by HWPs.</description> <simpleType> <uint32_t> - <default>0</default> </uint32_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -7881,7 +7787,6 @@ firmware notes: Used as override attribute for pstate procedure <description>DIMM throttle denominator. Initialized and used by HWPs.</description> <simpleType> <uint32_t> - <default>0</default> </uint32_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -7898,7 +7803,6 @@ firmware notes: Used as override attribute for pstate procedure <description>This is the throttle numerator setting for cfg_nm_n_per_chip. Initialized and used by HWPs.</description> <simpleType> <uint32_t> - <default>0</default> </uint32_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -7915,7 +7819,6 @@ firmware notes: Used as override attribute for pstate procedure <description>Channel total memory watts. Initialized and used by HWPs.</description> <simpleType> <uint32_t> - <default>0</default> </uint32_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -7932,7 +7835,6 @@ firmware notes: Used as override attribute for pstate procedure <description>DIMM Power slope value. Initialized and used by HWPs.</description> <simpleType> <uint32_t> - <default>0</default> </uint32_t> <array>2,2</array><!-- [drop][port] --> </simpleType> @@ -7950,7 +7852,6 @@ firmware notes: Used as override attribute for pstate procedure <description>DIMM Power slope value. Initialized and used by HWPs.</description> <simpleType> <uint32_t> - <default>0</default> </uint32_t> <array>2,2</array><!-- [drop][port] --> </simpleType> @@ -7968,7 +7869,6 @@ firmware notes: Used as override attribute for pstate procedure <description>DIMM Power intercept value. Initialized and used by HWPs.</description> <simpleType> <uint32_t> - <default>0</default> </uint32_t> <array>2,2</array><!-- [drop][port] --> </simpleType> @@ -7986,7 +7886,6 @@ firmware notes: Used as override attribute for pstate procedure <description>DIMM Power intercept value. Initialized and used by HWPs.</description> <simpleType> <uint32_t> - <default>0</default> </uint32_t> <array>2,2</array><!-- [drop][port] --> </simpleType> @@ -8004,7 +7903,6 @@ firmware notes: Used as override attribute for pstate procedure <description>DIMM Max Bandwidth in GBs. Initialized and used by HWPs.</description> <simpleType> <uint32_t> - <default>0</default> </uint32_t> <array>2,2</array><!-- [drop][port] --> </simpleType> @@ -8022,7 +7920,6 @@ firmware notes: Used as override attribute for pstate procedure <description>DIMM Max Bandwidth in MRs. Initialized and used by HWPs.</description> <simpleType> <uint32_t> - <default>0</default> </uint32_t> <array>2,2</array><!-- [drop][port] --> </simpleType> @@ -8040,7 +7937,6 @@ firmware notes: Used as override attribute for pstate procedure <description>Channel Max Bandwidth in GBs. Initialized and used by HWPs.</description> <simpleType> <uint32_t> - <default>0</default> </uint32_t> <array>2</array> </simpleType> @@ -8058,7 +7954,6 @@ firmware notes: Used as override attribute for pstate procedure <description>Channel Pair Max Bandwidth in GBs. Initialized and used by HWPs.</description> <simpleType> <uint32_t> - <default>0</default> </uint32_t> <array>2</array> </simpleType> @@ -8076,7 +7971,6 @@ firmware notes: Used as override attribute for pstate procedure <description>Channel Max Bandwidth MRs. Initialized and used by HWPs.</description> <simpleType> <uint32_t> - <default>0</default> </uint32_t> <array>2</array> </simpleType> @@ -8094,7 +7988,6 @@ firmware notes: Used as override attribute for pstate procedure <description>Channel Pair Max Bandwidth MRs. Initialized and used by HWPs.</description> <simpleType> <uint32_t> - <default>0</default> </uint32_t> <array>2</array> </simpleType> @@ -8112,7 +8005,6 @@ firmware notes: Used as override attribute for pstate procedure <description>DIMM Max Power output. Initialized and used by HWPs.</description> <simpleType> <uint32_t> - <default>0</default> </uint32_t> <array>2,2</array><!-- [drop][port] --> </simpleType> @@ -8130,7 +8022,6 @@ firmware notes: Used as override attribute for pstate procedure <description>Channel Max Power output. Initialized and used by HWPs.</description> <simpleType> <uint32_t> - <default>0</default> </uint32_t> <array>2</array> </simpleType> @@ -8148,7 +8039,6 @@ firmware notes: Used as override attribute for pstate procedure <description>Channel Pair Max Power output. Initialized and used by HWPs.</description> <simpleType> <uint32_t> - <default>0</default> </uint32_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -8165,7 +8055,6 @@ firmware notes: Used as override attribute for pstate procedure <description>Runtime throttle numerator setting for cfg_nm_n_per_mba. Initialized and used by HWPs.</description> <simpleType> <uint32_t> - <default>0</default> </uint32_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -8182,7 +8071,6 @@ firmware notes: Used as override attribute for pstate procedure <description>Runtime throttle denominator setting for cfg_nm_m. Initialized and used by HWPs.</description> <simpleType> <uint32_t> - <default>0</default> </uint32_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -8199,7 +8087,6 @@ firmware notes: Used as override attribute for pstate procedure <description>Runtime throttle numerator setting for cfg_nm_n_per_chip. Initialized and used by HWPs.</description> <simpleType> <uint32_t> - <default>0</default> </uint32_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -8234,7 +8121,6 @@ firmware notes: Used as override attribute for pstate procedure <description>Set by the platform depending on DD1 vs DD1.01. If true, then SI settings affected by the NWELL problem are adjusted. Used in eff_config</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -8354,7 +8240,6 @@ firmware notes: Used as override attribute for pstate procedure <description>override the default Centaur MEM PLL settings with user-specified scan chain data. 1 = ON, 0 = OFF.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -8371,7 +8256,6 @@ firmware notes: Used as override attribute for pstate procedure <description>A 8 bit vector that would be a designation of which MC are involved in the group. Initialized and used by HWPs.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> <array>8</array> </simpleType> @@ -8392,7 +8276,6 @@ firmware notes: Used as override attribute for pstate procedure Measured in GB</description> <simpleType> <uint32_t> - <default>0</default> </uint32_t> <array>16,16</array> </simpleType> @@ -8411,7 +8294,6 @@ Measured in GB</description> This factors in functionality</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -8436,7 +8318,6 @@ This factors in functionality</description> bits6:7 will be consumed together to form COARSE_LVL. </description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -8453,7 +8334,6 @@ bits6:7 will be consumed together to form COARSE_LVL. </description> <description>A numerical number indicating if the memory procedures are complete. written by mss_setup_bars when the bars are now functional in the processor. </description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -8470,7 +8350,6 @@ bits6:7 will be consumed together to form COARSE_LVL. </description> <description>The 4 bit result of running the slew calibration algorithm at various rates and impedances</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> <array>2, 4, 4</array> </simpleType> @@ -8488,7 +8367,6 @@ bits6:7 will be consumed together to form COARSE_LVL. </description> <description>The 4 bit result of running the slew calibration algorithm at various rates and impedances</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> <array>2, 4, 4</array> </simpleType> @@ -8510,7 +8388,6 @@ bits6:7 will be consumed together to form COARSE_LVL. </description> </description> <simpleType> <uint64_t> - <default>0</default> </uint64_t> <array>2</array> </simpleType> @@ -9335,7 +9212,6 @@ bits6:7 will be consumed together to form COARSE_LVL. </description> Measured in GB</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> <array>16,16</array> </simpleType> @@ -9353,7 +9229,6 @@ Measured in GB</description> <description>Rank to CKE map. Used in various locations and is computed in mss_eff_cnfg_cke_map. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg. creator: mss_eff_cnfg_cke_map consumer: various firmware notes: none</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> <array>2,2,4</array> </simpleType> @@ -9371,7 +9246,6 @@ Measured in GB</description> <description>Rank to Spare CKE map. Used in various locations and is computed in mss_eff_cnfg_cke_map. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg. creator: mss_eff_cnfg_cke_map consumer: various firmware notes: none</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> <array>2,2,4</array> </simpleType> @@ -9389,7 +9263,6 @@ Measured in GB</description> <description>Spare DRAM availability. Used in various locations and is computed in mss_eff_cnfg. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg. creator: mss_eff_cnfg consumer: various firmware notes: load from spd</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> <array>2,2,4</array> </simpleType> @@ -9407,7 +9280,6 @@ Measured in GB</description> <description>Set by the centaur mss_get_cen_ecid function used diagnostic and chip characterization reporting</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -9990,7 +9862,6 @@ Measured in GB</description> </description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> <array>2</array> </simpleType> @@ -10012,7 +9883,6 @@ Measured in GB</description> </description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> <array>2</array> </simpleType> @@ -10063,7 +9933,6 @@ Measured in GB</description> </description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -10160,7 +10029,7 @@ Measured in GB</description> <uint64_t> </uint64_t> </simpleType> - <persistency>non-volatile</persistency> + <persistency>volatile-zeroed</persistency> <readable/> <writeable/> </attribute> @@ -10327,7 +10196,6 @@ Measured in GB</description> firmware notes: Platforms should initialize this attribute to AUTO (0)</description> <simpleType> <uint32_t> - <default>0</default> </uint32_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -10345,7 +10213,6 @@ firmware notes: Platforms should initialize this attribute to AUTO (0)</descript <description>Enables mcbist data pattern selection.</description> <simpleType> <uint32_t> - <default>0</default> </uint32_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -10362,7 +10229,6 @@ firmware notes: Platforms should initialize this attribute to AUTO (0)</descript <description>Enables mcbist test type selection.</description> <simpleType> <uint32_t> - <default>0</default> </uint32_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -10379,7 +10245,6 @@ firmware notes: Platforms should initialize this attribute to AUTO (0)</descript <description>MCBIST support for printing</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -10396,7 +10261,6 @@ firmware notes: Platforms should initialize this attribute to AUTO (0)</descript <description>MCBIST support for enabling data</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -10413,7 +10277,6 @@ firmware notes: Platforms should initialize this attribute to AUTO (0)</descript <description>MCBIST support for rank selection</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -10430,7 +10293,6 @@ firmware notes: Platforms should initialize this attribute to AUTO (0)</descript <description>MCBIST support for bank selection</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -10447,7 +10309,6 @@ firmware notes: Platforms should initialize this attribute to AUTO (0)</descript <description>MCBIST for multiple setup</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -10464,7 +10325,6 @@ firmware notes: Platforms should initialize this attribute to AUTO (0)</descript <description>Can choose mcbist address mode for full,half or quarter addressing mode.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -10481,7 +10341,6 @@ firmware notes: Platforms should initialize this attribute to AUTO (0)</descript <description> Defines the rank for the Mcbist </description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -10498,7 +10357,6 @@ firmware notes: Platforms should initialize this attribute to AUTO (0)</descript <description>Defines the start address for the Mcbist address range</description> <simpleType> <uint64_t> - <default>0</default> </uint64_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -10515,7 +10373,6 @@ firmware notes: Platforms should initialize this attribute to AUTO (0)</descript <description>Defines the end address for the Mcbist address range</description> <simpleType> <uint64_t> - <default>0</default> </uint64_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -10532,7 +10389,6 @@ firmware notes: Platforms should initialize this attribute to AUTO (0)</descript <description>Enables error capture; basically a flag.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -10549,7 +10405,6 @@ firmware notes: Platforms should initialize this attribute to AUTO (0)</descript <description>Define mcbist Max timeout</description> <simpleType> <uint64_t> - <default>0</default> </uint64_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -10566,7 +10421,6 @@ firmware notes: Platforms should initialize this attribute to AUTO (0)</descript <description>Enable which port prints are required.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -10583,7 +10437,6 @@ firmware notes: Platforms should initialize this attribute to AUTO (0)</descript <description>Flag to stop Mcbist on Error.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -10600,7 +10453,6 @@ firmware notes: Platforms should initialize this attribute to AUTO (0)</descript <description>Define data seed for the random data pattern or test</description> <simpleType> <uint32_t> - <default>0</default> </uint32_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -10617,7 +10469,6 @@ firmware notes: Platforms should initialize this attribute to AUTO (0)</descript <description>The address interleave map with user cases or deafult cases of BANK_RANK,RANK_BANK,BANK_ONLY,RANK_ONLYRANKS_DIMM0,RANKS_DIMM1,USER_PATTERN.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -10634,7 +10485,6 @@ firmware notes: Platforms should initialize this attribute to AUTO (0)</descript <description>User defined constraint for limiting number of rows for addressing.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -10651,7 +10501,6 @@ firmware notes: Platforms should initialize this attribute to AUTO (0)</descript <description>User defined constraint for limiting number of columns for addressing.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -10668,7 +10517,6 @@ firmware notes: Platforms should initialize this attribute to AUTO (0)</descript <description>User defined constraint for limiting number of ranks for addressing.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -10685,7 +10533,6 @@ firmware notes: Platforms should initialize this attribute to AUTO (0)</descript <description>User defined constraint for limiting number of banks for addressing.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -10702,7 +10549,6 @@ firmware notes: Platforms should initialize this attribute to AUTO (0)</descript <description>If slave ranks exists;Restrict usage or enable addressing on them as well.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -10719,7 +10565,6 @@ firmware notes: Platforms should initialize this attribute to AUTO (0)</descript <description>To Define custom addressing map ; Input by user.</description> <simpleType> <uint64_t> - <default>0</default> </uint64_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -10736,7 +10581,6 @@ firmware notes: Platforms should initialize this attribute to AUTO (0)</descript <description>Flag for Addressing to go sequential manner or random.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -10782,7 +10626,9 @@ firmware notes: Platforms should initialize this attribute to AUTO (0)</descript firmware notes: </description> <simpleType> - <uint32_t></uint32_t> + <uint32_t> + <default>0</default> + </uint32_t> <array>64</array> </simpleType> <persistency>non-volatile</persistency> @@ -12464,7 +12310,7 @@ firmware notes: Platforms should initialize this attribute to AUTO (0)</descript Risk level 0 should contain solutions for all known errata, and may sacrifice performance to avoid data integrity issue/error checking cases. Risk level 0x100 may introduce data integrity/error scenarios to provide full performance or visibility to state space/coverage behind known issues. </description> - <simpleType><uint32_t><default>0x00</default></uint32_t></simpleType> + <simpleType><uint32_t></uint32_t></simpleType> <persistency>volatile-zeroed</persistency> <readable/> <writeable/> @@ -12486,7 +12332,6 @@ firmware notes: Platforms should initialize this attribute to AUTO (0)</descript </description> <simpleType> <uint32_t> - <default>0</default> </uint32_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -12499,26 +12344,6 @@ firmware notes: Platforms should initialize this attribute to AUTO (0)</descript </attribute> <attribute> - <id>MEMB_NEST_FREQ</id> - <description> - Frequency of the Centaur NEST PLL in MHz. - consumer: cen_mem_pll_initf - firmware notes: Platforms should initialize the attribute to the - correct value for the system. - </description> - <simpleType> - <uint32_t></uint32_t> - </simpleType> - <persistency>volatile</persistency> - <readable/> - <writeable/> - <hwpfToHbAttrMap> - <id>ATTR_MEMB_NEST_FREQ</id> - <macro>DIRECT</macro> - </hwpfToHbAttrMap> -</attribute> - -<attribute> <id>CDIMM_SENSOR_MAP_PRIMARY</id> <description> Custom DIMM Sensor Map for Primary I2C Port (1 byte of data): @@ -12587,7 +12412,6 @@ firmware notes: Platforms should initialize this attribute to AUTO (0)</descript </description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> <array>2,2</array> </simpleType> @@ -12609,7 +12433,6 @@ firmware notes: Platforms should initialize this attribute to AUTO (0)</descript </description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> diff --git a/src/usr/targeting/common/xmltohb/attribute_types_hb.xml b/src/usr/targeting/common/xmltohb/attribute_types_hb.xml index 208d2a5f0..85043526c 100644 --- a/src/usr/targeting/common/xmltohb/attribute_types_hb.xml +++ b/src/usr/targeting/common/xmltohb/attribute_types_hb.xml @@ -34,7 +34,6 @@ <description>1 = in Memory Preserving IPL mode. 0 = in normal IPL mode.</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -52,7 +51,6 @@ <description>Cached Virtual Address of Xscom memory space for this Chip</description> <simpleType> <uint64_t> - <default>0</default> </uint64_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -66,7 +64,6 @@ <description>Mutex for FSI Master Operations</description> <simpleType> <hbmutex> - <default>0</default> </hbmutex> </simpleType> <persistency>volatile-zeroed</persistency> @@ -81,7 +78,6 @@ <description>Host boot mutex for testing</description> <simpleType> <hbmutex> - <default>0</default> </hbmutex> </simpleType> <persistency>volatile-zeroed</persistency> @@ -95,7 +91,6 @@ <description>Mutex for I2C Master engine 0</description> <simpleType> <hbmutex> - <default>0</default> </hbmutex> </simpleType> <persistency>volatile-zeroed</persistency> @@ -109,7 +104,6 @@ <description>Mutex for I2C Master engine 1</description> <simpleType> <hbmutex> - <default>0</default> </hbmutex> </simpleType> <persistency>volatile-zeroed</persistency> @@ -123,7 +117,6 @@ <description>Mutex for I2C Master engine 2</description> <simpleType> <hbmutex> - <default>0</default> </hbmutex> </simpleType> <persistency>volatile-zeroed</persistency> @@ -137,7 +130,6 @@ <description>Mutex for FSI-based SCOM Operations</description> <simpleType> <hbmutex> - <default>0</default> </hbmutex> </simpleType> <persistency>volatile-zeroed</persistency> @@ -151,7 +143,6 @@ <description>Mutex for Indirect SCOM read operation</description> <simpleType> <hbmutex> - <default>0</default> </hbmutex> </simpleType> <persistency>volatile-zeroed</persistency> @@ -209,7 +200,6 @@ <description>Cached Virtual Address of Inband Scom memory space for this Chip</description> <simpleType> <uint64_t> - <default>0</default> </uint64_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -222,7 +212,6 @@ <description>Mutex for Inband SCOM Operations</description> <simpleType> <hbmutex> - <default>0</default> </hbmutex> </simpleType> <persistency>volatile-zeroed</persistency> @@ -235,7 +224,6 @@ <description>Used to force IBSCOM enabled for lab testing</description> <simpleType> <uint8_t> - <default>0</default> </uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -250,7 +238,6 @@ --> <simpleType> <uint8_t> - <default>0</default> </uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> diff --git a/src/usr/targeting/common/xmltohb/simics_MURANO.system.xml b/src/usr/targeting/common/xmltohb/simics_MURANO.system.xml index ab189c50b..61c47d4c6 100644 --- a/src/usr/targeting/common/xmltohb/simics_MURANO.system.xml +++ b/src/usr/targeting/common/xmltohb/simics_MURANO.system.xml @@ -214,6 +214,42 @@ <default>0b11</default> </attribute> <!-- End pm_plat_attributes.xml --> + <attribute><id>MAX_EXS_PER_PROC_CHIP</id> + <default>6</default> + </attribute> + <attribute><id>MAX_MCS_PER_SYSTEM</id> + <default>16</default> + </attribute> + <attribute><id>X_EREPAIR_THRESHOLD_FIELD</id> + <default>1</default> + </attribute> + <attribute><id>A_EREPAIR_THRESHOLD_FIELD</id> + <default>1</default> + </attribute> + <attribute><id>DMI_EREPAIR_THRESHOLD_FIELD</id> + <default>1</default> + </attribute> + <attribute><id>A_EREPAIR_THRESHOLD_MNFG</id> + <default>0</default> + </attribute> + <attribute> <id>DMI_EREPAIR_THRESHOLD_MNFG</id> + <default>0</default> + </attribute> + <attribute><id>X_EREPAIR_THRESHOLD_MNFG</id> + <default>0</default> + </attribute> + <attribute><id>MRW_SAFEMODE_MEM_THROTTLE_NUMERATOR_PER_MBA</id> + <default>96</default> + </attribute> + <attribute><id>MRW_SAFEMODE_MEM_THROTTLE_DENOMINATOR</id> + <default>512</default> + </attribute> + <attribute><id>MRW_SAFEMODE_MEM_THROTTLE_NUMERATOR_PER_CHIP</id> + <default>32</default> + </attribute> + <attribute><id>MRW_THERMAL_MEMORY_POWER_LIMIT</id> + <default>5000</default> + </attribute> </targetInstance> <!-- System node 0 --> @@ -330,9 +366,7 @@ <attribute><id>PM_SPIVID_PORT_ENABLE</id> <default>0b100</default><!-- PORT0NONRED --> </attribute> - <attribute><id>PM_SLEEP_TYPE</id> - <default>1</default><!-- DEEP --> - </attribute> + <attribute><id>PM_SLEEP_TYPE</id></attribute> <attribute><id>PM_APSS_CHIP_SELECT</id> <default>0x00</default><!-- CS0 --> </attribute> @@ -722,6 +756,9 @@ <!-- baseAddr = 0x0003E00000000000, 128GB per MCS --> <default>0x0003E08000000000</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <targetInstance> @@ -744,6 +781,9 @@ <!-- baseAddr = 0x0003E00000000000, 128GB per MCS --> <default>0x0003E0A000000000</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>1</default> + </attribute> </targetInstance> <targetInstance> @@ -766,6 +806,9 @@ <!-- baseAddr = 0x0003E00000000000, 128GB per MCS --> <default>0x0003E0C000000000</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>1</default> + </attribute> </targetInstance> <targetInstance> @@ -788,6 +831,9 @@ <!-- baseAddr = 0x0003E00000000000, 128GB per MCS --> <default>0x0003E0E000000000</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>1</default> + </attribute> </targetInstance> <!-- Murano n0p0 PCI units --> @@ -868,6 +914,9 @@ <id>CHIP_UNIT</id> <default>0</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <targetInstance> @@ -894,6 +943,9 @@ <id>PEER_PATH</id> <default>physical:sys-0/node-0/proc-2/abus-1</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>1</default> + </attribute> </targetInstance> <targetInstance> @@ -920,6 +972,9 @@ <id>PEER_PATH</id> <default>physical:sys-0/node-0/proc-2/abus-2</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>1</default> + </attribute> </targetInstance> <!-- murano n0p0 XBUS units --> @@ -1066,15 +1121,9 @@ <attribute><id>PM_SPIVID_PORT_ENABLE</id> <default>0b000</default><!-- NONE --> </attribute> - <attribute><id>PM_SLEEP_ENTRY</id> - <default>1</default><!-- ASSISTED --> - </attribute> - <attribute><id>PM_SLEEP_EXIT</id> - <default>1</default><!-- ASSISTED --> - </attribute> - <attribute><id>PM_SLEEP_TYPE</id> - <default>1</default><!-- DEEP --> - </attribute> + <attribute><id>PM_SLEEP_ENTRY</id></attribute> + <attribute><id>PM_SLEEP_EXIT</id></attribute> + <attribute><id>PM_SLEEP_TYPE</id></attribute> <attribute><id>PM_APSS_CHIP_SELECT</id> <default>0xFF</default><!-- NONE --> </attribute> @@ -1466,6 +1515,9 @@ <!-- baseAddr = 0x0003E00000000000, 128GB per MCS --> <default>0x0003E18000000000</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <targetInstance> @@ -1488,6 +1540,9 @@ <!-- baseAddr = 0x0003E00000000000, 128GB per MCS --> <default>0x0003E1A000000000</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>1</default> + </attribute> </targetInstance> <targetInstance> @@ -1510,6 +1565,9 @@ <!-- baseAddr = 0x0003E00000000000, 128GB per MCS --> <default>0x0003E1C000000000</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>1</default> + </attribute> </targetInstance> <targetInstance> @@ -1532,6 +1590,9 @@ <!-- baseAddr = 0x0003E00000000000, 128GB per MCS --> <default>0x0003E1E000000000</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>1</default> + </attribute> </targetInstance> <!-- Murano n0p1 PCI units --> @@ -1612,6 +1673,9 @@ <id>CHIP_UNIT</id> <default>0</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <targetInstance> @@ -1638,6 +1702,9 @@ <id>PEER_PATH</id> <default>physical:sys-0/node-0/proc-3/abus-1</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>1</default> + </attribute> </targetInstance> <targetInstance> @@ -1664,6 +1731,9 @@ <id>PEER_PATH</id> <default>physical:sys-0/node-0/proc-3/abus-2</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>1</default> + </attribute> </targetInstance> <!-- murano n0p1 XBUS units --> @@ -1808,15 +1878,9 @@ <attribute><id>PM_PSTATE_UNDERVOLTING_MAXIMUM</id> <default>1250</default> </attribute> - <attribute><id>PM_SLEEP_ENTRY</id> - <default>1</default><!-- ASSISTED --> - </attribute> - <attribute><id>PM_SLEEP_EXIT</id> - <default>1</default><!-- ASSISTED --> - </attribute> - <attribute><id>PM_SLEEP_TYPE</id> - <default>1</default><!-- DEEP --> - </attribute> + <attribute><id>PM_SLEEP_ENTRY</id></attribute> + <attribute><id>PM_SLEEP_EXIT</id></attribute> + <attribute><id>PM_SLEEP_TYPE</id></attribute> <attribute><id>PM_APSS_CHIP_SELECT</id> <default>0xFF</default><!-- NONE --> </attribute> @@ -2209,6 +2273,9 @@ <!-- baseAddr = 0x0003E00000000000, 128GB per MCS --> <default>0x0003E48000000000</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <targetInstance> @@ -2231,6 +2298,9 @@ <!-- baseAddr = 0x0003E00000000000, 128GB per MCS --> <default>0x0003E4A000000000</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>1</default> + </attribute> </targetInstance> <targetInstance> @@ -2253,6 +2323,9 @@ <!-- baseAddr = 0x0003E00000000000, 128GB per MCS --> <default>0x0003E4C000000000</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>1</default> + </attribute> </targetInstance> <targetInstance> @@ -2275,6 +2348,9 @@ <!-- baseAddr = 0x0003E00000000000, 128GB per MCS --> <default>0x0003E4E000000000</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>1</default> + </attribute> </targetInstance> <!-- Murano n0p2 PCI units --> @@ -2355,6 +2431,9 @@ <id>CHIP_UNIT</id> <default>0</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <targetInstance> @@ -2381,6 +2460,9 @@ <id>PEER_PATH</id> <default>physical:sys-0/node-0/proc-0/abus-1</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>1</default> + </attribute> </targetInstance> <targetInstance> @@ -2407,6 +2489,9 @@ <id>PEER_PATH</id> <default>physical:sys-0/node-0/proc-0/abus-2</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>1</default> + </attribute> </targetInstance> <!-- murano n0p2 XBUS units --> @@ -2553,15 +2638,9 @@ <attribute><id>PM_SPIVID_PORT_ENABLE</id> <default>0b000</default><!-- NONE --> </attribute> - <attribute><id>PM_SLEEP_ENTRY</id> - <default>1</default><!-- ASSISTED --> - </attribute> - <attribute><id>PM_SLEEP_EXIT</id> - <default>1</default><!-- ASSISTED --> - </attribute> - <attribute><id>PM_SLEEP_TYPE</id> - <default>1</default><!-- DEEP --> - </attribute> + <attribute><id>PM_SLEEP_ENTRY</id></attribute> + <attribute><id>PM_SLEEP_EXIT</id></attribute> + <attribute><id>PM_SLEEP_TYPE</id></attribute> <attribute><id>PM_APSS_CHIP_SELECT</id> <default>0xFF</default><!-- NONE --> </attribute> @@ -2952,6 +3031,9 @@ <!-- baseAddr = 0x0003E00000000000, 128GB per MCS --> <default>0x0003E58000000000</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <targetInstance> @@ -2974,6 +3056,9 @@ <!-- baseAddr = 0x0003E00000000000, 128GB per MCS --> <default>0x0003E5A000000000</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>1</default> + </attribute> </targetInstance> <targetInstance> @@ -2996,6 +3081,9 @@ <!-- baseAddr = 0x0003E00000000000, 128GB per MCS --> <default>0x0003E5C000000000</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>1</default> + </attribute> </targetInstance> <targetInstance> @@ -3018,6 +3106,9 @@ <!-- baseAddr = 0x0003E00000000000, 128GB per MCS --> <default>0x0003E5E000000000</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>1</default> + </attribute> </targetInstance> <!-- Murano n0p3 PCI units --> @@ -3098,6 +3189,9 @@ <id>CHIP_UNIT</id> <default>0</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <targetInstance> @@ -3124,6 +3218,9 @@ <id>PEER_PATH</id> <default>physical:sys-0/node-0/proc-1/abus-1</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>1</default> + </attribute> </targetInstance> <targetInstance> @@ -3150,6 +3247,9 @@ <id>PEER_PATH</id> <default>physical:sys-0/node-0/proc-1/abus-2</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>1</default> + </attribute> </targetInstance> <!-- murano n0p3 XBUS units --> @@ -3223,6 +3323,9 @@ <field><id>engine</id><value>0</value></field> </default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <!-- Centaur L4 affiliated with membuf4 --> @@ -3330,6 +3433,9 @@ <field><id>engine</id><value>0</value></field> </default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>1</default> + </attribute> </targetInstance> <!-- Centaur L4 affiliated with membuf5 --> @@ -3437,6 +3543,9 @@ <field><id>engine</id><value>0</value></field> </default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>1</default> + </attribute> </targetInstance> <!-- Centaur L4 affiliated with membuf6 --> @@ -3544,6 +3653,9 @@ <field><id>engine</id><value>0</value></field> </default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>1</default> + </attribute> </targetInstance> <!-- Centaur L4 affiliated with membuf7 --> @@ -3650,6 +3762,9 @@ <field><id>engine</id><value>0</value></field> </default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <!-- Centaur L4 affiliated with membuf12 --> @@ -3757,6 +3872,9 @@ <field><id>engine</id><value>0</value></field> </default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>1</default> + </attribute> </targetInstance> <!-- Centaur L4 affiliated with membuf13 --> @@ -3864,6 +3982,9 @@ <field><id>engine</id><value>0</value></field> </default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>1</default> + </attribute> </targetInstance> <!-- Centaur L4 affiliated with membuf14 --> @@ -3971,6 +4092,9 @@ <field><id>engine</id><value>0</value></field> </default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>1</default> + </attribute> </targetInstance> <!-- Centaur L4 affiliated with membuf15 --> @@ -4077,6 +4201,9 @@ <field><id>engine</id><value>0</value></field> </default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <!-- Centaur L4 affiliated with membuf20 --> @@ -4184,6 +4311,9 @@ <field><id>engine</id><value>0</value></field> </default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>1</default> + </attribute> </targetInstance> <!-- Centaur L4 affiliated with membuf21 --> @@ -4291,6 +4421,9 @@ <field><id>engine</id><value>0</value></field> </default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>1</default> + </attribute> </targetInstance> <!-- Centaur L4 affiliated with membuf22 --> @@ -4398,6 +4531,9 @@ <field><id>engine</id><value>0</value></field> </default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>1</default> + </attribute> </targetInstance> <!-- Centaur L4 affiliated with membuf23 --> @@ -4504,6 +4640,9 @@ <field><id>engine</id><value>0</value></field> </default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <!-- Centaur L4 affiliated with membuf28 --> @@ -4611,6 +4750,9 @@ <field><id>engine</id><value>0</value></field> </default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>1</default> + </attribute> </targetInstance> <!-- Centaur L4 affiliated with membuf29 --> @@ -4718,6 +4860,9 @@ <field><id>engine</id><value>0</value></field> </default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>1</default> + </attribute> </targetInstance> <!-- Centaur L4 affiliated with membuf30 --> @@ -4825,6 +4970,9 @@ <field><id>engine</id><value>0</value></field> </default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>1</default> + </attribute> </targetInstance> <!-- Centaur L4 affiliated with membuf31 --> diff --git a/src/usr/targeting/common/xmltohb/simics_VENICE.system.xml b/src/usr/targeting/common/xmltohb/simics_VENICE.system.xml index 4d9022841..79db7a86f 100644 --- a/src/usr/targeting/common/xmltohb/simics_VENICE.system.xml +++ b/src/usr/targeting/common/xmltohb/simics_VENICE.system.xml @@ -185,6 +185,43 @@ <attribute><id>PM_SPIVID_FREQUENCY</id> <default>10</default> </attribute> + <attribute><id>MAX_EXS_PER_PROC_CHIP</id> + <default>12</default> + </attribute> + <attribute><id>MAX_MCS_PER_SYSTEM</id> + <default>64</default> + </attribute> + <attribute><id>X_EREPAIR_THRESHOLD_FIELD</id> + <default>1</default> + </attribute> + <attribute><id>A_EREPAIR_THRESHOLD_FIELD</id> + <default>1</default> + </attribute> + <attribute><id>DMI_EREPAIR_THRESHOLD_FIELD</id> + <default>1</default> + </attribute> + <attribute><id>X_EREPAIR_THRESHOLD_MNFG</id> + <default>0</default> + </attribute> + <attribute><id>A_EREPAIR_THRESHOLD_MNFG</id> + <default>0</default> + </attribute> + <attribute><id>DMI_EREPAIR_THRESHOLD_MNFG</id> + <default>0</default> + </attribute> + <attribute><id>MRW_SAFEMODE_MEM_THROTTLE_NUMERATOR_PER_MBA</id> + <default>96</default> + </attribute> + <attribute><id>MRW_SAFEMODE_MEM_THROTTLE_DENOMINATOR</id> + <default>512</default> + </attribute> + <attribute><id>MRW_SAFEMODE_MEM_THROTTLE_NUMERATOR_PER_CHIP</id> + <default>32</default> + </attribute> + <attribute><id>MRW_THERMAL_MEMORY_POWER_LIMIT</id> + <default>5000</default> + </attribute> + <!-- End pm_plat_attributes.xml --> </targetInstance> @@ -302,15 +339,9 @@ <attribute><id>PM_SPIVID_PORT_ENABLE</id> <default>0b111</default><!-- REDUNDANT --> </attribute> - <attribute><id>PM_SLEEP_ENTRY</id> - <default>1</default><!-- ASSISTED --> - </attribute> - <attribute><id>PM_SLEEP_EXIT</id> - <default>1</default><!-- ASSISTED --> - </attribute> - <attribute><id>PM_SLEEP_TYPE</id> - <default>1</default><!-- DEEP --> - </attribute> + <attribute><id>PM_SLEEP_ENTRY</id></attribute> + <attribute><id>PM_SLEEP_EXIT</id></attribute> + <attribute><id>PM_SLEEP_TYPE</id></attribute> <attribute><id>PM_APSS_CHIP_SELECT</id> <default>0x00</default><!-- CS0 --> </attribute> @@ -917,6 +948,9 @@ <!-- baseAddr = 0x0003E00000000000, 128GB per MCS --> <default>0x0003E00000000000</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <targetInstance> @@ -939,6 +973,9 @@ <!-- baseAddr = 0x0003E00000000000, 128GB per MCS --> <default>0x0003E02000000000</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <targetInstance> @@ -961,6 +998,9 @@ <!-- baseAddr = 0x0003E00000000000, 128GB per MCS --> <default>0x0003E04000000000</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <targetInstance> @@ -983,6 +1023,9 @@ <!-- baseAddr = 0x0003E00000000000, 128GB per MCS --> <default>0x0003E06000000000</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <targetInstance> @@ -1005,6 +1048,9 @@ <!-- baseAddr = 0x0003E00000000000, 128GB per MCS --> <default>0x0003E08000000000</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <targetInstance> @@ -1027,6 +1073,9 @@ <!-- baseAddr = 0x0003E00000000000, 128GB per MCS --> <default>0x0003E0A000000000</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <targetInstance> @@ -1049,6 +1098,9 @@ <!-- baseAddr = 0x0003E00000000000, 128GB per MCS --> <default>0x0003E0C000000000</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <targetInstance> @@ -1071,6 +1123,9 @@ <!-- baseAddr = 0x0003E00000000000, 128GB per MCS --> <default>0x0003E0E000000000</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <!-- Venice n0p0 PCI units --> @@ -1144,6 +1199,9 @@ <id>PEER_PATH</id> <default>physical:sys-0/node-0/proc-6/abus-2</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <targetInstance> @@ -1170,6 +1228,9 @@ <id>PEER_PATH</id> <default>physical:sys-0/node-0/proc-4/abus-1</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <targetInstance> @@ -1196,6 +1257,9 @@ <id>PEER_PATH</id> <default>physical:sys-0/node-0/proc-2/abus-0</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <!-- Venice n0p0 XBUS units --> @@ -1396,15 +1460,9 @@ <attribute><id>PM_SPIVID_PORT_ENABLE</id> <default>0b111</default><!-- REDUNDANT --> </attribute> - <attribute><id>PM_SLEEP_ENTRY</id> - <default>1</default><!-- ASSISTED --> - </attribute> - <attribute><id>PM_SLEEP_EXIT</id> - <default>1</default><!-- ASSISTED --> - </attribute> - <attribute><id>PM_SLEEP_TYPE</id> - <default>1</default><!-- DEEP --> - </attribute> + <attribute><id>PM_SLEEP_ENTRY</id></attribute> + <attribute><id>PM_SLEEP_EXIT</id></attribute> + <attribute><id>PM_SLEEP_TYPE</id></attribute> <attribute><id>PM_APSS_CHIP_SELECT</id> <default>0x00</default><!-- CS0 --> </attribute> @@ -2011,6 +2069,9 @@ <!-- baseAddr = 0x0003E00000000000, 128GB per MCS --> <default>0x0003E10000000000</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <targetInstance> @@ -2033,6 +2094,9 @@ <!-- baseAddr = 0x0003E00000000000, 128GB per MCS --> <default>0x0003E12000000000</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <targetInstance> @@ -2055,6 +2119,9 @@ <!-- baseAddr = 0x0003E00000000000, 128GB per MCS --> <default>0x0003E14000000000</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <targetInstance> @@ -2077,6 +2144,9 @@ <!-- baseAddr = 0x0003E00000000000, 128GB per MCS --> <default>0x0003E16000000000</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <targetInstance> @@ -2099,6 +2169,9 @@ <!-- baseAddr = 0x0003E00000000000, 128GB per MCS --> <default>0x0003E18000000000</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <targetInstance> @@ -2121,6 +2194,9 @@ <!-- baseAddr = 0x0003E00000000000, 128GB per MCS --> <default>0x0003E1A000000000</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <targetInstance> @@ -2143,6 +2219,9 @@ <!-- baseAddr = 0x0003E00000000000, 128GB per MCS --> <default>0x0003E1C000000000</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <targetInstance> @@ -2165,6 +2244,9 @@ <!-- baseAddr = 0x0003E00000000000, 128GB per MCS --> <default>0x0003E1E000000000</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <!-- Venice n0p1 PCI units --> @@ -2237,6 +2319,9 @@ <id>PEER_PATH</id> <default>physical:sys-0/node-0/proc-7/abus-2</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <targetInstance> @@ -2263,6 +2348,9 @@ <id>PEER_PATH</id> <default>physical:sys-0/node-0/proc-5/abus-1</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <targetInstance> @@ -2289,6 +2377,9 @@ <id>PEER_PATH</id> <default>physical:sys-0/node-0/proc-3/abus-0</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <!-- Venice n0p1 XBUS units --> @@ -2490,15 +2581,9 @@ <attribute><id>PM_SPIVID_PORT_ENABLE</id> <default>0b111</default><!-- REDUNDANT --> </attribute> - <attribute><id>PM_SLEEP_ENTRY</id> - <default>1</default><!-- ASSISTED --> - </attribute> - <attribute><id>PM_SLEEP_EXIT</id> - <default>1</default><!-- ASSISTED --> - </attribute> - <attribute><id>PM_SLEEP_TYPE</id> - <default>1</default><!-- DEEP --> - </attribute> + <attribute><id>PM_SLEEP_ENTRY</id></attribute> + <attribute><id>PM_SLEEP_EXIT</id></attribute> + <attribute><id>PM_SLEEP_TYPE</id></attribute> <attribute><id>PM_APSS_CHIP_SELECT</id> <default>0x00</default><!-- CS0 --> </attribute> @@ -3104,6 +3189,9 @@ <!-- baseAddr = 0x0003E00000000000, 128GB per MCS --> <default>0x0003E20000000000</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <targetInstance> @@ -3126,6 +3214,9 @@ <!-- baseAddr = 0x0003E00000000000, 128GB per MCS --> <default>0x0003E22000000000</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <targetInstance> @@ -3148,6 +3239,9 @@ <!-- baseAddr = 0x0003E00000000000, 128GB per MCS --> <default>0x0003E24000000000</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <targetInstance> @@ -3170,6 +3264,9 @@ <!-- baseAddr = 0x0003E00000000000, 128GB per MCS --> <default>0x0003E26000000000</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <targetInstance> @@ -3192,6 +3289,9 @@ <!-- baseAddr = 0x0003E00000000000, 128GB per MCS --> <default>0x0003E28000000000</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <targetInstance> @@ -3214,6 +3314,9 @@ <!-- baseAddr = 0x0003E00000000000, 128GB per MCS --> <default>0x0003E2A000000000</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <targetInstance> @@ -3236,6 +3339,9 @@ <!-- baseAddr = 0x0003E00000000000, 128GB per MCS --> <default>0x0003E2C000000000</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <targetInstance> @@ -3258,6 +3364,9 @@ <!-- baseAddr = 0x0003E00000000000, 128GB per MCS --> <default>0x0003E2E000000000</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <!-- Venice n0p2 PCI units --> @@ -3330,6 +3439,9 @@ <id>PEER_PATH</id> <default>physical:sys-0/node-0/proc-0/abus-2</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <targetInstance> @@ -3356,6 +3468,9 @@ <id>PEER_PATH</id> <default>physical:sys-0/node-0/proc-6/abus-1</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <targetInstance> @@ -3382,6 +3497,9 @@ <id>PEER_PATH</id> <default>physical:sys-0/node-0/proc-4/abus-0</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <!-- Venice n0p2 XBUS units --> @@ -3583,15 +3701,9 @@ <attribute><id>PM_SPIVID_PORT_ENABLE</id> <default>0b111</default><!-- REDUNDANT --> </attribute> - <attribute><id>PM_SLEEP_ENTRY</id> - <default>1</default><!-- ASSISTED --> - </attribute> - <attribute><id>PM_SLEEP_EXIT</id> - <default>1</default><!-- ASSISTED --> - </attribute> - <attribute><id>PM_SLEEP_TYPE</id> - <default>1</default><!-- DEEP --> - </attribute> + <attribute><id>PM_SLEEP_ENTRY</id></attribute> + <attribute><id>PM_SLEEP_EXIT</id></attribute> + <attribute><id>PM_SLEEP_TYPE</id></attribute> <attribute><id>PM_APSS_CHIP_SELECT</id> <default>0x00</default><!-- CS0 --> </attribute> @@ -4198,6 +4310,9 @@ <!-- baseAddr = 0x0003E00000000000, 128GB per MCS --> <default>0x0003E30000000000</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <targetInstance> @@ -4220,6 +4335,9 @@ <!-- baseAddr = 0x0003E00000000000, 128GB per MCS --> <default>0x0003E32000000000</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <targetInstance> @@ -4242,6 +4360,9 @@ <!-- baseAddr = 0x0003E00000000000, 128GB per MCS --> <default>0x0003E34000000000</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <targetInstance> @@ -4264,6 +4385,9 @@ <!-- baseAddr = 0x0003E00000000000, 128GB per MCS --> <default>0x0003E36000000000</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <targetInstance> @@ -4286,6 +4410,9 @@ <!-- baseAddr = 0x0003E00000000000, 128GB per MCS --> <default>0x0003E38000000000</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <targetInstance> @@ -4308,6 +4435,9 @@ <!-- baseAddr = 0x0003E00000000000, 128GB per MCS --> <default>0x0003E3A000000000</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <targetInstance> @@ -4330,6 +4460,9 @@ <!-- baseAddr = 0x0003E00000000000, 128GB per MCS --> <default>0x0003E3C000000000</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <targetInstance> @@ -4352,6 +4485,9 @@ <!-- baseAddr = 0x0003E00000000000, 128GB per MCS --> <default>0x0003E3E000000000</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <!-- Venice n0p3 PCI units --> @@ -4424,6 +4560,9 @@ <id>PEER_PATH</id> <default>physical:sys-0/node-0/proc-1/abus-2</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <targetInstance> @@ -4450,6 +4589,9 @@ <id>PEER_PATH</id> <default>physical:sys-0/node-0/proc-7/abus-1</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <targetInstance> @@ -4476,6 +4618,9 @@ <id>PEER_PATH</id> <default>physical:sys-0/node-0/proc-5/abus-0</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <!-- Venice n0p3 XBUS units --> @@ -4675,15 +4820,9 @@ <attribute><id>PM_SPIVID_PORT_ENABLE</id> <default>0b111</default><!-- REDUNDANT --> </attribute> - <attribute><id>PM_SLEEP_ENTRY</id> - <default>1</default><!-- ASSISTED --> - </attribute> - <attribute><id>PM_SLEEP_EXIT</id> - <default>1</default><!-- ASSISTED --> - </attribute> - <attribute><id>PM_SLEEP_TYPE</id> - <default>1</default><!-- DEEP --> - </attribute> + <attribute><id>PM_SLEEP_ENTRY</id></attribute> + <attribute><id>PM_SLEEP_EXIT</id></attribute> + <attribute><id>PM_SLEEP_TYPE</id></attribute> <attribute><id>PM_APSS_CHIP_SELECT</id> <default>0x00</default><!-- CS0 --> </attribute> @@ -5769,15 +5908,9 @@ <attribute><id>PM_SPIVID_PORT_ENABLE</id> <default>0b111</default><!-- REDUNDANT --> </attribute> - <attribute><id>PM_SLEEP_ENTRY</id> - <default>1</default><!-- ASSISTED --> - </attribute> - <attribute><id>PM_SLEEP_EXIT</id> - <default>1</default><!-- ASSISTED --> - </attribute> - <attribute><id>PM_SLEEP_TYPE</id> - <default>1</default><!-- DEEP --> - </attribute> + <attribute><id>PM_SLEEP_ENTRY</id></attribute> + <attribute><id>PM_SLEEP_EXIT</id></attribute> + <attribute><id>PM_SLEEP_TYPE</id></attribute> <attribute><id>PM_APSS_CHIP_SELECT</id> <default>0x00</default><!-- CS0 --> </attribute> @@ -6861,15 +6994,9 @@ <attribute><id>PM_SPIVID_PORT_ENABLE</id> <default>0b111</default><!-- REDUNDANT --> </attribute> - <attribute><id>PM_SLEEP_ENTRY</id> - <default>1</default><!-- ASSISTED --> - </attribute> - <attribute><id>PM_SLEEP_EXIT</id> - <default>1</default><!-- ASSISTED --> - </attribute> - <attribute><id>PM_SLEEP_TYPE</id> - <default>1</default><!-- DEEP --> - </attribute> + <attribute><id>PM_SLEEP_ENTRY</id></attribute> + <attribute><id>PM_SLEEP_EXIT</id></attribute> + <attribute><id>PM_SLEEP_TYPE</id></attribute> <attribute><id>PM_APSS_CHIP_SELECT</id> <default>0x00</default><!-- CS0 --> </attribute> @@ -7954,15 +8081,9 @@ <attribute><id>PM_SPIVID_PORT_ENABLE</id> <default>0b111</default><!-- REDUNDANT --> </attribute> - <attribute><id>PM_SLEEP_ENTRY</id> - <default>1</default><!-- ASSISTED --> - </attribute> - <attribute><id>PM_SLEEP_EXIT</id> - <default>1</default><!-- ASSISTED --> - </attribute> - <attribute><id>PM_SLEEP_TYPE</id> - <default>1</default><!-- DEEP --> - </attribute> + <attribute><id>PM_SLEEP_ENTRY</id></attribute> + <attribute><id>PM_SLEEP_EXIT</id></attribute> + <attribute><id>PM_SLEEP_TYPE</id></attribute> <attribute><id>PM_APSS_CHIP_SELECT</id> <default>0x00</default><!-- CS0 --> </attribute> @@ -8973,6 +9094,9 @@ <field><id>engine</id><value>0</value></field> </default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <!-- Centaur L4 affiliated with membuf0 --> @@ -9080,6 +9204,9 @@ <field><id>engine</id><value>0</value></field> </default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <!-- Centaur L4 affiliated with membuf1 --> @@ -9187,6 +9314,9 @@ <field><id>engine</id><value>0</value></field> </default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <!-- Centaur L4 affiliated with membuf2 --> @@ -9294,6 +9424,9 @@ <field><id>engine</id><value>0</value></field> </default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <!-- Centaur L4 affiliated with membuf3 --> @@ -9401,6 +9534,9 @@ <field><id>engine</id><value>0</value></field> </default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <!-- Centaur L4 affiliated with membuf4 --> @@ -9508,6 +9644,9 @@ <field><id>engine</id><value>0</value></field> </default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <!-- Centaur L4 affiliated with membuf5 --> @@ -9615,6 +9754,9 @@ <field><id>engine</id><value>0</value></field> </default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <!-- Centaur L4 affiliated with membuf6 --> @@ -9722,6 +9864,9 @@ <field><id>engine</id><value>0</value></field> </default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <!-- Centaur L4 affiliated with membuf7 --> @@ -9829,6 +9974,9 @@ <field><id>engine</id><value>0</value></field> </default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <!-- Centaur L4 affiliated with membuf8 --> @@ -9936,6 +10084,9 @@ <field><id>engine</id><value>0</value></field> </default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <!-- Centaur L4 affiliated with membuf9 --> @@ -10043,6 +10194,9 @@ <field><id>engine</id><value>0</value></field> </default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <!-- Centaur L4 affiliated with membuf10 --> @@ -10150,6 +10304,9 @@ <field><id>engine</id><value>0</value></field> </default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <!-- Centaur L4 affiliated with membuf11 --> @@ -10257,6 +10414,9 @@ <field><id>engine</id><value>0</value></field> </default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <!-- Centaur L4 affiliated with membuf12 --> @@ -10364,6 +10524,9 @@ <field><id>engine</id><value>0</value></field> </default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <!-- Centaur L4 affiliated with membuf13 --> @@ -10471,6 +10634,9 @@ <field><id>engine</id><value>0</value></field> </default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <!-- Centaur L4 affiliated with membuf14 --> @@ -10578,6 +10744,9 @@ <field><id>engine</id><value>0</value></field> </default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <!-- Centaur L4 affiliated with membuf15 --> @@ -10685,6 +10854,9 @@ <field><id>engine</id><value>0</value></field> </default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <!-- Centaur L4 affiliated with membuf16 --> @@ -10792,6 +10964,9 @@ <field><id>engine</id><value>0</value></field> </default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <!-- Centaur L4 affiliated with membuf17 --> @@ -10899,6 +11074,9 @@ <field><id>engine</id><value>0</value></field> </default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <!-- Centaur L4 affiliated with membuf18 --> @@ -11006,6 +11184,9 @@ <field><id>engine</id><value>0</value></field> </default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <!-- Centaur L4 affiliated with membuf19 --> @@ -11113,6 +11294,9 @@ <field><id>engine</id><value>0</value></field> </default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <!-- Centaur L4 affiliated with membuf20 --> @@ -11220,6 +11404,9 @@ <field><id>engine</id><value>0</value></field> </default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <!-- Centaur L4 affiliated with membuf21 --> @@ -11327,6 +11514,9 @@ <field><id>engine</id><value>0</value></field> </default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <!-- Centaur L4 affiliated with membuf22 --> @@ -11434,6 +11624,9 @@ <field><id>engine</id><value>0</value></field> </default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <!-- Centaur L4 affiliated with membuf23 --> @@ -11541,6 +11734,9 @@ <field><id>engine</id><value>0</value></field> </default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <!-- Centaur L4 affiliated with membuf24 --> @@ -11648,6 +11844,9 @@ <field><id>engine</id><value>0</value></field> </default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <!-- Centaur L4 affiliated with membuf25 --> @@ -11755,6 +11954,9 @@ <field><id>engine</id><value>0</value></field> </default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <!-- Centaur L4 affiliated with membuf26 --> @@ -11862,6 +12064,9 @@ <field><id>engine</id><value>0</value></field> </default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <!-- Centaur L4 affiliated with membuf27 --> @@ -11969,6 +12174,9 @@ <field><id>engine</id><value>0</value></field> </default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <!-- Centaur L4 affiliated with membuf28 --> @@ -12076,6 +12284,9 @@ <field><id>engine</id><value>0</value></field> </default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <!-- Centaur L4 affiliated with membuf29 --> @@ -12183,6 +12394,9 @@ <field><id>engine</id><value>0</value></field> </default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <!-- Centaur L4 affiliated with membuf30 --> @@ -12290,6 +12504,9 @@ <field><id>engine</id><value>0</value></field> </default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <!-- Centaur L4 affiliated with membuf31 --> @@ -15878,15 +16095,9 @@ <attribute><id>PM_SPIVID_PORT_ENABLE</id> <default>0b111</default><!-- REDUNDANT --> </attribute> - <attribute><id>PM_SLEEP_ENTRY</id> - <default>1</default><!-- ASSISTED --> - </attribute> - <attribute><id>PM_SLEEP_EXIT</id> - <default>1</default><!-- ASSISTED --> - </attribute> - <attribute><id>PM_SLEEP_TYPE</id> - <default>1</default><!-- DEEP --> - </attribute> + <attribute><id>PM_SLEEP_ENTRY</id></attribute> + <attribute><id>PM_SLEEP_EXIT</id></attribute> + <attribute><id>PM_SLEEP_TYPE</id></attribute> <attribute><id>PM_APSS_CHIP_SELECT</id> <default>0x00</default><!-- CS0 --> </attribute> diff --git a/src/usr/targeting/common/xmltohb/target_types.xml b/src/usr/targeting/common/xmltohb/target_types.xml index f1dd2083b..c0ddc3751 100644 --- a/src/usr/targeting/common/xmltohb/target_types.xml +++ b/src/usr/targeting/common/xmltohb/target_types.xml @@ -169,10 +169,22 @@ <!-- Max/min config attributes --> <attribute><id>MAX_PROC_CHIPS_PER_NODE</id></attribute> <attribute><id>MAX_EXS_PER_PROC_CHIP</id></attribute> - <attribute><id>MAX_DIMMS_PER_MBA_PORT</id></attribute> - <attribute><id>MAX_MBA_PORTS_PER_MBA</id></attribute> - <attribute><id>MAX_MBAS_PER_MEMBUF_CHIP</id></attribute> - <attribute><id>MAX_CHIPLETS_PER_PROC</id></attribute> + <attribute> + <id>MAX_DIMMS_PER_MBA_PORT</id> + <default>2</default> + </attribute> + <attribute> + <id>MAX_MBA_PORTS_PER_MBA</id> + <default>2</default> + </attribute> + <attribute> + <id>MAX_MBAS_PER_MEMBUF_CHIP</id> + <default>2</default> + </attribute> + <attribute> + <id>MAX_CHIPLETS_PER_PROC</id> + <default>32</default> + </attribute> <attribute><id>MAX_MCS_PER_SYSTEM</id></attribute> <!-- End max/min config attributes --> <attribute><id>PROC_PBIEX_ASYNC_SEL</id></attribute> @@ -208,6 +220,7 @@ </attribute> <attribute> <id>FSI_MASTER_TYPE</id> + <default>NO_MASTER</default> </attribute> <attribute> <id>FSI_MASTER_PORT</id> @@ -1176,7 +1189,6 @@ <attribute><id>MEMB_TP_BNDY_PLL_NEST4800_MEM1866_DATA</id></attribute> <attribute><id>MEMB_TP_BNDY_PLL_NEST4800_MEM1866_LENGTH</id></attribute> <attribute><id>MSS_FREQ_BIAS_PERCENTAGE</id></attribute> - <attribute><id>MEMB_NEST_FREQ</id></attribute> <attribute><id>CDIMM_SENSOR_MAP_PRIMARY</id></attribute> <attribute><id>CDIMM_SENSOR_MAP_SECONDARY</id></attribute> <attribute><id>MSS_BLUEWATERFALL_BROKEN</id></attribute> diff --git a/src/usr/targeting/common/xmltohb/vbu_MURANO.system.xml b/src/usr/targeting/common/xmltohb/vbu_MURANO.system.xml index 3ff3edeba..d094c0fe6 100644 --- a/src/usr/targeting/common/xmltohb/vbu_MURANO.system.xml +++ b/src/usr/targeting/common/xmltohb/vbu_MURANO.system.xml @@ -158,6 +158,86 @@ <id>MSS_CLEANER_ENABLE</id> <default>1</default> </attribute> + <!-- Start pm_plat_attributes.xml --> + <attribute><id>PROC_R_LOADLINE</id> + <default>890</default> + </attribute> + <attribute><id>PROC_R_DISTLOSS</id> + <default>100</default> + </attribute> + <attribute><id>PROC_VRM_VOFFSET</id> + <default>1000</default> + </attribute> + <attribute><id>FREQ_CORE_MAX</id> + <default>4000</default> + </attribute> + <attribute><id>PM_EXTERNAL_VRM_STEPSIZE</id> + <default>2500</default> + </attribute> + <attribute><id>PM_EXTERNAL_VRM_STEPDELAY</id> + <default>10</default> + </attribute> + <attribute><id>PM_RESONANT_CLOCK_FULL_CLOCK_SECTOR_BUFFER_FREQUENCY</id> + <default>2000</default> + </attribute> + <attribute><id>PM_RESONANT_CLOCK_LOW_BAND_LOWER_FREQUENCY</id> + <default>2300</default> + </attribute> + <attribute><id>PM_RESONANT_CLOCK_LOW_BAND_UPPER_FREQUENCY</id> + <default>3000</default> + </attribute> + <attribute><id>PM_RESONANT_CLOCK_HIGH_BAND_LOWER_FREQUENCY</id> + <default>3050</default> + </attribute> + <attribute><id>PM_RESONANT_CLOCK_HIGH_BAND_UPPER_FREQUENCY</id> + <default>4800</default> + </attribute> + <attribute><id>PM_SAFE_FREQUENCY</id> + <default>3200</default> + </attribute> + <attribute><id>PM_SPIPSS_FREQUENCY</id> + <default>10</default> + </attribute> + <attribute><id>PM_SPIVID_FREQUENCY</id> + <default>0b11</default> + </attribute> + <!-- End pm_plat_attributes.xml --> + <attribute><id>MAX_EXS_PER_PROC_CHIP</id> + <default>6</default> + </attribute> + <attribute><id>MAX_MCS_PER_SYSTEM</id> + <default>4</default> + </attribute> + <attribute><id>X_EREPAIR_THRESHOLD_FIELD</id> + <default>1</default> + </attribute> + <attribute><id>A_EREPAIR_THRESHOLD_FIELD</id> + <default>1</default> + </attribute> + <attribute><id>DMI_EREPAIR_THRESHOLD_FIELD</id> + <default>1</default> + </attribute> + <attribute><id>A_EREPAIR_THRESHOLD_MNFG</id> + <default>0</default> + </attribute> + <attribute> <id>DMI_EREPAIR_THRESHOLD_MNFG</id> + <default>0</default> + </attribute> + <attribute><id>X_EREPAIR_THRESHOLD_MNFG</id> + <default>0</default> + </attribute> + <attribute><id>MRW_SAFEMODE_MEM_THROTTLE_NUMERATOR_PER_MBA</id> + <default>96</default> + </attribute> + <attribute><id>MRW_SAFEMODE_MEM_THROTTLE_DENOMINATOR</id> + <default>512</default> + </attribute> + <attribute><id>MRW_SAFEMODE_MEM_THROTTLE_NUMERATOR_PER_CHIP</id> + <default>32</default> + </attribute> + <attribute><id>MRW_THERMAL_MEMORY_POWER_LIMIT</id> + <default>5000</default> + </attribute> </targetInstance> <!-- System node 0 --> @@ -459,6 +539,9 @@ <!-- baseAddr = 0x0003E00000000000, 128GB per MCS --> <default>0x0003E08000000000</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <targetInstance> @@ -481,6 +564,9 @@ <!-- baseAddr = 0x0003E00000000000, 128GB per MCS --> <default>0x0003E0A000000000</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>1</default> + </attribute> </targetInstance> <targetInstance> @@ -503,6 +589,9 @@ <!-- baseAddr = 0x0003E00000000000, 128GB per MCS --> <default>0x0003E0C000000000</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>1</default> + </attribute> </targetInstance> <targetInstance> @@ -525,6 +614,9 @@ <!-- baseAddr = 0x0003E00000000000, 128GB per MCS --> <default>0x0003E0E000000000</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>1</default> + </attribute> </targetInstance> <!-- Murano n0p0 PCI units --> @@ -606,6 +698,9 @@ <id>CHIP_UNIT</id> <default>0</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <targetInstance> @@ -632,6 +727,9 @@ <id>PEER_PATH</id> <default>physical:sys-0/node-0/proc-2/abus-0</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>1</default> + </attribute> </targetInstance> <targetInstance> @@ -654,6 +752,9 @@ <id>CHIP_UNIT</id> <default>2</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>1</default> + </attribute> </targetInstance> @@ -888,6 +989,9 @@ <id>CHIP_UNIT</id> <default>4</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <targetInstance> @@ -906,6 +1010,9 @@ <id>CHIP_UNIT</id> <default>5</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>1</default> + </attribute> </targetInstance> <targetInstance> @@ -924,6 +1031,9 @@ <id>CHIP_UNIT</id> <default>6</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>1</default> + </attribute> </targetInstance> <targetInstance> @@ -942,6 +1052,9 @@ <id>CHIP_UNIT</id> <default>7</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>1</default> + </attribute> </targetInstance> <!-- Murano n0p1 PCI units --> @@ -1022,6 +1135,9 @@ <id>CHIP_UNIT</id> <default>0</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <targetInstance> @@ -1048,6 +1164,9 @@ <id>PEER_PATH</id> <default>physical:sys-0/node-0/proc-3/abus-0</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>1</default> + </attribute> </targetInstance> <targetInstance> @@ -1070,6 +1189,9 @@ <id>CHIP_UNIT</id> <default>2</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>1</default> + </attribute> </targetInstance> <!-- murano n0p1 XBUS units --> @@ -1303,6 +1425,9 @@ <id>CHIP_UNIT</id> <default>4</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <targetInstance> @@ -1321,6 +1446,9 @@ <id>CHIP_UNIT</id> <default>5</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>1</default> + </attribute> </targetInstance> <targetInstance> @@ -1339,6 +1467,9 @@ <id>CHIP_UNIT</id> <default>6</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>1</default> + </attribute> </targetInstance> <targetInstance> @@ -1357,6 +1488,9 @@ <id>CHIP_UNIT</id> <default>7</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>1</default> + </attribute> </targetInstance> <!-- Murano n2p0 PCI units --> @@ -1441,6 +1575,9 @@ <id>PEER_PATH</id> <default>physical:sys-0/node-0/proc-0/abus-1</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <targetInstance> @@ -1463,6 +1600,9 @@ <id>CHIP_UNIT</id> <default>1</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>1</default> + </attribute> </targetInstance> <targetInstance> @@ -1485,6 +1625,9 @@ <id>CHIP_UNIT</id> <default>2</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>1</default> + </attribute> </targetInstance> <!-- murano n2p0 XBUS units --> @@ -1718,6 +1861,9 @@ <id>CHIP_UNIT</id> <default>4</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <targetInstance> @@ -1736,6 +1882,9 @@ <id>CHIP_UNIT</id> <default>5</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>1</default> + </attribute> </targetInstance> <targetInstance> @@ -1754,6 +1903,9 @@ <id>CHIP_UNIT</id> <default>6</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>1</default> + </attribute> </targetInstance> <targetInstance> @@ -1772,6 +1924,9 @@ <id>CHIP_UNIT</id> <default>7</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>1</default> + </attribute> </targetInstance> <!-- Murano n2p1 PCI units --> @@ -1856,6 +2011,9 @@ <id>PEER_PATH</id> <default>physical:sys-0/node-0/proc-1/abus-1</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <targetInstance> @@ -1878,6 +2036,9 @@ <id>CHIP_UNIT</id> <default>1</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>1</default> + </attribute> </targetInstance> <targetInstance> @@ -1900,6 +2061,9 @@ <id>CHIP_UNIT</id> <default>2</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>1</default> + </attribute> </targetInstance> <!-- murano n2p1 XBUS units --> @@ -1965,6 +2129,9 @@ <default>0</default> </attribute> <attribute><id>VPD_REC_NUM</id><default>4</default></attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <!-- Centaur L4 affiliated with membuf4 --> @@ -2061,6 +2228,9 @@ <default>0</default> </attribute> <attribute><id>VPD_REC_NUM</id><default>5</default></attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>1</default> + </attribute> </targetInstance> <!-- Centaur L4 affiliated with membuf5 --> @@ -2158,6 +2328,9 @@ <default>0</default> </attribute> <attribute><id>VPD_REC_NUM</id><default>20</default></attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <!-- Centaur L4 affiliated with n2p0->mcs-4/membuf-20/ --> @@ -2256,6 +2429,9 @@ <default>0</default> </attribute> <attribute><id>VPD_REC_NUM</id><default>21</default></attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>1</default> + </attribute> </targetInstance> <!-- Centaur L4 affiliated with n2p0->mcs-5/membuf-21/ --> diff --git a/src/usr/targeting/common/xmltohb/vbu_VENICE.system.xml b/src/usr/targeting/common/xmltohb/vbu_VENICE.system.xml index 7b2fb0040..5206f5a88 100644 --- a/src/usr/targeting/common/xmltohb/vbu_VENICE.system.xml +++ b/src/usr/targeting/common/xmltohb/vbu_VENICE.system.xml @@ -203,6 +203,42 @@ <id>IS_SIMULATION</id> <default>1</default> </attribute> + <attribute><id>MAX_EXS_PER_PROC_CHIP</id> + <default>12</default> + </attribute> + <attribute><id>MAX_MCS_PER_SYSTEM</id> + <default>8</default> + </attribute> + <attribute><id>X_EREPAIR_THRESHOLD_FIELD</id> + <default>1</default> + </attribute> + <attribute><id>A_EREPAIR_THRESHOLD_FIELD</id> + <default>1</default> + </attribute> + <attribute><id>DMI_EREPAIR_THRESHOLD_FIELD</id> + <default>1</default> + </attribute> + <attribute><id>X_EREPAIR_THRESHOLD_MNFG</id> + <default>0</default> + </attribute> + <attribute><id>A_EREPAIR_THRESHOLD_MNFG</id> + <default>0</default> + </attribute> + <attribute><id>DMI_EREPAIR_THRESHOLD_MNFG</id> + <default>0</default> + </attribute> + <attribute><id>MRW_SAFEMODE_MEM_THROTTLE_NUMERATOR_PER_MBA</id> + <default>96</default> + </attribute> + <attribute><id>MRW_SAFEMODE_MEM_THROTTLE_DENOMINATOR</id> + <default>512</default> + </attribute> + <attribute><id>MRW_SAFEMODE_MEM_THROTTLE_NUMERATOR_PER_CHIP</id> + <default>32</default> + </attribute> + <attribute><id>MRW_THERMAL_MEMORY_POWER_LIMIT</id> + <default>5000</default> + </attribute> </targetInstance> <!-- System node 0 --> @@ -960,6 +996,9 @@ <!-- baseAddr = 0x0003E00000000000, 128GB per MCS --> <default>0x0003E00000000000</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <targetInstance> @@ -982,6 +1021,9 @@ <!-- baseAddr = 0x0003E00000000000, 128GB per MCS --> <default>0x0003E02000000000</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <targetInstance> @@ -1004,6 +1046,9 @@ <!-- baseAddr = 0x0003E00000000000, 128GB per MCS --> <default>0x0003E04000000000</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <targetInstance> @@ -1026,6 +1071,9 @@ <!-- baseAddr = 0x0003E00000000000, 128GB per MCS --> <default>0x0003E06000000000</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <!-- @@ -1048,6 +1096,9 @@ <attribute><id>IBSCOM_MCS_BASE_ADDR</id> <default>0x0003E08000000000</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <targetInstance> @@ -1069,6 +1120,9 @@ <attribute><id>IBSCOM_MCS_BASE_ADDR</id> <default>0x0003E0A000000000</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <targetInstance> @@ -1090,6 +1144,9 @@ <attribute><id>IBSCOM_MCS_BASE_ADDR</id> <default>0x0003E0C000000000</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <targetInstance> @@ -1111,6 +1168,9 @@ <attribute><id>IBSCOM_MCS_BASE_ADDR</id> <default>0x0003E0E000000000</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> --> @@ -1193,6 +1253,9 @@ <id>CHIP_UNIT</id> <default>0</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <targetInstance> @@ -1214,7 +1277,10 @@ <attribute> <id>CHIP_UNIT</id> <default>1</default> - </attribute> + </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <targetInstance> @@ -1237,6 +1303,9 @@ <id>CHIP_UNIT</id> <default>2</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <!-- Venice n0p0 XBUS units --> @@ -2065,6 +2134,9 @@ <!-- baseAddr = 0x0003E00000000000, 128GB per MCS --> <default>0x0003E10000000000</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <targetInstance> @@ -2087,6 +2159,9 @@ <!-- baseAddr = 0x0003E00000000000, 128GB per MCS --> <default>0x0003E12000000000</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <targetInstance> @@ -2109,6 +2184,9 @@ <!-- baseAddr = 0x0003E00000000000, 128GB per MCS --> <default>0x0003E14000000000</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <targetInstance> @@ -2131,6 +2209,9 @@ <!-- baseAddr = 0x0003E00000000000, 128GB per MCS --> <default>0x0003E16000000000</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <!-- @@ -2153,6 +2234,10 @@ <attribute><id>IBSCOM_MCS_BASE_ADDR</id> <default>0x0003E18000000000</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> + </targetInstance> <targetInstance> @@ -2174,6 +2259,9 @@ <attribute><id>IBSCOM_MCS_BASE_ADDR</id> <default>0x0003E1A000000000</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <targetInstance> @@ -2195,6 +2283,9 @@ <attribute><id>IBSCOM_MCS_BASE_ADDR</id> <default>0x0003E1C000000000</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <targetInstance> @@ -2216,6 +2307,9 @@ <attribute><id>IBSCOM_MCS_BASE_ADDR</id> <default>0x0003E1E000000000</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> --> @@ -2285,6 +2379,9 @@ <id>CHIP_UNIT</id> <default>0</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <targetInstance> @@ -2307,6 +2404,9 @@ <id>CHIP_UNIT</id> <default>1</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <targetInstance> @@ -2329,6 +2429,9 @@ <id>CHIP_UNIT</id> <default>2</default> </attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <!-- Venice n0p1 XBUS units --> @@ -2449,6 +2552,9 @@ </attribute> <attribute><id>VPD_REC_NUM</id><default>0</default></attribute> <attribute><id>MSS_CACHE_ENABLE</id><default>1</default></attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <!-- Centaur L4 affiliated with membuf0 --> @@ -2548,6 +2654,9 @@ </attribute> <attribute><id>VPD_REC_NUM</id><default>1</default></attribute> <attribute><id>MSS_CACHE_ENABLE</id><default>1</default></attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <!-- Centaur L4 affiliated with membuf1 --> @@ -2646,6 +2755,9 @@ <default>0</default> </attribute> <attribute><id>VPD_REC_NUM</id><default>2</default></attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <!-- Centaur L4 affiliated with membuf2 --> @@ -2744,6 +2856,9 @@ <default>0</default> </attribute> <attribute><id>VPD_REC_NUM</id><default>3</default></attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <!-- Centaur L4 affiliated with membuf3 --> @@ -2842,6 +2957,9 @@ <default>0</default> </attribute> <attribute><id>VPD_REC_NUM</id><default>4</default></attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <!-- Centaur L4 affiliated with membuf4 --> @@ -2940,6 +3058,9 @@ <default>0</default> </attribute> <attribute><id>VPD_REC_NUM</id><default>5</default></attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <!-- Centaur L4 affiliated with membuf5 --> @@ -3038,6 +3159,9 @@ <default>0</default> </attribute> <attribute><id>VPD_REC_NUM</id><default>6</default></attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <!-- Centaur L4 affiliated with membuf6 --> @@ -3136,6 +3260,9 @@ <default>0</default> </attribute> <attribute><id>VPD_REC_NUM</id><default>7</default></attribute> + <attribute><id>EI_BUS_TX_MSBSWAP</id> + <default>0</default> + </attribute> </targetInstance> <!-- Centaur L4 affiliated with membuf7 --> |
