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authorMike Jones <mjjones@us.ibm.com>2013-11-08 08:58:15 -0600
committerA. Patrick Williams III <iawillia@us.ibm.com>2013-11-08 15:25:12 -0600
commit4b0ab464ceaa66fbb9b3d4f833215c26f441b1c9 (patch)
tree3c6233a90cd3ce37bbcd866f6f9e3cf3ee442d7a
parentfaf38f7f226c87186bcee34e57fbd93fd1cfdc66 (diff)
downloadtalos-hostboot-4b0ab464ceaa66fbb9b3d4f833215c26f441b1c9.tar.gz
talos-hostboot-4b0ab464ceaa66fbb9b3d4f833215c26f441b1c9.zip
Update io pre/post trainadv HWPs to match eKB
Firmware is using a modified version of these empty procedures to get past unused variable warnings. I finally updated these procedures in eKB to fix the issues. Hostboot needs to sync up to match the eKB HWPs. Change-Id: Ic91bebb0c4846e04fb172ebf23bf566b74629976 RTC: 90940 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/7123 Tested-by: Jenkins Server Reviewed-by: Brian H. Horton <brianh@linux.ibm.com> Reviewed-by: Donald E. Dahle <dedahle@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
-rw-r--r--src/usr/hwpf/hwp/bus_training/io_post_trainadv.C73
-rw-r--r--src/usr/hwpf/hwp/bus_training/io_post_trainadv.H24
-rw-r--r--src/usr/hwpf/hwp/bus_training/io_pre_trainadv.C73
-rw-r--r--src/usr/hwpf/hwp/bus_training/io_pre_trainadv.H25
4 files changed, 36 insertions, 159 deletions
diff --git a/src/usr/hwpf/hwp/bus_training/io_post_trainadv.C b/src/usr/hwpf/hwp/bus_training/io_post_trainadv.C
index 7a6314cef..47c9f2f47 100644
--- a/src/usr/hwpf/hwp/bus_training/io_post_trainadv.C
+++ b/src/usr/hwpf/hwp/bus_training/io_post_trainadv.C
@@ -20,7 +20,7 @@
/* Origin: 30 */
/* */
/* IBM_PROLOG_END_TAG */
-// $Id: io_post_trainadv.C,v 1.1 2013/05/10 20:06:00 thomsen Exp $
+// $Id: io_post_trainadv.C,v 1.2 2013/11/08 14:23:07 mjjones Exp $
//*!***************************************************************************
// *! (C) Copyright International Business Machines Corp. 1997, 1998
// *! All Rights Reserved -- Property of IBM
@@ -40,76 +40,19 @@
// Version:|Author: | Date: | Comment:
// --------|--------|--------|-------------------------------------------------
// 1.1 |thomsen |05/10/13| Initial empty shell
+// 1.2 |mjjones |11/07/13| Cleanup
//-----------------------------------------------------------------------------
#include <fapi.H>
#include "io_post_trainadv.H"
-#include "gcr_funcs.H"
-extern "C" {
+extern "C"
+{
-
-using namespace fapi;
-//================================================================================================================================
-// These functions work on a pair of targets. One is the master side of the bus interface, the other the slave side. For eg; in EDI(DMI2)PU is the master and Centaur is the slave
-// In EI4 both sides have pu targets
-ReturnCode io_post_trainadv(const Target& target){
- ReturnCode rc;
- //uint32_t master_group=0;
- FAPI_DBG("Running IO POST TRAINING ADVANCED PROCEDURE");
- // ____ __ _______
- // / __ \/ |/ / _/
- // / / / / /|_/ // /
- // / /_/ / / / // /
- // /_____/_/ /_/___/
- if( (target.getType() == fapi::TARGET_TYPE_MCS_CHIPLET )){
- FAPI_DBG("This is a Processor DMI bus post training invocation using base DMI scom address");
- //master_interface=CP_IOMC0_P0; // base scom for MC bus
- //master_group=3; // Design requires us to do this as per scom map and layout
- // USER CODE HERE: ex. rc=run_offset_cal(target,master_interface,master_group);if (rc) {return(rc);};
- }
- else if( (target.getType() == fapi::TARGET_TYPE_MEMBUF_CHIP)){
- FAPI_DBG("This is a Centaur DMI bus post training invocation using base DMI scom address");
- //master_interface=CEN_DMI; // base scom for CEN
- //master_group=0;
- // USER CODE HERE: ex. rc=run_offset_cal(target,master_interface,master_group);if (rc) {return(rc);};
- }
- //
- // | |/ // /
- // | // __ \/ / / / ___/
- // / |/ /_/ / /_/ (__ )
- // /_/|_/_.___/\__,_/____/
- else if( (target.getType() == fapi::TARGET_TYPE_XBUS_ENDPOINT )){
- FAPI_DBG("This is a X Bus post training invocation");
- //master_interface=CP_FABRIC_X0; // base scom for X bus
- //master_group=0; // Design requires us to do this as per scom map and layout
- if(rc.ok()){
- // No Z cal in EI4/X bus design
- for(int i=0;i<5;++i){
- //master_group=i;
- // USER CODE HERE: ex. rc=run_offset_cal(target,master_interface,master_group);if (rc) {return(rc);};
- }
- }
- }
- // ___ __
- // / | / /_ __ _______
- // / /| | / __ \/ / / / ___/
- // / ___ |/ /_/ / /_/ (__ )
- // /_/ |_/_.___/\__,_/____/
- else if( (target.getType() == fapi::TARGET_TYPE_ABUS_ENDPOINT )){
- FAPI_DBG("This is an A Bus post training invocation");
- //master_interface=CP_FABRIC_A0; // base scom for A bus , assume translation to A1 by PLAT
- //master_group=0; // Design requires us to do this as per scom map and layout
- // EDI-A bus needs both impedance cal and offset cal
- // USER CODE HERE: ex. rc=run_offset_cal(target,master_interface,master_group);if (rc) {return(rc);}
- }
- else{
- FAPI_ERR("Invalid io_post_trainadv HWP invocation . Target doesnt belong to DMI/X/A instances");
- // ADD THIS WHEN IMPLEMENTING FUNCTION: FAPI_SET_HWP_ERROR(rc, IO_post_TRAINADV_INVALID_INVOCATION_RC);
- }
+fapi::ReturnCode io_post_trainadv(const fapi::Target & i_target)
+{
+ fapi::ReturnCode rc;
return rc;
}
-//================================================================================================================================
-
-} //end extern C
+} // extern "C"
diff --git a/src/usr/hwpf/hwp/bus_training/io_post_trainadv.H b/src/usr/hwpf/hwp/bus_training/io_post_trainadv.H
index 18e07a896..1b98b99be 100644
--- a/src/usr/hwpf/hwp/bus_training/io_post_trainadv.H
+++ b/src/usr/hwpf/hwp/bus_training/io_post_trainadv.H
@@ -20,34 +20,30 @@
/* Origin: 30 */
/* */
/* IBM_PROLOG_END_TAG */
-// $Id: io_post_trainadv.H,v 1.1 2013/05/10 20:05:59 thomsen Exp $
+// $Id: io_post_trainadv.H,v 1.2 2013/11/08 14:22:27 mjjones Exp $
#ifndef IO_POST_TRAINADV_H_
#define IO_POST_TRAINADV_H_
#include <fapi.H>
-using namespace fapi;
-
/**
* io_post_trainadv HWP func pointer typedef
- *
*/
-typedef fapi::ReturnCode (*io_post_trainadv_FP_t)(const fapi::Target &target);
+typedef fapi::ReturnCode (*io_post_trainadv_FP_t)(const fapi::Target &);
extern "C"
{
/**
- * io_post_trainadv HWP
- *
- * master_target is any IO target P8 MCS,XBUS,Abus or centaur
- *
- *
- *
+ * @brief Debug routine for IO Characterization
*
+ * @param[in] i_target Reference to bus endpoint target. Type is one of:
+ * XBUS_ENDPOINT, ABUS_ENDPOINT,
+ * MCS_CHIPLET, MEMBUF_CHIP
+ * @return ReturnCode
*/
-
-fapi::ReturnCode io_post_trainadv(const fapi::Target &target);
+fapi::ReturnCode io_post_trainadv(const fapi::Target & i_target);
} // extern "C"
-#endif // io_post_trainadv_H_
+
+#endif
diff --git a/src/usr/hwpf/hwp/bus_training/io_pre_trainadv.C b/src/usr/hwpf/hwp/bus_training/io_pre_trainadv.C
index e0911e90a..0b735feb1 100644
--- a/src/usr/hwpf/hwp/bus_training/io_pre_trainadv.C
+++ b/src/usr/hwpf/hwp/bus_training/io_pre_trainadv.C
@@ -20,7 +20,7 @@
/* Origin: 30 */
/* */
/* IBM_PROLOG_END_TAG */
-// $Id: io_pre_trainadv.C,v 1.1 2013/05/10 20:05:59 thomsen Exp $
+// $Id: io_pre_trainadv.C,v 1.2 2013/11/08 13:45:41 mjjones Exp $
// *!***************************************************************************
// *! (C) Copyright International Business Machines Corp. 1997, 1998
// *! All Rights Reserved -- Property of IBM
@@ -40,76 +40,19 @@
// Version:|Author: | Date: | Comment:
// --------|--------|--------|--------------------------------------------------
// 1.1 |thomsen |05/10/13| Initial empty shell
+// 1.2 |mjjones |11/07/13| Cleanup
//------------------------------------------------------------------------------
#include <fapi.H>
#include "io_pre_trainadv.H"
-#include "gcr_funcs.H"
-extern "C" {
+extern "C"
+{
-
-using namespace fapi;
-//================================================================================================================================
-// These functions work on a pair of targets. One is the master side of the bus interface, the other the slave side. For eg; in EDI(DMI2)PU is the master and Centaur is the slave
-// In EI4 both sides have pu targets
-ReturnCode io_pre_trainadv(const Target& target){
- ReturnCode rc;
- //uint32_t master_group=0;
- FAPI_DBG("Running IO PRE TRAINING ADVANCED PROCEDURE");
- // ____ __ _______
- // / __ \/ |/ / _/
- // / / / / /|_/ // /
- // / /_/ / / / // /
- // /_____/_/ /_/___/
- if( (target.getType() == fapi::TARGET_TYPE_MCS_CHIPLET )){
- FAPI_DBG("This is a Processor DMI bus pre training invocation using base DMI scom address");
- //master_interface=CP_IOMC0_P0; // base scom for MC bus
- //master_group=3; // Design requires us to do this as per scom map and layout
- // USER CODE HERE: ex. rc=run_offset_cal(target,master_interface,master_group);if (rc) {return(rc);};
- }
- else if( (target.getType() == fapi::TARGET_TYPE_MEMBUF_CHIP)){
- FAPI_DBG("This is a Centaur DMI bus pre training invocation using base DMI scom address");
- //master_interface=CEN_DMI; // base scom for CEN
- //master_group=0;
- // USER CODE HERE: ex. rc=run_offset_cal(target,master_interface,master_group);if (rc) {return(rc);};
- }
- // _ __ __
- // | |/ // /_ __ _______
- // | // __ \/ / / / ___/
- // / |/ /_/ / /_/ (__ )
- // /_/|_/_.___/\__,_/____/
- else if( (target.getType() == fapi::TARGET_TYPE_XBUS_ENDPOINT )){
- FAPI_DBG("This is a X Bus pre training invocation");
- //master_interface=CP_FABRIC_X0; // base scom for X bus
- //master_group=0; // Design requires us to do this as per scom map and layout
- if(rc.ok()){
- // No Z cal in EI4/X bus design
- for(int i=0;i<5;++i){
- //master_group=i;
- // USER CODE HERE: ex. rc=run_offset_cal(target,master_interface,master_group);if (rc) {return(rc);};
- }
- }
- }
- // ___ __
- // / | / /_ __ _______
- // / /| | / __ \/ / / / ___/
- // / ___ |/ /_/ / /_/ (__ )
- // /_/ |_/_.___/\__,_/____/
- else if( (target.getType() == fapi::TARGET_TYPE_ABUS_ENDPOINT )){
- FAPI_DBG("This is an A Bus pre training invocation");
- //master_interface=CP_FABRIC_A0; // base scom for A bus , assume translation to A1 by PLAT
- //master_group=0; // Design requires us to do this as per scom map and layout
- // EDI-A bus needs both impedance cal and offset cal
- // USER CODE HERE: ex. rc=run_offset_cal(target,master_interface,master_group);if (rc) {return(rc);};
- }
- else{
- FAPI_ERR("Invalid io_pre_trainadv HWP invocation . Target doesnt belong to DMI/X/A instances");
- // ADD THIS WHEN IMPLEMENTING FUNCTION: FAPI_SET_HWP_ERROR(rc, IO_PRE_TRAINADV_INVALID_INVOCATION_RC);
- }
+fapi::ReturnCode io_pre_trainadv(const fapi::Target & i_target)
+{
+ fapi::ReturnCode rc;
return rc;
}
-//================================================================================================================================
-
-} //end extern C
+} // extern "C"
diff --git a/src/usr/hwpf/hwp/bus_training/io_pre_trainadv.H b/src/usr/hwpf/hwp/bus_training/io_pre_trainadv.H
index 3f49fc2e6..2b5398e51 100644
--- a/src/usr/hwpf/hwp/bus_training/io_pre_trainadv.H
+++ b/src/usr/hwpf/hwp/bus_training/io_pre_trainadv.H
@@ -20,35 +20,30 @@
/* Origin: 30 */
/* */
/* IBM_PROLOG_END_TAG */
-// $Id: io_pre_trainadv.H,v 1.1 2013/05/10 20:05:59 thomsen Exp $
+// $Id: io_pre_trainadv.H,v 1.2 2013/11/08 14:22:11 mjjones Exp $
#ifndef IO_PRE_TRAINADV_H_
#define IO_PRE_TRAINADV_H_
#include <fapi.H>
-using namespace fapi;
-
/**
* io_pre_trainadv HWP func pointer typedef
- *
*/
-typedef fapi::ReturnCode (*io_pre_trainadv_FP_t)(const fapi::Target &target);
+typedef fapi::ReturnCode (*io_pre_trainadv_FP_t)(const fapi::Target &);
extern "C"
{
/**
- * io_pre_trainadv HWP
- *
- * master_target is any IO target P8 MCS,XBUS,Abus or centaur
- *
- *
- *
- *
+ * @brief Debug routine for IO Characterization
+ *
+ * @param[in] i_target Reference to bus endpoint target. Type is one of:
+ * XBUS_ENDPOINT, ABUS_ENDPOINT,
+ * MCS_CHIPLET, MEMBUF_CHIP
+ * @return ReturnCode
*/
-
-fapi::ReturnCode io_pre_trainadv(const fapi::Target &target);
+fapi::ReturnCode io_pre_trainadv(const fapi::Target & i_target);
} // extern "C"
-#endif // io_pre_trainadv_H_
+#endif
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