diff options
| author | Dan Crowell <dcrowell@us.ibm.com> | 2013-09-17 09:43:41 -0500 |
|---|---|---|
| committer | A. Patrick Williams III <iawillia@us.ibm.com> | 2013-09-17 12:11:24 -0500 |
| commit | 27288a5caf2eb9b19f6572a94c3445a8a9912409 (patch) | |
| tree | d05a5b235100bd4e722bbb63232e934487431e35 | |
| parent | 627594c6e7d85c58ea7c9174e914ea8378e7ca89 (diff) | |
| download | talos-hostboot-27288a5caf2eb9b19f6572a94c3445a8a9912409.tar.gz talos-hostboot-27288a5caf2eb9b19f6572a94c3445a8a9912409.zip | |
Update bbuild to b0910a_1337.810
Removed all of the workarounds that were present
Change-Id: I17ab3293bda30d20974066ba9a5e571e5b361649
RTC: 82134
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/6198
Tested-by: Jenkins Server
Reviewed-by: Richard J. Knight <rjknight@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
| -rw-r--r-- | src/build/citest/etc/bbuild | 2 | ||||
| -rw-r--r-- | src/build/citest/etc/patches/centaur.act.centaur_sbe_patch | 32 | ||||
| -rw-r--r-- | src/build/citest/etc/patches/p8.act_sbe_thread_count_patch | 30 | ||||
| -rw-r--r-- | src/build/citest/etc/patches/p8.chip.p8_pfet_control.patch | 184 | ||||
| -rw-r--r-- | src/build/citest/etc/patches/p8_ex_l3purge.act | 9 | ||||
| -rw-r--r-- | src/build/citest/etc/patches/p8_master.por | 2 | ||||
| -rw-r--r-- | src/build/citest/etc/patches/patchlist.txt | 9 | ||||
| -rw-r--r-- | src/build/citest/etc/patches/s1.act.dmi_pll_lock_patch | 38 | ||||
| -rw-r--r-- | src/build/citest/etc/patches/s1.act_sbe_thread_count_patch | 12 | ||||
| -rw-r--r-- | src/build/citest/etc/patches/s1.chip.p8_pfet_control.patch | 94 | ||||
| -rwxr-xr-x | src/build/citest/etc/workarounds.postsimsetup | 6 |
11 files changed, 1 insertions, 417 deletions
diff --git a/src/build/citest/etc/bbuild b/src/build/citest/etc/bbuild index a0e7fd817..e2ac352b0 100644 --- a/src/build/citest/etc/bbuild +++ b/src/build/citest/etc/bbuild @@ -1 +1 @@ -/esw/fips810/Builds/b0814a_1333.810/ +/esw/fips810/Builds/b0910a_1337.810/ diff --git a/src/build/citest/etc/patches/centaur.act.centaur_sbe_patch b/src/build/citest/etc/patches/centaur.act.centaur_sbe_patch deleted file mode 100644 index 52740fa1e..000000000 --- a/src/build/citest/etc/patches/centaur.act.centaur_sbe_patch +++ /dev/null @@ -1,32 +0,0 @@ ---- centaur.act_build 2013-01-18 10:21:56.829533535 -0600 -+++ centaur.act_new 2013-01-18 10:24:37.680225599 -0600 -@@ -35,6 +35,7 @@ - # SW178996 mjjones 12/13/12 Slew calibration actions - # SW176884 bradleyb 12/15/12 re-enable command complete - # SW180168 vanlee 01/02/13 Centaur Mem PLL lock action -+# SW182865 thi 01/18/13 Action file for Centaur SBE - #******************************************************************** - # - -@@ -350,3 +351,21 @@ - #*************************************** - # END - mem_pll_setup actions - #*************************************** -+ -+#*************************************** -+# BEGIN - SBE Centaur img actions -+#*************************************** -+CAUSE_EFFECT { -+ LABEL=[SBE image: VDD OK] -+ WATCH=[LOGIC(0xFF000008)] # FSI GP3 reg (0x1012) -+ CAUSE: TARGET=[LOGIC(0xFF000008)] OP=[BIT,OFF] BIT=[27] -+ CAUSE: TARGET=[LOGIC(0xFF000008)] OP=[BIT,OFF] BIT=[23] -+ EFFECT: TARGET=[LOGIC(0xFF000100)] OP=[BIT,ON] BIT=[0] -+ EFFECT: TARGET=[LOGIC(0xFF00000F)] OP=[BIT,ON] BIT=[16] -+ # Temporary use this action to turn on Nest PLL lock until Simics creates reg 0x101B -+ EFFECT: TARGET=[LOGIC(0xFF00000F)] OP=[BIT,ON] BIT=[24] -+} -+ -+#*************************************** -+# END - SBE Centaur img actions -+#*************************************** diff --git a/src/build/citest/etc/patches/p8.act_sbe_thread_count_patch b/src/build/citest/etc/patches/p8.act_sbe_thread_count_patch deleted file mode 100644 index 0a229eb19..000000000 --- a/src/build/citest/etc/patches/p8.act_sbe_thread_count_patch +++ /dev/null @@ -1,30 +0,0 @@ -*** ORIG/p8.act 2013-06-28 15:09:38.397876370 -0500 ---- NEW/p8.act 2013-06-28 16:36:03.653781869 -0500 -*************** -*** 157,168 **** - EFFECT: TARGET=[PROCREG(msr, 4, 6)] OP=[EQUALTO,BUF] DATA=[LITERAL(64,D0000000 00000000)]# MSR to default - EFFECT: TARGET=[PROCREG(nia, 4, 7)] OP=[EQUALTO,BUF] DATA=[LITERAL(64,00000000 00000100)]# NIA to default - EFFECT: TARGET=[PROCREG(msr, 4, 7)] OP=[EQUALTO,BUF] DATA=[LITERAL(64,D0000000 00000000)]# MSR to default - - #ds01 Discover the secure state and save it away - EFFECT: TARGET=[LOGIC(0xFF0CC004)] OP=[EQUALTO,BUF,MASK,SHIFT] DATA=[REG(0x00010005)] MASK=[LITERAL(64,80000000 00000000)] SHIFT=[63] - # ds01 ch128 Load Hostboot base image from offset in MBOX SCRATCH3 reg (0x3A) - EFFECT: TARGET=[MODULE(sbeStart, FSIMBOX(0x3A), LOGIC(0xFF0CC004), 4)] OP=[MODULECALL] #dds129 -! - ############################################################################## - # Phase 2: Start SBE - ############################################################################## ---- 157,169 ---- - EFFECT: TARGET=[PROCREG(msr, 4, 6)] OP=[EQUALTO,BUF] DATA=[LITERAL(64,D0000000 00000000)]# MSR to default - EFFECT: TARGET=[PROCREG(nia, 4, 7)] OP=[EQUALTO,BUF] DATA=[LITERAL(64,00000000 00000100)]# NIA to default - EFFECT: TARGET=[PROCREG(msr, 4, 7)] OP=[EQUALTO,BUF] DATA=[LITERAL(64,D0000000 00000000)]# MSR to default -+ EFFECT: TARGET=[PROCREG(scratch, 4,7)] OP=[EQUALTO,BUF] DATA=[LITERAL(64,0000FF00 00000000)]# Thread Count - - #ds01 Discover the secure state and save it away - EFFECT: TARGET=[LOGIC(0xFF0CC004)] OP=[EQUALTO,BUF,MASK,SHIFT] DATA=[REG(0x00010005)] MASK=[LITERAL(64,80000000 00000000)] SHIFT=[63] - # ds01 ch128 Load Hostboot base image from offset in MBOX SCRATCH3 reg (0x3A) - EFFECT: TARGET=[MODULE(sbeStart, FSIMBOX(0x3A), LOGIC(0xFF0CC004), 4)] OP=[MODULECALL] #dds129 -! - ############################################################################## - # Phase 2: Start SBE - ############################################################################## diff --git a/src/build/citest/etc/patches/p8.chip.p8_pfet_control.patch b/src/build/citest/etc/patches/p8.chip.p8_pfet_control.patch deleted file mode 100644 index d994a9b5c..000000000 --- a/src/build/citest/etc/patches/p8.chip.p8_pfet_control.patch +++ /dev/null @@ -1,184 +0,0 @@ ---- p8.chip.build 2013-08-20 12:00:22.521871799 -0500 -+++ p8.chip.new 2013-08-20 11:04:02.480135466 -0500 -@@ -37,6 +37,7 @@ - # SW201429 pacharya 05/06/13 remove s1_ex.act - # D884154 dthorn 05/22/13 temporarily add missing rings - # F884180 dkodihal 06/06/13 Updated SCANRANGE with fastarray rings -+# D892792 jknight 08/20/13 Updated SCOM ranges - - VERSION 1 # .chip file format ID - TYPE=p8 # Chip Type -@@ -156,9 +157,10 @@ - SCOMRANGE # Value, Mask, Clocks, Logical Address - - # Scom Ranges for ex14 -- 0x1E040000, 0xFFF40000, 0x80000000 00000003, 0xFFC5001E # ex14prv, chiplet vital, chip vital -- 0x1E030000, 0xFFF30000, 0x00000000 00000003, 0xFFC5001E # ex14vital, chiplet vital, chip vital -- 0x1E020000, 0xFFF20000, 0x80000000 00000003, 0xFFC5001E # ex14oha, chiplet vital, chip vital -+ 0x1E0F0000, 0xFFFF0000, 0x00000000 00000001, 0xFFC5001E # chip vital -+ 0x1E040000, 0xFFFF0000, 0x80000000 00000003, 0xFFC5001E # ex14prv, chiplet vital, chip vital -+ 0x1E030000, 0xFFFF0000, 0x00000000 00000003, 0xFFC5001E # ex14vital, chiplet vital, chip vital -+ 0x1E020000, 0xFFFF0000, 0x80000000 00000003, 0xFFC5001E # ex14oha, chiplet vital, chip vital - 0x1E013C00, 0xFFFFFC00, 0x60000000 00000003, 0xFFC5001E # ex14pcsec, chiplet vital, chip vital - 0x1E013000, 0xFFFF3000, 0x60000000 00000003, 0xFFC5001E # ex14pc, chiplet vital, chip vital - 0x1E012C00, 0xFFFFFC00, 0xE0000000 00000003, 0xFFC5001E # ex14trapc, chiplet vital, chip vital -@@ -172,9 +174,10 @@ - 0x1E000000, 0xFE000000, 0x00000000 00000003, 0xFFC5001E # ex14vital, chiplet vital, chip vital - - # Scom Ranges for ex13 -- 0x1D040000, 0xFFF40000, 0x80000000 00000003, 0xFFC5001D # ex13prv, chiplet vital, chip vital -- 0x1D030000, 0xFFF30000, 0x00000000 00000003, 0xFFC5001D # ex13vital, chiplet vital, chip vital -- 0x1D020000, 0xFFF20000, 0x80000000 00000003, 0xFFC5001D # ex13oha, chiplet vital, chip vital -+ 0x1D0F0000, 0xFFFF0000, 0x00000000 00000001, 0xFFC5001D # chip vital -+ 0x1D040000, 0xFFFF0000, 0x80000000 00000003, 0xFFC5001D # ex13prv, chiplet vital, chip vital -+ 0x1D030000, 0xFFFF0000, 0x00000000 00000003, 0xFFC5001D # ex13vital, chiplet vital, chip vital -+ 0x1D020000, 0xFFFF0000, 0x80000000 00000003, 0xFFC5001D # ex13oha, chiplet vital, chip vital - 0x1D013C00, 0xFFFFFC00, 0x60000000 00000003, 0xFFC5001D # ex13pcsec, chiplet vital, chip vital - 0x1D013000, 0xFFFF3000, 0x60000000 00000003, 0xFFC5001D # ex13pc, chiplet vital, chip vital - 0x1D012C00, 0xFFFFFC00, 0xE0000000 00000003, 0xFFC5001D # ex13trapc, chiplet vital, chip vital -@@ -187,10 +190,11 @@ - 0x1D010400, 0xFFFFF400, 0xE0000000 00000003, 0xFFC5001D # ex13traeco, chiplet vital, chip vital - 0x1D000000, 0xFD000000, 0x00000000 00000003, 0xFFC5001D # ex13vital, chiplet vital, chip vital - -- # Scom Ranges for ex12 -- 0x1C040000, 0xFFF40000, 0x80000000 00000003, 0xFFC5001C # ex12prv, chiplet vital, chip vital -- 0x1C030000, 0xFFF30000, 0x00000000 00000003, 0xFFC5001C # ex12vital, chiplet vital, chip vital -- 0x1C020000, 0xFFF20000, 0x80000000 00000003, 0xFFC5001C # ex12oha, chiplet vital, chip vital -+ # Scom Ranges for ex12 -+ 0x1C0F0000, 0xFFFF0000, 0x00000000 00000001, 0xFFC5001C # chip vital -+ 0x1C040000, 0xFFFF0000, 0x80000000 00000003, 0xFFC5001C # ex12prv, chiplet vital, chip vital -+ 0x1C030000, 0xFFFF0000, 0x00000000 00000003, 0xFFC5001C # ex12vital, chiplet vital, chip vital -+ 0x1C020000, 0xFFFF0000, 0x80000000 00000003, 0xFFC5001C # ex12oha, chiplet vital, chip vital - 0x1C013C00, 0xFFFFFC00, 0x60000000 00000003, 0xFFC5001C # ex12pcsec, chiplet vital, chip vital - 0x1C013000, 0xFFFF3000, 0x60000000 00000003, 0xFFC5001C # ex12pc, chiplet vital, chip vital - 0x1C012C00, 0xFFFFFC00, 0xE0000000 00000003, 0xFFC5001C # ex12trapc, chiplet vital, chip vital -@@ -203,10 +207,11 @@ - 0x1C010400, 0xFFFFF400, 0xE0000000 00000003, 0xFFC5001C # ex12traeco, chiplet vital, chip vital - 0x1C000000, 0xFC000000, 0x00000000 00000003, 0xFFC5001C # ex12vital, chiplet vital, chip vital - -- # Scom Ranges for ex11 -- 0x1B040000, 0xFFF40000, 0x80000000 00000003, 0xFFC5001B # ex11prv, chiplet vital, chip vital -- 0x1B030000, 0xFFF30000, 0x00000000 00000003, 0xFFC5001B # ex11vital, chiplet vital, chip vital -- 0x1B020000, 0xFFF20000, 0x80000000 00000003, 0xFFC5001B # ex11oha, chiplet vital, chip vital -+ # Scom Ranges for ex11 -+ 0x1B0F0000, 0xFFFF0000, 0x00000000 00000001, 0xFFC5001B # chip vital -+ 0x1B040000, 0xFFFF0000, 0x80000000 00000003, 0xFFC5001B # ex11prv, chiplet vital, chip vital -+ 0x1B030000, 0xFFFF0000, 0x00000000 00000003, 0xFFC5001B # ex11vital, chiplet vital, chip vital -+ 0x1B020000, 0xFFFF0000, 0x80000000 00000003, 0xFFC5001B # ex11oha, chiplet vital, chip vital - 0x1B013C00, 0xFFFFFC00, 0x60000000 00000003, 0xFFC5001B # ex11pcsec, chiplet vital, chip vital - 0x1B013000, 0xFFFF3000, 0x60000000 00000003, 0xFFC5001B # ex11pc, chiplet vital, chip vital - 0x1B012C00, 0xFFFFFC00, 0xE0000000 00000003, 0xFFC5001B # ex11trapc, chiplet vital, chip vital -@@ -219,9 +224,10 @@ - 0x1B010400, 0xFFFFF400, 0xE0000000 00000003, 0xFFC5001B # ex11traeco, chiplet vital, chip vital - - # Scom Ranges for ex10 -- 0x1A040000, 0xFFF40000, 0x80000000 00000003, 0xFFC5001A # ex10prv, chiplet vital, chip vital -- 0x1A030000, 0xFFF30000, 0x00000000 00000003, 0xFFC5001A # ex10vital, chiplet vital, chip vital -- 0x1A020000, 0xFFF20000, 0x80000000 00000003, 0xFFC5001A # ex10oha, chiplet vital, chip vital -+ 0x1A0F0000, 0xFFFF0000, 0x00000000 00000001, 0xFFC5001A # chip vital -+ 0x1A040000, 0xFFFF0000, 0x80000000 00000003, 0xFFC5001A # ex10prv, chiplet vital, chip vital -+ 0x1A030000, 0xFFFF0000, 0x00000000 00000003, 0xFFC5001A # ex10vital, chiplet vital, chip vital -+ 0x1A020000, 0xFFFF0000, 0x80000000 00000003, 0xFFC5001A # ex10oha, chiplet vital, chip vital - 0x1A013C00, 0xFFFFFC00, 0x60000000 00000003, 0xFFC5001A # ex10pcsec, chiplet vital, chip vital - 0x1A013000, 0xFFFF3000, 0x60000000 00000003, 0xFFC5001A # ex10pc, chiplet vital, chip vital - 0x1A012C00, 0xFFFFFC00, 0xE0000000 00000003, 0xFFC5001A # ex10trapc, chiplet vital, chip vital -@@ -234,9 +240,10 @@ - 0x1A010400, 0xFFFFF400, 0xE0000000 00000003, 0xFFC5001A # ex10traeco, chiplet vital, chip vital - - # Scom Ranges for ex09 -- 0x19040000, 0xFFF40000, 0x80000000 00000003, 0xFFC50019 # ex09prv, chiplet vital, chip vital -- 0x19030000, 0xFFF30000, 0x00000000 00000003, 0xFFC50019 # ex09vital, chiplet vital, chip vital -- 0x19020000, 0xFFF20000, 0x80000000 00000003, 0xFFC50019 # ex09oha, chiplet vital, chip vital -+ 0x190F0000, 0xFFFF0000, 0x00000000 00000001, 0xFFC50019 # chip vital -+ 0x19040000, 0xFFFF0000, 0x80000000 00000003, 0xFFC50019 # ex09prv, chiplet vital, chip vital -+ 0x19030000, 0xFFFF0000, 0x00000000 00000003, 0xFFC50019 # ex09vital, chiplet vital, chip vital -+ 0x19020000, 0xFFFF0000, 0x80000000 00000003, 0xFFC50019 # ex09oha, chiplet vital, chip vital - 0x19013C00, 0xFFFFFC00, 0x60000000 00000003, 0xFFC50019 # ex09pcsec, chiplet vital, chip vital - 0x19013000, 0xFFFF3000, 0x60000000 00000003, 0xFFC50019 # ex09pc, chiplet vital, chip vital - 0x19012C00, 0xFFFFFC00, 0xE0000000 00000003, 0xFFC50019 # ex09trapc, chiplet vital, chip vital -@@ -249,9 +256,10 @@ - 0x19010400, 0xFFFFF400, 0xE0000000 00000003, 0xFFC50019 # ex09traeco, chiplet vital, chip vital - - # Scom Ranges for ex06 -- 0x16040000, 0xFFF40000, 0x80000000 00000003, 0xFFC50016 # ex06prv, chiplet vital, chip vital -- 0x16030000, 0xFFF30000, 0x00000000 00000003, 0xFFC50016 # ex06vital, chiplet vital, chip vital -- 0x16020000, 0xFFF20000, 0x80000000 00000003, 0xFFC50016 # ex06oha, chiplet vital, chip vital -+ 0x160F0000, 0xFFFF0000, 0x00000000 00000001, 0xFFC50016 # chip vital -+ 0x16040000, 0xFFFF0000, 0x80000000 00000003, 0xFFC50016 # ex06prv, chiplet vital, chip vital -+ 0x16030000, 0xFFFF0000, 0x00000000 00000003, 0xFFC50016 # ex06vital, chiplet vital, chip vital -+ 0x16020000, 0xFFFF0000, 0x80000000 00000003, 0xFFC50016 # ex06oha, chiplet vital, chip vital - 0x16013C00, 0xFFFFFC00, 0x60000000 00000003, 0xFFC50016 # ex06pcsec, chiplet vital, chip vital - 0x16013000, 0xFFFF3000, 0x60000000 00000003, 0xFFC50016 # ex06pc, chiplet vital, chip vital - 0x16012C00, 0xFFFFFC00, 0xE0000000 00000003, 0xFFC50016 # ex06trapc, chiplet vital, chip vital -@@ -265,9 +273,10 @@ - 0x16000000, 0xF6000000, 0x00000000 00000003, 0xFFC50016 # ex06vital, chiplet vital, chip vital - - # Scom Ranges for ex05 -- 0x15040000, 0xFFF40000, 0x80000000 00000003, 0xFFC50015 # ex05prv, chiplet vital, chip vital -- 0x15030000, 0xFFF30000, 0x00000000 00000003, 0xFFC50015 # ex05vital, chiplet vital, chip vital -- 0x15020000, 0xFFF20000, 0x80000000 00000003, 0xFFC50015 # ex05oha, chiplet vital, chip vital -+ 0x150F0000, 0xFFFF0000, 0x00000000 00000001, 0xFFC50015 # chip vital -+ 0x15040000, 0xFFFF0000, 0x80000000 00000003, 0xFFC50015 # ex05prv, chiplet vital, chip vital -+ 0x15030000, 0xFFFF0000, 0x00000000 00000003, 0xFFC50015 # ex05vital, chiplet vital, chip vital -+ 0x15020000, 0xFFFF0000, 0x80000000 00000003, 0xFFC50015 # ex05oha, chiplet vital, chip vital - 0x15013C00, 0xFFFFFC00, 0x60000000 00000003, 0xFFC50015 # ex05pcsec, chiplet vital, chip vital - 0x15013000, 0xFFFF3000, 0x60000000 00000003, 0xFFC50015 # ex05pc, chiplet vital, chip vital - 0x15012C00, 0xFFFFFC00, 0xE0000000 00000003, 0xFFC50015 # ex05trapc, chiplet vital, chip vital -@@ -280,10 +289,11 @@ - 0x15010400, 0xFFFFF400, 0xE0000000 00000003, 0xFFC50015 # ex05traeco, chiplet vital, chip vital - 0x15000000, 0xF5000000, 0x00000000 00000003, 0xFFC50015 # ex05vital, chiplet vital, chip vital - -- # Scom Ranges for ex04 -- 0x14040000, 0xFFF40000, 0x80000000 00000003, 0xFFC50014 # ex04prv, chiplet vital, chip vital -- 0x14030000, 0xFFF30000, 0x00000000 00000003, 0xFFC50014 # ex04vital, chiplet vital, chip vital -- 0x14020000, 0xFFF20000, 0x80000000 00000003, 0xFFC50014 # ex04oha, chiplet vital, chip vital -+ # Scom Ranges for ex04 -+ 0x140F0000, 0xFFFF0000, 0x00000000 00000001, 0xFFC50014 # chip vital -+ 0x14040000, 0xFFFF0000, 0x80000000 00000003, 0xFFC50014 # ex04prv, chiplet vital, chip vital -+ 0x14030000, 0xFFFF0000, 0x00000000 00000003, 0xFFC50014 # ex04vital, chiplet vital, chip vital -+ 0x14020000, 0xFFFF0000, 0x80000000 00000003, 0xFFC50014 # ex04oha, chiplet vital, chip vital - 0x14013C00, 0xFFFFFC00, 0x60000000 00000003, 0xFFC50014 # ex04pcsec, chiplet vital, chip vital - 0x14013000, 0xFFFF3000, 0x60000000 00000003, 0xFFC50014 # ex04pc, chiplet vital, chip vital - 0x14012C00, 0xFFFFFC00, 0xE0000000 00000003, 0xFFC50014 # ex04trapc, chiplet vital, chip vital -@@ -297,9 +307,10 @@ - 0x14000000, 0xF4000000, 0x00000000 00000003, 0xFFC50014 # ex04vital, chiplet vital, chip vital - - # Scom Ranges for ex03 -- 0x13040000, 0xFFF40000, 0x80000000 00000003, 0xFFC50013 # ex03prv, chiplet vital, chip vital -- 0x13030000, 0xFFF30000, 0x00000000 00000003, 0xFFC50013 # ex03vital, chiplet vital, chip vital -- 0x13020000, 0xFFF20000, 0x80000000 00000003, 0xFFC50013 # ex03oha, chiplet vital, chip vital -+ 0x130F0000, 0xFFFF0000, 0x00000000 00000001, 0xFFC50013 # chip vital -+ 0x13040000, 0xFFFF0000, 0x80000000 00000003, 0xFFC50013 # ex03prv, chiplet vital, chip vital -+ 0x13030000, 0xFFFF0000, 0x00000000 00000003, 0xFFC50013 # ex03vital, chiplet vital, chip vital -+ 0x13020000, 0xFFFF0000, 0x80000000 00000003, 0xFFC50013 # ex03oha, chiplet vital, chip vital - 0x13013C00, 0xFFFFFC00, 0x60000000 00000003, 0xFFC50013 # ex03pcsec, chiplet vital, chip vital - 0x13013000, 0xFFFF3000, 0x60000000 00000003, 0xFFC50013 # ex03pc, chiplet vital, chip vital - 0x13012C00, 0xFFFFFC00, 0xE0000000 00000003, 0xFFC50013 # ex03trapc, chiplet vital, chip vital -@@ -312,9 +323,10 @@ - 0x13010400, 0xFFFFF400, 0xE0000000 00000003, 0xFFC50013 # ex03traeco, chiplet vital, chip vital - - # Scom Ranges for ex02 -- 0x12040000, 0xFFF40000, 0x80000000 00000003, 0xFFC50012 # ex02prv, chiplet vital, chip vital -- 0x12030000, 0xFFF30000, 0x00000000 00000003, 0xFFC50012 # ex02vital, chiplet vital, chip vital -- 0x12020000, 0xFFF20000, 0x80000000 00000003, 0xFFC50012 # ex02oha, chiplet vital, chip vital -+ 0x120F0000, 0xFFFF0000, 0x00000000 00000001, 0xFFC50012 # chip vital -+ 0x12040000, 0xFFFF0000, 0x80000000 00000003, 0xFFC50012 # ex02prv, chiplet vital, chip vital -+ 0x12030000, 0xFFFF0000, 0x00000000 00000003, 0xFFC50012 # ex02vital, chiplet vital, chip vital -+ 0x12020000, 0xFFFF0000, 0x80000000 00000003, 0xFFC50012 # ex02oha, chiplet vital, chip vital - 0x12013C00, 0xFFFFFC00, 0x60000000 00000003, 0xFFC50012 # ex02pcsec, chiplet vital, chip vital - 0x12013000, 0xFFFF3000, 0x60000000 00000003, 0xFFC50012 # ex02pc, chiplet vital, chip vital - 0x12012C00, 0xFFFFFC00, 0xE0000000 00000003, 0xFFC50012 # ex02trapc, chiplet vital, chip vital -@@ -327,9 +339,10 @@ - 0x12010400, 0xFFFFF400, 0xE0000000 00000003, 0xFFC50012 # ex02traeco, chiplet vital, chip vital - - # Scom Ranges for ex01 -- 0x11040000, 0xFFF40000, 0x80000000 00000003, 0xFFC50011 # ex01prv, chiplet vital, chip vital -- 0x11030000, 0xFFF30000, 0x00000000 00000003, 0xFFC50011 # ex01vital, chiplet vital, chip vital -- 0x11020000, 0xFFF20000, 0x80000000 00000003, 0xFFC50011 # ex01oha, chiplet vital, chip vital -+ 0x110F0000, 0xFFFF0000, 0x00000000 00000001, 0xFFC50011 # chip vital -+ 0x11040000, 0xFFFF0000, 0x80000000 00000003, 0xFFC50011 # ex01prv, chiplet vital, chip vital -+ 0x11030000, 0xFFFF0000, 0x00000000 00000003, 0xFFC50011 # ex01vital, chiplet vital, chip vital -+ 0x11020000, 0xFFFF0000, 0x80000000 00000003, 0xFFC50011 # ex01oha, chiplet vital, chip vital - 0x11013C00, 0xFFFFFC00, 0x60000000 00000003, 0xFFC50011 # ex01pcsec, chiplet vital, chip vital - 0x11013000, 0xFFFF3000, 0x60000000 00000003, 0xFFC50011 # ex01pc, chiplet vital, chip vital - 0x11012C00, 0xFFFFFC00, 0xE0000000 00000003, 0xFFC50011 # ex01trapc, chiplet vital, chip vital diff --git a/src/build/citest/etc/patches/p8_ex_l3purge.act b/src/build/citest/etc/patches/p8_ex_l3purge.act deleted file mode 100644 index 3d540b662..000000000 --- a/src/build/citest/etc/patches/p8_ex_l3purge.act +++ /dev/null @@ -1,9 +0,0 @@ - -# Indicate purge complete whenever a purge operation is requested. -CAUSE_EFFECT CHIPLETS ex{ - LABEL=[L3 PURGE REGISTER] - WATCH=[REG(MYCHIPLET,0x0001080e)] - - CAUSE: TARGET=[REG(MYCHIPLET,0x0001080e)] OP=[BIT,ON] BIT=[0] - EFFECT: TARGET=[REG(MYCHIPLET,0x0001080e)] OP=[BIT,OFF] BIT=[0] -} diff --git a/src/build/citest/etc/patches/p8_master.por b/src/build/citest/etc/patches/p8_master.por deleted file mode 100644 index 8fae70244..000000000 --- a/src/build/citest/etc/patches/p8_master.por +++ /dev/null @@ -1,2 +0,0 @@ -# Set Secure ROM address in TBROM_BASE_REG scom register -REG(0x02020017)=0x0003FFFF C0000000 #TBROM_BASE_REG Scom Register diff --git a/src/build/citest/etc/patches/patchlist.txt b/src/build/citest/etc/patches/patchlist.txt index d2bae7fdb..e4150cee3 100644 --- a/src/build/citest/etc/patches/patchlist.txt +++ b/src/build/citest/etc/patches/patchlist.txt @@ -5,14 +5,5 @@ Brief description of the problem or reason for patch -Files: list of files -Coreq: list of associated changes, e.g. workarounds.presimsetup -Update scom ranges for EX chips in p8.chip and s1.chip files --RTC: 82134 --CMVC: 892792 --Files: - src/build/citest/etc/workarounds.postsimsetup - src/build/citest/etc/patches/patchlist.txt - src/build/citest/etc/patches/p8.chip.p8_pfet_control.patch - src/build/citest/etc/patches/s1.chip.p8_pfet_control.patch --Coreq: None diff --git a/src/build/citest/etc/patches/s1.act.dmi_pll_lock_patch b/src/build/citest/etc/patches/s1.act.dmi_pll_lock_patch deleted file mode 100644 index ccef134e6..000000000 --- a/src/build/citest/etc/patches/s1.act.dmi_pll_lock_patch +++ /dev/null @@ -1,38 +0,0 @@ ---- s1.act_OLD 2013-01-31 08:45:48.124017093 -0600 -+++ s1.act 2013-01-31 08:50:03.124226895 -0600 -@@ -35,6 +35,8 @@ - # F865077 dsanner 01/04/13 Actions for EX based on Gard mask - # SW180860 thi 01/07/13 Actions for proc_start_clock_chiplets v1.10 - # D865847 andrewg 01/08/13 Set e0001, bit 0 in master to 0 on sbe start -+# D867908 andrewg 01/23/13 Fix clock states on proc 1 -+# SW185124 thi 01/31/13 Add dmi pll lock action - - CAUSE_EFFECT { - LABEL=[Assert all logic clock domains off when chip logic power asserted off] -@@ -83,7 +85,9 @@ - EFFECT: TARGET=[FSIMBOX(0x1C)] OP=[OR,BUF] DATA=[LITERAL(64,000FFFFF 00000000)] - - #Also has effect of causing clocks on -- EFFECT: TARGET=[REG(0x08030008)] OP=[EQUALTO,BUF] DATA=[LITERAL(64,000007FF FFFFFFFF)] -+ EFFECT: TARGET=[REG(0x08030008)] OP=[EQUALTO,BUF] DATA=[LITERAL(64,007FFFFF FFFFFFFF)] -+ EFFECT: TARGET=[REG(0x04030008)] OP=[EQUALTO,BUF] DATA=[LITERAL(64,00003FFF FFFFFFFF)] -+ EFFECT: TARGET=[REG(0x09030008)] OP=[EQUALTO,BUF] DATA=[LITERAL(64,000E07FF FFFFFFFF)] - EFFECT: TARGET=[LOGIC(0xFF000001)] OP=[EQUALTO,BUF] DATA=[LITERAL(64,0xFDB40000 0x00000001)] - EFFECT: TARGET=[LOGIC(0xFF0CC005)] OP=[BIT,ON] BIT=[1] #Trigger updates to EX state - } -@@ -870,13 +874,14 @@ - WATCH=[REG(0x020F0013)] - CAUSE: TARGET=[REG(0x020F0013)] OP=[EQUALTO,BUF] DATA=[LITERAL(64,F7FFFFFF FFFFFFFF)] - EFFECT: TARGET=[REG(0x020F0019)] OP=[BIT,ON] BIT=[0] # PLL Lock -+ EFFECT: TARGET=[REG(0x020F0019)] OP=[BIT,ON] BIT=[1] # PLL Lock - } - - CAUSE_EFFECT { - LABEL=[P8 PCIE PLL Lock] - WATCH=[REG(0x090F0013)] - CAUSE: TARGET=[REG(0x090F0013)] OP=[EQUALTO,BUF] DATA=[LITERAL(64,F7FFFFFF FFFFFFFF)] -- EFFECT: TARGET=[REG(0x090F0019)] OP=[BIT,ON] BIT=[0] # PLL Lock -+ EFFECT: TARGET=[REG(0x090F0019)] OP=[BIT,ON] BIT=[0] # PLL Lock - } - - ### END PLL Lock actions ### diff --git a/src/build/citest/etc/patches/s1.act_sbe_thread_count_patch b/src/build/citest/etc/patches/s1.act_sbe_thread_count_patch deleted file mode 100644 index 2d21f27ac..000000000 --- a/src/build/citest/etc/patches/s1.act_sbe_thread_count_patch +++ /dev/null @@ -1,12 +0,0 @@ -*** ORIG/s1.act 2013-06-28 14:54:22.409519345 -0500 ---- NEW/s1.act 2013-06-28 16:36:15.777409068 -0500 -*************** -*** 118,123 **** ---- 118,124 ---- - EFFECT: TARGET=[PROCREG(msr, 4, 6)] OP=[EQUALTO,BUF] DATA=[LITERAL(64,D0000000 00000000)]# MSR to default - EFFECT: TARGET=[PROCREG(nia, 4, 7)] OP=[EQUALTO,BUF] DATA=[LITERAL(64,00000000 00000100)]# NIA to default - EFFECT: TARGET=[PROCREG(msr, 4, 7)] OP=[EQUALTO,BUF] DATA=[LITERAL(64,D0000000 00000000)]# MSR to default -+ EFFECT: TARGET=[PROCREG(scratch, 4,7)] OP=[EQUALTO,BUF] DATA=[LITERAL(64,0000FF00 00000000)]# Thread Count - - #ds01 Discover the secure state and save it away - EFFECT: TARGET=[LOGIC(0xFF0CC004)] OP=[EQUALTO,BUF,MASK,SHIFT] DATA=[REG(0x00010005)] MASK=[LITERAL(64,80000000 00000000)] SHIFT=[63] diff --git a/src/build/citest/etc/patches/s1.chip.p8_pfet_control.patch b/src/build/citest/etc/patches/s1.chip.p8_pfet_control.patch deleted file mode 100644 index 13578cef9..000000000 --- a/src/build/citest/etc/patches/s1.chip.p8_pfet_control.patch +++ /dev/null @@ -1,94 +0,0 @@ ---- s1.chip.build 2013-08-20 12:00:27.105810289 -0500 -+++ s1.chip.new 2013-08-20 11:04:04.104091652 -0500 -@@ -21,6 +21,7 @@ - # F877027 sankarkk 03/25/13 Updated scom ranges - # SW201429 bradleyb 05/03/13 fix scan range clock masks - # F884180 dkodihal 05/21/13 Updated SCANRANGE with fastarray rings -+# D892792 jknight 08/20/13 Updated SCOM ranges - - VERSION 1 # .chip file format ID - TYPE=s1 # Chip Type -@@ -131,9 +132,10 @@ - SCOMRANGE # Value, Mask, Clocks, Logical Address - - # Scom Ranges for ex14 -- 0x1E040000, 0xFFF40000, 0x80000000 00000003, 0xFFC5001E # ex14prv, chiplet vital, chip vital -- 0x1E030000, 0xFFF30000, 0x00000000 00000003, 0xFFC5001E # ex14vital, chiplet vital, chip vital -- 0x1E020000, 0xFFF20000, 0x80000000 00000003, 0xFFC5001E # ex14oha, chiplet vital, chip vital -+ 0x1E0F0000, 0xFFFF0000, 0x00000000 00000001, 0xFFC5001E # chip vital -+ 0x1E040000, 0xFFFF0000, 0x80000000 00000003, 0xFFC5001E # ex14prv, chiplet vital, chip vital -+ 0x1E030000, 0xFFFF0000, 0x00000000 00000003, 0xFFC5001E # ex14vital, chiplet vital, chip vital -+ 0x1E020000, 0xFFFF0000, 0x80000000 00000003, 0xFFC5001E # ex14oha, chiplet vital, chip vital - 0x1E013C00, 0xFFFFFC00, 0x60000000 00000003, 0xFFC5001E # ex14pcsec, chiplet vital, chip vital - 0x1E013000, 0xFFFF3000, 0x60000000 00000003, 0xFFC5001E # ex14pc, chiplet vital, chip vital - 0x1E012C00, 0xFFFFFC00, 0xE0000000 00000003, 0xFFC5001E # ex14trapc, chiplet vital, chip vital -@@ -147,9 +149,10 @@ - 0x1E000000, 0xFE000000, 0x00000000 00000003, 0xFFC5001E # ex14vital, chiplet vital, chip vital - - # Scom Ranges for ex13 -- 0x1D040000, 0xFFF40000, 0x80000000 00000003, 0xFFC5001D # ex13prv, chiplet vital, chip vital -- 0x1D030000, 0xFFF30000, 0x00000000 00000003, 0xFFC5001D # ex13vital, chiplet vital, chip vital -- 0x1D020000, 0xFFF20000, 0x80000000 00000003, 0xFFC5001D # ex13oha, chiplet vital, chip vital -+ 0x1D0F0000, 0xFFFF0000, 0x00000000 00000001, 0xFFC5001D # chip vital -+ 0x1D040000, 0xFFFF0000, 0x80000000 00000003, 0xFFC5001D # ex13prv, chiplet vital, chip vital -+ 0x1D030000, 0xFFFF0000, 0x00000000 00000003, 0xFFC5001D # ex13vital, chiplet vital, chip vital -+ 0x1D020000, 0xFFFF0000, 0x80000000 00000003, 0xFFC5001D # ex13oha, chiplet vital, chip vital - 0x1D013C00, 0xFFFFFC00, 0x60000000 00000003, 0xFFC5001D # ex13pcsec, chiplet vital, chip vital - 0x1D013000, 0xFFFF3000, 0x60000000 00000003, 0xFFC5001D # ex13pc, chiplet vital, chip vital - 0x1D012C00, 0xFFFFFC00, 0xE0000000 00000003, 0xFFC5001D # ex13trapc, chiplet vital, chip vital -@@ -163,9 +166,10 @@ - 0x1D000000, 0xFD000000, 0x00000000 00000003, 0xFFC5001D # ex13vital, chiplet vital, chip vital - - # Scom Ranges for ex12 -- 0x1C040000, 0xFFF40000, 0x80000000 00000003, 0xFFC5001C # ex12prv, chiplet vital, chip vital -- 0x1C030000, 0xFFF30000, 0x00000000 00000003, 0xFFC5001C # ex12vital, chiplet vital, chip vital -- 0x1C020000, 0xFFF20000, 0x80000000 00000003, 0xFFC5001C # ex12oha, chiplet vital, chip vital -+ 0x1C0F0000, 0xFFFF0000, 0x00000000 00000001, 0xFFC5001C # chip vital -+ 0x1C040000, 0xFFFF0000, 0x80000000 00000003, 0xFFC5001C # ex12prv, chiplet vital, chip vital -+ 0x1C030000, 0xFFFF0000, 0x00000000 00000003, 0xFFC5001C # ex12vital, chiplet vital, chip vital -+ 0x1C020000, 0xFFFF0000, 0x80000000 00000003, 0xFFC5001C # ex12oha, chiplet vital, chip vital - 0x1C013C00, 0xFFFFFC00, 0x60000000 00000003, 0xFFC5001C # ex12pcsec, chiplet vital, chip vital - 0x1C013000, 0xFFFF3000, 0x60000000 00000003, 0xFFC5001C # ex12pc, chiplet vital, chip vital - 0x1C012C00, 0xFFFFFC00, 0xE0000000 00000003, 0xFFC5001C # ex12trapc, chiplet vital, chip vital -@@ -179,9 +183,10 @@ - 0x1C000000, 0xFC000000, 0x00000000 00000003, 0xFFC5001C # ex12vital, chiplet vital, chip vital - - # Scom Ranges for ex06 -- 0x16040000, 0xFFF40000, 0x80000000 00000003, 0xFFC50016 # ex06prv, chiplet vital, chip vital -- 0x16030000, 0xFFF30000, 0x00000000 00000003, 0xFFC50016 # ex06vital, chiplet vital, chip vital -- 0x16020000, 0xFFF20000, 0x80000000 00000003, 0xFFC50016 # ex06oha, chiplet vital, chip vital -+ 0x160F0000, 0xFFFF0000, 0x00000000 00000001, 0xFFC50016 # chip vital -+ 0x16040000, 0xFFFF0000, 0x80000000 00000003, 0xFFC50016 # ex06prv, chiplet vital, chip vital -+ 0x16030000, 0xFFFF0000, 0x00000000 00000003, 0xFFC50016 # ex06vital, chiplet vital, chip vital -+ 0x16020000, 0xFFFF0000, 0x80000000 00000003, 0xFFC50016 # ex06oha, chiplet vital, chip vital - 0x16013C00, 0xFFFFFC00, 0x60000000 00000003, 0xFFC50016 # ex06pcsec, chiplet vital, chip vital - 0x16013000, 0xFFFF3000, 0x60000000 00000003, 0xFFC50016 # ex06pc, chiplet vital, chip vital - 0x16012C00, 0xFFFFFC00, 0xE0000000 00000003, 0xFFC50016 # ex06trapc, chiplet vital, chip vital -@@ -195,9 +200,10 @@ - 0x16000000, 0xF6000000, 0x00000000 00000003, 0xFFC50016 # ex06vital, chiplet vital, chip vital - - # Scom Ranges for ex05 -- 0x15040000, 0xFFF40000, 0x80000000 00000003, 0xFFC50015 # ex05prv, chiplet vital, chip vital -- 0x15030000, 0xFFF30000, 0x00000000 00000003, 0xFFC50015 # ex05vital, chiplet vital, chip vital -- 0x15020000, 0xFFF20000, 0x80000000 00000003, 0xFFC50015 # ex05oha, chiplet vital, chip vital -+ 0x150F0000, 0xFFFF0000, 0x00000000 00000001, 0xFFC50015 # chip vital -+ 0x15040000, 0xFFFF0000, 0x80000000 00000003, 0xFFC50015 # ex05prv, chiplet vital, chip vital -+ 0x15030000, 0xFFFF0000, 0x00000000 00000003, 0xFFC50015 # ex05vital, chiplet vital, chip vital -+ 0x15020000, 0xFFFF0000, 0x80000000 00000003, 0xFFC50015 # ex05oha, chiplet vital, chip vital - 0x15013C00, 0xFFFFFC00, 0x60000000 00000003, 0xFFC50015 # ex05pcsec, chiplet vital, chip vital - 0x15013000, 0xFFFF3000, 0x60000000 00000003, 0xFFC50015 # ex05pc, chiplet vital, chip vital - 0x15012C00, 0xFFFFFC00, 0xE0000000 00000003, 0xFFC50015 # ex05trapc, chiplet vital, chip vital -@@ -211,9 +217,10 @@ - 0x15000000, 0xF5000000, 0x00000000 00000003, 0xFFC50015 # ex05vital, chiplet vital, chip vital - - # Scom Ranges for ex04 -- 0x14040000, 0xFFF40000, 0x80000000 00000003, 0xFFC50014 # ex04prv, chiplet vital, chip vital -- 0x14030000, 0xFFF30000, 0x00000000 00000003, 0xFFC50014 # ex04vital, chiplet vital, chip vital -- 0x14020000, 0xFFF20000, 0x80000000 00000003, 0xFFC50014 # ex04oha, chiplet vital, chip vital -+ 0x140F0000, 0xFFFF0000, 0x00000000 00000001, 0xFFC50014 # chip vital -+ 0x14040000, 0xFFFF0000, 0x80000000 00000003, 0xFFC50014 # ex04prv, chiplet vital, chip vital -+ 0x14030000, 0xFFFF0000, 0x00000000 00000003, 0xFFC50014 # ex04vital, chiplet vital, chip vital -+ 0x14020000, 0xFFFF0000, 0x80000000 00000003, 0xFFC50014 # ex04oha, chiplet vital, chip vital - 0x14013C00, 0xFFFFFC00, 0x60000000 00000003, 0xFFC50014 # ex04pcsec, chiplet vital, chip vital - 0x14013000, 0xFFFF3000, 0x60000000 00000003, 0xFFC50014 # ex04pc, chiplet vital, chip vital - 0x14012C00, 0xFFFFFC00, 0xE0000000 00000003, 0xFFC50014 # ex04trapc, chiplet vital, chip vital diff --git a/src/build/citest/etc/workarounds.postsimsetup b/src/build/citest/etc/workarounds.postsimsetup index e281fb183..d335f723b 100755 --- a/src/build/citest/etc/workarounds.postsimsetup +++ b/src/build/citest/etc/workarounds.postsimsetup @@ -32,9 +32,3 @@ #cp $BACKING_BUILD/src/simu/data/cec-chip/base_cec_chip_file $sb/simu/data/cec-chip #patch -p0 $sb/simu/data/cec-chip/base_cec_chip_file $HOSTBOOTROOT/src/build/citest/etc/patches/my_patch_File -echo "+++ Updating scomm address ranges for p8_pfet_control in simcs" -mkdir -p $sb/simu/data/cec-chip/ -cp $BACKING_BUILD/src/simu/data/cec-chip/s1.chip $sb/simu/data/cec-chip/ -cp $BACKING_BUILD/src/simu/data/cec-chip/p8.chip $sb/simu/data/cec-chip/ -patch -p0 $sb/simu/data/cec-chip/s1.chip $HOSTBOOTROOT/src/build/citest/etc/patches/s1.chip.p8_pfet_control.patch -patch -p0 $sb/simu/data/cec-chip/p8.chip $HOSTBOOTROOT/src/build/citest/etc/patches/p8.chip.p8_pfet_control.patch |
