diff options
author | Corey Swenson <cswenson@us.ibm.com> | 2019-08-19 12:05:44 -0500 |
---|---|---|
committer | Daniel M Crowell <dcrowell@us.ibm.com> | 2019-09-12 13:43:15 -0500 |
commit | 26c32cba61641b57dd3dbe93e20c40dd26441613 (patch) | |
tree | 530bcb52ed8b99fa773b6771e48b5da97f1be4ef | |
parent | e85d6dd64ec3e21d4823416cc4c95d801794730a (diff) | |
download | talos-hostboot-26c32cba61641b57dd3dbe93e20c40dd26441613.tar.gz talos-hostboot-26c32cba61641b57dd3dbe93e20c40dd26441613.zip |
NVDIMM: Additional FFDC for NVDIMM/BPM callouts
Add page 4 SMART regs to error log FFDC
for all NVDIMM HW errors. Add attribute to
prevent recursively executing the function.
Change-Id: I2cdd89436a2647c440f900a729596b522829aca6
CQ:SW470690
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/82599
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M Crowell <dcrowell@us.ibm.com>
-rw-r--r-- | src/include/usr/isteps/nvdimm/nvdimm.H | 21 | ||||
-rw-r--r-- | src/usr/isteps/nvdimm/bpm_update.C | 22 | ||||
-rw-r--r-- | src/usr/isteps/nvdimm/nvdimm.C | 103 | ||||
-rw-r--r-- | src/usr/isteps/nvdimm/nvdimm.H | 6 | ||||
-rw-r--r-- | src/usr/isteps/nvdimm/nvdimm_update.C | 12 | ||||
-rw-r--r-- | src/usr/isteps/nvdimm/runtime/nvdimm_rt.C | 6 | ||||
-rwxr-xr-x | src/usr/targeting/common/xmltohb/attribute_types_hb.xml | 17 | ||||
-rw-r--r-- | src/usr/targeting/common/xmltohb/target_types_hb.xml | 3 |
8 files changed, 189 insertions, 1 deletions
diff --git a/src/include/usr/isteps/nvdimm/nvdimm.H b/src/include/usr/isteps/nvdimm/nvdimm.H index 9d5e3c0e0..9512e5c89 100644 --- a/src/include/usr/isteps/nvdimm/nvdimm.H +++ b/src/include/usr/isteps/nvdimm/nvdimm.H @@ -316,6 +316,27 @@ errlHndl_t notifyNvdimmProtectionChange(TARGETING::Target* i_target, const nvdimm_protection_t i_state); /** + * @brief Function to add some NVDIMM Page 4 status regs to errorlog FFDC + * PANIC_CNT Counts FPGA firmware events + * PARITY_ERROR_COUNT Counts FPGA SRAM parity errors + * FLASH_ERROR_COUNT0 Counts FLASH read/write errors + * FLASH_ERROR_COUNT1 + * FLASH_ERROR_COUNT2 + * FLASH_BAD_BLOCK_COUNT0 Counts bad blocks within the flash array + * FLASH_BAD_BLOCK_COUNT1 + * SCAP_STATUS BackupPowerModule/SuperCap state + * STATUS_EVENT_INT_INFO1 NVDIMM error info + * STATUS_EVENT_INT_INFO2 + * + * @param[in] i_nvdimm - nvdimm target + * + * @param[inout] io_err - error log to add FFDC data + * + */ +void nvdimmAddPage4Regs(TARGETING::Target *i_nvdimm, errlHndl_t& io_err); + + +/** * @brief Entry function to NVDIMM initialization * - Checks for ready state * - Waits for the ongoing backup to complete diff --git a/src/usr/isteps/nvdimm/bpm_update.C b/src/usr/isteps/nvdimm/bpm_update.C index b817efb6e..76704c1c7 100644 --- a/src/usr/isteps/nvdimm/bpm_update.C +++ b/src/usr/isteps/nvdimm/bpm_update.C @@ -27,6 +27,7 @@ #include "bpm_update.H" #include "nvdimm_update.H" +#include <isteps/nvdimm/nvdimm.H> #include <errl/hberrltypes.H> #include <errl/errlmanager.H> #include <endian.h> @@ -737,6 +738,7 @@ errlHndl_t Bpm::issueCommand(const uint8_t i_command, HWAS::BPM_PART_TYPE, HWAS::SRCI_PRIORITY_HIGH); errl->collectTrace(BPM_COMP_NAME); + nvdimmAddPage4Regs(iv_nvdimm,errl); break; } @@ -864,6 +866,7 @@ errlHndl_t Bpm::issueCommand(const uint8_t i_command, HWAS::BPM_PART_TYPE, HWAS::SRCI_PRIORITY_HIGH); errl->collectTrace(BPM_COMP_NAME); + nvdimmAddPage4Regs(iv_nvdimm,errl); break; } } @@ -1185,6 +1188,7 @@ errlHndl_t Bpm::inUpdateMode() HWAS::BPM_PART_TYPE, HWAS::SRCI_PRIORITY_HIGH); errl->collectTrace(BPM_COMP_NAME); + nvdimmAddPage4Regs(iv_nvdimm,errl); break; } @@ -1247,6 +1251,7 @@ errlHndl_t Bpm::enterUpdateMode() BPM_RC::BPM_ENTER_UPDATE_MODE, TARGETING::get_huid(iv_nvdimm)); infoErrl->collectTrace(BPM_COMP_NAME); + nvdimmAddPage4Regs(iv_nvdimm,errl); ERRORLOG::errlCommit(infoErrl, BPM_COMP_ID); } while(0); @@ -1340,6 +1345,7 @@ errlHndl_t Bpm::exitUpdateMode() HWAS::BPM_PART_TYPE, HWAS::SRCI_PRIORITY_HIGH); infoErrl->collectTrace(BPM_COMP_NAME); + nvdimmAddPage4Regs(iv_nvdimm,errl); ERRORLOG::errlCommit(infoErrl, BPM_COMP_ID); } while(0); @@ -1501,6 +1507,7 @@ errlHndl_t Bpm::updateFirmware(BpmFirmwareLidImage i_image) HWAS::BPM_PART_TYPE, HWAS::SRCI_PRIORITY_HIGH); errl->collectTrace(BPM_COMP_NAME); + nvdimmAddPage4Regs(iv_nvdimm,errl); // Change the state of iv_attemptAnotherUpdate to signal // if another update attempt should occur. @@ -1692,6 +1699,7 @@ errlHndl_t Bpm::enterBootstrapLoaderMode() HWAS::BPM_PART_TYPE, HWAS::SRCI_PRIORITY_HIGH); errl->collectTrace(BPM_COMP_NAME); + nvdimmAddPage4Regs(iv_nvdimm,errl); break; } @@ -1786,6 +1794,7 @@ errlHndl_t Bpm::setupPayload(payload_t & o_payload, MAX_PAYLOAD_DATA_SIZE), TARGETING::get_huid(iv_nvdimm)); errl->collectTrace(BPM_COMP_NAME); + nvdimmAddPage4Regs(iv_nvdimm,errl); break; } @@ -2131,6 +2140,7 @@ errlHndl_t Bpm::writeViaScapRegister(uint8_t const i_reg, uint8_t const i_data) HWAS::BPM_PART_TYPE, HWAS::SRCI_PRIORITY_HIGH); errl->collectTrace(BPM_COMP_NAME); + nvdimmAddPage4Regs(iv_nvdimm,errl); break; } @@ -2225,6 +2235,7 @@ errlHndl_t Bpm::writeViaScapRegister(uint8_t const i_reg, uint8_t const i_data) HWAS::BPM_PART_TYPE, HWAS::SRCI_PRIORITY_HIGH); errl->collectTrace(BPM_COMP_NAME); + nvdimmAddPage4Regs(iv_nvdimm,errl); break; } @@ -2296,6 +2307,7 @@ errlHndl_t Bpm::disableWriteProtection() HWAS::BPM_PART_TYPE, HWAS::SRCI_PRIORITY_HIGH); errl->collectTrace(BPM_COMP_NAME); + nvdimmAddPage4Regs(iv_nvdimm,errl); break; } @@ -2469,6 +2481,7 @@ errlHndl_t Bpm::writeToMagicRegisters( HWAS::BPM_PART_TYPE, HWAS::SRCI_PRIORITY_HIGH); errl->collectTrace(BPM_COMP_NAME); + nvdimmAddPage4Regs(iv_nvdimm,errl); break; } @@ -2564,6 +2577,7 @@ errlHndl_t Bpm::dumpSegment(uint16_t const i_segmentCode, HWAS::BPM_PART_TYPE, HWAS::SRCI_PRIORITY_HIGH); errl->collectTrace(BPM_COMP_NAME); + nvdimmAddPage4Regs(iv_nvdimm,errl); break; } @@ -2687,6 +2701,7 @@ errlHndl_t Bpm::dumpSegment(uint16_t const i_segmentCode, HWAS::BPM_PART_TYPE, HWAS::SRCI_PRIORITY_HIGH); errl->collectTrace(BPM_COMP_NAME); + nvdimmAddPage4Regs(iv_nvdimm,errl); setAttemptAnotherUpdate(); break; } @@ -3153,6 +3168,7 @@ errlHndl_t Bpm::getResponse(uint8_t * const o_responseData, HWAS::BPM_PART_TYPE, HWAS::SRCI_PRIORITY_HIGH); errl->collectTrace(BPM_COMP_NAME); + nvdimmAddPage4Regs(iv_nvdimm,errl); break; } @@ -3415,6 +3431,7 @@ errlHndl_t Bpm::blockWriteRetry(payload_t i_payload) HWAS::BPM_PART_TYPE, HWAS::SRCI_PRIORITY_HIGH); errl->collectTrace(BPM_COMP_NAME); + nvdimmAddPage4Regs(iv_nvdimm,errl); } @@ -3486,6 +3503,7 @@ errlHndl_t Bpm::waitForCommandStatusBitReset( HWAS::BPM_PART_TYPE, HWAS::SRCI_PRIORITY_HIGH); errl->collectTrace(BPM_COMP_NAME); + nvdimmAddPage4Regs(iv_nvdimm,errl); break; } @@ -3528,6 +3546,7 @@ errlHndl_t Bpm::waitForCommandStatusBitReset( error, TARGETING::get_huid(iv_nvdimm)); errl->collectTrace(BPM_COMP_NAME); + nvdimmAddPage4Regs(iv_nvdimm,errl); break; } @@ -3591,6 +3610,7 @@ errlHndl_t Bpm::verifyGoodBpmState() TARGETING::get_huid(iv_nvdimm), status.full); errl->collectTrace(BPM_COMP_NAME); + nvdimmAddPage4Regs(iv_nvdimm,errl); } return errl; @@ -3643,6 +3663,7 @@ errlHndl_t Bpm::waitForBusyBit() BPM_RC::BPM_EXCEEDED_RETRY_LIMIT, TARGETING::get_huid(iv_nvdimm)); errl->collectTrace(BPM_COMP_NAME); + nvdimmAddPage4Regs(iv_nvdimm,errl); break; } @@ -3950,6 +3971,7 @@ errlHndl_t Bpm::checkFirmwareCrc() responseData[2], 0), TARGETING::get_huid(iv_nvdimm)); + nvdimmAddPage4Regs(iv_nvdimm,errl); break; } diff --git a/src/usr/isteps/nvdimm/nvdimm.C b/src/usr/isteps/nvdimm/nvdimm.C index 06f666c5c..3e9867ebe 100644 --- a/src/usr/isteps/nvdimm/nvdimm.C +++ b/src/usr/isteps/nvdimm/nvdimm.C @@ -28,6 +28,7 @@ #include <errl/errlentry.H> #include <errl/errlmanager.H> #include <errl/errludtarget.H> +#include <errl/errludlogregister.H> #include <targeting/common/commontargeting.H> #include <targeting/common/util.H> #include <targeting/common/utilFilter.H> @@ -293,6 +294,11 @@ errlHndl_t nvdimmReadReg(Target* i_nvdimm, DEVICE_NVDIMM_RAW_ADDRESS(l_reg_addr)); }while(0); + if (l_err) + { + nvdimmAddPage4Regs(i_nvdimm,l_err); + } + TRACUCOMP(g_trac_nvdimm, EXIT_MRK"NVDIMM Read HUID 0x%X, page 0x%X, addr 0x%X = 0x%X", get_huid(i_nvdimm), l_reg_page, l_reg_addr, o_data); @@ -363,6 +369,11 @@ errlHndl_t nvdimmWriteReg(Target* i_nvdimm, DEVICE_NVDIMM_RAW_ADDRESS(l_reg_addr)); }while(0); + if (l_err) + { + nvdimmAddPage4Regs(i_nvdimm,l_err); + } + TRACUCOMP(g_trac_nvdimm, EXIT_MRK"NVDIMM Write HUID 0x%X, page = 0x%X, addr 0x%X = 0x%X", get_huid(i_nvdimm), l_reg_page, l_reg_addr, i_data); @@ -563,6 +574,7 @@ errlHndl_t nvdimmReady(Target *i_nvdimm) // Add Register Traces to error log NVDIMM::UdNvdimmOPParms( l_RegInfo ).addToLog(l_err); + nvdimmAddPage4Regs(i_nvdimm,l_err); } }while(0); @@ -694,6 +706,7 @@ errlHndl_t nvdimmPollStatus ( Target *i_nvdimm, ERRORLOG::ErrlEntry::NO_SW_CALLOUT ); l_err->collectTrace(NVDIMM_COMP_NAME); + nvdimmAddPage4Regs(i_nvdimm,l_err); } return l_err; @@ -746,6 +759,7 @@ errlHndl_t nvdimmPollBackupDone(Target* i_nvdimm, // Collect register data for FFDC Traces nvdimmTraceRegs ( i_nvdimm, l_RegInfo ); + nvdimmAddPage4Regs(i_nvdimm,l_err); // Add reg traces to the error log NVDIMM::UdNvdimmOPParms( l_RegInfo ).addToLog(l_err); @@ -809,6 +823,7 @@ errlHndl_t nvdimmPollRestoreDone(Target* i_nvdimm, // Collect register data for FFDC Traces nvdimmTraceRegs ( i_nvdimm, l_RegInfo ); + nvdimmAddPage4Regs(i_nvdimm,l_err); // Add reg traces to the error log NVDIMM::UdNvdimmOPParms( l_RegInfo ).addToLog(l_err); @@ -863,7 +878,7 @@ errlHndl_t nvdimmPollEraseDone(Target* i_nvdimm, ERRORLOG::ErrlEntry::NO_SW_CALLOUT ); l_err->collectTrace( NVDIMM_COMP_NAME ); - + nvdimmAddPage4Regs(i_nvdimm,l_err); } TRACUCOMP(g_trac_nvdimm, EXIT_MRK"nvdimmPollEraseDone() nvdimm[%X]", @@ -1007,6 +1022,7 @@ errlHndl_t nvdimmSetESPolicy(Target* i_nvdimm) // Read relevant regs for trace data nvdimmTraceRegs(i_nvdimm, l_RegInfo); + nvdimmAddPage4Regs(i_nvdimm,l_err); // Add reg traces to the error log NVDIMM::UdNvdimmOPParms( l_RegInfo ).addToLog(l_err); @@ -1246,6 +1262,7 @@ errlHndl_t nvdimmRestore(TargetHandleList& i_nvdimmList, uint8_t &i_mpipl) get_huid(l_nvdimm), 0x0, ERRORLOG::ErrlEntry::NO_SW_CALLOUT); + nvdimmAddPage4Regs(l_nvdimm,l_err); break; } @@ -1264,6 +1281,7 @@ errlHndl_t nvdimmRestore(TargetHandleList& i_nvdimmList, uint8_t &i_mpipl) { TRACFCOMP(g_trac_nvdimm, ERR_MRK"nvdimmRestore() HUID[%X] post_restore_transition failed!", get_huid(l_nvdimm)); + nvdimmAddPage4Regs(l_nvdimm,l_err); break; } else @@ -1345,6 +1363,7 @@ errlHndl_t nvdimmEraseCheck(Target *i_nvdimm) // Collect register data for FFDC Traces nvdimmTraceRegs ( i_nvdimm, l_RegInfo ); + nvdimmAddPage4Regs(i_nvdimm,l_err); // Add reg traces to the error log NVDIMM::UdNvdimmOPParms( l_RegInfo ).addToLog(l_err); @@ -1487,6 +1506,7 @@ errlHndl_t nvdimmOpenPage(Target *i_nvdimm, l_err->addPartCallout( i_nvdimm, HWAS::NV_CONTROLLER_PART_TYPE, HWAS::SRCI_PRIORITY_HIGH); + nvdimmAddPage4Regs(i_nvdimm,l_err); } }while(0); @@ -1606,6 +1626,7 @@ errlHndl_t nvdimmEpowSetup(TargetHandleList &i_nvdimmList) get_huid(*it)); nvdimmSetStatusFlag(*it, NSTD_VAL_SR_FAILED); + nvdimmAddPage4Regs(*it,l_err); break; } it++; @@ -1720,6 +1741,7 @@ errlHndl_t nvdimm_restore(TargetHandleList &i_nvdimmList) // Collect register data for FFDC Traces nvdimmTraceRegs ( l_nvdimm, l_RegInfo ); + nvdimmAddPage4Regs(l_nvdimm,l_err); // Add reg traces to the error log NVDIMM::UdNvdimmOPParms( l_RegInfo ).addToLog(l_err); @@ -1867,6 +1889,7 @@ errlHndl_t nvdimm_factory_reset(Target *i_nvdimm) l_err->addPartCallout( i_nvdimm, HWAS::NV_CONTROLLER_PART_TYPE, HWAS::SRCI_PRIORITY_HIGH); + nvdimmAddPage4Regs(i_nvdimm,l_err); } } while(0); @@ -1994,6 +2017,7 @@ errlHndl_t nvdimm_init(Target *i_nvdimm) // Collect register data for FFDC Traces nvdimmTraceRegs ( i_nvdimm, l_RegInfo ); + nvdimmAddPage4Regs(i_nvdimm,l_err); // Add reg traces to the error log NVDIMM::UdNvdimmOPParms( l_RegInfo ).addToLog(l_err); @@ -2064,6 +2088,7 @@ errlHndl_t nvdimm_init(Target *i_nvdimm) // Collect register data for FFDC Traces nvdimmTraceRegs ( i_nvdimm, l_RegInfo ); + nvdimmAddPage4Regs(i_nvdimm,l_err); // Add reg traces to the error log NVDIMM::UdNvdimmOPParms( l_RegInfo ).addToLog(l_err); @@ -2435,6 +2460,7 @@ bool nvdimm_encrypt_unlock(TargetHandleList &i_nvdimmList) HWAS::DELAYED_DECONFIG, HWAS::GARD_NULL ); + nvdimmAddPage4Regs(l_nvdimm,l_err); errlCommit( l_err, NVDIMM_COMP_ID ); nvdimmSetEncryptionError(l_nvdimm); l_success = false; @@ -2945,6 +2971,7 @@ errlHndl_t nvdimm_setKeyReg(Target* i_nvdimm, l_err->addPartCallout( i_nvdimm, HWAS::NV_CONTROLLER_PART_TYPE, HWAS::SRCI_PRIORITY_HIGH); + nvdimmAddPage4Regs(i_nvdimm,l_err); } else { @@ -3121,6 +3148,7 @@ bool nvdimm_encrypt_enable(TargetHandleList &i_nvdimmList) HWAS::NV_CONTROLLER_PART_TYPE, HWAS::SRCI_PRIORITY_HIGH); + nvdimmAddPage4Regs(l_nvdimm,l_err); errlCommit( l_err, NVDIMM_COMP_ID ); nvdimmSetEncryptionError(l_nvdimm); l_success = false; @@ -3260,6 +3288,7 @@ bool nvdimm_crypto_erase(TargetHandleList &i_nvdimmList) HWAS::NV_CONTROLLER_PART_TYPE, HWAS::SRCI_PRIORITY_HIGH); + nvdimmAddPage4Regs(l_nvdimm,l_err); errlCommit( l_err, NVDIMM_COMP_ID ); nvdimmSetEncryptionError(l_nvdimm); l_success = false; @@ -3334,6 +3363,7 @@ bool nvdimm_crypto_erase(TargetHandleList &i_nvdimmList) HWAS::NV_CONTROLLER_PART_TYPE, HWAS::SRCI_PRIORITY_HIGH); + nvdimmAddPage4Regs(l_nvdimm,l_err); errlCommit( l_err, NVDIMM_COMP_ID ); nvdimmSetEncryptionError(l_nvdimm); l_success = false; @@ -3623,6 +3653,77 @@ errlHndl_t notifyNvdimmProtectionChange(Target* i_target, return l_err; } + +/* + * @brief Add Page 4 regs to FFDC + * Added to all NVDIMM HW errors + */ +void nvdimmAddPage4Regs( TARGETING::Target* i_nvdimm, errlHndl_t& io_err ) +{ + errlHndl_t l_err = nullptr; + + do + { + // Get the page4 attribute, if set we are already + // reading the page4 regs, exit + auto l_page4 = i_nvdimm->getAttr<ATTR_NVDIMM_READING_PAGE4>(); + if (l_page4) + { + break; + } + + // Set the page4 attribute so we don't recursively + // execute the nvdimmAddPage4Regs function + l_page4 = 0x1; + i_nvdimm->setAttr<ATTR_NVDIMM_READING_PAGE4>(l_page4); + + ERRORLOG::ErrlUserDetailsLogRegister l_regUD(i_nvdimm); + uint32_t l_regList[] = { + PANIC_CNT, + PARITY_ERROR_COUNT, + FLASH_ERROR_COUNT0, + FLASH_ERROR_COUNT1, + FLASH_ERROR_COUNT2, + FLASH_BAD_BLOCK_COUNT0, + FLASH_BAD_BLOCK_COUNT1, + SCAP_STATUS, + STATUS_EVENT_INT_INFO1, + STATUS_EVENT_INT_INFO2 + }; + uint8_t l_readData = 0; + + for (auto l_reg : l_regList) + { + l_err = nvdimmReadReg(i_nvdimm, + l_regList[l_reg], + l_readData); + if (l_err) + { + TRACFCOMP(g_trac_nvdimm, ERR_MRK + "nvdimmAddPage4Regs() nvdimm[%X] error reading 0x%X", + get_huid(i_nvdimm), l_reg); + + // Don't commit, just delete the error and continue + delete l_err; + l_err = nullptr; + continue; + } + + l_regUD.addDataBuffer(&l_readData, + sizeof(l_readData), + DEVICE_NVDIMM_ADDRESS(l_reg)); + } + + l_regUD.addToLog(io_err); + + // Clear the page4 attribute before exiting + l_page4 = 0x0; + i_nvdimm->setAttr<ATTR_NVDIMM_READING_PAGE4>(l_page4); + + } while(0); +} + + /* * @brief Utility function to send the value of * ATTR_NVDIMM_ARMED to the FSP diff --git a/src/usr/isteps/nvdimm/nvdimm.H b/src/usr/isteps/nvdimm/nvdimm.H index d2d2985b6..5379385e9 100644 --- a/src/usr/isteps/nvdimm/nvdimm.H +++ b/src/usr/isteps/nvdimm/nvdimm.H @@ -275,11 +275,17 @@ enum i2cReg : uint16_t TYPED_BLOCK_DATA_BYTE30 = 0x39E, TYPED_BLOCK_DATA_BYTE31 = 0x39F, TYPED_BLOCK_DATA_OFFSET = 0x3E0, + PANIC_CNT = 0x406, + STATUS_EVENT_INT_INFO1 = 0x40A, + STATUS_EVENT_INT_INFO2 = 0x40B, FLASH_BAD_BLK_PCT = 0x41D, // Read only; Percentage of flash blocks // in the flash array marked as bad blocks + PARITY_ERROR_COUNT = 0x423, FLASH_ERROR_COUNT0 = 0x428, // Read only; LSB[7:0] Flash error count FLASH_ERROR_COUNT1 = 0x429, // Read only; [15:8] FLASH_ERROR_COUNT2 = 0x42A, // Read only; MSB[23:16] + FLASH_BAD_BLOCK_COUNT0 = 0x42B, + FLASH_BAD_BLOCK_COUNT1 = 0x42C, BPM_MAGIC_REG1 = 0x430, BPM_MAGIC_REG2 = 0x431, SCAP_STATUS = 0x432, diff --git a/src/usr/isteps/nvdimm/nvdimm_update.C b/src/usr/isteps/nvdimm/nvdimm_update.C index ecf9a768d..3c8426fba 100644 --- a/src/usr/isteps/nvdimm/nvdimm_update.C +++ b/src/usr/isteps/nvdimm/nvdimm_update.C @@ -405,6 +405,7 @@ errlHndl_t NvdimmInstalledImage::updateImage(NvdimmLidImage * i_lidImage) HWAS::SRCI_PRIORITY_HIGH ); l_err->addProcedureCallout( HWAS::EPUB_PRC_HB_CODE, HWAS::SRCI_PRIORITY_LOW ); + nvdimmAddPage4Regs(iv_dimm,l_err); break; } @@ -581,6 +582,7 @@ errlHndl_t NvdimmInstalledImage::updateImage(NvdimmLidImage * i_lidImage) // possible code issue l_err->addProcedureCallout( HWAS::EPUB_PRC_HB_CODE, HWAS::SRCI_PRIORITY_LOW ); + nvdimmAddPage4Regs(iv_dimm,l_err); break; } @@ -789,6 +791,7 @@ errlHndl_t NvdimmInstalledImage::updateImageData(NvdimmLidImage * i_lidImage) 0x00000000), ERRORLOG::ErrlEntry::ADD_SW_CALLOUT ); l_err->collectTrace( NVDIMM_COMP_NAME, 256 ); + nvdimmAddPage4Regs(iv_dimm,l_err); break; } @@ -950,6 +953,7 @@ errlHndl_t NvdimmInstalledImage::updateImageData(NvdimmLidImage * i_lidImage) HWAS::SRCI_PRIORITY_HIGH ); l_err->addProcedureCallout( HWAS::EPUB_PRC_HB_CODE, HWAS::SRCI_PRIORITY_LOW ); + nvdimmAddPage4Regs(iv_dimm,l_err); break; } @@ -1019,6 +1023,7 @@ errlHndl_t NvdimmInstalledImage::changeFwUpdateMode(fw_update_mode i_mode) HWAS::SRCI_PRIORITY_HIGH ); l_err->addProcedureCallout( HWAS::EPUB_PRC_HB_CODE, HWAS::SRCI_PRIORITY_LOW ); + nvdimmAddPage4Regs(iv_dimm,l_err); } } } @@ -1101,6 +1106,7 @@ errlHndl_t NvdimmInstalledImage::waitFwOpsBlockReceived() HWAS::SRCI_PRIORITY_HIGH ); l_err->addProcedureCallout( HWAS::EPUB_PRC_HB_CODE, HWAS::SRCI_PRIORITY_LOW ); + nvdimmAddPage4Regs(iv_dimm,l_err); } return l_err; @@ -1179,6 +1185,7 @@ errlHndl_t NvdimmInstalledImage::waitFwOpsComplete() HWAS::SRCI_PRIORITY_HIGH ); l_err->addProcedureCallout( HWAS::EPUB_PRC_HB_CODE, HWAS::SRCI_PRIORITY_LOW ); + nvdimmAddPage4Regs(iv_dimm,l_err); } } return l_err; @@ -1545,6 +1552,7 @@ errlHndl_t NvdimmInstalledImage::validateFwHeader() HWAS::SRCI_PRIORITY_HIGH ); l_err->addProcedureCallout( HWAS::EPUB_PRC_HB_CODE, HWAS::SRCI_PRIORITY_LOW ); + nvdimmAddPage4Regs(iv_dimm,l_err); } } } @@ -1594,6 +1602,7 @@ errlHndl_t NvdimmInstalledImage::commitFwRegion() HWAS::SRCI_PRIORITY_HIGH ); l_err->addProcedureCallout( HWAS::EPUB_PRC_HB_CODE, HWAS::SRCI_PRIORITY_LOW ); + nvdimmAddPage4Regs(iv_dimm,l_err); } } } @@ -1644,6 +1653,7 @@ errlHndl_t NvdimmInstalledImage::clearFwDataBlock() HWAS::SRCI_PRIORITY_HIGH ); l_err->addProcedureCallout( HWAS::EPUB_PRC_HB_CODE, HWAS::SRCI_PRIORITY_LOW ); + nvdimmAddPage4Regs(iv_dimm,l_err); } } } @@ -1693,6 +1703,7 @@ errlHndl_t NvdimmInstalledImage::validateFwImage() HWAS::SRCI_PRIORITY_HIGH ); l_err->addProcedureCallout( HWAS::EPUB_PRC_HB_CODE, HWAS::SRCI_PRIORITY_LOW ); + nvdimmAddPage4Regs(iv_dimm,l_err); } } @@ -1978,6 +1989,7 @@ bool NvdimmsUpdate::runUpdate(void) HWAS::SRCI_PRIORITY_HIGH ); l_err->addProcedureCallout( HWAS::EPUB_PRC_HB_CODE, HWAS::SRCI_PRIORITY_LOW ); + nvdimmAddPage4Regs(l_nvdimm,l_err); ERRORLOG::errlCommit(l_err, NVDIMM_COMP_ID); // Delete the unused NvdimmInstalledImage object diff --git a/src/usr/isteps/nvdimm/runtime/nvdimm_rt.C b/src/usr/isteps/nvdimm/runtime/nvdimm_rt.C index b38dd394d..d9ce45e5e 100644 --- a/src/usr/isteps/nvdimm/runtime/nvdimm_rt.C +++ b/src/usr/isteps/nvdimm/runtime/nvdimm_rt.C @@ -342,6 +342,7 @@ bool nvdimmArm(TargetHandleList &i_nvdimmTargetList) // Dump Traces for error logs nvdimmTraceRegs( l_nvdimm, l_RegInfo ); + nvdimmAddPage4Regs(l_nvdimm,l_err); // Add reg traces to the error log NVDIMM::UdNvdimmOPParms( l_RegInfo ).addToLog(l_err); @@ -451,6 +452,7 @@ bool nvdimmArm(TargetHandleList &i_nvdimmTargetList) // Read relevant regs for trace data nvdimmTraceRegs(l_nvdimm, l_RegInfo); + nvdimmAddPage4Regs(l_nvdimm,l_err); // Add reg traces to the error log NVDIMM::UdNvdimmOPParms( l_RegInfo ).addToLog(l_err); @@ -852,6 +854,7 @@ bool nvDimmEsCheckHealthStatus(const TargetHandleList &i_nvdimmTargetList) l_err->addPartCallout( l_nvdimm, HWAS::BPM_PART_TYPE, HWAS::SRCI_PRIORITY_HIGH); + nvdimmAddPage4Regs(l_nvdimm,l_err); // Collect the error errlCommit(l_err, NVDIMM_COMP_ID); @@ -890,6 +893,7 @@ bool nvDimmEsCheckHealthStatus(const TargetHandleList &i_nvdimmTargetList) l_err->addPartCallout( l_nvdimm, HWAS::BPM_PART_TYPE, HWAS::SRCI_PRIORITY_HIGH); + nvdimmAddPage4Regs(l_nvdimm,l_err); // Collect the error errlCommit(l_err, NVDIMM_COMP_ID); @@ -965,6 +969,7 @@ bool nvDimmEsCheckHealthStatus(const TargetHandleList &i_nvdimmTargetList) l_err->addPartCallout( l_nvdimm, HWAS::BPM_PART_TYPE, HWAS::SRCI_PRIORITY_HIGH); + nvdimmAddPage4Regs(l_nvdimm,l_err); // Collect the error errlCommit(l_err, NVDIMM_COMP_ID); @@ -1016,6 +1021,7 @@ bool nvDimmEsCheckHealthStatus(const TargetHandleList &i_nvdimmTargetList) l_err->addPartCallout( l_nvdimm, HWAS::BPM_PART_TYPE, HWAS::SRCI_PRIORITY_HIGH); + nvdimmAddPage4Regs(l_nvdimm,l_err); // Collect the error errlCommit(l_err, NVDIMM_COMP_ID); diff --git a/src/usr/targeting/common/xmltohb/attribute_types_hb.xml b/src/usr/targeting/common/xmltohb/attribute_types_hb.xml index 2ca3f0494..4051b977f 100755 --- a/src/usr/targeting/common/xmltohb/attribute_types_hb.xml +++ b/src/usr/targeting/common/xmltohb/attribute_types_hb.xml @@ -1000,6 +1000,23 @@ </attribute> <attribute> + <id>NVDIMM_READING_PAGE4</id> + <description> + 0 - Not reading page4 registers + 1 - Reading of page4 registers in progress + </description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hbOnly/> + </attribute> + + <attribute> <id>OCC_COMMON_AREA_PHYS_ADDR</id> <description> Physical address where OCC Common Area is placed in mainstore. diff --git a/src/usr/targeting/common/xmltohb/target_types_hb.xml b/src/usr/targeting/common/xmltohb/target_types_hb.xml index 99c74e604..79f6e0cce 100644 --- a/src/usr/targeting/common/xmltohb/target_types_hb.xml +++ b/src/usr/targeting/common/xmltohb/target_types_hb.xml @@ -246,6 +246,9 @@ <id>DIMM_SPD_BYTE_SIZE</id> </attribute> <attribute> + <id>NVDIMM_READING_PAGE4</id> + </attribute> + <attribute> <id>PART_NUMBER</id> </attribute> <attribute> |