Adds MRW support for x4/x8 DIMM configurations

Change-Id: Ifc5152564cddfcfda2f0ae9e709cad46b1d585b3
RTC:189937
CQ:SW426701
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/57832
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/57842
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>

5 files changed, 187 insertions, 0 deletions

diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/plug_rules.C b/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/plug_rules.C
index ce3cdbcfb..a5bc2d719 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/plug_rules.C
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/plug_rules.C
@@ -132,6 +132,77 @@ fapi_try_exit:
 } // code
 
 ///
+/// @brief Enforce DRAM width system support checks
+/// @param[in] i_target the port
+/// @param[in] i_kind a DIMM kind
+/// @param[in] i_mrw_supported_list the MRW bitmap's value
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+/// @note The DIMM kind should be a DIMM on the MCA
+///
+fapi2::ReturnCode check_system_supported_dram_width(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target,
+        const dimm::kind& i_kind,
+        const fapi2::buffer<uint8_t>& i_mrw_supported_list)
+{
+    // Contains a mapping of the DRAM width to the bitmap value to be checked for support
+    // If the DRAM's width is not found in this map, we'll error out with a special error
+    static const std::vector<std::pair<uint8_t, uint8_t>> DRAM_WIDTH_MAP =
+    {
+        {fapi2::ENUM_ATTR_EFF_DRAM_WIDTH_X4, fapi2::ENUM_ATTR_MSS_MRW_SUPPORTED_DRAM_WIDTH_X4},
+        {fapi2::ENUM_ATTR_EFF_DRAM_WIDTH_X8, fapi2::ENUM_ATTR_MSS_MRW_SUPPORTED_DRAM_WIDTH_X8},
+    };
+    // Gets the bitmap value for this DIMM's DRAM's width
+    uint8_t l_bitmap_value = 0;
+    const auto l_found = mss::find_value_from_key(DRAM_WIDTH_MAP, i_kind.iv_dram_width, l_bitmap_value);
+
+    // We didn't find this DRAM width as supported in the above list
+    FAPI_ASSERT(l_found,
+                fapi2::MSS_PLUG_RULES_DRAM_WIDTH_NOT_SUPPORTED()
+                .set_DRAM_WIDTH(i_kind.iv_dram_width)
+                .set_MCA_TARGET(i_target),
+                "%s failed to find DRAM width of %u in the supported DRAM widths vector",
+                mss::c_str(i_kind.iv_target), i_kind.iv_dram_width);
+
+    // We didn't find this DRAM width as supported in the MRW attribute
+    FAPI_ASSERT(i_mrw_supported_list.getBit(l_bitmap_value),
+                fapi2::MSS_PLUG_RULES_MRW_DRAM_WIDTH_NOT_SUPPORTED()
+                .set_DRAM_WIDTH(i_kind.iv_dram_width)
+                .set_MRW_SUPPORTED_LIST(i_mrw_supported_list)
+                .set_BITMAP_VALUE(l_bitmap_value)
+                .set_MCA_TARGET(i_target),
+                "%s failed! 0x%02x is not in MRW suppored value of 0x%02x for DRAM width of %u",
+                mss::c_str(i_kind.iv_target), l_bitmap_value, i_mrw_supported_list, i_kind.iv_dram_width);
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Enforce DRAM width system support checks
+/// @param[in] i_target the port
+/// @param[in] i_kinds a vector of DIMM (sorted while processing)
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+/// @note Expects the kind array to represent the DIMM on the port.
+/// This function will commit error logs if a DIMM has an unsupported DRAM width
+///
+fapi2::ReturnCode check_system_supported_dram_width(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target,
+        const std::vector<dimm::kind>& i_kinds)
+{
+    fapi2::current_err = fapi2::FAPI2_RC_SUCCESS;
+
+    uint8_t l_mrw_supported_list = 0;
+    FAPI_TRY(mss::mrw_supported_dram_width(l_mrw_supported_list));
+
+    // Loops through the DIMM and checks for unsupported DRAM widths
+    for(const auto& l_kind : i_kinds)
+    {
+        FAPI_TRY(check_system_supported_dram_width(i_target, l_kind, l_mrw_supported_list));
+    }
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
 /// @brief Enforce DRAM width checks
 /// @note DIMM0's width needs to equal DIMM1's width
 /// @param[in] i_target the port
@@ -755,6 +826,9 @@ fapi2::ReturnCode plug_rule::enforce_plug_rules(const fapi2::Target<fapi2::TARGE
     // Ensures that the port has a valid combination of DRAM widths
     FAPI_TRY( plug_rule::check_dram_width(i_target, l_dimm_kinds) );
 
+    // Ensures that the system as a whole supports a given DRAM width
+    FAPI_TRY( plug_rule::check_system_supported_dram_width(i_target, l_dimm_kinds) );
+
     // Ensures that the port has a valid combination of stack types
     FAPI_TRY( plug_rule::check_stack_type(i_target, l_dimm_kinds) );
 
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/plug_rules.H b/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/plug_rules.H
index c0ef3709d..b83b39e98 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/plug_rules.H
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/plug_rules.H
@@ -159,6 +159,29 @@ fapi2::ReturnCode check_rank_config(const fapi2::Target<fapi2::TARGET_TYPE_MCA>&
                                     const uint64_t i_ranks_override);
 
 ///
+/// @brief Enforce DRAM width system support checks
+/// @param[in] i_target the port
+/// @param[in] i_kind a DIMM kind
+/// @param[in] i_mrw_supported_list the MRW bitmap's value
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+/// @note The DIMM kind should be a DIMM on the MCA
+///
+fapi2::ReturnCode check_system_supported_dram_width(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target,
+        const dimm::kind& i_kind,
+        const fapi2::buffer<uint8_t>& i_mrw_supported_list);
+
+///
+/// @brief Enforce DRAM width system support checks
+/// @param[in] i_target the port
+/// @param[in] i_kinds a vector of DIMM (sorted while processing)
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+/// @note Expects the kind array to represent the DIMM on the port.
+/// This function will commit error logs if a DIMM has an unsupported DRAM width
+///
+fapi2::ReturnCode check_system_supported_dram_width(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target,
+        const std::vector<dimm::kind>& i_kinds);
+
+///
 /// @brief Enforce DRAM width checks
 /// @note DIMM0's width needs to equal DIMM1's width
 /// @param[in] i_target the port
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H b/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H
index 1ee63867f..c2cc8ee8f 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H
@@ -21557,6 +21557,29 @@ fapi_try_exit:
     return fapi2::current_err;
 }
 
+///
+/// @brief ATTR_MSS_MRW_SUPPORTED_DRAM_WIDTH getter
+/// @param[out] uint8_t& reference to store the value
+/// @note Generated by gen_accessors.pl generateParameters (SYSTEM)
+/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
+/// @note  Bitmap of DRAM widths supported by a system. A 1 indicates that the system
+/// supports a density. Enums below represent the the bit location in the attribute
+/// for a given DRAM width. Default value is 0xC -> both x4/x8
+/// supported
+///
+inline fapi2::ReturnCode mrw_supported_dram_width(uint8_t& o_value)
+{
+
+    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_MRW_SUPPORTED_DRAM_WIDTH, fapi2::Target<fapi2::TARGET_TYPE_SYSTEM>(),
+                            o_value) );
+    return fapi2::current_err;
+
+fapi_try_exit:
+    FAPI_ERR("failed accessing ATTR_MSS_MRW_SUPPORTED_DRAM_WIDTH: 0x%lx (system target)",
+             uint64_t(fapi2::current_err));
+    return fapi2::current_err;
+}
+
 
 ///
 /// @brief ATTR_MSS_VPD_MR_0_VERSION_LAYOUT getter
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/memory_mrw_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/memory_mrw_attributes.xml
index 48ecc68d8..385a324ca 100755
--- a/src/import/chips/p9/procedures/xml/attribute_info/memory_mrw_attributes.xml
+++ b/src/import/chips/p9/procedures/xml/attribute_info/memory_mrw_attributes.xml
@@ -665,4 +665,19 @@
     <mssAccessorName>mrw_allow_unsupported_rcw</mssAccessorName>
   </attribute>
 
+  <attribute>
+    <id>ATTR_MSS_MRW_SUPPORTED_DRAM_WIDTH</id>
+    <targetType>TARGET_TYPE_SYSTEM</targetType>
+    <description>
+      Bitmap of DRAM widths supported by a system. A 1 indicates that the system supports a density.
+      Enums below represent the the bit location in the attribute for a given DRAM width.
+      Default value is 0xC -> both x4/x8 supported
+    </description>
+    <valueType>uint8</valueType>
+    <platInit/>
+    <default> 0xc0 </default>
+    <enum> X4 = 0, X8 = 1 </enum>
+    <mssAccessorName>mrw_supported_dram_width</mssAccessorName>
+  </attribute>
+
 </attributes>
diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_plug_rules.xml b/src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_plug_rules.xml
index 7220ef48e..b290b48fc 100644
--- a/src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_plug_rules.xml
+++ b/src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_plug_rules.xml
@@ -59,6 +59,58 @@
   </hwpError>
 
   <hwpError>
+    <rc>RC_MSS_PLUG_RULES_DRAM_WIDTH_NOT_SUPPORTED</rc>
+    <description>
+      DRAM width was not found to be supported by the code
+    </description>
+    <ffdc>DRAM_WIDTH</ffdc>
+    <callout>
+        <procedure>MEMORY_PLUGGING_ERROR</procedure>
+        <priority>HIGH</priority>
+    </callout>
+    <callout>
+      <childTargets>
+          <parent>MCA_TARGET</parent>
+          <childType>TARGET_TYPE_DIMM</childType>
+      </childTargets>
+      <priority>MEDIUM</priority>
+    </callout>
+    <deconfigure>
+       <childTargets>
+          <parent>MCA_TARGET</parent>
+          <childType>TARGET_TYPE_DIMM</childType>
+      </childTargets>
+    </deconfigure>
+  </hwpError>
+
+  <hwpError>
+    <rc>RC_MSS_PLUG_RULES_MRW_DRAM_WIDTH_NOT_SUPPORTED</rc>
+    <description>
+      DRAM width was not found to be supported by the MRW attribute
+    </description>
+    <ffdc>DRAM_WIDTH</ffdc>
+    <ffdc>MRW_SUPPORTED_LIST</ffdc>
+    <ffdc>BITMAP_VALUE</ffdc>
+    <callout>
+        <procedure>MEMORY_PLUGGING_ERROR</procedure>
+        <priority>HIGH</priority>
+    </callout>
+    <callout>
+      <childTargets>
+          <parent>MCA_TARGET</parent>
+          <childType>TARGET_TYPE_DIMM</childType>
+      </childTargets>
+      <priority>MEDIUM</priority>
+    </callout>
+    <deconfigure>
+       <childTargets>
+          <parent>MCA_TARGET</parent>
+          <childType>TARGET_TYPE_DIMM</childType>
+      </childTargets>
+    </deconfigure>
+  </hwpError>
+
+  <hwpError>
     <rc>RC_MSS_PLUG_RULES_INVALID_DRAM_WIDTH_MIX</rc>
     <description>
       Two different widths of DIMMs are installed on port