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authorJacob Harvey <jlharvey@us.ibm.com>2017-01-06 17:21:07 -0600
committerDaniel M. Crowell <dcrowell@us.ibm.com>2017-01-12 13:00:46 -0500
commit10faa36e818d33bb645c57d16cdc8f01e63b18fe (patch)
tree34e4fa2210d93e13d20c15e1487d35e5be1186a7
parentc0fcb6dca1133c19fd733a2c418102488319e2c4 (diff)
downloadtalos-hostboot-10faa36e818d33bb645c57d16cdc8f01e63b18fe.tar.gz
talos-hostboot-10faa36e818d33bb645c57d16cdc8f01e63b18fe.zip
Fix fapi2::current_err bug in checker.H
FAPI_ASSERT does not set current error Also fixed some of the LRDIMM decoder The decoder didn't match up with the Revs Change-Id: If7125e9fb0b21d09ccefaf9aa9ec0e2fb4cd7cd5 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/34528 Reviewed-by: Brian R. Silver <bsilver@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com> Reviewed-by: Louis Stermole <stermole@us.ibm.com> Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/34591 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/lib/mc/port.C4
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/lib/spd/lrdimm/lrdimm_decoder.H47
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/lib/spd/lrdimm/lrdimm_decoder_v1_1.C72
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/lib/spd/lrdimm/lrdimm_decoder_v1_2.C75
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/lib/utils/checker.H6
5 files changed, 101 insertions, 103 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/mc/port.C b/src/import/chips/p9/procedures/hwp/memory/lib/mc/port.C
index 907655022..942e2c8a5 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/mc/port.C
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/mc/port.C
@@ -102,12 +102,8 @@ fapi2::ReturnCode enable_periodic_cal( const fapi2::Target<fapi2::TARGET_TYPE_MC
FAPI_INF("mrw_periodic_zqcal_mode_options: 0x%02x", l_per_memcal_mode_options);
#endif
- // TODO RTC:155854 We haven't done the work for calculating init cal periods
- // in effective config yet, and the MC setup below is hard wired for sim
-
FAPI_INF("memcal interval %dck, zqcal interval %dck", l_memcal_interval, l_zqcal_interval);
- // I think we can do these in any event BRS
{
// From Steve Powell, 4/16
// 0xFFFFFFFFFFFFFFF0
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/spd/lrdimm/lrdimm_decoder.H b/src/import/chips/p9/procedures/hwp/memory/lib/spd/lrdimm/lrdimm_decoder.H
index 98c3451f3..5db105e29 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/spd/lrdimm/lrdimm_decoder.H
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/spd/lrdimm/lrdimm_decoder.H
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2016 */
+/* Contributors Listed Below - COPYRIGHT 2016,2017 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -558,29 +558,6 @@ class decoder_v1_1 : public decoder_v1_0
/// @note Page 4.1.2.12.3 - 66
///
virtual fapi2::ReturnCode a_side_clk_output_driver(uint8_t& o_output) override;
-
- ///
- /// @brief Decodes register output drive strength for data buffer control (BCOM, BODT, BKCE)
- /// @param[out] o_output encoded drive strength
- /// @return FAPI2_RC_SUCCESS if okay
- /// @note SPD Byte 138 (Bit 4)
- /// @note Item JEDEC Standard No. 21-C
- /// @note DDR4 SPD Document Release 3
- /// @note Page 4.1.2.12.3 - 66
- ///
- virtual fapi2::ReturnCode bcom_bcke_bodt_drive_strength(uint8_t& o_output) override;
-
- ///
- /// @brief Decodes register output drive strength for data buffer control (BCK)
- /// @param[out] o_output encoded drive strength
- /// @return FAPI2_RC_SUCCESS if okay
- /// @note SPD Byte 138 (Bit 5)
- /// @note Item JEDEC Standard No. 21-C
- /// @note DDR4 SPD Document Release 3
- /// @note Page 4.1.2.12.3 - 66
- ///
- virtual fapi2::ReturnCode bck_output_drive_strength(uint8_t& o_output) override;
-
};
///
@@ -609,6 +586,28 @@ class decoder_v1_2 : public decoder_v1_1
virtual ~decoder_v1_2() = default;
///
+ /// @brief Decodes register output drive strength for data buffer control (BCOM, BODT, BKCE)
+ /// @param[out] o_output encoded drive strength
+ /// @return FAPI2_RC_SUCCESS if okay
+ /// @note SPD Byte 138 (Bit 4)
+ /// @note Item JEDEC Standard No. 21-C
+ /// @note DDR4 SPD Document Release 3
+ /// @note Page 4.1.2.12.3 - 66
+ ///
+ virtual fapi2::ReturnCode bcom_bcke_bodt_drive_strength(uint8_t& o_output) override;
+
+ ///
+ /// @brief Decodes register output drive strength for data buffer control (BCK)
+ /// @param[out] o_output encoded drive strength
+ /// @return FAPI2_RC_SUCCESS if okay
+ /// @note SPD Byte 138 (Bit 5)
+ /// @note Item JEDEC Standard No. 21-C
+ /// @note DDR4 SPD Document Release 3
+ /// @note Page 4.1.2.12.3 - 66
+ ///
+ virtual fapi2::ReturnCode bck_output_drive_strength(uint8_t& o_output) override;
+
+ ///
/// @brief Decodes RCD output slew rate control
/// @param[out] o_output encoded drive strength
/// @return FAPI2_RC_SUCCESS if okay
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/spd/lrdimm/lrdimm_decoder_v1_1.C b/src/import/chips/p9/procedures/hwp/memory/lib/spd/lrdimm/lrdimm_decoder_v1_1.C
index dfe54bbe3..56451f234 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/spd/lrdimm/lrdimm_decoder_v1_1.C
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/spd/lrdimm/lrdimm_decoder_v1_1.C
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2016 */
+/* Contributors Listed Below - COPYRIGHT 2016,2017 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -268,76 +268,6 @@ fapi_try_exit:
return fapi2::current_err;
}
-///
-/// @brief Decodes register output drive strength for data buffer control (BCOM, BODT, BKCE)
-/// @param[out] o_output encoded drive strength
-/// @return FAPI2_RC_SUCCESS if okay
-/// @note SPD Byte 138 (Bit 4)
-/// @note Item JEDEC Standard No. 21-C
-/// @note DDR4 SPD Document Release 3
-/// @note Page 4.1.2.12.3 - 66
-///
-fapi2::ReturnCode decoder_v1_1::bcom_bcke_bodt_drive_strength(uint8_t& o_output)
-{
- // Extracting desired bits
- uint8_t l_field_bits = extract_spd_field< BCOM_BODT_BCKE_DRIVE_STRENGTH >(iv_target, iv_spd_data);
- FAPI_INF("Field Bits value: %d", l_field_bits);
-
- // This checks my extracting params returns a value within bound
- constexpr size_t MAX_VALID_VAL = 3;
-
- FAPI_TRY( mss::check::spd::fail_for_invalid_value(iv_target,
- l_field_bits <= MAX_VALID_VAL,
- BCOM_BODT_BCKE_DRIVE_STRENGTH.iv_byte,
- l_field_bits,
- "Failed bounds check for Register Output Driver for data buffer control (BCOM, BODT, BCKE)") );
-
- // Update output only if check passes
- o_output = l_field_bits;
-
- FAPI_INF("%s. Register Output Driver for data buffer control (BCOM, BODT, BCKE): %d",
- mss::c_str(iv_target),
- o_output);
-
-fapi_try_exit:
- return fapi2::current_err;
-}
-
-///
-/// @brief Decodes register output drive strength for data buffer control (BCK)
-/// @param[out] o_output encoded drive strength
-/// @return FAPI2_RC_SUCCESS if okay
-/// @note SPD Byte 138 (Bit 5)
-/// @note Item JEDEC Standard No. 21-C
-/// @note DDR4 SPD Document Release 3
-/// @note Page 4.1.2.12.3 - 66
-///
-fapi2::ReturnCode decoder_v1_1::bck_output_drive_strength(uint8_t& o_output)
-{
- // Extracting desired bits
- uint8_t l_field_bits = extract_spd_field< BCK_DRIVE_STRENGTH >(iv_target, iv_spd_data);
- FAPI_INF("Field Bits value: %d", l_field_bits);
-
- // This checks my extracting params returns a value within bound
- constexpr size_t MAX_VALID_VAL = 3;
-
- FAPI_TRY( mss::check::spd::fail_for_invalid_value(iv_target,
- l_field_bits <= MAX_VALID_VAL,
- BCK_DRIVE_STRENGTH.iv_byte,
- l_field_bits,
- "Failed bounds check for Register Output Driver for data buffer control (BCK)") );
-
- // Update output only if check passes
- o_output = l_field_bits;
-
- FAPI_INF("%s. Register Output Driver for data buffer control (BCK): %d",
- mss::c_str(iv_target),
- o_output);
-
-fapi_try_exit:
- return fapi2::current_err;
-}
-
}// lrdimm
}// spd
}// mss
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/spd/lrdimm/lrdimm_decoder_v1_2.C b/src/import/chips/p9/procedures/hwp/memory/lib/spd/lrdimm/lrdimm_decoder_v1_2.C
index 5bf7d02ed..a76adbb91 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/spd/lrdimm/lrdimm_decoder_v1_2.C
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/spd/lrdimm/lrdimm_decoder_v1_2.C
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2016 */
+/* Contributors Listed Below - COPYRIGHT 2016,2017 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -56,6 +56,75 @@ namespace spd
{
namespace lrdimm
{
+///
+/// @brief Decodes register output drive strength for data buffer control (BCOM, BODT, BKCE)
+/// @param[out] o_output encoded drive strength
+/// @return FAPI2_RC_SUCCESS if okay
+/// @note SPD Byte 138 (Bit 4)
+/// @note Item JEDEC Standard No. 21-C
+/// @note DDR4 SPD Document Release 4
+/// @note Page 4.1.2.12.3 - 76
+///
+fapi2::ReturnCode decoder_v1_2::bcom_bcke_bodt_drive_strength(uint8_t& o_output)
+{
+ // Extracting desired bits
+ uint8_t l_field_bits = extract_spd_field< BCOM_BODT_BCKE_DRIVE_STRENGTH >(iv_target, iv_spd_data);
+ FAPI_INF("Field Bits value: %d", l_field_bits);
+
+ // This checks my extracting params returns a value within bound
+ constexpr size_t MAX_VALID_VAL = 1;
+
+ FAPI_TRY( mss::check::spd::fail_for_invalid_value(iv_target,
+ l_field_bits <= MAX_VALID_VAL,
+ BCOM_BODT_BCKE_DRIVE_STRENGTH.iv_byte,
+ l_field_bits,
+ "Failed bounds check for Register Output Driver for data buffer control (BCOM, BODT, BCKE)") );
+
+ // Update output only if check passes
+ o_output = l_field_bits;
+
+ FAPI_INF("%s. Register Output Driver for data buffer control (BCOM, BODT, BCKE): %d",
+ mss::c_str(iv_target),
+ o_output);
+
+fapi_try_exit:
+ return fapi2::current_err;
+}
+
+///
+/// @brief Decodes register output drive strength for data buffer control (BCK)
+/// @param[out] o_output encoded drive strength
+/// @return FAPI2_RC_SUCCESS if okay
+/// @note SPD Byte 138 (Bit 5)
+/// @note Item JEDEC Standard No. 21-C
+/// @note DDR4 SPD Document Release 4
+/// @note Page 4.1.2.12.3 - 76
+///
+fapi2::ReturnCode decoder_v1_2::bck_output_drive_strength(uint8_t& o_output)
+{
+ // Extracting desired bits
+ uint8_t l_field_bits = extract_spd_field< BCK_DRIVE_STRENGTH >(iv_target, iv_spd_data);
+ FAPI_INF("Field Bits value: %d", l_field_bits);
+
+ // This checks my extracting params returns a value within bound
+ constexpr size_t MAX_VALID_VAL = 1;
+
+ FAPI_TRY( mss::check::spd::fail_for_invalid_value(iv_target,
+ l_field_bits <= MAX_VALID_VAL,
+ BCK_DRIVE_STRENGTH.iv_byte,
+ l_field_bits,
+ "Failed bounds check for Register Output Driver for data buffer control (BCK)") );
+
+ // Update output only if check passes
+ o_output = l_field_bits;
+
+ FAPI_INF("%s. Register Output Driver for data buffer control (BCK): %d",
+ mss::c_str(iv_target),
+ o_output);
+
+fapi_try_exit:
+ return fapi2::current_err;
+}
///
/// @brief Decodes RCD output slew rate control
@@ -64,7 +133,7 @@ namespace lrdimm
/// @note SPD Byte 138 (Bit 6)
/// @note Item JEDEC Standard No. 21-C
/// @note DDR4 SPD Document Release 4
-/// @note Page 4.1.2.L-4 - 70
+/// @note Page 4.1.2.L-4 - 76
///
fapi2::ReturnCode decoder_v1_2::slew_rate_control(uint8_t& o_output)
{
@@ -73,7 +142,7 @@ fapi2::ReturnCode decoder_v1_2::slew_rate_control(uint8_t& o_output)
FAPI_INF("Field Bits value: %d", l_field_bits);
// This checks my extracting params returns a value within bound
- constexpr size_t MAX_VALID_VAL = 0b1111;
+ constexpr size_t MAX_VALID_VAL = 0b1;
FAPI_TRY( mss::check::spd::fail_for_invalid_value(iv_target,
l_field_bits <= MAX_VALID_VAL, // extract sanity check
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/utils/checker.H b/src/import/chips/p9/procedures/hwp/memory/lib/utils/checker.H
index b679aace0..6d111e4d0 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/utils/checker.H
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/utils/checker.H
@@ -95,7 +95,7 @@ fapi_try_exit:
///
/// @brief Checks homogenous DDR4 dimm configuration (e.g. DDR4)
/// @param[in] i_target the controller target
-/// @return FAPI2_RC_SUCCESS iff ok
+/// @return fapi2::FAPI2_RC_SUCCESS iff ok
///
inline fapi2::ReturnCode dram_type(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target)
{
@@ -159,6 +159,7 @@ inline fapi2::ReturnCode fail_for_invalid_map(const fapi2::Target<fapi2::TARGET_
i_key,
i_data);
+ return fapi2::FAPI2_RC_SUCCESS;
fapi_try_exit:
return fapi2::current_err;
}
@@ -194,6 +195,7 @@ inline fapi2::ReturnCode fail_for_invalid_value(const fapi2::Target<fapi2::TARGE
i_spd_byte_index,
i_spd_data);
+ return fapi2::FAPI2_RC_SUCCESS;
fapi_try_exit:
return fapi2::current_err;
@@ -254,6 +256,7 @@ inline fapi2::ReturnCode invalid_factory_sel(const fapi2::Target<fapi2::TARGET_T
i_dimm_type,
i_encoding_rev,
i_additions_rev);
+ return fapi2::FAPI2_RC_SUCCESS;
fapi_try_exit:
return fapi2::current_err;
}// invalid_factory_sel
@@ -279,6 +282,7 @@ inline fapi2::ReturnCode invalid_cache(const fapi2::Target<fapi2::TARGET_TYPE_DI
c_str(i_target),
i_dimm_pos);
+ return fapi2::FAPI2_RC_SUCCESS;
fapi_try_exit:
return fapi2::current_err;
}// invalid_factory_sel
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