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author | Prem Shanker Jha <premjha2@in.ibm.com> | 2017-04-21 02:44:33 -0500 |
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committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2017-04-27 09:19:41 -0400 |
commit | bc0fcd6739f1f02548f794db7af28d423b313970 (patch) | |
tree | 97e5afa0eb1e54193027ffe6c67dda6d65a2cdea | |
parent | f9b9bf81b84557eb4e55f96f5b18b5c9dcb51970 (diff) | |
download | talos-hostboot-bc0fcd6739f1f02548f794db7af28d423b313970.tar.gz talos-hostboot-bc0fcd6739f1f02548f794db7af28d423b313970.zip |
PM: Updated QM mode flags for CME.
Updates following fields of QM Flags in CME Image header :
- ATTR_SYSTEM_RESCLK_ENABLE
- ATTR_SYSTEM_IVRMS_ENABLED
- ATTR_SYSTEM_WOF_ENABLED
Change-Id: I5126231f0c5eb3b39f7e1ce48ddb09a5cd6e3fa7
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39543
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: CHRISTOPHER M. RIEDL <cmriedl@us.ibm.com>
Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39544
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
-rw-r--r-- | src/import/chips/p9/procedures/hwp/lib/p9_hcd_memmap_base.H | 3 | ||||
-rw-r--r-- | src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.C | 41 |
2 files changed, 43 insertions, 1 deletions
diff --git a/src/import/chips/p9/procedures/hwp/lib/p9_hcd_memmap_base.H b/src/import/chips/p9/procedures/hwp/lib/p9_hcd_memmap_base.H index 1112d4942..b687e9199 100644 --- a/src/import/chips/p9/procedures/hwp/lib/p9_hcd_memmap_base.H +++ b/src/import/chips/p9/procedures/hwp/lib/p9_hcd_memmap_base.H @@ -362,6 +362,9 @@ HCD_CONST(CME_STOP_8_TO_5_BIT_POS, 0x10000000) HCD_CONST(CME_STOP_11_TO_8_BIT_POS, 0x08000000) HCD_CONST(CME_QUEUED_SCAN_DISABLE_BIT_POS, 0x00000002) HCD_CONST(CME_SKIP_CORE_POWEROFF_BIT_POS, 0x00000001) +HCD_CONST(CME_QM_FLAG_RESCLK_ENABLE, 0x8000) +HCD_CONST(CME_QM_FLAG_SYS_IVRM_ENABLE, 0x4000) +HCD_CONST(CME_QM_FLAG_SYS_WOF_ENABLE, 0x2000) /// CME Hcode diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.C b/src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.C index e2afaa2f9..8ce477b39 100644 --- a/src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.C +++ b/src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.C @@ -585,7 +585,7 @@ fapi2::ReturnCode validateInputArguments( void* const i_pImageIn, void* i_pImage FAPI_ASSERT( ( i_imgType.isBuildValid() ), fapi2::HCODE_INVALID_IMG_TYPE(), - "Invalid temp buffer passed for hcode image build" ); + "Invalid image type passed for hcode image build" ); FAPI_DBG("Exiting validateInputArguments ..."); fapi_try_exit: @@ -662,6 +662,7 @@ fapi2::ReturnCode updateImageFlags( Homerlayout_t* i_pChipHomer, CONST_FAPI2_PRO uint64_t chtmVal = 0; uint32_t cmeFlag = 0; uint32_t sgpeFlag = 0; + uint16_t qmFlags = 0; pgpe_flags_t pgpeFlags; const fapi2::Target<fapi2::TARGET_TYPE_SYSTEM> FAPI_SYSTEM; @@ -771,6 +772,42 @@ fapi2::ReturnCode updateImageFlags( Homerlayout_t* i_pChipHomer, CONST_FAPI2_PRO FAPI_DBG("QUEUED_SCAN_DISABLE : %s", attrVal ? "TRUE" : "FALSE" ); + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_SYSTEM_RESCLK_ENABLE, + FAPI_SYSTEM, + attrVal), + "Error from FAPI_ATTR_GET for attribute ATTR_SYSTEM_RESCLK_ENABLE" ); + + if( attrVal ) + { + qmFlags |= CME_QM_FLAG_RESCLK_ENABLE; + } + + FAPI_DBG("Resonant Clock Enable : %s", attrVal ? "TRUE" : "FALSE" ); + + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_SYSTEM_IVRMS_ENABLED, + FAPI_SYSTEM, + attrVal), + "Error from FAPI_ATTR_GET for attribute ATTR_SYSTEM_IVRMS_ENABLED" ); + + if( attrVal ) + { + qmFlags |= CME_QM_FLAG_SYS_IVRM_ENABLE; + } + + FAPI_DBG("System IVRM Enable : %s", attrVal ? "TRUE" : "FALSE" ); + + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_SYSTEM_WOF_ENABLED, + FAPI_SYSTEM, + attrVal), + "Error from FAPI_ATTR_GET for attribute ATTR_SYSTEM_WOF_ENABLED" ); + + if( attrVal ) + { + qmFlags |= CME_QM_FLAG_SYS_WOF_ENABLE; + } + + FAPI_DBG("System WOF Enable : %s", attrVal ? "TRUE" : "FALSE" ); + // Set PGPE Header Flags from Attributes FAPI_DBG(" -------------------- PGPE Flags -----------------"); pgpeFlags.value = 0; @@ -789,10 +826,12 @@ fapi2::ReturnCode updateImageFlags( Homerlayout_t* i_pChipHomer, CONST_FAPI2_PRO // Updating flag fields in the headers pCmeHdr->g_cme_mode_flags = SWIZZLE_4_BYTE(cmeFlag); + pCmeHdr->g_cme_qm_mode_flags = SWIZZLE_2_BYTE(qmFlags); pSgpeHdr->g_sgpe_reserve_flags = SWIZZLE_4_BYTE(sgpeFlag); pPgpeHdr->g_pgpe_flags = SWIZZLE_2_BYTE(pgpeFlags.value); FAPI_INF("CME Flag Value : 0x%08x", SWIZZLE_4_BYTE(pCmeHdr->g_cme_mode_flags)); + FAPI_INF("CME QM Flag Value : 0x%08x", SWIZZLE_2_BYTE(pCmeHdr->g_cme_qm_mode_flags)); FAPI_INF("SGPE Flag Value : 0x%08x", SWIZZLE_4_BYTE(pSgpeHdr->g_sgpe_reserve_flags)); FAPI_INF("SGPE Chtm Config : 0x%016llx", SWIZZLE_8_BYTE(pSgpeHdr->g_sgpe_chtm_mem_cfg)); FAPI_INF("PGPE Flag Value : 0x%08x", SWIZZLE_2_BYTE(pPgpeHdr->g_pgpe_flags)); |