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authorClaus Michael Olsen <cmolsen@us.ibm.com>2018-02-26 08:29:19 -0600
committerDaniel M. Crowell <dcrowell@us.ibm.com>2018-05-17 18:05:24 -0400
commitb2270113704833db3c333a9aa36f46e95d3f0edf (patch)
treeaec44dd504b64e0eb664b4cef91e93d220994c30
parent6838b3e411111f73ce0eebfb02d44d7c2baa15d1 (diff)
downloadtalos-hostboot-b2270113704833db3c333a9aa36f46e95d3f0edf.tar.gz
talos-hostboot-b2270113704833db3c333a9aa36f46e95d3f0edf.zip
Update to p9_xip_tool to handle stand-alone DDCO ring files.
In this update, we're adding support to p9_xip_tool to be able to dissect and extract stand-alone DDCO ring files, i.e. files that are DD packaged through using the dd_container API and which is the DD packaging that XIP "understands". Right now, dissect and extract (of a specific DD level) can only be achieved if the DDCO binary is attached to the XIP image as one of the rings sections, .rings, .overlays or .overrides. Key_Cronus_Test=XIP_REGRESS Change-Id: I8be00742f05b4df61652a1de6d0230bb5d203f97 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54704 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Sumit Kumar <sumit_kumar@in.ibm.com> Reviewed-by: Richard J. Knight <rjknight@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56110 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
-rw-r--r--src/import/chips/common/utils/imageProcs/common_ringId.H4
-rw-r--r--src/import/chips/p9/procedures/hwp/customize/p9_xip_customize.C26
-rw-r--r--src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.C2
-rw-r--r--src/import/chips/p9/xip/p9_xip_image.C4
-rw-r--r--src/import/chips/p9/xip/p9_xip_image.h2
-rw-r--r--src/usr/fapi2/plat_utils.C4
6 files changed, 21 insertions, 21 deletions
diff --git a/src/import/chips/common/utils/imageProcs/common_ringId.H b/src/import/chips/common/utils/imageProcs/common_ringId.H
index 832608ec1..bef223357 100644
--- a/src/import/chips/common/utils/imageProcs/common_ringId.H
+++ b/src/import/chips/common/utils/imageProcs/common_ringId.H
@@ -49,7 +49,7 @@ typedef uint8_t RingType_t; // Type for RingType enum
typedef uint8_t RingVariant_t; // Type for RingVariant enum
typedef uint8_t RingBlockType_t; // Type for RingBlockType enum, e.g. GET_SINGLE_RING
typedef uint32_t TorCpltOffset_t; // Type for offset value to chiplet's CMN or INST section
-typedef uint8_t myBoolean_t; // false:0, true:1, undefined:UNDEFINED_BOOLEAN
+typedef uint8_t MyBool_t; // false:0, true:1, undefined:UNDEFINED_BOOLEAN
#define UNDEFINED_RING_ID (RingId_t)0xffff
#define UNDEFINED_CHIPLET_TYPE (ChipletType_t)0xff
@@ -66,7 +66,7 @@ typedef uint8_t myBoolean_t; // false:0, true:1, undefined:UNDEFINED_BOOL
#define MAX_RING_PATH_LENGTH (uint8_t)500
#define MAX_RING_NAME_LENGTH (uint8_t)50
-#define UNDEFINED_BOOLEAN (myBoolean_t)0xff
+#define UNDEFINED_BOOLEAN (MyBool_t)0xff
// //
// Declare assumptions - End //
diff --git a/src/import/chips/p9/procedures/hwp/customize/p9_xip_customize.C b/src/import/chips/p9/procedures/hwp/customize/p9_xip_customize.C
index 2d401661e..c9477dba9 100644
--- a/src/import/chips/p9/procedures/hwp/customize/p9_xip_customize.C
+++ b/src/import/chips/p9/procedures/hwp/customize/p9_xip_customize.C
@@ -796,20 +796,20 @@ fapi2::ReturnCode _fetch_and_insert_vpd_rings(
l_vpdRingSize = be16toh(((CompressedScanData*)i_vpdRing)->iv_size);
}
- //@TODO: Remove following line asap. Temporary fix until Sgro starts using
- // latest p9_scan_compression.H.
- // Also fix p9_mvpd_ring_funcs.C to look for entire RS4_MAGIC string.
- // Actually, do all the above in connection with RS4 header
- // shrinkage (RTC158101 and RTC159801).
- // This TODO item now captured in RTC177327.
- ((CompressedScanData*)i_vpdRing)->iv_magic = htobe16(RS4_MAGIC);
-
// Initialize variable to check for redundant ring.
int redundant = 0;
- // Check if ring is a flush ring, i.e. if it is redundant, meaning that it will
- // result in no change.
- l_rc = rs4_redundant((CompressedScanData*)i_vpdRing, &redundant);
+ if ( ((CompressedScanData*)i_vpdRing)->iv_magic != htobe16(RS4_MAGIC) )
+ {
+ l_rc = INFRASTRUCT_RC_USER_ERROR;
+ }
+ else
+ {
+ // Check if ring is a flush ring, i.e. if it is redundant, meaning that it will
+ // result in no change.
+ l_rc = rs4_redundant((CompressedScanData*)i_vpdRing, &redundant);
+ }
+
FAPI_ASSERT( l_rc == 0,
fapi2::XIPC_RS4_REDUNDANT_ERROR().
set_CHIP_TARGET(i_procTarget).
@@ -1005,7 +1005,7 @@ fapi2::ReturnCode resolve_gptr_overlays(
P9XipSection l_xipSection;
int l_rc = INFRASTRUCT_RC_SUCCESS;
uint8_t l_nimbusDd1 = 1;
- myBoolean_t l_bDdSupport = UNDEFINED_BOOLEAN;
+ MyBool_t l_bDdSupport = UNDEFINED_BOOLEAN;
FAPI_DBG("Entering resolve_gptr_overlays");
@@ -1875,7 +1875,7 @@ ReturnCode p9_xip_customize (
uint8_t attrDdLevel = UNDEFINED_DD_LEVEL; // Used for host services
uint8_t l_xipDdLevel = UNDEFINED_DD_LEVEL; // Used for XIP extraction
- myBoolean_t l_bDdSupport = UNDEFINED_BOOLEAN;
+ MyBool_t l_bDdSupport = UNDEFINED_BOOLEAN;
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.C b/src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.C
index 9e69a33b8..322da4a44 100644
--- a/src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.C
+++ b/src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.C
@@ -681,7 +681,7 @@ uint32_t getXipImageSectn( uint8_t * i_srcPtr, uint8_t i_secId, uint8_t i_ecLeve
uint32_t rc = IMG_BUILD_SUCCESS;
do
{
- myBoolean_t ecLvlSupported = UNDEFINED_BOOLEAN;
+ MyBool_t ecLvlSupported = UNDEFINED_BOOLEAN;
rc = p9_xip_dd_section_support( i_srcPtr, i_secId, &ecLvlSupported );
diff --git a/src/import/chips/p9/xip/p9_xip_image.C b/src/import/chips/p9/xip/p9_xip_image.C
index fd0606e40..595354b54 100644
--- a/src/import/chips/p9/xip/p9_xip_image.C
+++ b/src/import/chips/p9/xip/p9_xip_image.C
@@ -3238,7 +3238,7 @@ p9_xip_map_toc(void* io_image,
//
int p9_xip_dd_section_support(const void* i_image,
const int i_sectionId,
- myBoolean_t* o_bDdSupport)
+ MyBool_t* o_bDdSupport)
{
int rc;
P9XipSection section;
@@ -3247,7 +3247,7 @@ int p9_xip_dd_section_support(const void* i_image,
if (!rc)
{
- *o_bDdSupport = (myBoolean_t)section.iv_ddSupport;
+ *o_bDdSupport = (MyBool_t)section.iv_ddSupport;
if (section.iv_ddSupport != true && section.iv_ddSupport != false)
{
diff --git a/src/import/chips/p9/xip/p9_xip_image.h b/src/import/chips/p9/xip/p9_xip_image.h
index cd3812db4..d5e8cc43c 100644
--- a/src/import/chips/p9/xip/p9_xip_image.h
+++ b/src/import/chips/p9/xip/p9_xip_image.h
@@ -1391,7 +1391,7 @@ p9_xip_get_toc(void* i_image,
int
p9_xip_dd_section_support(const void* i_image,
const int i_sectionId,
- myBoolean_t* o_bDdSupport);
+ MyBool_t* o_bDdSupport);
/// \brief Decode a TOC entry from dump file
diff --git a/src/usr/fapi2/plat_utils.C b/src/usr/fapi2/plat_utils.C
index 0d2c0d747..e6445e219 100644
--- a/src/usr/fapi2/plat_utils.C
+++ b/src/usr/fapi2/plat_utils.C
@@ -146,8 +146,8 @@ ReturnCode get_ring(Target<TARGET_TYPE_MEMBUF_CHIP>i_target,
if(((P9XipHeader*)l_centaurHwImageAddr)->iv_magic
== P9_XIP_MAGIC_CENTAUR)
{
- uint8_t l_ddLevel = UNDEFINED_DD_LEVEL;
- myBoolean_t l_bDdSupport = false;
+ uint8_t l_ddLevel = UNDEFINED_DD_LEVEL;
+ MyBool_t l_bDdSupport = UNDEFINED_BOOLEAN;
int l_rc = p9_xip_dd_section_support(l_centaurHwImageAddr,
P9_XIP_SECTION_HW_RINGS, &l_bDdSupport);
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