PRD: Support for handling core unit checkstop

Change-Id: Ia0ef737ea394028fb3dfb2af168a245aa0655460
RTC: 136049
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59390
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Matt Derksen <mderkse1@us.ibm.com>
Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59764
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>

7 files changed, 423 insertions, 42 deletions

diff --git a/src/usr/diag/prdf/common/plat/p9/p9_ec.rule b/src/usr/diag/prdf/common/plat/p9/p9_ec.rule
index 73e0614ac..a839819f8 100644
--- a/src/usr/diag/prdf/common/plat/p9/p9_ec.rule
+++ b/src/usr/diag/prdf/common/plat/p9/p9_ec.rule
@@ -5,7 +5,7 @@
 #
 # OpenPOWER HostBoot Project
 #
-# Contributors Listed Below - COPYRIGHT 2016,2017
+# Contributors Listed Below - COPYRIGHT 2016,2018
 # [+] International Business Machines Corp.
 #
 #
@@ -180,32 +180,50 @@ chip p9_ec
  ##############################################################################
 
 ################################################################################
-# Summary for EC
+# EC Chiplet FIR
 ################################################################################
-
-# We prefer to use the EC chiplet FIRs, however, COREFIR recoverable errors will
-# not report through the chiplet FIRs due to a bug in Nimbus DD1.0. Instead, we
-# will bypass the chiplet FIRS completely and use the summary construct.
-
-rule rEC
+rule rEC_CHIPLET_FIR
 {
   CHECK_STOP:
-    summary( 0, rEC_LFIR ) |
-    summary( 1, rCOREFIR );
-
+     EC_CHIPLET_CS_FIR       & ~EC_CHIPLET_FIR_MASK & `1fffffffffffffff`;
   RECOVERABLE:
-    summary( 0, rEC_LFIR ) |
-    summary( 1, rCOREFIR );
+    (EC_CHIPLET_RE_FIR >> 2) & ~EC_CHIPLET_FIR_MASK & `3fffffffffffffff`;
+};
 
-  UNIT_CS:
-    summary( 1, rCOREFIR );
+group gEC_CHIPLET_FIR attntype CHECK_STOP, RECOVERABLE filter singlebit
+{
+    /** EC_CHIPLET_FIR[2]
+     *  Unit Checkstop from COREFIR (bit0 in RER)
+     */
+    (rEC_CHIPLET_FIR, bit(2)) ? analyzeCOREFIR;
+
+    /** EC_CHIPLET_FIR[3]
+     *  Attention from EC_LFIR
+     */
+    (rEC_CHIPLET_FIR, bit(3)) ? analyze(gEC_LFIR);
 
+    /** EC_CHIPLET_FIR[4]
+     *  Attention from COREFIR
+     */
+    (rEC_CHIPLET_FIR, bit(4)) ? analyzeCOREFIR;
 };
 
-group gEC attntype CHECK_STOP, RECOVERABLE, UNIT_CS filter singlebit
+################################################################################
+# EC Chiplet Unit Checkstop FIR
+################################################################################
+
+rule rEC_CHIPLET_UCS_FIR
 {
-    (rEC, bit(0)) ? analyze(gEC_LFIR);
-    (rEC, bit(1)) ? analyze(gCOREFIR);
+  UNIT_CS:
+    EC_CHIPLET_UCS_FIR & ~EC_CHIPLET_UCS_FIR_MASK & `7fffffffffffffff`;
+};
+
+group gEC_CHIPLET_UCS_FIR attntype UNIT_CS filter singlebit
+{
+    /** EC_CHIPLET_UCS_FIR[1]
+     *  Unit Checkstop from COREFIR
+     */
+    (rEC_CHIPLET_UCS_FIR, bit(1)) ? analyzeCOREFIR;
 };
 
 ################################################################################
@@ -308,7 +326,7 @@ rule rCOREFIR
     COREFIR & ~COREFIR_MASK &  COREFIR_ACT0 &  COREFIR_ACT1;
 };
 
-group gCOREFIR filter singlebit, cs_root_cause
+group gCOREFIR filter priority(0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,58,59,60,61,62,63,57), cs_root_cause
 {
     /** COREFIR[0]
      *  IFU SRAM Recoverable error
@@ -573,7 +591,7 @@ group gCOREFIR filter singlebit, cs_root_cause
     /** COREFIR[57]
      *  Other Core Core Checkstop
      */
-    (rCOREFIR, bit(57)) ? defaultMaskedError;
+    (rCOREFIR, bit(57)) ? self_th_1;
 
     /** COREFIR[58]
      *  Other Core System Checkstop
diff --git a/src/usr/diag/prdf/common/plat/p9/p9_ec_actions.rule b/src/usr/diag/prdf/common/plat/p9/p9_ec_actions.rule
index 0a7ff0273..8000b84c3 100644
--- a/src/usr/diag/prdf/common/plat/p9/p9_ec_actions.rule
+++ b/src/usr/diag/prdf/common/plat/p9/p9_ec_actions.rule
@@ -28,3 +28,30 @@ actionclass self_level2_th_5perHour
     callout2ndLvlMed;
     threshold5phour;
 };
+
+###############################################################################
+# Core checkstop action classes
+###############################################################################
+actionclass analyzeThisCore
+{
+    funccall("CheckCoreCheckstop");
+    analyze(gCOREFIR);
+};
+
+actionclass returnFailure
+{
+    funccall("ReturnFailure");
+};
+
+# Core checkstop is only supported on PHYP systems. PHYP only supports
+# fused-cores. When a normal core checkstops, its fused-core neighbor will
+# checkstop along with it. Both cores will end up reporting core checkstop
+# attentions. This actionclass checks if this core's fused-core neighbor has the
+# real Core checkstop that we should be analyzing. If so, we will return a
+# failing RC so that the analysis will continue to the next chip at attention
+actionclass analyzeCOREFIR
+{
+    try( funccall("neighborCoreCS"), analyzeThisCore );
+    try( funccall("notNeighborCoreCS"), returnFailure );
+};
+
diff --git a/src/usr/diag/prdf/common/plat/p9/prdfP9Ec.C b/src/usr/diag/prdf/common/plat/p9/prdfP9Ec.C
index 92a9540ee..289fff59c 100644
--- a/src/usr/diag/prdf/common/plat/p9/prdfP9Ec.C
+++ b/src/usr/diag/prdf/common/plat/p9/prdfP9Ec.C
@@ -27,6 +27,11 @@
 #include <iipServiceDataCollector.h>
 #include <prdfExtensibleChip.H>
 #include <prdfPluginMap.H>
+#include <prdfErrlUtil.H>
+#ifdef __HOSTBOOT_RUNTIME
+  #include <hwas/common/hwas.H>
+  #include <hwas/common/deconfigGard.H>
+#endif
 
 using namespace TARGETING;
 
@@ -37,6 +42,58 @@ using namespace PlatServices;
 
 namespace p9_ec
 {
+#ifdef __HOSTBOOT_RUNTIME
+void maskIfCoreCs( ExtensibleChip * i_chip )
+{
+    int32_t l_rc = SUCCESS;
+
+    // Get core global mask register.
+    SCAN_COMM_REGISTER_CLASS * coreFirMask =
+        i_chip->getRegister("EC_CHIPLET_FIR_MASK");
+
+    SCAN_COMM_REGISTER_CLASS * coreUcsMask =
+        i_chip->getRegister("EC_CHIPLET_UCS_FIR_MASK");
+
+    // Read values.
+    l_rc  = coreFirMask->Read();
+    l_rc |= coreUcsMask->Read();
+
+    if (SUCCESS == l_rc)
+    {
+        // Mask bit 4 for recoverable and checkstop
+        coreFirMask->SetBit(4);
+        // Mask bit 2 for unit cs summary reported as recoverable
+        coreFirMask->SetBit(2);
+
+        // Mask bit 1 for Unit checkstop
+        coreUcsMask->SetBit(1);
+
+        coreFirMask->Write();
+        coreUcsMask->Write();
+    }
+}
+
+void rtDcnfgCore( ExtensibleChip * i_chip )
+{
+    TargetHandle_t coreTgt = i_chip->getTrgt();
+
+    // Get the Global Errorlog
+    errlHndl_t globalErrl =
+        ServiceGeneratorClass::ThisServiceGenerator().getErrl();
+
+    // Call Deconfig
+    errlHndl_t errl = nullptr;
+    errl = HWAS::theDeconfigGard().deconfigureTargetAtRuntime( coreTgt,
+                       HWAS::DeconfigGard::FULLY_AT_RUNTIME, globalErrl );
+
+    if (errl)
+    {
+        PRDF_ERR( "[EC::rtDcnfgCore] Deconfig failed on core %x",
+                  getHuid(coreTgt));
+        PRDF_COMMIT_ERRL( errl, ERRL_ACTION_REPORT );
+    }
+}
+#endif
 
 /**
  * @brief  Plugin function called after analysis is complete but before PRD
@@ -51,15 +108,283 @@ int32_t PostAnalysis( ExtensibleChip * i_chip,
                       STEP_CODE_DATA_STRUCT & io_sc )
 {
 #ifdef __HOSTBOOT_RUNTIME
-    int32_t l_rc = restartTraceArray(i_chip->GetChipHandle());
-    if (SUCCESS != l_rc)
+    if ( io_sc.service_data->IsUnitCS() )
     {
-        PRDF_ERR( "[EC PostAnalysis HUID: 0x%08x RestartTraceArray failed",
-                  i_chip->GetId());
+        maskIfCoreCs(i_chip);
+        rtDcnfgCore(i_chip);
+        ExtensibleChip * n_chip = getNeighborCore(i_chip);
+        if (n_chip != nullptr)
+        {
+            maskIfCoreCs(n_chip);
+            rtDcnfgCore(n_chip);
+        }
+    }
+    else
+    {
+        int32_t l_rc = restartTraceArray(i_chip->GetChipHandle());
+        if (SUCCESS != l_rc)
+        {
+            PRDF_ERR( "[EC PostAnalysis HUID: 0x%08x RestartTraceArray failed",
+                      i_chip->GetId());
+        }
+
     }
 #endif
     return SUCCESS;
 } PRDF_PLUGIN_DEFINE(p9_ec, PostAnalysis);
 
+/**
+ * @brief Checks if this core has checkstopped as a side effect of its
+ * fused-core neighbor checkstopping
+ *
+ * @param  i_chip    EC chip.
+ * @return TRUE      If UCS root cause is on neighbor
+ *         FALSE     If UCS root cause is not on neighbor
+ */
+bool neighborHasRealCoreCS( ExtensibleChip * i_chip )
+{
+    int32_t l_rc = SUCCESS;
+    bool neighborHasRealCs = false;
+
+    // Check if this core is reporting a neighbor Core Checkstop with no
+    // other core checkstop bits of its own
+    SCAN_COMM_REGISTER_CLASS *fir  = i_chip->getRegister("COREFIR");
+    SCAN_COMM_REGISTER_CLASS *msk  = i_chip->getRegister("COREFIR_MASK");
+    SCAN_COMM_REGISTER_CLASS *act0 = i_chip->getRegister("COREFIR_ACT0");
+    SCAN_COMM_REGISTER_CLASS *act1 = i_chip->getRegister("COREFIR_ACT1");
+
+    l_rc |=  fir->Read();
+    l_rc |=  msk->Read();
+    l_rc |= act0->Read();
+    l_rc |= act1->Read();
+
+    if (SUCCESS != l_rc)
+    {
+        PRDF_ERR( "[EC neighborHasRealCoreCS] scom fail on HUID 0x%08x",
+                  i_chip->GetId());
+        return false;
+    }
+
+    uint64_t firBits  =  fir->GetBitFieldJustified(0, 64);
+    uint64_t mskBits  =  msk->GetBitFieldJustified(0, 64);
+    uint64_t act0Bits = act0->GetBitFieldJustified(0, 64);
+    uint64_t act1Bits = act1->GetBitFieldJustified(0, 64);
+
+    if ( ( firBits & ~mskBits & act0Bits & act1Bits ) == 0x0000000000000040ULL )
+    {
+        // If the only Unit checkstop bit set on this core is bit 57, then
+        // we will skip this core and check the neighbor for the true cause
+
+        // Get neighbor core
+        ExtensibleChip * n_chip = getNeighborCore( i_chip );
+        if (n_chip == nullptr)
+            return false;
+
+        // Get neighbor regs
+        SCAN_COMM_REGISTER_CLASS * wof;
+        uint64_t wofBits;
+
+        fir  = n_chip->getRegister("COREFIR");
+        wof  = n_chip->getRegister("COREFIR_WOF");
+        msk  = n_chip->getRegister("COREFIR_MASK");
+        act1 = n_chip->getRegister("COREFIR_ACT1");
+
+        l_rc |=  fir->Read();
+        l_rc |=  wof->Read();
+        l_rc |=  msk->Read();
+        l_rc |= act1->Read();
+
+        if (SUCCESS != l_rc)
+        {
+            PRDF_ERR( "[EC neighborHasRealCoreCS] scom fail on HUID 0x%08x",
+                      n_chip->GetId());
+            return false;
+        }
+
+        firBits  =  fir->GetBitFieldJustified(0, 64);
+        wofBits  =  wof->GetBitFieldJustified(0, 64);
+        mskBits  =  msk->GetBitFieldJustified(0, 64);
+        act1Bits = act1->GetBitFieldJustified(0, 64);
+
+        // Ensure that neighbor has something to analyze (RE or UCS)
+        if ( (firBits | wofBits) & ~mskBits & act1Bits )
+        {
+            PRDF_TRAC("[EC neighborHasRealCoreCS] need to analyze neighbor "
+                      "0x%08x for UCS root cause.", n_chip->GetId());
+            neighborHasRealCs = true;
+        }
+    }
+
+    return neighborHasRealCs;
 }
+
+int32_t neighborCoreCS( ExtensibleChip * i_chip )
+{
+    return neighborHasRealCoreCS(i_chip) ? SUCCESS : FAIL;
+} PRDF_PLUGIN_DEFINE(p9_ec, neighborCoreCS);
+
+int32_t notNeighborCoreCS( ExtensibleChip * i_chip )
+{
+    return neighborHasRealCoreCS(i_chip) ? FAIL : SUCCESS;
+} PRDF_PLUGIN_DEFINE(p9_ec, notNeighborCoreCS);
+
+
+void checkCoreRePresent( ExtensibleChip * i_chip,
+                         STEP_CODE_DATA_STRUCT & io_sc )
+{
+    int32_t l_rc = SUCCESS;
+    SCAN_COMM_REGISTER_CLASS *coreWOF =
+             i_chip->getRegister("COREFIR_WOF");
+    SCAN_COMM_REGISTER_CLASS * coreMask =
+             i_chip->getRegister("COREFIR_MASK");
+    SCAN_COMM_REGISTER_CLASS * coreAct0 =
+             i_chip->getRegister("COREFIR_ACT0");
+    SCAN_COMM_REGISTER_CLASS * coreAct1 =
+             i_chip->getRegister("COREFIR_ACT1");
+
+    l_rc  = coreWOF->Read();
+    l_rc |= coreMask->Read();
+    l_rc |= coreAct0->Read();
+    l_rc |= coreAct1->Read();
+    if (SUCCESS != l_rc)
+    {
+        PRDF_ERR( "[EC::checkCoreRePresent] HUID: 0x%08x failed to read"
+                  "CORE FIR", i_chip->GetId());
+        return;
+    }
+
+    uint64_t coreWOFbits  =  coreWOF->GetBitFieldJustified(0, 64);
+    uint64_t coreMaskbits = coreMask->GetBitFieldJustified(0, 64);
+    uint64_t coreAct0bits = coreAct0->GetBitFieldJustified(0, 64);
+    uint64_t coreAct1bits = coreAct1->GetBitFieldJustified(0, 64);
+
+    // If do not have a valid recoverable bit in COREFIR_WOF, we need to
+    // switch analysis to look at core checkstop bits
+    if ( !( coreWOFbits  & ~coreMaskbits & ~coreAct0bits & coreAct1bits) )
+    {
+        io_sc.service_data->setSecondaryAttnType(UNIT_CS);
+    }
 }
+
+
+/**
+ * @brief Determine if there is a core unit checkstop and perform appropriate
+ * action.
+ *
+ * 1) Set error to predictive / at threshold.
+ * 2) Wait for PHYP to evacuate core.
+ * 3) Terminate if PHYP doesn't evacuate.
+ * 4) If we have UCS without RE, switch attn type to analyze UCS
+ * @param i_chip Ex chip.
+ * @param io_sc Step Code data struct
+ * @return PRD return code
+ */
+int32_t CheckCoreCheckstop( ExtensibleChip * i_chip,
+                            STEP_CODE_DATA_STRUCT & io_sc )
+{
+    #define PRDF_FUNC "[p9_ec::CheckCoreCheckstop] "
+    int32_t l_rc = SUCCESS;
+    static const uint32_t CORECS_SECONDS_TO_SLEEP = 10;
+
+    do
+    {
+        // Skip if we're already at core checkstop in SDC.
+        if (io_sc.service_data->IsUnitCS())
+            break;
+
+        // Read core checkstop bit in chiplet RER.
+        SCAN_COMM_REGISTER_CLASS * coreRER
+                                = i_chip->getRegister("EC_CHIPLET_RE_FIR");
+        l_rc = coreRER->ForceRead();
+        if (SUCCESS != l_rc)
+            break;
+
+        // Check core checkstop bit.
+        if (!coreRER->IsBitSet(0))
+            break;
+
+        // We must be at core checkstop.
+        io_sc.service_data->setFlag(ServiceDataCollector::UNIT_CS);
+        io_sc.service_data->SetThresholdMaskId(0);
+
+        // Check if we need to switch attn type to analyze Unit checkstop
+        checkCoreRePresent(i_chip, io_sc);
+
+        if( CHECK_STOP == io_sc.service_data->getPrimaryAttnType() )
+        {
+            // if both Unit CS and Platform CS occur together, PHYP will not
+            // respond to the core evacuation hand-shaking. Don't wait for them
+            // and don't collect SH dump. This specifically targets a case
+            //  where COREFIR bit 54 and 55 assert together.
+
+            break;
+        }
+
+        SCAN_COMM_REGISTER_CLASS *coreHMEER
+            = i_chip->getRegister("HOMER_ENABLE");
+        l_rc = coreHMEER->Read();
+        if (SUCCESS != l_rc)
+            break;
+
+        // Check if PHYP has enabled core checkstop (HMEER[0]).
+        if (!coreHMEER->IsBitSet(0))
+        {
+            // Core checkstop not enabled, terminate.
+            io_sc.service_data->setFlag( ServiceDataCollector::TERMINATE );
+
+            // TODO: RTC 144705 - We can no longer use SH, we'll need to pick
+            // either SW or HW
+            // PHYP was unresponsive, be sure to get SH content.
+            //io_sc.service_data->SetDump(CONTENT_SH, i_chip->GetChipHandle());
+            break;
+        }
+
+        // Wait for PHYP evacuation by checking SPATTN register.
+        SCAN_COMM_REGISTER_CLASS * coreSPAttn
+            = i_chip->getRegister("SPEC_ATTN_REASON");
+
+        bool spAttnCleared = false;
+        uint32_t secondsToSleep = CORECS_SECONDS_TO_SLEEP;
+
+        do
+        {
+            // Don't sleep on first time through.
+            if (secondsToSleep != CORECS_SECONDS_TO_SLEEP)
+            {
+                PlatServices::milliSleep(1,0); // 1 second
+            }
+            secondsToSleep--;
+
+            l_rc = coreSPAttn->ForceRead();
+            if (SUCCESS == l_rc)
+            {
+                if (!coreSPAttn->IsBitSet(2))
+                {
+                    spAttnCleared = 1;
+                }
+            }
+        } while ((secondsToSleep != 0) && (!spAttnCleared));
+
+        if (SUCCESS == l_rc && !spAttnCleared)
+        {
+            // If we waited and never cleared, terminate machine.
+            io_sc.service_data->setFlag( ServiceDataCollector::TERMINATE );
+
+            // TODO: RTC 144705
+            // PHYP was unresponsive, so get SH content.
+            //io_sc.service_data->SetDump(CONTENT_SH, i_chip->GetChipHandle());
+        }
+    } while(0);
+    return SUCCESS;
+    #undef PRDF_FUNC
+} PRDF_PLUGIN_DEFINE(p9_ec, CheckCoreCheckstop);
+
+int32_t ReturnFailure( ExtensibleChip * i_chip )
+{
+    PRDF_TRAC("[EC::ReturnFailure] return failure so that we can analyze "
+              "neighbor core");
+    return PRD_SCAN_COMM_REGISTER_ZERO;
+} PRDF_PLUGIN_DEFINE(p9_ec, ReturnFailure);
+
+} // end namespace p9_ec
+} // end namespace PRDF
diff --git a/src/usr/diag/prdf/common/plat/prdfRasServices_common.H b/src/usr/diag/prdf/common/plat/prdfRasServices_common.H
index 6aa0055d4..cb449f6b4 100644
--- a/src/usr/diag/prdf/common/plat/prdfRasServices_common.H
+++ b/src/usr/diag/prdf/common/plat/prdfRasServices_common.H
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2016,2017                        */
+/* Contributors Listed Below - COPYRIGHT 2016,2018                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -199,14 +199,6 @@ class ErrDataService
     void handleChannelFail( TARGETING::TargetHandle_t i_memTarget );
 
     /**
-     * @brief Handles Core checkstop.
-     * @param i_exTarget EX target.
-     * @param o_initiateHwudump whether or not to initiate hwudump
-     */
-    void handleCoreUnitCS( TARGETING::TargetHandle_t i_exTarget,
-                           bool & o_initiateHwudump );
-
-    /**
      * @brief Handles NX checkstops.
      * @param i_nxTarget NX target.
      */
diff --git a/src/usr/diag/prdf/common/plat/prdfTargetServices.C b/src/usr/diag/prdf/common/plat/prdfTargetServices.C
index cb4dce961..3892a7c45 100755
--- a/src/usr/diag/prdf/common/plat/prdfTargetServices.C
+++ b/src/usr/diag/prdf/common/plat/prdfTargetServices.C
@@ -941,6 +941,27 @@ ExtensibleChip * getConnectedChild( ExtensibleChip * i_parent,
 
 //------------------------------------------------------------------------------
 
+ExtensibleChip * getNeighborCore( ExtensibleChip * i_core )
+{
+    PRDF_ASSERT( nullptr != i_core );
+
+    TargetHandle_t thisCore = i_core->getTrgt();
+    ExtensibleChip * neighborCore = nullptr;
+    TargetHandleList list =
+      getConnected(getConnectedParent(thisCore, TYPE_EX), TYPE_CORE);
+
+    for ( auto & trgt : list)
+    {
+        if ( trgt != thisCore )
+        {
+            neighborCore = (ExtensibleChip *)systemPtr->GetChip(trgt);
+            break;
+        }
+    }
+    return neighborCore;
+}
+//------------------------------------------------------------------------------
+
 TargetHandle_t getConnectedPeerTarget( TargetHandle_t i_target )
 {
     #define PRDF_FUNC "[PlatServices::getConnectedPeerTarget] "
diff --git a/src/usr/diag/prdf/common/plat/prdfTargetServices.H b/src/usr/diag/prdf/common/plat/prdfTargetServices.H
index c876658c5..7a349fd61 100755
--- a/src/usr/diag/prdf/common/plat/prdfTargetServices.H
+++ b/src/usr/diag/prdf/common/plat/prdfTargetServices.H
@@ -263,6 +263,13 @@ ExtensibleChip * getConnectedChild( ExtensibleChip * i_parent,
                                     uint32_t i_childPos );
 
 /**
+ * @brief Returns the fused-core neighbor of a given core chip
+ * @param i_core  The given core chip
+ * @return        The neighbor core chip
+ */
+ExtensibleChip * getNeighborCore( ExtensibleChip * i_core );
+
+/**
  * @brief   Returns the target of a PROC that is connected via the given
  *          target's XBUS or ABUS.
  * @param   i_procTarget Target of TYPE_PROC.
diff --git a/src/usr/diag/prdf/plat/prdfRasServices.C b/src/usr/diag/prdf/plat/prdfRasServices.C
index 6d276bfb6..6e6a59acd 100644
--- a/src/usr/diag/prdf/plat/prdfRasServices.C
+++ b/src/usr/diag/prdf/plat/prdfRasServices.C
@@ -133,15 +133,6 @@ void ErrDataService::handleChannelFail( TargetHandle_t i_memTarget )
 
 //------------------------------------------------------------------------------
 
-void ErrDataService::handleCoreUnitCS( TargetHandle_t i_exTarget,
-                                       bool & o_initiateHwudump)
-{
-    // No-op in Hostboot
-    o_initiateHwudump = false; // default to not initiate hwudump
-}
-
-//------------------------------------------------------------------------------
-
 void ErrDataService::handleNxUnitCS( TargetHandle_t i_nxTarget )
 {
     // No-op in Hostboot