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| author | CHRISTINA L. GRAVES <clgraves@us.ibm.com> | 2016-08-03 08:40:36 -0500 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2018-06-15 10:18:46 -0400 |
| commit | c63b3e4a122cb9999872eddf7a8e004a9f3d1263 (patch) | |
| tree | 06ff70ee67a99004631e47ec560207e65e60e605 | |
| parent | 75649c5f3d450e0a5ef0fe364291467908628ded (diff) | |
| download | talos-hostboot-c63b3e4a122cb9999872eddf7a8e004a9f3d1263.tar.gz talos-hostboot-c63b3e4a122cb9999872eddf7a8e004a9f3d1263.zip | |
p9_fab_iovalid fix to clear action0/1 bits corresponding w/ link being enabled
Change-Id: I55c690d59a48a0c9e2e1813afb6e8afc7d9cf8ad
Original-Change-Id: Ibc6b1f53bc9d625293e0fc5f2def7f0dd4ef4789
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/27830
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Prachi Gupta <pragupta@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60647
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Disable-CI: Daniel M. Crowell <dcrowell@us.ibm.com>
Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/nest/p9_fab_iovalid.C | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_fab_iovalid.C b/src/import/chips/p9/procedures/hwp/nest/p9_fab_iovalid.C index 097dfbe7a..e1d2ab8f1 100644 --- a/src/import/chips/p9/procedures/hwp/nest/p9_fab_iovalid.C +++ b/src/import/chips/p9/procedures/hwp/nest/p9_fab_iovalid.C @@ -254,6 +254,7 @@ p9_fab_iovalid_update_link(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_ // form data buffers for iovalid/RAS FIR mask updates fapi2::buffer<uint64_t> l_iovalid_mask; fapi2::buffer<uint64_t> l_ras_fir_mask; + fapi2::buffer<uint64_t> l_extfir_action; if (i_set_not_clear) { @@ -264,6 +265,19 @@ p9_fab_iovalid_update_link(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_ // clear RAS FIR mask l_ras_fir_mask.flush<1>(); FAPI_TRY(l_ras_fir_mask.clearBit(i_ctl.ras_fir_field_bit)); + + //Get the value of the action 0 command register, clear the bit and write it + FAPI_TRY(fapi2::getScom(i_target, PU_PB_CENT_SM1_EXTFIR_ACTION0_REG, l_extfir_action), + "Error reading Action 0 register"); + FAPI_TRY(l_extfir_action.clearBit(i_ctl.ras_fir_field_bit)); + FAPI_TRY(fapi2::putScom(i_target, PU_PB_CENT_SM1_EXTFIR_ACTION0_REG, l_extfir_action), + "Error writing Action 0 register"); + //Get the value of the action 1 registers, clear the bit, and write it + FAPI_TRY(fapi2::getScom(i_target, PU_PB_CENT_SM1_EXTFIR_ACTION1_REG, l_extfir_action), + "Error reading Action 1 register"); + FAPI_TRY(l_extfir_action.clearBit(i_ctl.ras_fir_field_bit)); + FAPI_TRY(fapi2::putScom(i_target, PU_PB_CENT_SM1_EXTFIR_ACTION1_REG, l_extfir_action), + "Error writing Action 1 register"); } else { |
